WO2016145784A1 - 一种内嵌式触摸屏及显示装置 - Google Patents

一种内嵌式触摸屏及显示装置 Download PDF

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Publication number
WO2016145784A1
WO2016145784A1 PCT/CN2015/087694 CN2015087694W WO2016145784A1 WO 2016145784 A1 WO2016145784 A1 WO 2016145784A1 CN 2015087694 W CN2015087694 W CN 2015087694W WO 2016145784 A1 WO2016145784 A1 WO 2016145784A1
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WIPO (PCT)
Prior art keywords
self
touch panel
capacitance
array substrate
cell touch
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PCT/CN2015/087694
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English (en)
French (fr)
Inventor
张洁
樊君
李付强
董学
陈小川
Original Assignee
京东方科技集团股份有限公司
鄂尔多斯市源盛光电有限责任公司
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Application filed by 京东方科技集团股份有限公司, 鄂尔多斯市源盛光电有限责任公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/908,648 priority Critical patent/US9886125B2/en
Publication of WO2016145784A1 publication Critical patent/WO2016145784A1/zh

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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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Definitions

  • the present invention relates to the field of touch technologies, and in particular, to an in-cell touch panel and a display device.
  • the existing in-cell touch screen utilizes the principle of mutual capacitance or self-capacitance to detect the touch position of the finger.
  • the self-capacitance electrode disposed in the same layer and insulated from each other can be disposed in the touch screen by using the principle of self-capacitance.
  • the capacitance of each self-capacitance electrode is a fixed value.
  • the capacitance of the corresponding self-capacitance electrode is the fixed value superimposed on the human body capacitance.
  • the touch detection chip can determine the touch position by detecting the change of the capacitance value of each self-capacitance electrode during the touch time period.
  • the touch screen produced by the self-capacitance principle is touched by the human body in the touch screen produced by the self-capacitance principle.
  • the amount of touch change caused will be greater. Therefore, compared with the touch screen using mutual capacitance, the self-capacitance touch screen can effectively improve the signal-to-noise ratio of the touch, thereby improving the accuracy of the touch sensing.
  • liquid crystal display technologies capable of achieving wide viewing angles mainly include in-plane switching (IPS, In-Plane Switch) technology and advanced super-dimension switch (ADS) technology; among them, ADS technology is narrow through the same plane.
  • IPS in-plane switching
  • ADS advanced super-dimension switch
  • the electric field generated by the edge of the slit electrode and the electric field generated between the slit electrode layer and the plate electrode layer form a multi-dimensional electric field, so that all the liquid crystal molecules in the liquid crystal cell between the slit electrodes and the electrode directly above the electrode can be rotated, thereby improving the liquid crystal.
  • Advanced super-dimensional field conversion technology can improve the picture quality of TFT-LCD products, with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, push mura, etc. advantage.
  • the embodiment of the present invention proposes a new capacitive inlay based on the traditional ADS technology and an important improvement method of the ADS technology, H-ADS (high aperture ratio - advanced super-dimensional field switch).
  • H-ADS high aperture ratio - advanced super-dimensional field switch
  • an embodiment of the present invention provides an in-cell touch panel and a display device for reducing the production cost of the in-cell touch panel and improving production efficiency.
  • an in-cell touch panel includes an array substrate having a plurality of pixel regions arranged in an array, wherein the array substrate is provided with:
  • a common electrode layer that is divided into a plurality of mutually independent self-capacitance electrodes
  • a touch data line disposed on the same layer and connected to the self-capacitance electrode, wherein the orthographic projections of the touch data lines on the array substrate are located in a region between the pixel regions;
  • the in-cell touch panel further includes a touch detection chip connected to each of the self-capacitance electrodes through the touch data line, and the touch detection chip is configured to display the time period through the touch data line And applying a common electrode signal to each of the self-capacitance electrodes, and detecting a change in a capacitance value of each of the self-capacitance electrodes through the touch data line during a touch time period to determine a touch position.
  • each of said self-capacitance electrodes covers a plurality of pixel regions.
  • a thin film transistor structure is disposed in each pixel region of the array substrate with a substrate under the common electrode layer and closer to the array substrate, and the touch data line is located in the common a film layer between the electrode layer and the thin film transistor structure.
  • a gate signal line and a data signal line disposed to intersect each other are further disposed on the array substrate; and the extending direction of the touch data line is the same as the gate signal line, or The data signal lines are the same.
  • the frame of the in-cell touch panel has four sides, and each of the self-capacitance electrodes is connected to the touch data line via the corresponding touch data line without the touch data lines crossing each other.
  • the side of the closest distance is connected to the touch detection chip.
  • the touch data lines are evenly distributed on the array substrate.
  • the leads disposed at the side edges for connecting the touch data lines and the touch detection chip are designed to have more than the touch data lines. Wide line width.
  • a pixel electrode between the common electrode layer and the film layer where the touch data line is located is further disposed on the array substrate.
  • a first conductive portion disposed in the same layer as the pixel electrode and insulated from each other is further disposed on the array substrate, and the self-capacitance electrode passes through the first conductive portion and the corresponding contact Control the data line connection.
  • the common electrode layer is a plate electrode
  • the pixel electrode is a slit electrode
  • an insulating layer is disposed between the pixel electrode and the common electrode layer.
  • a pixel electrode located above the common electrode layer and further away from the array substrate is further disposed on the array substrate.
  • a second conductive portion disposed in the same layer as the common electrode layer and insulated from each other is further disposed on the array substrate, and a drain of the thin film transistor passes through the second conductive portion The pixel electrodes are connected.
  • the pixel electrode is a plate electrode
  • the common electrode layer is a slit electrode
  • an insulating layer is provided between the pixel electrode and the common electrode layer.
  • the slit electrode has a slit structure at a position corresponding to an opening area of the pixel region.
  • the pixel electrode and the common electrode layer are both ITO electrodes.
  • the thin film transistor structure is a bottom gate thin film transistor or a top gate thin film transistor.
  • a light shielding layer is further disposed between the top gate thin film transistor and the base substrate; the pattern of the light shielding layer is in the array
  • An orthographic projection on the substrate covers an orthographic projection of a pattern of gates in the thin film transistor structure on the array substrate.
  • the corresponding sides of the two adjacent self-capacitance electrodes are each arranged to have a shape of a broken line.
  • the adjacent sides of the two adjacent self-capacitance electrodes have mutually matching stepped structures.
  • the opposite sides of the two adjacent self-capacitance electrodes respectively have mutually matching concave-convex structures.
  • Embodiments of the present invention also provide a display device including any of the in-cell touch panels described above.
  • the display device comprises a mobile phone, a tablet computer, a television set, a computer display, a notebook computer, a digital photo frame or a navigator.
  • An in-cell touch panel and a display device multiplex a common electrode layer as a self-capacitance electrode by using a self-capacitance principle, and change a common electrode layer pattern into a plurality of independent self-capacitance electrodes; And adding a touch data line connecting each self-capacitance electrode and the touch detection chip on the array substrate, and the orthographic projections of the touch data lines on the array substrate are located in a region between the pixel regions, so that the touch screen is touched.
  • the black matrix occlusion does not affect the aperture ratio of the pixel; the touch detection chip can determine the touch position by detecting the change of the capacitance value of each self-capacitance electrode during the touch period. Since the touch screen provided by the embodiment of the present invention divides the structure of the common electrode layer into self-capacitance electrodes, on the basis of the existing array substrate preparation process, no additional process is required, which saves production cost and improves Production efficiency.
  • FIG. 1 is a schematic structural diagram of an in-cell touch panel according to an embodiment of the present invention.
  • FIGS. 2a to 2d are respectively side views of an in-cell touch panel according to an embodiment of the present invention.
  • 3a and 3b are schematic diagrams showing driving timings of an in-cell touch panel according to an embodiment of the present invention.
  • 4a and 4b are schematic structural views showing the opposite sides of adjacent self-capacitance electrodes in the in-cell touch panel provided as fold lines, respectively.
  • the word “above” with respect to a portion, element or layer of material that is formed or positioned “above” the surface may be used herein to mean that the portion, element or layer of material is positioned "directly on” the implied surface ( For example, placing, forming, depositing, etc., for example, in direct contact therewith.
  • the word “above” as used in relation to a portion, element or layer of material formed or positioned “above” a surface may be used herein to mean that the portion, element or layer of material is positioned (eg, placed, formed, deposited, etc.) "Indirectly on” the surface implied, with one or more additional portions, elements or layers disposed between the suggested surface and the portion, element or layer of material.
  • an in-cell touch panel provided by an embodiment of the present invention includes an array substrate 100 having a plurality of pixel regions 01 arranged in an array.
  • the array substrate 100 is provided with:
  • the touch data line 03 is disposed on the array substrate 100 and the front projection of each touch data line 03 on the array substrate 100 is located in the region between the pixel regions 01; and the inner In-line touch screen also includes
  • the touch detection chip 04 connected to each of the self-capacitance electrodes 02 through the touch data line 03 is used to load the common electrode signals on the respective self-capacitance electrodes 02 through the touch data lines 03 during the display period, and pass through the touch time period.
  • the touch data line 03 detects a change in the capacitance value of each of the self-capacitance electrodes 02 to determine the touch position.
  • each self-capacitance electrode 02 covers a plurality of pixel regions 01.
  • the in-cell touch panel provided by the embodiment of the present invention multiplexes the common electrode layer as the self-capacitance electrode 02 by using the principle of self-capacitance, and changes the common electrode layer pattern into a plurality of independent self-capacitance electrodes 02;
  • a touch data line 03 connecting each self-capacitance electrode 02 and the touch detection chip 04 is added to the array substrate 100, and each touch data line 03 is
  • the orthographic projections on the array substrate 100 are located in the region of the gap between the pixel regions 01, so that the touch data lines 03 are blocked by the black matrix in the touch screen, and the aperture ratio of the pixels is not affected; the touch detection chip 04 is in touch
  • the control time period can determine the touch position by detecting the change in the capacitance value of each self-capacitance electrode 02. Since the touch screen provided by the embodiment of the present invention changes the structure of the common electrode layer to be divided into the self-capacitance electrode 02, on the basis of the existing array substrate preparation process, no additional process is required,
  • the touch screen provided by the embodiment of the present invention uses the common electrode layer multiplexing as the self-capacitance electrode 02.
  • the touch and display stages are required. Time-driven approach (instant-division multiplexing).
  • the display driving chip and the touch detection chip can be integrated into one chip, thereby further reducing the production cost.
  • the time when the touch screen displays each frame is divided into a display time period (Display) and a touch time period (Touch), for example,
  • the time of displaying one frame of the touch screen is 16.7 ms, 5 ms is selected as the touch time period, and the other 11.7 ms is used as the display time period, and of course, according to the processing capability of the IC chip.
  • the length of time for adjusting the two is not limited here.
  • a gate scan signal is sequentially applied to each of the gate signal lines Gate1, Gate2, ..., Gaten in the touch screen, and a gray scale signal is applied to the data signal line Data, and each self-capacitance electrode Cx1
  • the Cxn-connected touch detection chip applies a common electrode signal to each of the self-capacitance electrodes Cx1 . . . Cxn to implement a liquid crystal display function.
  • the touch detection chips connected to the respective self-capacitance electrodes Cx1 . . . Cxn are simultaneously applied to the respective self-capacitance electrodes Cx1 . . . Cxn.
  • the driving signal simultaneously receives the feedback signals of the respective self-capacitance electrodes Cx1...Cxn; or as shown in FIG. 3b, the touch detection chip connected to each of the self-capacitance electrodes Cx1...Cxn
  • the self-capacitance electrodes Cx1 . . . Cxn sequentially apply drive signals, and receive feedback signals of the respective self-capacitance electrodes Cx1 . . . Cxn, which are not limited herein.
  • the touch function is implemented by analyzing the feedback signal to determine whether a touch occurs.
  • each self-capacitance electrode 02 can be selected according to the required touch density to ensure the required touch density.
  • each self-capacitance electrode 02 is designed as a square electrode of about 5 mm * 5 mm.
  • the density of the display is usually on the order of microns. Therefore, generally a self-capacitance
  • the pole 02 corresponds to a plurality of pixel regions in the display screen (one self-capacitance electrode covering four pixel regions in FIG. 1 is merely a schematic illustration, and is not intended to be limited).
  • the in-cell touch panel provided by the embodiment of the present invention divides the common electrode layer disposed in the entire entire layer into a plurality of self-capacitance electrodes 02.
  • the dividing line In order not to affect the normal display function, when dividing the common electrode layer, the dividing line generally avoids the displayed opening area and is disposed in the graphic area of the black matrix layer.
  • the array substrate 100 generally further includes: a gate signal line Gate and a data signal line Data which are mutually intersected, and two adjacent gates.
  • the pole signal line Gate and the data signal line Data are enclosed in a pixel area 01.
  • the extending direction of the touch data line 03 may be set to be the same as the gate signal line Gate or the same as the data signal line Data. That is, generally, the extending directions of the touch data lines 03 are uniform.
  • the frame of the in-cell touch panel generally has four sides, and the self-capacitance electrodes 02 can be connected to the touch data lines 03 through the corresponding touch data lines 03 on the basis that the touch data lines 03 do not cross each other.
  • the side of the closest distance is connected to the touch detection chip 04. It should be noted that the leads connecting the touch data line 03 and the touch detection chip 04 disposed on the side can be designed to have a larger line width without being restricted by the gap of the pixel area, so the signal transmission is not affected. .
  • each touch data line 03 is horizontally distributed or vertically distributed or staggered, in order to ensure uniform wiring of the array substrate, the uniform distribution of the touch data lines 03 on the array substrate should be ensured during design. .
  • the in-cell touch panel provided by the embodiment of the present invention generally has a thin film transistor structure 05 under the common electrode layer in one pixel region of the array substrate 100 as shown in FIG. 2a to FIG. 2b. .
  • the thin film transistor structure 05 includes an active layer 051, a gate 052, a source 053, and a drain 054.
  • the thin film transistor structure 05 may be a bottom gate thin film transistor or a top gate thin film transistor, for example, as shown in FIGS. 2a to 2d.
  • a light shielding layer 06 is generally disposed between the top gate type thin film transistor and the base substrate; the pattern of the light shielding layer 06 is The orthographic projection of the array substrate covers the orthographic projection of the pattern of the gate 052 in the thin film transistor structure on the array substrate.
  • the touch data may be Line 03 is disposed between the common electrode layer and the thin film transistor structure 05.
  • a pixel electrode layer 07 disposed in a different layer from the common electrode layer is further disposed on the array substrate 100.
  • a common electrode layer of the self-capacitance electrode 02 can be used as a plate electrode in a lower layer (closer to the substrate), and the pixel electrode 07 is narrow.
  • the slit electrode is located on the upper layer (closer to the liquid crystal layer).
  • An insulating layer is provided between the pixel electrode 07 and the common electrode layer.
  • the pixel electrode 07 is located as a plate electrode on the lower layer (closer to the substrate), and the common electrode layer of the self-capacitance electrode 02 is used as the slit electrode.
  • the insulating layer is provided between the pixel electrode 07 and the common electrode layer.
  • each of the self-capacitance electrodes 02 constituting the common electrode layer may have a slit-shaped ITO electrode structure or a plate-shaped ITO electrode structure at a position corresponding to the opening region of the pixel. That is, each of the self-capacitance electrodes 02 is composed of a slit-shaped ITO electrode in the HADS mode; specifically, the slit-shaped ITO electrode structure is an ITO electrode having slits in an opening region of a pixel. In the ADS mode, each self-capacitance electrode 02 is composed of a plate-shaped ITO electrode to meet the requirements of liquid crystal display.
  • the self-capacitance electrode 02 can interact with the human body electric field through the slit region of the pixel electrode 07.
  • the specific structure of the liquid crystal panel of the ADS mode and the HADS mode belongs to the prior art, and details are not described herein again.
  • the common electrode layer composed of the respective self-capacitance electrodes 02 above the pixel electrode 07 that is, adopt the HADS mode to try to make The self-capacitance electrode 02 approaches the human body electric field.
  • the HADS mode when adopted, as shown in FIG. 2c, it can be seen that A plurality of film layers are disposed between the capacitor electrode 02 and the connected touch data line 03.
  • the self-capacitance electrode 02 needs to be connected to the touch data line 03 through a via hole penetrating through the film layers. Therefore, in the specific implementation, in order to ensure better connection between the self-capacitance electrode 02 and the touch data line 03, as shown in FIG. 2d, the pixel electrode 07 is located on the common electrode layer and the touch data line 03.
  • a first conductive portion 071 disposed in the same layer as the pixel electrode 07 and insulated from each other is further disposed on the array substrate.
  • the self-capacitance electrode 02 can be connected to the corresponding touch data line 03 through the first conductive portion 071.
  • FIG. 2a when the ADS mode is adopted, as shown in FIG. 2a, it can be seen that there are a plurality of film layers between the drain electrode 054 of the thin film transistor and the connected pixel electrode 07, and the pixel electrode 07 needs to pass through the film layers.
  • the via is connected to the drain 054 of the thin film transistor. Therefore, in the specific implementation, in order to ensure a better upper and lower connection between the pixel electrode 07 and the drain 054 of the thin film transistor.
  • FIG. 2b when the pixel electrode 07 is located above the common electrode layer, a second conductive portion 021 disposed in the same layer as the common electrode layer and insulated from each other is disposed on the array substrate, and the thin film transistor is leaked.
  • the pole 054 can be connected to the corresponding pixel electrode 07 through the second conducting portion 021.
  • the human body capacitance acts on the self-capacitance of each self-capacitance electrode 02 by direct coupling
  • the human body touches the screen only the self below the touch position
  • the capacitance value of the capacitor electrode 02 has a large amount of change, and the amount of change in the capacitance value of the self-capacitance electrode 02 adjacent to the self-capacitance electrode 02 below the touch position is very small.
  • the touch coordinates in the area where the self-capacitance electrode 02 is located cannot be determined.
  • the opposite sides of the adjacent two self-capacitance electrodes 02 can be set as fold lines to increase the self-capacitance electrode located below the touch position. 02 The amount of change in the capacitance value of the adjacent self-capacitance electrode 02.
  • each self-capacitance electrode 02 can be set in one or a combination of the following two ways:
  • the sides of the adjacent two self-capacitance electrodes 02, which are opposite to each other, may be arranged in a stepped structure, and the two opposite stepped structures have the same shape and match each other, as shown in FIG. 4a, shown in FIG. 4a.
  • the sides of the adjacent two self-capacitance electrodes 02 which are opposite to each other, may be arranged in a concave-convex structure, and the two opposite concave-convex structures have the same shape and match each other, as shown in FIG. 4b, as shown in FIG. 4b. 2*2 self-capacitance electrodes 02 are output.
  • the embodiment of the present invention further provides a display device, which includes the above-mentioned embedded touch screen provided by the embodiment of the present invention, and the display device may be: a mobile phone, a tablet computer, a television, a display, a notebook computer, and a digital device. Any product or component that has a display function, such as a photo frame or a navigator.
  • the display device reference may be made to the above embodiment of the in-cell touch panel, and the repeated description is omitted.
  • An in-cell touch panel and a display device multiplex a common electrode layer as a self-capacitance electrode by using a self-capacitance principle, and change a common electrode layer pattern into a plurality of independent self-capacitance electrodes; And the touch data lines connecting the self-capacitance electrodes and the touch detection chip are added on the array substrate, and the orthographic projections of the touch data lines on the array substrate are located in the region between the pixel regions, so that the touch screen is in the touch screen.
  • the black matrix occlusion does not affect the aperture ratio of the pixel; the touch detection chip can determine the touch position by detecting the change of the capacitance value of each self-capacitance electrode during the touch period. Since the touch screen provided by the embodiment of the present invention divides the structure of the common electrode layer into self-capacitance electrodes, on the basis of the existing array substrate preparation process, no additional process is required, which saves production cost and improves Production efficiency.

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Abstract

一种内嵌式触摸屏及显示装置，利用自电容的原理复用公共电极层作为自电容电极（02），将公共电极层图形进行变更，分割成多个相互独立的自电容电极（02）；并在阵列基板（100）上增加连接各个自电容电极（02）与触控侦测芯片（04）的触控数据线（03），各触控数据线（03）在阵列基板（100）的正投影均位于像素区域（01）之间间隙所在区域内，被触摸屏中的黑矩阵遮挡不会影响像素的开口率；触控侦测芯片（04）在触控时间段通过检测各个自电容电极（02）的电容值变化可以判断出触控位置。在现有基板制备工艺基础上，不需要增加额外工艺。

Description

一种内嵌式触摸屏及显示装置 技术领域
本发明涉及触控技术领域，尤其涉及一种内嵌式触摸屏及显示装置。
背景技术
目前，现有的内嵌(In cell)式触摸屏是利用互电容或自电容的原理实现检测手指触摸位置。其中，利用自电容的原理可以在触摸屏中设置多个同层设置且相互绝缘的自电容电极。当人体未触碰屏幕时，各个自电容电极所承受的电容为一固定值，当人体触碰屏幕时，对应的自电容电极所承受的电容为该固定值叠加人体电容。触控侦测芯片在触控时间段通过检测各个自电容电极的电容值变化可以判断出触控位置。由于人体电容可以作用于全部自电容，而人体电容仅能作用于互电容中的投射电容，因此相比于利用互电容原理制作出的触摸屏，在自电容原理制作的触摸屏中由人体碰触屏幕所引起的触控变化量会更大。从而相对于利用互电容的触摸屏，利用自电容的触摸屏能有效提高触控的信噪比，从而提高触控感应的准确性。
然而在上述电容式内嵌触摸屏的结构设计中，需要在现有的显示面板内部增加新的膜层，导致在制作面板时需要增加新的工艺，使生产成本增加，不利于提高生产效率。
另外目前，能够实现宽视角的液晶显示技术主要有平面内开关(IPS，In-Plane Switch)技术和高级超维场开关(ADS，Advanced Super Dimension Switch)技术；其中，ADS技术通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转，从而提高了液晶工作效率并增大了透光效率。高级超维场转换技术可以提高TFT-LCD产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(push Mura)等优点。
本发明实施例基于传统的ADS技术以及ADS技术的一种重要改进方式H-ADS(高开口率-高级超维场开关)，提出了新的电容式内嵌 触摸屏结构，克服了上述的技术问题。
发明内容
有鉴于此，本发明实施例提供了一种内嵌式触摸屏及显示装置，用以降低内嵌式触摸屏的生产成本、提高生产效率。
因此，本发明实施例提供的一种内嵌式触摸屏，包括具有呈阵列排布的多个像素区域的阵列基板，其中，所述阵列基板上设置有：
被分割成多个相互独立的自电容电极的公共电极层；以及
与所述自电容电极异层设置且与之连接的触控数据线，各所述触控数据线在所述阵列基板上的正投影均位于像素区域之间间隙所在区域内；
并且，所述内嵌式触摸屏还包括通过所述触控数据线与各个自电容电极连接的触控侦测芯片，所述触控侦测芯片用于通过所述触控数据线在显示时间段对各所述自电容电极加载公共电极信号，并且在触控时间段通过所述触控数据线检测各所述自电容电极的电容值变化以判断触控位置。
根据一优选实施例，每个所述自电容电极覆盖若干个像素区域。
根据一优选实施例，在所述阵列基板的各像素区域内设置有位于所述公共电极层下方并且更靠近所述阵列基板的衬底的薄膜晶体管结构，所述触控数据线位于所述公共电极层与所述薄膜晶体管结构之间的膜层。
根据进一步优选实施例，在所述阵列基板上还设置有相互交叉设置的栅极信号线和数据信号线；并且所述触控数据线的延伸方向与所述栅极信号线相同，或与所述数据信号线相同。
根据进一步优选实施例，所述内嵌式触摸屏的边框具有四个侧边，各所述自电容电极在所述触控数据线互不交叉的基础上通过对应的所述触控数据线连接至最近距离的侧边后与所述触控侦测芯片连接。
根据一优选实施例，所述触控数据线在所述阵列基板上分布均匀。
根据进一步优选实施例，在所述侧边处设置的用于连接所述触控数据线和所述触控侦测芯片的引线被设计成具有比所述触控数据线更 宽的线宽。
根据一优选实施例，在所述阵列基板上还设置有位于所述公共电极层与所述触控数据线所在膜层之间的像素电极。
根据进一步优选实施例，在所述阵列基板上还设置有与所述像素电极同层设置且相互绝缘的第一导通部，所述自电容电极通过所述第一导通部与对应的触控数据线连接。
根据进一步优选实施例，所述公共电极层为板状电极，所述像素电极为狭缝电极，并且所述像素电极和所述公共电极层之间设有绝缘层。
根据另一优选实施例，在所述阵列基板上还设置有位于所述公共电极层之上并且更远离所述阵列基板的像素电极。
根据进一步优选实施例，在所述阵列基板上还设置有与所述公共电极层同层设置且相互绝缘的第二导通部，所述薄膜晶体管的漏极通过所述第二导通部与所述像素电极连接。
根据进一步优选实施例，所述像素电极为板状电极，所述公共电极层为狭缝电极，在所述像素电极和所述公共电极层之间设有绝缘层。
根据进一步优选实施例，所述狭缝电极在与所述像素区域的开口区域对应的位置具有狭缝结构。
根据一优选实施例，所述像素电极和所述公共电极层均为ITO电极。
根据一优选实施例，所述薄膜晶体管结构为底栅型薄膜晶体管或顶栅型薄膜晶体管。
根据进一步优选实施例，在所述薄膜晶体管结构为顶栅型薄膜晶体管时，在所述顶栅型薄膜晶体管与衬底基板之间还设置有遮光层；所述遮光层的图案在所述阵列基板上的正投影覆盖所述薄膜晶体管结构中栅极的图案在所述阵列基板上的正投影。
根据一优选实施例，相邻的两个所述自电容电极相对应的侧边均设置为具有折线的形状。
根据进一步优选实施例，所述相邻的两个所述自电容电极相对应的侧边具有相互匹配的阶梯状结构。
根据进一步优选实施例，所述相邻的两个所述自电容电极相对的侧边分别具有相互匹配的凹凸状结构。
本发明实施例还提供了一种显示装置，其包括上文所述的任意一种内嵌式触摸屏。
根据一优选实施例，所述显示装置包括手机、平板电脑、电视机、电脑显示器、笔记本电脑、数码相框或导航仪。
本发明实施例的有益效果包括：
本发明实施例提供的一种内嵌式触摸屏及显示装置，利用自电容的原理复用公共电极层作为自电容电极，将公共电极层图形进行变更，分割成多个相互独立的自电容电极；并在阵列基板上增加连接各个自电容电极与触控侦测芯片的触控数据线，各触控数据线在阵列基板上的正投影均位于像素区域之间间隙所在区域内，从而会被触摸屏中的黑矩阵遮挡，不会影响像素的开口率；触控侦测芯片在触控时间段通过检测各个自电容电极的电容值变化可以判断出触控位置。由于本发明实施例提供的触摸屏是将公共电极层的结构进行变更分割成自电容电极，因此，在现有的阵列基板制备工艺的基础上，不需要增加额外的工艺，节省了生产成本，提高了生产效率。
附图说明
包括附图以提供对实施例的进一步理解并且附图被并入本说明书中并且构成本说明书的一部分。附图图示了实施例并且与描述一起用于解释实施例的原理。将容易认识到其它实施例和实施例的很多预期优点，因为通过引用以下详细描述，它们变得被更好地理解。附图的元件不一定是相互按照比例的。同样的参考数字指代对应的类似部件。
图1为本发明实施例提供的内嵌式触摸屏的结构示意图；
图2a至图2d分别为本发明实施例提供的内嵌式触摸屏的侧视示意图；
图3a和图3b分别为本发明实施例提供的内嵌式触摸屏的驱动时序示意图；
图4a和图4b分别为本发明实施例提供的内嵌式触摸屏中相邻的自电容电极相对的侧边设置为折线的结构示意图。
具体实施方式
下面结合附图，对本发明实施例提供的内嵌式触摸屏及显示装置 的具体实施方式进行详细地说明。对此，参考描述的图的取向来使用方向术语，例如“顶”、“底”、“左”、“右”、“上”、“下”等。因为实施例的部件可被定位于若干不同取向中，为了图示的目的使用方向术语并且方向术语绝非限制。应当理解的是，可以利用其他实施例或可以做出逻辑改变，而不背离本发明的范围。因此以下详细描述不应当在限制的意义上被采用，并且本发明的范围由所附权利要求来限定。
此外，关于形成或定位在表面“之上”的部分、元件或材料层使用的词语“之上”可以在本文被用于表示该部分、元件或材料层“直接在”暗示的表面上定位(例如放置、形成、沉积等)，例如与其直接接触。关于形成或定位在表面“之上”的部分、元件或材料层使用的词语“之上”可以在本文被用于表示该部分、元件或材料层被定位(例如放置、形成、沉积等)为“间接在”所暗示的表面上，而具有被布置在所暗示的表面和该部分、元件或材料层之间的一个或多个附加部分、元件或层。
附图中各膜层的厚度和形状仅为示例性的，也未按照比例绘制，目的只是示例性说明本发明内容。
如图1所示，本发明实施例提供的一种内嵌式触摸屏包括具有呈阵列排布的多个像素区域01的阵列基板100，阵列基板100上设置有：
被分割成多个相互独立的自电容电极02的公共电极层；；以及
与自电容电极02异层设置且与之连接的触控数据线03，各触控数据线03在阵列基板100上的正投影均位于像素区域01之间间隙所在区域内；并且，所述内嵌式触摸屏还包括
通过触控数据线03与各个自电容电极02连接的触控侦测芯片04，用于通过触控数据线03在显示时间段对各个自电容电极02加载公共电极信号，在触控时间段通过触控数据线03检测各个自电容电极02的电容值变化以判断触控位置。优选地，各个自电容电极02覆盖若干个像素区域01。
本发明实施例提供的上述内嵌式触摸屏，利用自电容的原理复用公共电极层作为自电容电极02，将公共电极层图形进行变更，分割成多个相互独立的自电容电极02；并在阵列基板100上增加连接各个自电容电极02与触控侦测芯片04的触控数据线03，各触控数据线03在 阵列基板100上的正投影均位于像素区域01之间间隙所在区域内，从而各触控数据线03会被触摸屏中的黑矩阵遮挡不会影响像素的开口率；触控侦测芯片04在触控时间段通过检测各个自电容电极02的电容值变化可以判断出触控位置。由于本发明实施例提供的触摸屏是将公共电极层的结构进行变更以分割成自电容电极02，因此，在现有的阵列基板制备工艺的基础上，不需要增加额外的工艺，节省了生产成本，提高了生产效率。
具体地，由于本发明实施例提供的上述触摸屏采用公共电极层复用作为自电容电极02，为了减少显示和触控信号之间的相互干扰，在具体实施时，需要采用触控和显示阶段分时驱动的方式(即时分复用的方式)。并且，在具体实施时还可以将显示驱动芯片和触控侦测芯片整合为一个芯片，进一步降低生产成本。
具体地，例如：如图3a和图3b所示的驱动时序图中，将触摸屏显示每一帧(V-sync)的时间分成显示时间段(Display)和触控时间段(Touch)，例如如图3a和图3b所示的驱动时序图中触摸屏的显示一帧的时间为16.7ms，选取其中5ms作为触控时间段，其他的11.7ms作为显示时间段，当然也可以根据IC芯片的处理能力适当的调整两者的时长，在此不做具体限定。在显示时间段(Display)，对触摸屏中的每条栅极信号线Gate1，Gate2......Gaten依次施加栅扫描信号，对数据信号线Data施加灰阶信号，与各个自电容电极Cx1......Cxn连接的触控侦测芯片向各个自电容电极Cx1......Cxn分别施加公共电极信号，以实现液晶显示功能。在触控时间段(Touch)，如图3a所示，与各个自电容电极Cx1......Cxn连接的触控侦测芯片向各个自电容电极Cx1......Cxn同时施加驱动信号，同时接收各个自电容电极Cx1......Cxn的反馈信号；也可以如图3b所示，与各个自电容电极Cx1......Cxn连接的触控侦测芯片向各个自电容电极Cx1......Cxn依次施加驱动信号，分别接收各个自电容电极Cx1......Cxn的反馈信号，在此不做限定。通过对反馈信号的分析判断是否发生触控，以实现触控功能。
一般地，触摸屏的密度通常在毫米级，因此，在具体实施时，可以根据所需的触控密度选择各个自电容电极02的密度和所占面积以保证所需的触控密度。通常各个自电容电极02设计为5mm*5mm左右的方形电极。而显示屏的密度通常在微米级。因此，一般一个自电容电 极02会对应显示屏中的多个像素区域(图1中一个自电容电极覆盖四个像素区域仅仅为示意性图示，并非意图进行限制)。并且，本发明实施例提供的上述内嵌式触摸屏是将现有的整层设置的公共电极层分割成多个自电容电极02。为了不影响正常的显示功能，在对公共电极层进行分割时，分割线一般都会避开显示的开口区域，设置在黑矩阵层的图形区域。
进一步地，在本发明实施例提供的上述触摸屏中，如图1所示，在阵列基板100上一般还包括：相互交叉设置的栅极信号线Gate和数据信号线Data，相邻的两条栅极信号线Gate和数据信号线Data围成一像素区域01。
为了便于通过触控数据线03将自电容电极02与触控侦测芯片04连接，一般触控数据线03的延伸方向可以设置为与栅极信号线Gate相同，或与数据信号线Data相同。即一般各触控数据线03的延伸方向均一致。
进一步地，当触摸屏的尺寸较大时，若采用各触控数据线03的延伸方向均一致的方式进行布线设置，可能存在在自电容电极02与触控侦测芯片04之间连接的触控数据线03过长，而导致信号传输延迟的情况。因此为了防止上述情况的发生，内嵌式触摸屏的边框一般具有四个侧边，可以将各个自电容电极02在触控数据线03互不交叉的基础上通过对应的触控数据线03连接至最近距离的侧边后与触控侦测芯片04连接。值得注意的是，在侧边设置的连接触控数据线03和触控侦测芯片04的引线可以不受像素区域间隙的限制而设计成具有较大的线宽，因此不会影响信号的传输。
此外，无论各触控数据线03的延伸方向是采用横向分布还是纵向分布还是交错分布，为了保证阵列基板的整体布线均匀，在设计时应尽量保证触控数据线03在阵列基板上的分布均匀。
在具体实施时，本发明实施例提供的上述内嵌式触摸屏中，如图2a至图2b所示的阵列基板100的一个像素区域内，一般还会具有位于公共电极层下方的薄膜晶体管结构05。
具体地，薄膜晶体管结构05包括有源层051、栅极052、源极053和漏极054。具体地，该薄膜晶体管结构05在具体实施时可以为底栅型薄膜晶体管也可以为顶栅型薄膜晶体管，例如图2a至图2d所示。 且在薄膜晶体管结构05为顶栅型薄膜晶体管时，如图2a至图2d所示，在顶栅型薄膜晶体管与衬底基板之间一般还设置有遮光层06；该遮光层06的图案在阵列基板的正投影覆盖薄膜晶体管结构中栅极052的图案在阵列基板上的正投影。
并且，在本发明实施例提供的上述内嵌式触摸屏中，为了便于触控数据线03与自电容电极02导通，在具体实施时，如图2a至图2d所示，可以将触控数据线03设置在公共电极层和薄膜晶体管结构05之间的膜层。
在具体实施时，本发明实施例提供的上述触摸屏中，如图2a至图2d所示，在阵列基板100上还会设置有与公共电极层异层设置的像素电极层07。一般地，如图2a和图2b所示，传统ADS型液晶面板上，还可用作自电容电极02的公共电极层作为板状电极位于下层(更靠近衬底基板)，像素电极07作为狭缝电极位于上层(更靠近液晶层)。在像素电极07和公共电极层之间设有绝缘层。如图2c和图2d所示，而HADS型液晶面板的阵列基板上，像素电极07作为板状电极位于下层(更靠近衬底基板)，复用自电容电极02的公共电极层作为狭缝电极位于上层(更靠近液晶层)，在像素电极07和公共电极层之间设有绝缘层。
具体地，根据上述触摸屏具体应用的液晶显示面板的模式，组成公共电极层的各个自电容电极02在与像素的开口区域对应的位置可以具有狭缝状ITO电极结构或板状ITO电极结构。即在HADS模式时各个自电容电极02由狭缝状ITO电极组成；具体地，所述狭缝状ITO电极结构为在像素的开口区域具有狭缝的ITO电极。在ADS模式时各个自电容电极02由板状ITO电极组成以满足液晶显示的需求，此时自电容电极02可以透过像素电极07的狭缝区域与人体电场相互作用。由于ADS模式和HADS模式的液晶面板的具体结构属于现有技术，在此不再赘述。
进一步地，为了增加在触控时间段自电容电极02感知人体电容带来的变化，优选将由各个自电容电极02组成的公共电极层设置在像素电极07的上方，即采用HADS模式，以尽量使自电容电极02接近人体电场。
进一步地，在采用HADS模式时，如图2c所示，可以看出，在自 电容电极02与连接的触控数据线03之间具有多个膜层，自电容电极02需要通过贯穿这些膜层的过孔与触控数据线03连接。因此，在具体实施时，为了保证自电容电极02与触控数据线03之间可以更好的上下连接，如图2d所示，在像素电极07位于公共电极层与触控数据线03所在膜层之间时，在所述阵列基板上还设置有：与像素电极07同层设置且相互绝缘的第一导通部071。自电容电极02可以通过第一导通部071与对应的触控数据线03连接。
同理，在采用ADS模式时，如图2a所示，可以看出，在薄膜晶体管的漏极054与连接的像素电极07之间具有多个膜层，像素电极07需要通过贯穿这些膜层的过孔与薄膜晶体管的漏极054连接。因此，在具体实施时，为了保证像素电极07与薄膜晶体管的漏极054之间可以更好的上下连接。如图2b所示，在像素电极07位于公共电极层之上时，在所述阵列基板上还设置有：与公共电极层同层设置且相互绝缘的第二导通部021，薄膜晶体管的漏极054可以通过第二导通部021与对应的像素电极07连接。
进一步地，在本发明实施例提供的内嵌式触摸屏中，由于人体电容通过直接耦合的方式作用于各个自电容电极02的自电容，因此，人体触碰屏幕时，仅在触摸位置下方的自电容电极02的电容值有较大的变化量，与触摸位置下方的自电容电极02相邻的自电容电极02的电容值变化量非常小。这样，当例如手指之类的人体部位在触摸屏上滑动时，不能确定自电容电极02所在区域内的触控坐标。为解决此问题，在本发明实施例提供的上述内嵌式触摸屏中，可以将相邻的两个自电容电极02相对的侧边均设置为折线，以便增大位于触摸位置下方的自电容电极02相邻的自电容电极02的电容值变化量。
在具体实施时，可以采用如下两种方式之一或组合的方式设置各个自电容电极02的整体形状：
1、可以将相邻的两个自电容电极02相对的为折线的侧边均设置为阶梯状结构，两个相对的阶梯状结构形状一致且相互匹配，如图4a所示，图4a中示出了2*2个自电容电极02；
2、可以将相邻的两个自电容电极02相对的为折线的侧边均设置为凹凸状结构，两个相对的凹凸状结构形状一致且相互匹配，如图4b所示，图4b中示出了2*2个自电容电极02。
基于同一发明构思，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述内嵌式触摸屏，该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述内嵌式触摸屏的实施例，重复之处不再赘述。
本发明实施例提供的一种内嵌式触摸屏及显示装置，利用自电容的原理复用公共电极层作为自电容电极，将公共电极层图形进行变更，分割成多个相互独立的自电容电极；并在阵列基板上增加连接各个自电容电极与触控侦测芯片的触控数据线，各触控数据线在阵列基板的正投影均位于像素区域之间间隙所在区域内，从而会被触摸屏中的黑矩阵遮挡不会影响像素的开口率；触控侦测芯片在触控时间段通过检测各个自电容电极的电容值变化可以判断出触控位置。由于本发明实施例提供的触摸屏是将公共电极层的结构进行变更分割成自电容电极，因此，在现有的阵列基板制备工艺的基础上，不需要增加额外的工艺，节省了生产成本，提高了生产效率。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。权利要求中的措词‘包括’并不排除在权利要求未列出的元件或步骤的存在。元件前面的措词‘一’或‘一个’并不排除多个这样的元件的存在。在相互不同从属权利要求中记载某些措施的简单事实不表明这些措施的组合不能被用于改进。

Claims (21)

  1. 一种内嵌式触摸屏，包括具有呈阵列排布的多个像素区域的阵列基板，其中，所述阵列基板上设置有：
    被分割成多个相互独立的自电容电极的公共电极层；以及
    与所述自电容电极异层设置且与之连接的触控数据线，各所述触控数据线在所述阵列基板上的正投影均位于像素区域之间间隙所在区域内；
    并且，所述内嵌式触摸屏还包括通过所述触控数据线与各个自电容电极连接的触控侦测芯片，所述触控侦测芯片用于通过所述触控数据线在显示时间段对各所述自电容电极加载公共电极信号，并且在触控时间段通过所述触控数据线检测各所述自电容电极的电容值变化以判断触控位置。
  2. 根据权利要求1所述的内嵌式触摸屏，其中每个所述自电容电极覆盖若干个像素区域。
  3. 如权利要求1所述的内嵌式触摸屏，其特征在于，在所述阵列基板的各像素区域内设置有位于所述公共电极层下方并且更靠近所述阵列基板的衬底的薄膜晶体管结构，所述触控数据线位于所述公共电极层与所述薄膜晶体管结构之间的膜层。
  4. 如权利要求3所述的内嵌式触摸屏，其特征在于，在所述阵列基板上还设置有相互交叉设置的栅极信号线和数据信号线；并且
    所述触控数据线的延伸方向与所述栅极信号线相同，或与所述数据信号线相同。
  5. 如权利要求3所述的内嵌式触摸屏，其特征在于，所述内嵌式触摸屏的边框具有四个侧边，各所述自电容电极在所述触控数据线互不交叉的基础上通过对应的所述触控数据线连接至最近距离的侧边后与所述触控侦测芯片连接。
  6. 如权利要求4所述的内嵌式触摸屏，其特征在于，所述触控数据线在所述阵列基板上分布均匀。
  7. 如权利要求5所述的内嵌式触摸屏，其特征在于，在所述侧边处设置的用于连接所述触控数据线和所述触控侦测芯片的引线被设计成具有比所述触控数据线更宽的线宽。
  8. 如权利要求3所述的内嵌式触摸屏，其特征在于，在所述阵列基板上还设置有位于所述公共电极层与所述触控数据线所在膜层之间的像素电极。
  9. 如权利要求8所述的内嵌式触摸屏，其特征在于，在所述阵列基板上还设置有与所述像素电极同层设置且相互绝缘的第一导通部，所述自电容电极通过所述第一导通部与对应的触控数据线连接。
  10. 如权利要求3所述的内嵌式触摸屏，其特征在于，在所述阵列基板上还设置有位于所述公共电极层之上并且更远离所述阵列基板的像素电极。
  11. 如权利要求10所述的内嵌式触摸屏，其特征在于，在所述阵列基板上还设置有与所述公共电极层同层设置且相互绝缘的第二导通部，所述薄膜晶体管的漏极通过所述第二导通部与所述像素电极连接。
  12. 如权利要求8所述的内嵌式触摸屏，其特征在于，所述公共电极层为板状电极，所述像素电极为狭缝电极，并且所述像素电极和所述公共电极层之间设有绝缘层。
  13. 如权利要求10所述的内嵌式触摸屏，其特征在于，所述像素电极为板状电极，所述公共电极层为狭缝电极，在所述像素电极和所述公共电极层之间设有绝缘层。
  14. 如权利要求12或13所述的内嵌式触摸屏，其特征在于，所述狭缝电极在与所述像素区域的开口区域对应的位置具有狭缝结构。
  15. 如权利要求8至13中的任一项所述的内嵌式触摸屏，其特征在于，所述像素电极和所述公共电极层均为ITO电极。
  16. 如权利要求3-13中的任一项所述的内嵌式触摸屏，其特征在于，所述薄膜晶体管结构为底栅型薄膜晶体管或顶栅型薄膜晶体管。
  17. 如权利要求16所述的内嵌式触摸屏，在所述薄膜晶体管结构为顶栅型薄膜晶体管时，在所述顶栅型薄膜晶体管与衬底基板之间还设置有遮光层；所述遮光层的图案在所述阵列基板上的正投影覆盖所述薄膜晶体管结构中栅极的图案在所述阵列基板上的正投影。
  18. 如权利要求1-13中的任一项所述的内嵌式触摸屏，其特征在于，相邻的两个所述自电容电极相对应的侧边均设置为具有折线的形状。
  19. 如权利要求18所述的内嵌式触摸屏，其特征在于，所述相邻的两个所述自电容电极相对应的侧边具有相互匹配的阶梯状结构。
  20. 如权利要求18所述的内嵌式触摸屏，其特征在于，所述相邻的两个所述自电容电极相对的侧边分别具有相互匹配的凹凸状结构。
  21. 一种显示装置，其特征在于，包括如权利要求1-20任一项所述的内嵌式触摸屏。
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