WO2016142999A1 - 多重化通信システム及び作業機 - Google Patents
多重化通信システム及び作業機 Download PDFInfo
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- WO2016142999A1 WO2016142999A1 PCT/JP2015/056666 JP2015056666W WO2016142999A1 WO 2016142999 A1 WO2016142999 A1 WO 2016142999A1 JP 2015056666 W JP2015056666 W JP 2015056666W WO 2016142999 A1 WO2016142999 A1 WO 2016142999A1
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- 238000004891 communication Methods 0.000 title claims abstract description 87
- 238000012545 processing Methods 0.000 claims abstract description 107
- 230000005540 biological transmission Effects 0.000 claims description 18
- 230000008054 signal transmission Effects 0.000 claims description 6
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 abstract description 19
- 238000012546 transfer Methods 0.000 abstract description 19
- 238000000034 method Methods 0.000 abstract description 14
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- 238000003384 imaging method Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/4185—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by the network communication
- G05B19/41855—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by the network communication by local area network [LAN], network structure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/31—From computer integrated manufacturing till monitoring
- G05B2219/31102—Program network controller, connected devices
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
Definitions
- the present invention relates to a multiplex communication system for connecting industrial networks and a work machine for transmitting data related to mounting work by the multiplex communication system.
- a work machine for example, an electronic component mounting apparatus used in the FA (Factory Automation) field includes a servo motor or the like as a drive source for operating a movable part such as a mounting head.
- a serial encoder or the like is used to detect a rotational position necessary for controlling the servo motor.
- a communication system for transmitting the output of a serial encoder used in such a work machine or the like there is one in which wiring saving is achieved by collectively transmitting the outputs of a plurality of serial encoders to one data line. (For example, patent document 1 etc.).
- network communication technology represented by the Internet is also used in the FA field, and as an industrial network for the FA field, for example, an industrial Ethernet using Ethernet (registered trademark) technology is called. There is.
- analog and digital information can be multiplexed on a single transmission line to reduce wiring.
- an industrial network as a form of control, for example, a slave device that controls various sensors, relays, switches, and the like used in a factory and a master device that performs overall control of the slave device are set. The whole control is performed.
- this master device and slave device an IP core and ASIC conforming to the standards of each industrial network are prepared, but there are cases where the interface standards are limited and the above-described multiplexed communication is performed. In addition, there is a problem that the data transfer is complicated.
- the present invention has been made in view of the above problems, and exchanges data between a processing circuit used in an industrial network and a multiprocessing unit that multiplexes and transmits control data transmitted in the industrial network.
- An object of the present invention is to provide a multiplexing communication system and a work machine that can be appropriately implemented.
- a multiplexing communication system is a processing circuit that processes control data in an industrial network, and a multiplexing that is generated by multiplexing control data input from the processing circuit
- a multiplex processing unit that transmits data to other processing circuits, and is connected between the processing circuit and the multiplex processing unit, and artificially generates a signal that conforms to a communication standard in an industrial network and transmits the signal to the processing circuit.
- a pseudo signal transmission unit that establishes communication with the processing circuit and transfers control data between the multiple processing unit and the processing circuit.
- industrial network refers to control data such as relays and switches using communication standards such as EtherCAT (registered trademark), MECHATROLINK (registered trademark) -III, and Profinet (registered trademark). It is a network to transmit.
- EtherCAT registered trademark
- MECHATROLINK registered trademark
- Profinet registered trademark
- the invention according to the present application is not limited to the invention of the multiplexed communication system, and can also be implemented as an invention of a working machine that transmits data related to the mounting work by the multiplexed communication system.
- a multiplex that can appropriately perform data transfer between a processing circuit used in an industrial network and a multiplex processing unit that multiplexes and transmits control data transmitted in the industrial network.
- a communication system and a work machine can be provided.
- the block diagram of the electronic component mounting apparatus with which the multiplexed communication system of a present Example is applied The block diagram which shows schematic structure of a multi-processing part and DUMMY-PHY. The flowchart for demonstrating the operation
- FIG. 1 schematically shows a system configuration of an electronic component mounting apparatus (hereinafter sometimes abbreviated as “mounting apparatus”) 10 as an example of an apparatus to which the multiplexed communication system of the present application is applied.
- the mounting apparatus 10 includes a control unit 11, a slider unit 13, and a head unit 15.
- the mounting device 10 according to the present embodiment is a device that performs mounting work of an electronic component supplied from a supply device (tape feeder or the like) on a circuit board (not shown) based on the control of the control unit 11. .
- the control unit 11 is composed mainly of a CPU 21, and includes a master 23, an image processing unit 25, and the like.
- the slider unit 13 is provided with a slave 33 corresponding to the master 23 of the control unit 11.
- the head unit 15 is provided with a slave 43 corresponding to the master 23.
- the master 23 generally controls transmission of control data with slaves 33 and 43 connected to an industrial network (for example, EtherCAT (registered trademark)).
- the master 23 is an IP core used for constructing a logic circuit such as a programmable logic device (PLD), a field programmable gate array (FPGA), or a composite programmable logic device (CPLD).
- PLD programmable logic device
- FPGA field programmable gate array
- CPLD composite programmable logic device
- the master 23 is not limited to a logic circuit, and may be, for example, an application specific integrated circuit (ASIC) specialized in communication control, or a combination of these and a logic circuit.
- ASIC application specific integrated circuit
- the CPU21 inputs the control data etc. which the master 23 collected, and determines the next control content. Further, the CPU 21 outputs control data corresponding to the determined control content to the master 23.
- the master 23 transmits the control data input from the CPU 21 to each of the slaves 33 and 43 via the industrial network.
- the slider unit 13 is a driving device that moves the head unit 15 in the X-axis direction and the Y-axis direction above the circuit board carried into the mounting device 10.
- the slider unit 13 includes a slide mechanism (not shown) for moving the head unit 15 in the X-axis direction and the Y-axis direction.
- the slider unit 13 has, for example, a linear motor as a drive source for operating the slide mechanism.
- the slider unit 13 includes a CPU 31 and the like in addition to the slave 33 described above.
- the CPU 31 executes processing of signals input / output in various elements (such as the relay 35 and the sensor 37) attached to the slider unit 13.
- the sensor 37 is, for example, a board height sensor that measures the height of the upper surface of the circuit board based on the reference height position set in the mounting apparatus 10.
- the slave 33 outputs the control data transmitted from the master 23 of the control unit 11 to the CPU 31.
- the CPU 31 drives and controls the relay 35 and the like based on the input control data. Further, the CPU 31 processes an output signal from the sensor 37 and outputs it to the slave 33 as control data.
- the slave 33 transmits control data input from the CPU 31 toward the master 23.
- the head unit 15 includes a CPU 41, a parts camera 48, a mark camera 49, and the like in addition to the slave 43 described above.
- the CPU 41 executes processing of signals input / output in various elements (such as the relay 45 and the sensor 47) provided in the head unit 15.
- the slave 43 outputs the control data transmitted from the master 23 of the control unit 11 to the CPU 41. Further, the slave 43 transmits an output signal of the sensor 47 and the like processed by the CPU 41 to the master 23 as control data.
- the parts camera 48 is a camera that captures an image of an electronic component sucked and held by a suction nozzle (not shown) attached to the head unit 15.
- the image processing unit 25 of the control unit 11 processes the image data picked up by the parts camera 48 and acquires an error in the holding position of the electronic component in the suction nozzle.
- the mark camera 49 is a camera for photographing a mark on a circuit board and an electronic component after mounting.
- the mark camera 49 can image the surface of an arbitrary position on the circuit board by moving the head unit 15 by the slider unit 13.
- the image processing unit 25 processes the image data captured by the mark camera 49, and acquires information on the circuit board, mounting position errors, and the like.
- the head unit 15 includes an electromagnetic motor (servo motor or the like) as a drive source for moving the suction nozzle up and down and rotating.
- the control unit 11 includes a multiprocessing unit 51 and five PHYs 53 to 57 in addition to the CPU 21 described above.
- the PHY 53 is connected to a PHY 63A included in the slider unit 13 via a LAN cable 81 that complies with, for example, the Gigabit Ethernet (registered trademark) communication standard.
- the PHY 63 ⁇ / b> B included in the slider unit 13 is connected to the PHY 73 included in the head unit 15 via the LAN cable 83.
- the multiplex processing unit 51 of the control unit 11 multiplexes and transmits control data and image data of the industrial network by, for example, time division multiplexing (TDM: Time Division Multiplexing).
- the multiprocessing unit 51 is realized by a logic circuit such as a field programmable gate array (FPGA), for example.
- the multiplex processing unit 51 transmits and receives multiplexed data to and from the multiplex processing unit 61 of the slider unit 13 and the multiplex processing unit 71 of the head unit 15 through the LAN cables 81 and 83.
- the parts camera 48 of the head unit 15 outputs captured image data to the multiprocessing unit 71 via the PHY 74 according to an image transmission standard such as GigE-vision (registered trademark).
- the parts camera 48 performs imaging in response to receiving a trigger signal indicating the start of imaging transmitted from the image processing unit 25 of the control unit 11 via multiplex communication, and the captured image data is multiplexed processing unit. To 71. Similarly, the mark camera 49 outputs the captured image data to the multiprocessing unit 71 via the PHY 75.
- the multiprocessing unit 71 is connected to the slave 43 via a DUMMY-PHY 77 described later, and control data related to the industrial network is input from the slave 43.
- the multiplex processing unit 71 multiplexes various data such as image data and control data, and transmits them to the multiplex processing unit 51 (control unit 11) through the LAN cables 81 and 83.
- the multi-processing unit 51 is connected to the image processing unit 25 via a cable connected to the PHYs 54 and 55.
- the PHY 54 corresponds to the parts camera 48 of the head unit 15.
- the PHY 55 corresponds to the mark camera 49.
- the multiprocessing unit 51 demultiplexes the multiplexed data received from the multiprocessing unit 71 and separates the image data of the parts camera 48.
- the multiprocessing unit 51 outputs the separated image data to the image processing unit 25 via the PHY 54 in a data format conforming to the GigE-vision (registered trademark) standard.
- the image processing unit 25 processes the input image data of the parts camera 48 and acquires an error in the holding position of the electronic component.
- the multiplex processing unit 51 outputs the image data of the mark camera 49 separated from the multiplexed data to the image processing unit 25 via the PHY 55.
- the multiprocessing unit 51 is connected to the master 23 via two PHYs 56 and 57.
- the PHY 56 is connected to the master 23.
- the PHY 57 is connected to the multiprocessing unit 51.
- the PHYs 56 and 57 are connected by a LAN cable 58, for example.
- the multiprocessing unit 61 of the slider unit 13 is connected to the slave 33 via each of DUMMY-PHYs 67A and 67B. Then, the master 23 of the control unit 11 constructs an industrial network that transmits and receives control data and the like with devices such as the relay 35 connected to the slaves 33 and 43, and realizes wiring integration (reduction) and the like.
- the above-described industrial network is, for example, a network that complies with the EtherCAT (registered trademark) standard.
- the EtherCAT frame transmitted from the master 23 is transmitted so as to circulate through each of the slaves 33 and 43 and is transmitted and received at high speed.
- the slave 33 performs reading or writing processing on the EtherCAT frame received from the master 23 and transfers the EtherCAT frame to the slave 43 of the head unit 15.
- the slave 33 copies data from the read data position for the slave 33 set in advance in the EtherCAT frame, and performs processing such as driving the relay 35 according to the content of the copied data.
- the slave 33 writes information indicating the completion of driving of the relay 35, detection information of the sensor 37, and the like at a data position for writing for the slave 33 set in advance in the EtherCAT frame, and transfers the information to the head unit 15.
- the slaves 33 and 43 exchange and transmit frames at high speed while performing input / output processing on the EtherCAT frame.
- FIG. 4 shows a configuration of a mounting apparatus 10A as a comparative example.
- a PHY 91 is connected to the multiplex processing unit 61 as indicated by a broken line in FIG. 4.
- the slave 33 is connected to the PHY 92.
- the PHYs 91 and 92 are connected via an Ethernet (registered trademark) cable 93.
- the multiplex processing unit 61 and the slave 33 are connected via the two PHYs 91 and 92 and the Ethernet (registered trademark) cable 93.
- the multiplex processing unit 71 is connected to the slave 43 via two PHYs 91 and 92 and an Ethernet (registered trademark) cable 93.
- the PHYs 91 and 92 are ICs that function as an interface between a logical layer and a physical layer, for example.
- the PHY 91 once converts a digital signal input from the multiprocessing unit 61 or the like into an analog signal, and transmits the analog signal to the PHY 92 via the cable 93.
- the PHY 92 converts the analog signal received from the PHY 91 into a digital signal again and transfers it to the slave 33 or the like.
- the PHY 92 once converts a digital signal input from the slave 33 or the like into an analog signal and transmits the analog signal to the PHY 91.
- the PHY 91 converts the received analog signal into a digital signal again, and then transfers it to the multiple processing unit 61 and the like.
- a slave IP core (such as slave 33) used in EtherCAT (registered trademark) is assumed to be connected to an external device, and such a PHY 92 is provided as an external interface as a standard.
- EtherCAT registered trademark
- communication is not started with an external device unless a communication link with the PHYs 91 and 92 is established.
- the connection is made via two PHYs 91 and 92 and a cable 93. There is a need to.
- the DUMMY-PHYs 67A, 67B, 77 pseudo-generate a signal that complies with, for example, the MII (Media Independent Interface) communication standard, and the slave 33 , 43 is transmitted to establish communication. Since DUMMY-PHYs 67A, 67B, and 77 have the same configuration, the following description will focus on DUMMY-PHY 67A as a representative.
- the DUMMY-PHYs 67A, 67B, and 77 are realized by a logic circuit such as a field programmable gate array (FPGA), for example.
- FPGA field programmable gate array
- a multiprocessing unit 61, a slave 33, and DUMMY-PHYs 67A and 67B are incorporated in a logic circuit of the same FPGA 60, for example. That is, preferably, the multiprocessing unit 61, the slave 33, and the DUMMY-PHYs 67A and 67B are collectively mounted on the same board of the FPGA 60.
- FIG. 2 shows a schematic configuration of the DUMMY-PHY 67A and the multiple processing unit 61.
- the multiplex reception processing unit 101 receives the multiplexed data received from the multiplex processing unit 51, and the demultiplexing unit 103 performs demultiplexing processing of the multiplexed data.
- the multiplex processing unit 61 outputs the data related to the slave 33 among the data separated by the demultiplexing unit 103 to the MII reception data processing unit 111 of the DUMMY-PHY 67A.
- the MII interface 113 included in the DUMMY-PHY 67A is an interface connected to the slave 33, and performs communication conforming to the MII standard.
- the MII reception data processing unit 111 transfers the data input from the demultiplexing unit 103 to the slave 33 via the MII interface 113.
- the MII transmission data processing unit 115 of the DUMMY-PHY 67A transfers the data transmitted from the slave 33 via the MII interface 113 to the multiplexing unit 105 of the multiplexing processing unit 61.
- the multiplexing unit 105 multiplexes control data such as the relay 35 connected to the slave 33 and data from another device, and outputs the multiplexed data to the multiplex transmission processing unit 107.
- the “other device” corresponds to, for example, the sensor 37 included in the slider unit 13 or the parts camera 48 of the head unit 15.
- the multiplex transmission processing unit 107 transmits the multiplexed data input from the multiplexing unit 105 toward the multiplex processing unit 51 of the control unit 11.
- the MII interface 113 transmits / receives data transmitted / received to / from the slave 33 as a TXD signal (transmission data) or an RXD signal (reception data) shown in FIG. In addition to this signal, the MII interface 113 transmits and receives various control signals to and from the slave 33. For example, the MII interface 113 transmits a transmission clock signal such as a TX_CLK signal, an MDIO (Media Dependent Input / Output) signal for management control described later, an MDC signal that is the clock signal, and the like.
- a transmission clock signal such as a TX_CLK signal, an MDIO (Media Dependent Input / Output) signal for management control described later, an MDC signal that is the clock signal, and the like.
- an external device (multiplex processing unit 61) is required only after a communication link is established with PHYs 91 and 92 (see FIG. 4). Etc.).
- the PHY 92 is provided with a register indicating whether or not communication with the other PHY 91 is established. Then, the slave 33 transmits an MDIO signal to the PHY 92 and acquires information set in the register of the PHY 92.
- the slave 33 starts communication with the multiprocessing unit 61 via the PHYs 91 and 92.
- the slave 33 does not start communication with the multiprocessing unit 61 until a register value indicating communication establishment can be acquired. Therefore, the pseudo signal generation unit 117 of the DUMMY-PHY 67A shown in FIG. 2 transmits an MDIO signal to the slave 33 via the MII interface 113 when establishing multiplexed communication, and establishes communication with the slave 33.
- FIG. 3 shows the processing procedure of DUMMY-PHY 67A.
- the mounting apparatus 10 performs configuration in order to construct a logic circuit such as the multiprocessing unit 61 of the FPGA 60.
- the pseudo signal generation unit 117 sets the register value to the register 117A (see FIG. 2) included in the pseudo signal generation unit 117. Set.
- the pseudo signal generation unit 117 sets a value indicating link down to the register 117A in a state where the multiplex communication by the multiplex processing unit 61 is not established.
- the DUMMY-PHY 67A responds with a register value indicating, for example, a link down even if there is an inquiry by the MDIO signal from the slave 33.
- the pseudo signal generation unit 117 performs lighting control of the link LED indicating the communication state. For example, the pseudo signal generation unit 117 performs control to turn off the link LED on the circuit board in a state where communication is not established.
- the MII reception data processing unit 111 and the MII transmission data processing unit 115 can control the start or stop of data transfer based on the control of the pseudo signal generation unit 117.
- the pseudo signal generation unit 117 stops the transfer operations of the MII reception data processing unit 111 and the MII transmission data processing unit 115 in a state where multiplex communication is not established.
- the pseudo signal generation unit 117 may execute processing in response thereto.
- the pseudo signal generation unit 117 may execute so-called auto negotiation such as setting an appropriate communication speed in response to setting of the data transfer rate from the slave 33. .
- the multiplex state notifying unit 109 of the multiplex processing unit 61 shown in FIG. 2 monitors the state of multiplex communication. For example, the multiplex state notifying unit 109 monitors the states of the multiplex reception processing unit 101 and the multiplex transmission processing unit 107 and determines whether multiplex communication has been established. When detecting that the multiplexed communication has been established, the multiplex state notifying unit 109 transmits that fact to the pseudo signal generating unit 117.
- the multiplex state notifying unit 109 is preferably set to transmit the fact to the pseudo signal generating unit 117 when, for example, multiplex communication with the control unit 11 via the LAN cable 81 (see FIG. 1) is established.
- the multiplex processing unit 61 includes, for example, a processing unit that performs multiplex communication using the LAN cable 81 (such as the demultiplexing unit 103 and the multiplex state notification unit 109 shown in FIG. 2) and multiplex communication using the LAN cable 83. And a processing unit (not shown). Therefore, the slave 33 communicates with the control unit 11 via the DUMMY-PHY 67A, the processing unit corresponding to the LAN cable 81 of the multiprocessing unit 61, and the PHY 63A.
- the slave 33 communicates with the head unit 15 via the DUMMY-PHY 67B, the processing unit corresponding to the LAN cable 83 of the multiprocessing unit 61, and the PHY 63B. That is, the multiplex processing unit 61 processes data transmitted through two communication lines therein. Therefore, the multiplex state notifying unit 109 corresponding to DUMMY-PHY 67A notifies the communication state of the LAN cable 81 to the pseudo signal generating unit 117 of DUMMY-PHY 67A. Also, a multi-state notifying unit (not shown) corresponding to DUMMY-PHY 67B notifies the communication state of LAN cable 83 to a pseudo signal generating unit (not shown) of DUMMY-PHY 67B. As a result, even if only the LAN cable 83 is disconnected, if the LAN cable 81 is connected, communication between the master 23 and the slave 33 via the LAN cable 81 is possible.
- the pseudo signal generation unit 117 maintains the link-down state until a signal indicating that multiplex communication has been established is input from the multiplex state notification unit 109 (S13: NO). .
- the pseudo signal generating unit 117 sets a value indicating link up in the register 117A (S15).
- the pseudo signal generation unit 117 responds with a register value indicating link up. Further, the pseudo signal generation unit 117 turns on the link LED on the circuit board to notify the link up state (S15).
- the pseudo signal generation unit 117 causes the MII reception data processing unit 111 and the MII transmission data processing unit 115 to start transfer processing.
- the MII transmission data processing unit 115 starts a process of transferring the data received from the slave 33 to the multiplexing unit 105.
- the MII reception data processing unit 111 starts a process of transferring the data received from the demultiplexing unit 103 to the slave 33.
- the DUMMY-PHY 67A can appropriately perform data transfer between the multiprocessing unit 61 and the slave 33.
- the pseudo signal generation unit 117 continues the transfer process by the MII reception data processing unit 111 and the MII transmission data processing unit 115 until the multiplex communication is disconnected (S19: NO).
- the pseudo signal generating unit 117 executes the link establishment process from S11 again.
- the multiplex processing unit 61 and the slave 33 can automatically re-establish the link according to the timing at which multiplex communication is restored.
- the electronic component mounting apparatus 10 is an example of a work machine.
- the head unit 15 is an example of a movable unit.
- An electronic component is an example of a workpiece.
- the master 23 and the slaves 33 and 43 are examples of processing circuits.
- the pseudo signal generation unit 117 is an example of a pseudo signal transmission unit.
- the master 23 and the slaves 33 and 43 process control data in an industrial network (for example, EtherCAT (registered trademark)). Control data processed by the master 23 or the like is transmitted / received by multiplexed communication by the multiple processing units 51, 61, 71.
- the DUMMY-PHY 67A of the slider unit 13 is connected between the multiplex processing unit 61 and the slave 33, generates a pseudo signal conforming to the MII communication standard, and transmits the generated signal to the slave 33 to perform communication. Perform establishment.
- the DUMMY-PHY 67A establishes communication with the slave 33, and then transfers data between the multiplex processing unit 61 and the slave 33.
- the pseudo signal generation unit 117 maintains the link-down state until a signal indicating that multiplex communication has been established is input from the multiplex state notification unit 109 (S13: NO in FIG. 3). On the other hand, when the signal indicating that multiplex communication has been established is input from the multiplex state notifying unit 109 (S13: YES), the pseudo signal generating unit 117 responds to the slave 33 with a register value indicating link up. If industrial network communication is started prior to establishment of multiplex communication, control data cannot be transferred between the master 23 and slaves 33 and 43, and an error occurs. On the other hand, in the mounting apparatus 10 according to the present embodiment, since it is confirmed that the multiplex communication has been established, the communication of the industrial network is started.
- the DUMMY-PHY 67A generates a signal conforming to the MII communication standard used in Ethernet (registered trademark) which is a communication standard widely used in industrial networks. For this reason, such a configuration improves versatility and can be applied to various industrial networks.
- the present invention is not limited to the above-described embodiments, and various improvements and modifications can be made without departing from the spirit of the present invention.
- the communication standard applied to the industrial network is not limited to Ethernet (registered trademark), but may be another communication standard.
- the interface standard is not limited to MII, but may be GMII (Gigabit Media Independent Interface) or RMII (Reduced Media Independent Interface).
- the multiprocessing unit 61, the slave 33, and the DUMMY-PHYs 67A and 67B are incorporated in the same FPGA 60, but may be separately implemented.
- two slaves 33 and 43 are connected to one master 23, but the master may be a plurality of two or more, and the slave may be a plurality of three or more.
- the electronic component mounting apparatus 10 for mounting an electronic component on a circuit board has been described as the working machine in the present application.
- the working machine in the present application is not limited to this, and other devices such as a screen printing apparatus may be used. It can be applied to a substrate working machine. Further, for example, the present invention may be applied to a working robot that performs assembly work such as a secondary battery (such as a solar battery or a fuel cell).
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Abstract
Description
まず、装着装置10は、装置本体の電源が投入されると、FPGA60の多重処理部61などの論理回路を構築するために、コンフィグレーションを実施する。回路構築が完了すると、図3のステップ(以下、単に「S」と表記する)11において、疑似信号生成部117は、当該疑似信号生成部117が有するレジスタ117A(図2参照)に対しレジスタ値を設定する。疑似信号生成部117は、多重処理部61による多重通信が確立されていない状態では、レジスタ117Aに対しリンクダウンを示す値を設定する。この状態では、DUMMY-PHY67Aは、スレーブ33からMDIO信号による問い合わせがあっても、例えば、リンクダウンを示すレジスタ値を応答する。また、疑似信号生成部117は、通信の状態を示すリンクLEDの点灯制御を実施する。例えば、疑似信号生成部117は、通信が確立されていない状態では、回路基板上のリンクLEDを消灯する制御を実行する。
<効果1>マスター23及スレーブ33,43は、産業用ネットワーク(例えば、EtherCAT(登録商標))における制御データを処理する。マスター23等で処理された制御データは、多重処理部51,61,71による多重化通信で送受信される。スライダ部13のDUMMY-PHY67Aは、多重処理部61とスレーブ33との間に接続され、MII通信の規格に準拠した信号を擬似的に生成し、スレーブ33に生成した信号を送信して通信の確立を実行する。DUMMY-PHY67Aは、スレーブ33との通信を確立した後、多重処理部61とスレーブ33との間でデータの転送を行う。このような構成では、図4に示す装着装置10Aが有するPHY91,92及びケーブル93を必要とせずに、多重処理部61とスレーブ33とのデータの受け渡しを適切に実施することが可能となる。また、PHYの数を減らすことが可能となるため、基板実装面積が減り、装置の小型化が可能となる。また、多重処理部61とスレーブ33とのデータの送受信において一旦アナログ信号に変換する処理が省略されるため、制御データの転送時間を短縮することが可能となる。その結果、例えば、EtherCATフレームを産業用ネットワークで循環させる場合に、フレームがネットワークを一周するのに必要な転送時間の短縮が可能となり、接続可能なスレーブ数を増加させることが可能となる。
例えば、産業用ネットワークに適用される通信規格は、イーサネット(登録商標)に限らず、他の通信規格でもよい。また、インターフェースの規格は、MIIに限らず、GMII(Gigabit Media Independent Interface)やRMII(Reduced Media Independent Interface)でもよい。
また、上記実施例では、多重処理部61,スレーブ33及びDUMMY-PHY67A,67Bを、同一のFPGA60に組み込んだが、別々に実装してもよい。
また、上記実施例では、1つのマスター23に対して2つのスレーブ33,43が接続されたが、マスターは2以上の複数でもよく、スレーブも3以上の複数でもよい。
また、上記実施例では本願における作業機として、電子部品を回路基板に実装する電子部品装着装置10について説明したが、本願における作業機はこれに限定されるものではなく、スクリーン印刷装置などの他の対基板作業機に適用することができる。また、例えば、二次電池(太陽電池や燃料電池など)等の組立て作業を実施する作業用ロボットに適用してもよい。
Claims (6)
- 産業用ネットワークにおける制御データを処理する処理回路と、
前記処理回路から入力された前記制御データを多重化して生成した多重化データを、他の処理回路に送信する多重処理部と、
前記処理回路と前記多重処理部との間に接続され、前記産業用ネットワークにおける通信規格に準拠した信号を疑似的に生成して前記処理回路に送信し、前記処理回路との通信を確立して前記多重処理部と前記処理回路との間で前記制御データを転送する疑似信号送信部と、
を備えることを特徴とする多重化通信システム。 - 前記疑似信号送信部は、前記多重処理部が、他の多重処理部と前記多重化データを送受信する伝送路の通信を確立したことに応じて、前記処理回路に対する通信の確立処理を開始することを特徴とする請求項1に記載の多重化通信システム。
- 前記産業用ネットワークにおける通信規格は、イーサネット(登録商標)規格であり、
前記疑似信号送信部は、MIIのインターフェースが行う通信規格に準拠した信号を擬似的に生成することを特徴とする請求項1又は請求項2に記載の多重化通信システム。 - 前記処理回路は、プログラマブル論理デバイスの回路を構築するためのIPコア、又は通信制御を行うASICであることを特徴とする請求項1乃至請求項3のいずれかに記載の多重化通信システム。
- 前記多重処理部、前記疑似信号送信部、及び前記処理回路は、同一のプログラマブル論理デバイス内に構築された回路であることを特徴とする請求項1乃至請求項3のいずれかに記載の多重化通信システム。
- 可動部によりワークを保持して装着作業を実施する作業機であって、
前記装着作業に拘わるデータの伝送を請求項1乃至請求項5のいずれかに記載の多重化通信システムにより伝送することを特徴とする作業機。
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WO2019138568A1 (ja) | 2018-01-15 | 2019-07-18 | 株式会社Fuji | 多重装置、作業機、及び通信の切断方法 |
WO2020100231A1 (ja) | 2018-11-14 | 2020-05-22 | 株式会社Fuji | 光通信装置及び作業機 |
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