WO2016123956A1 - 信号转换装置及方法、信号生成系统和显示设备 - Google Patents

信号转换装置及方法、信号生成系统和显示设备 Download PDF

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Publication number
WO2016123956A1
WO2016123956A1 PCT/CN2015/087232 CN2015087232W WO2016123956A1 WO 2016123956 A1 WO2016123956 A1 WO 2016123956A1 CN 2015087232 W CN2015087232 W CN 2015087232W WO 2016123956 A1 WO2016123956 A1 WO 2016123956A1
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Prior art keywords
display
signal
predetermined format
data packet
pixel
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PCT/CN2015/087232
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English (en)
French (fr)
Inventor
刘建福
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京东方科技集团股份有限公司
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Priority to US14/905,413 priority Critical patent/US9715857B2/en
Publication of WO2016123956A1 publication Critical patent/WO2016123956A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/10—Use of a protocol of communication by packets in interfaces along the display data pipeline
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a signal conversion apparatus, a signal conversion method for performing signal conversion using the signal conversion apparatus, a signal generation system including the signal conversion apparatus, and a A display device for a signal generation system.
  • the signal generating system includes a graphics processing main chip, an RGB pixel signal transmitting chip, and a signal conversion chip.
  • the graphics processing main chip is used for converting video or image into RGB pixel signals
  • the RGB pixel signal transmitting chip is configured to send the received RGB pixel signals to the signal conversion chip
  • the signal conversion chip can convert the received RGB pixel signals. It is used to drive the LVDS signal of the LCD screen.
  • an 8-bit LVDS signal can be used to drive a liquid crystal display of 42 inches or less.
  • LCD screens of more than 42 inches have appeared. Due to the increased size of the LCD screen, a 10-bit LVDS signal is required to drive a liquid crystal display larger than 42 inches. Then, the equipment originally used to produce a signal generation system for generating an 8-bit LVDS signal cannot be used any more, resulting in waste of resources.
  • a signal includes: a pixel signal transmitting chip for receiving and emitting a plurality of pixel signals having n colors, the plurality of pixel signals are arranged in a first arrangement order; and a signal conversion chip capable of The plurality of pixel signals arranged in the first arrangement order are converted into a display signal data packet having a first predetermined format and outputted to drive a display device of a predetermined size, wherein the signal conversion device further comprises:
  • a switching unit wherein the input end of the switching unit is connected to the output end of the pixel signal transmitting chip, and is used for reordering the plurality of pixel signals arranged in the first arrangement order into the second arrangement order and outputting ;
  • a signal conversion chip capable of converting a plurality of pixel signals arranged in the second arrangement order into display signal data packets having a second predetermined format
  • a signal generating and outputting unit configured to generate a display signal data packet of a third predetermined format according to the display signal data packet of the second predetermined format output by the signal conversion chip, and divide the group into a group for outputting to drive the ratio a display device having a predetermined size, wherein
  • the display data corresponding to the pixel signals of each color includes M bits, and M is an even number.
  • the total n*M bit display data is divided into M/2 groups, and the signal conversion chip outputs the M/2 group display data;
  • the display data corresponding to each color includes N bits, N is an even number, and N is greater than M, and the display signal data packet having the third predetermined format
  • the n*N bit display data is divided into N/2 groups, and the low (NM) bit display data of each color is located in the back (NM)/2 group, and the low (NM) bit display data of each color is displayed.
  • the M/2 group display data in the display signal data packet having the second predetermined format is in one-to-one correspondence with the previous M/2 group display data in the display signal data packet having the third predetermined format, and has Any one of the display signal data packets of the second predetermined format is greater than the number of display signals having the third predetermined format According to the corresponding display data in the package is low (N-M) bit.
  • the pixel signal transmitting chip has n*M output ports, and each output port of the pixel signal transmitting chip is used to output one pixel signal;
  • the switching unit has n*M input ports and n*M output ports, and the n*M input ports of the switching unit are in one-to-one correspondence with the n*M output ports of the pixel signal transmitting chip. Connected, the n*M input ports of the switching unit and the n*M output ports of the switching unit are connected in a one-to-one correspondence according to a predetermined rule through a connection channel, so that according to the first arrangement order The input pixel signals are output in the second arrangement order;
  • the signal conversion chip has n*M input ports, and the 3M input ports of the signal conversion chip are connected in one-to-one correspondence with the n*M output ports of the switching unit.
  • the adapter unit comprises an adapter plate
  • the adapter plate comprises two sets of welding plates
  • each set of the welding plates comprises n*M welding plates
  • a group of the welding plates is used as the rotating plate
  • An input port of the board, another set of the pads serving as an output port of the interposer, and two sets of the pads are electrically connected in a one-to-one correspondence according to the predetermined rule.
  • the switching unit further includes an exclusion resistor detachably connected to the adapter board, the exclusion resistor includes n*M resistors, and n*M resistors are connected in one-to-one correspondence Between n*M output ports of the pixel signal transmitting chip and n*M input ports of the signal conversion chip, the interposer board is connected between the input port of the interposer board and the corresponding output port The resistance value of the wire is smaller than the resistance value of the resistor, and when the adapter plate is removed, the pixel signal transmitting chip can output the pixel signal having the first arrangement order to the Signal conversion chip.
  • the display signal data packet is a low voltage differential signal data packet.
  • n 3
  • the pixel signal transmitting chip is configured to receive and emit pixel signals having three colors of red, green, and blue
  • the first predetermined format is a VESA format
  • the third predetermined format is a JEIDA format.
  • M is 8, and N is 10.
  • a signal generating system including an image processing main chip and a signal conversion device, the image processing The main chip is used to convert a video or image into a pixel signal and to be supplied to a pixel signal transmitting chip of the signal converting device, wherein the signal converting device is the above-described signal converting device provided by the present invention.
  • a display device including a display panel and a signal generating system, wherein the signal generating system is the above-described signal generating system provided by the present invention, and the display panel includes a display
  • the signal input interface includes: N/2 channels, and the M/2 output ports of the signal conversion chip are respectively connected to the first M/2 channels of the display signal input interface in a one-to-one correspondence.
  • the display device further comprises a storage unit for pre-storing video or images, and an output end of the storage unit is connected to an input end of the image processing main chip.
  • a signal conversion method comprising the steps of: converting a plurality of pixel signals arranged in the first arrangement order into display signal data packets having a first predetermined format to drive a predetermined size
  • the step of displaying the device wherein the signal conversion method further comprises the following steps:
  • the display data corresponding to the pixel signal of each color includes M bits, and M is an even number,
  • the total n*M bit display data is divided into M/2 groups;
  • the display data corresponding to the three colors includes N bits, N is an even number, and N is greater than M, in the display signal data packet having the third predetermined format, A total of n*N bits display data is divided into N/2 Group, the low (N-M) bit display data of each color is located in the back (N-M)/2 group, and the low (N-M) bit display data of each color is a small noise analog signal;
  • the M/2 group display data in the display signal data packet having the second predetermined format is in one-to-one correspondence with the previous M/2 group display data in the display signal data packet having the third predetermined format, and has Any one of the display signal data packets of the second predetermined format is lower (NM) bits than the corresponding display data in the display signal data packet having the third predetermined format.
  • the display signal data packet is a low voltage differential signal data packet.
  • n 3
  • the pixel signal transmitting chip is configured to receive and emit pixel signals having three colors of red, green, and blue
  • the first predetermined format is a VESA format
  • the third predetermined format is a JEIDA format.
  • M is 8, and N is 10.
  • a display signal packet having a third predetermined format can drive a display panel of a predetermined size.
  • a display signal data packet having a first predetermined format is obtained, and the display signal data packet having the first predetermined format includes n*M bit display data. .
  • the display signal data packet having the first predetermined format can be used to drive a display panel having a size smaller than the predetermined display panel.
  • the signal conversion device provided by the present invention is an improvement based on the prior art signal conversion device. In other words, you can continue to use the original signal generation system to drive a larger display.
  • FIG. 1 is a schematic diagram of a signal conversion device in the prior art
  • FIG. 2 is a schematic diagram of a signal conversion device provided by the present invention.
  • FIG. 3 is a schematic diagram of a standard data packet having a first predetermined format
  • FIG. 4 is a schematic diagram of a standard data packet having a second predetermined format
  • Figure 5 is a schematic diagram of a data packet having a third predetermined format
  • FIG. 6 is a schematic diagram of a rule for signal conversion using a signal conversion device including an RGB888 chip and an EP387AP8F chip;
  • FIG. 7 is a schematic structural diagram of a signal generating system provided by the present invention.
  • FIG. 8 is a flow chart of a signal conversion method provided by the present invention.
  • a signal conversion apparatus As shown in FIG. 2, as an aspect of the present invention, a signal conversion apparatus is provided, wherein the signal conversion apparatus includes:
  • a pixel signal transmitting chip 100 the pixel signal transmitting chip 100 is configured to receive and emit a plurality of pixel signals having n colors, and the plurality of pixel signals are arranged in a first arrangement order;
  • the signal conversion chip 300 capable of converting a plurality of pixel signals arranged in the first arrangement order into display signal data packets having a first predetermined format, thereby utilizing the display signal data packets of the first predetermined format Drives a liquid crystal display of a predetermined size (for example, 42 inches).
  • the signal conversion device further includes:
  • the switching unit 200 is connected to the output end of the pixel signal transmitting chip 100, and the plurality of pixel signals arranged in the first arrangement order are reordered by the switching unit 200 to form a second Arrange and output in order;
  • the signal generating and outputting unit 700 is configured to generate a display signal data packet of a third predetermined format according to the display signal data packet of the second predetermined format output by the signal conversion chip 300, and divide the group into a group for output to drive A display device that is larger than the predetermined size.
  • the signal conversion chip 300 is capable of converting a plurality of pixel signals arranged in the second arrangement order into display signal data packets having a second predetermined format, and wherein:
  • the display data corresponding to the pixel signals of each color includes M bits, and M is an even number.
  • the total n*M bit display data is divided into M/2 groups, and the signal conversion chip 300 has M/2 output ports to respectively display the M/2 group display data. Output.
  • the display signal data packet of the third predetermined format is used to drive the liquid crystal display panel larger than the predetermined size, and in the display signal data packet having the third predetermined format, the display data corresponding to each color includes N bits, and N is an even number. And N is greater than M, in the display signal data packet having the third predetermined format, the total n*N bit display data is divided into N/2 groups, and the low (NM) bit display data of each color is located at the back (NM) In the /2 group, and the low (NM) bit display data of each color is a small noise analog signal;
  • the M/2 group display data in the display signal data packet having the second predetermined format is in one-to-one correspondence with the previous M/2 group display data in the display signal data packet having the third predetermined format, and has Any one of the display signal data packets of the second predetermined format is lower (NM) bits than the corresponding display data in the display signal data packet having the third predetermined format.
  • the plurality of pixel signals may include pixel signals of three colors, and may also be pixel signals of four colors or more colors.
  • the pixel signal is an RGB pixel signal.
  • the pixel signal is an RGBX pixel signal, wherein X may be other colors such as white or yellow.
  • the low (NM) bit display data of each color is a small noise analog signal in the display signal packet having the third predetermined format, even if there is no such "lower color per color (NM) ) bit display data", still A display panel larger than the predetermined size can be driven.
  • the M/2 group display data in the display signal data packet having the second predetermined format corresponds one-to-one with the previous M/2 group display data in the display signal data packet having the third predetermined format.
  • any one of the display signal data packets having the second predetermined format is lower (NM) bits than the display data corresponding to the display signal data packet having the third predetermined format.
  • a display signal data packet having a first predetermined format is obtained, and the display signal data packet having the first predetermined format is obtained. Includes n*M bits to display data. As shown in FIG. 1, the pixel signals are RGB pixel signals. Accordingly, the display signal packet having the first predetermined format has 3M-bit display data. It should be noted that the display signal data packet having the first predetermined format can be used to drive the display panel below the predetermined size.
  • the signal conversion device provided by the present invention is an improvement based on the prior art signal conversion device. In other words, you can continue to use the original signal generation system to drive a larger display.
  • the specific specifications of the switching unit 200 are not limited. That is, a person skilled in the art can convert a plurality of pixel signals arranged in the first arrangement order into a plurality of pixel signals arranged in the second arrangement order by any achievable manner. It will be understood by those skilled in the art that although the order of arrangement of a plurality of pixel signals is changed, the contents of the plurality of pixel signals are not changed.
  • the pixel signal transmitting chip 100 has n*M output ports, and each output port of the pixel signal transmitting chip 100 is used to output one pixel signal. A plurality of different color pixel signals are output from n*M output ports.
  • the pixel signal is an RGB pixel signal
  • the pixel signal transmitting chip 100 has 3M output ports.
  • the switching unit 200 has n*M input ports and n*M output ports.
  • the n*M input ports of the switching unit are connected in one-to-one correspondence with the n*M output ports of the pixel signal transmitting chip 100, and the n*M input ports of the switching unit 200 and the n*M of the switching unit 200
  • the output ports are connected one-to-one correspondingly according to a predetermined rule through the connection channel, so that the pixel signals input in the first arrangement order are output in the second arrangement order.
  • the predetermined rule refers to a rule of "sending pixel signals input in the first arrangement order in the second arrangement order".
  • the switching unit 200 has 3M input ports and 3M output ports.
  • the signal conversion chip 300 has n*M input ports, and the n*M input ports of the signal conversion chip 300 are connected in one-to-one correspondence with the n*M output ports of the switching unit. Likewise, when the pixel signal is an RGB pixel signal, the signal conversion chip 300 has 3M input ports.
  • the pixel signals are RGB pixel signals.
  • the output port a1 of the output pixel signal R1 on the pixel signal transmitting chip 100 is connected to the input port d1 on the signal conversion chip 300;
  • the output port a2 of the pixel signal transmitting chip 100 outputting the pixel signal R2 is connected to the input port d2 on the signal conversion chip 300;
  • the output port a3 of the pixel signal transmitting chip 100 outputting the pixel signal R3 is connected to the input port d3 on the signal conversion chip 300.
  • the output port a4 of the pixel signal transmitting chip 100 for outputting the pixel signal G1 is connected to the input port d4 of the signal conversion chip 300; the output port a5 of the pixel signal transmitting chip 100 for outputting the pixel signal G2 and the input port of the signal conversion chip 300; D5 is connected; the output port a6 of the output pixel signal G3 on the pixel signal transmitting chip 100 is connected to the input port d6 on the signal conversion chip 300; the output port a7 of the pixel signal transmitting chip B1 on the pixel signal transmitting chip 100 and the signal conversion chip 300
  • the input port d7 is connected; the output end of the pixel signal B2 is outputted on the pixel signal transmitting chip 100 D8 a8 input port on the chip 300 is connected to the signal converter; d9 connected to an input port on the output signal of the pixel B3 are output to the port a9-signal conversion chip.
  • the first arrangement order of the RGB pixel signals received by the signal conversion chip 300 is R1, R2, R3, G1, G2, G3, B1, B2, B3.
  • the signal conversion chip 300 can convert the RGB pixel signals having the first arrangement order into display signal data packets having the first predetermined format.
  • the output port a1 of the pixel signal R1 and the input on the switching unit 200 are output on the pixel signal transmitting chip 100.
  • the port b1 is connected, the input port b1 on the switching unit 200 is connected to the output port c3 on the switching unit 200, and the output port c3 on the switching unit 200 is connected to the input port d3 on the signal conversion chip 300; the pixel signal transmitting chip
  • the output port a2 of the output pixel signal R2 on 100 is connected to the input port b2 on the switching unit 200, and the input port b2 on the switching unit 200 is connected to the output port c1 on the switching unit 200, and the output on the switching unit 200
  • the port c1 is connected to the input port d1 on the signal conversion chip 300;
  • the output port a3 of the pixel signal transmitting chip 100 for outputting the pixel signal R3 is connected to the input port b3 on the switching unit 200, and the input port b3 on the switching unit 200 is
  • the output port c2 on the switching unit 200 is connected, and the output port c2 on the switching unit 200 is connected to the input port d2 on the signal
  • An output port a4 of the pixel signal transmitting chip 100 for outputting the pixel signal G1 is connected to the input port b4 of the switching unit 200, and an input port b4 of the switching unit 200 is connected to the output port c6 of the switching unit 200, and the switching unit
  • the output port c6 on the 200 is connected to the input port d6 on the signal conversion chip 300;
  • the output port a5 of the pixel signal transmitting chip 100 outputting the pixel signal G2 is connected to the input port b5 on the switching unit 200, and on the switching unit 200
  • the input port b5 is connected to the output port c4 on the switching unit 200, the output port c4 on the switching unit 200 is connected to the input port d4 on the signal conversion chip 300, and the output port a6 of the pixel signal G3 is output on the pixel signal transmitting chip 100.
  • the input port b6 on the switching unit 200 is connected to the output port c5 on the switching unit 200, and the output port c5 on the switching unit 200 and the input on the signal conversion chip 300 Port d5 is connected.
  • the output port a7 of the pixel signal B1 is outputted on the pixel signal transmitting chip 100
  • the input port b7 on the switching unit 200 is connected, the input port b7 on the switching unit 200 is connected to the output port c9 on the switching unit 200, the output port c9 on the switching unit 200 and the input port on the signal conversion chip 300 D9 is connected;
  • the output port a8 of the pixel signal transmitting chip 100 for outputting the pixel signal B2 is connected to the input port b8 of the switching unit 200, and the input port b8 of the switching unit 200 is connected to the output port c7 of the switching unit 200.
  • the output port c7 on the switching unit 200 is connected to the input port d7 on the signal conversion chip 300; the output port a9 of the pixel signal transmitting chip 100 outputting the pixel signal B3 is connected to the input port b9 on the switching unit 200, and the switching unit
  • the input port b9 on the 200 is connected to the output port c8 on the switching unit 200, and the output port c8 on the switching unit 200 is connected to the input port d8 on the signal conversion chip 300.
  • the second arrangement order of the RGB pixel signals received by the signal conversion chip 300 is R2, R3, R1, G2, G3, G1, B2, B3, B1.
  • the signal conversion chip 300 can convert an RGB pixel signal having a first arrangement order into a display signal data packet having a second predetermined format.
  • the adapter unit 200 is simple in construction and easy to implement.
  • the adapter unit 200 may include an adapter plate including two sets of welding pads, each set of the welding pads including n*M welding pads, and one set of the welding plates is used as the An input port of the adapter board, and another set of the pads serves as an output port of the adapter board, and the two sets of the soldering pads are electrically connected in a one-to-one correspondence according to the predetermined rule.
  • the adapter plate described herein can be made from a "PCB board".
  • the adapter plate is also an electronic component that is simple in structure and easy to manufacture. It should be noted that, on the transfer board, for any one pad, the pad is only turned on with another pad corresponding to the pad, and is not between the other pads. Conducted. "Conduction” as used herein refers to the electrical connection.
  • the switching unit 200 further includes an exclusion resistor detachably connected to the adapter plate, the exclusion resistor including n*M resistors (as indicated by a broken line in FIG. 2)
  • the n*M resistors are connected in one-to-one correspondence to the n*M output ports of the pixel signal transmitting chip 100 and the n*M input ports of the signal conversion chip 300.
  • the resistance value of the wire connected between the input port of the interposer board and the corresponding output port on the interposer board is smaller than the resistance value of the resistor, and when the interposer board is removed, the pixel signal transmitting chip
  • the pixel signals arranged in the first arrangement order can be output to the signal conversion chip 300 by the exclusion.
  • the signal conversion chip can output a display signal packet having a second predetermined format
  • the output port of the pixel signal transmitting chip is connected to the input port of the signal conversion chip through the resistor of the exclusion, and the pixel signal input to the signal conversion chip There is still a first arrangement order, so the signal conversion chip can output a display signal data packet having a first predetermined format.
  • the exclusion may not be separated from the interposer.
  • the adapter plate may be detached from the adapter unit if the size of the display panel to be driven is smaller than the display panel of the predetermined size.
  • the signal conversion device provided by the invention can be applied to a display panel with a large size or a display panel with a small size.
  • the specific format of the display signal data packet is not limited.
  • the display signal data packet may be a low voltage differential signal (ie, LVDS signal) data packet.
  • n 3
  • the pixel signals of the plurality of colors include a red pixel signal, a green pixel signal, and a blue pixel signal
  • the first predetermined format may be a VESA format
  • the third predetermined format is a JEIDA format
  • M is 8, and N is 10.
  • Figure 3 shows the data arrangement in the VESA format packet
  • Figure 4 shows the data arrangement in the JEIDA format packet.
  • the lower two bits of data B1, B0 corresponding to the blue pixel signal
  • the lower two bits of data G1, G0 corresponding to the green pixel signal
  • the lower two digits corresponding to the red pixel signal According to R1, R0 are located in the last group of JEIDA format data packets.
  • Shown in Figure 5 is a schematic diagram of a display signal data packet having a second predetermined format.
  • the data is divided into four groups, and each display signal data in the display signal data packet of the second predetermined format is in the data packet of the display signal of the third predetermined format according to the relationship in FIG.
  • Each display signal corresponds to. That is, the display signal in the display signal packet of the second predetermined format is two bits lower than the display signal in the display signal packet of the third predetermined format.
  • the pixel signal transmitting chip 100 may be an RGB888 chip, the RGB888 chip has 24 output ports, and the switching unit 200 has 24 output ports and 24 input ports.
  • the signal conversion chip 300 can be an EP387AP8F chip.
  • a signal generating system including an image processing main chip 400 and a signal conversion device for converting a video or an image into RGB pixel signals is provided. And lose The pixel signal transmitting chip 100 sent to the signal conversion device, wherein the signal conversion device is the above-described signal conversion device provided by the present invention.
  • the signal conversion device includes a pixel signal transmitting chip 100, a switching unit 200, and a signal conversion chip 300.
  • the display device includes a display panel 600 and a signal generation system, wherein the signal generation system is the above-described signal generation provided by the present invention
  • the display panel 600 includes a display signal input interface, the display signal input interface includes N/2 channels, and the M/2 output ports of the signal conversion chip and the first M/2 of the display signal input interface respectively. The channels are connected one by one.
  • a display signal data packet having a second predetermined format is accessed into the display panel through the display signal input interface for driving the display panel for display.
  • the predetermined size may be 42 inches.
  • the display device may be a display device such as an advertisement machine in a television, a computer, or a vehicle.
  • the display device further includes a storage unit 500 for pre-storing video or images, and an output of the storage unit 500 is connected to an input of the image processing main chip 400.
  • FIG. 8 is a flowchart of a signal conversion method provided by the present invention. As shown in FIG. 8, the signal conversion method includes the following steps:
  • Step S802 converting a plurality of pixel signals arranged in the first arrangement order into display signal data packets having a first predetermined format.
  • Step S804 determining whether the size of the display device to be driven is greater than a predetermined size (for example, 42 inches), if yes, executing step S806, and if not, executing step S808.
  • a predetermined size for example, 42 inches
  • Step S806 driving the display device by using the display signal data packet of the first predetermined format.
  • Step S808 converting the pixel signals having n colors arranged in the first arrangement order into the second arrangement order.
  • Step S810 converting a plurality of pixel signals arranged in the second arrangement order into display signal data packets having a second predetermined format.
  • Step S812 generating a display signal data packet of a third predetermined format according to the display signal data packet of the second predetermined format, and dividing the group into a group for outputting to drive the display device.
  • the display data corresponding to the pixel signal of each color includes M bits, and M is Even, in the display signal data packet having the second predetermined format, the total n*M bit display data is divided into M/2 groups;
  • the theoretical display signal data packet for driving the predetermined display panel has a third predetermined format, and in the display signal data packet having the third predetermined format, the display data corresponding to the three colors includes N bits, N is an even number, and N is greater than M.
  • the total n*N bit display data is divided into N/2 groups, and the low (NM) bit display data of each color is located at the back (NM)/ In the 2 groups, the low (NM) bit display data of each color is a small noise analog signal;
  • the M/2 group display data in the display signal data packet having the second predetermined format is in one-to-one correspondence with the previous M/2 group display data in the display signal data packet having the third predetermined format, and has Any one of the display signal data packets of the second predetermined format is lower (NM) bits than the corresponding display data in the display signal data packet having the third predetermined format.
  • n 3
  • n 4
  • the display signal data packet is a low voltage differential signal data packet.
  • n 3
  • the pixel signal transmitting chip is configured to receive and emit pixel signals having three colors of red, green, and blue, wherein the first predetermined format is a VESA format, and the third predetermined format is a JEIDA format.
  • M is 8, and N is 10.

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Abstract

一种信号转换装置及方法、信号生成系统和显示设备。信号转换装置包括：像素信号发射芯片（100），发出第一排列顺序的多个像素信号；转接单元（200），按照第二排列顺序排列多个像素信号；信号转换芯片（300），分别将第一排列顺序或第二排列顺序的多个像素信号装换成第一预定格式或第二预定格式的显示信号数据包；和信号生成及输出单元（700），将第二预定格式的显示信号数据包转换成第三预定格式的显示信号数据包。第一预定格式的显示信号数据包用于驱动预定尺寸以下的显示装置，第三预定格式的显示信号数据包用于驱动比预定尺寸大的显示装置。

Description

信号转换装置及方法、信号生成系统和显示设备 技术领域
本发明涉及显示技术领域，具体地，涉及一种信号转换装置、一种利用该信号转换装置进行信号转换的信号转换方法、一种包括所述信号转换装置的信号生成系统和一种包括所述信号生成系统的显示设备。
背景技术
在驱动液晶显示屏时，需要利用信号生成系统将视频或图像转换成用于驱动液晶显示屏的LVDS信号。通常，信号生成系统包括图形处理主芯片、RGB像素信号发射芯片和信号转换芯片。图形处理主芯片用于将视频或图像转换成RGB像素信号，RGB像素信号发射芯片用于将接收到的RGB像素信号发送至信号转换芯片，所述信号转换芯片能够将接收到的RGB像素信号转换成用于驱动液晶显示屏的LVDS信号。
目前，可以利用8位的LVDS信号驱动42寸以下的液晶显示屏。随着用户对大尺寸显示装置的需求，现在已经出现了42寸以上的液晶显示屏。由于液晶显示屏尺寸增加，所以，需要使用10位的LVDS信号才能驱动大于42寸的液晶显示屏。那么，原来用于生产生成8位LVDS信号的信号生成系统的设备则无法继续使用，造成了资源的浪费。
因此，如何继续利用原有的信号生成系统驱动更大尺寸的液晶显示屏成为本领域亟待解决的技术问题。
发明内容
本发明的目的在于提供信号转换装置及方法、信号生成系统和显示设备，它们不仅可以用于驱动42寸以下的液晶显示屏，且可以驱动更大尺寸的液晶显示屏。
为了实现上述目的，作为本发明的一个方面，提供一种信号 转换装置，包括：像素信号发射芯片，该像素信号发射芯片用于接收并发出具有n种颜色的多个像素信号，该多个像素信号按照第一排列顺序排列；和信号转换芯片，其能够将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包，并将其输出以驱动预定尺寸的显示装置，其中，所述信号转换装置还包括：
转接单元，该转接单元的输入端与所述像素信号发射芯片的输出端相连，用于将按照所述第一排列顺序排列的多个像素信号重新排序为按照第二排列顺序排列并输出；和
信号转换芯片，该信号转换芯片能够将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包；以及
信号生成及输出单元，用于根据所述信号转换芯片输出的所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动比所述预定尺寸大的显示装置，其中，
具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每种颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组，并且所述信号转换芯片输出所述M/2组显示数据；
其中，在具有第三预定格式的显示信号数据包中，对应于每种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数 据包中相对应的显示数据低(N-M)位。
优选地，所述像素信号发射芯片具有n*M个输出端口，且所述像素信号发射芯片的每个输出端口用于输出一个像素信号；
所述转接单元具有n*M个输入端口和n*M个输出端口，所述转接单元的n*M个输入端口与所述像素信号发射芯片的n*M个输出端口一一对应地相连，所述转接单元的n*M个输入端口和所述转接单元的n*M个输出端口之间通过连接通道按照预定规则一一对应地连接，以使得按照所述第一排列顺序输入的像素信号按照所述第二排列顺序输出；
所述信号转换芯片具有n*M个输入端口，所述信号转换芯片的3M个输入端口与所述转接单元的n*M个输出端口一一对应地相连。
优选地，所述转接单元包括转接板，所述转接板上包括两组焊接盘，每组所述焊接盘包括n*M个焊接盘，一组所述焊接盘用作所述转接板的输入端口，另一组所述焊盘用作所述转接板的输出端口，两组所述焊接盘按照所述预定规则一一对应地导通。
优选地，所述转接单元还包括与所述转接板可拆卸地连接的排阻，所述排阻包括n*M个电阻，n*M个所述电阻一一对应地连接在所述像素信号发射芯片的n*M个输出端口和所述信号转换芯片的n*M个输入端口之间，所述转接板上连接在所述转接板的输入端口和相应输出端口之间的导线的电阻值小于所述电阻的电阻值，并且，当拆除所述转接板时，所述像素信号发射芯片能够通过所述排阻将具有所述第一排列顺序的像素信号输出给所述信号转换芯片。
优选地，所述显示信号数据包为低压差分信号数据包。
优选地，n为3，所述像素信号发射芯片用于接收并发出具有红、绿、蓝三种颜色的像素信号，所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
作为本发明的另一个方面，提供一种信号生成系统，所述信号生成系统包括图像处理主芯片和信号转换装置，所述图像处理 主芯片用于将视频或图像转换为像素信号，并输送至所述信号转换装置的像素信号发射芯片，其中，所述信号转换装置为本发明所提供的上述信号转换装置。
作为本发明的再一个方面，提供一种显示设备，所述显示设备包括显示面板和信号生成系统，其中，所述信号生成系统为本发明所提供的上述信号生成系统，所述显示面板包括显示信号输入接口，所述显示信号输入接口包括N/2个通道，所述信号转换芯片的M/2个输出端口分别与所述显示信号输入接口的前M/2个通道一一对应地相连。
优选地，所述显示设备还包括存储单元，所述存储单元用于预存视频或图像，所述存储单元的输出端与所述图像处理主芯片的输入端相连。
作为本发明的又一个方面，提供一种信号转换方法，包括步骤：将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包，以驱动预定尺寸的显示装置的步骤，其中，所述信号转换方法还包括如下步骤：
将按照第一排列顺序排列的具有n种颜色的像素信号转换成按照第二排列顺序排列；
将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包；以及
根据所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动比所述预定尺寸大的显示装置，其中
具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组；
在具有第三预定格式的显示信号数据包中，对应于三种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2 组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。
优选地，所述显示信号数据包为低压差分信号数据包。
优选地，n为3，所述像素信号发射芯片用于接收并发出具有红、绿、蓝三种颜色的像素信号，所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
在本发明中，具有第三预定格式(即JEIDA格式)的显示信号数据包可以驱动预定尺寸的显示面板。
如果直接利用信号转换芯片对像素信号发射芯片发出的像素信号进行转换的话，将得到具有第一预定格式的显示信号数据包，具有第一预定格式的显示信号数据包中包括n*M位显示数据。而具有第一预定格式的显示信号数据包可以用于驱动尺寸小于上述预定的显示面板的显示面板。
由此可知，本发明所提供的信号转换装置是在现有技术中的信号转换装置的基础上进行的改进。换言之，可以继续利用原有的信号生成系统驱动更大尺寸的显示屏。
附图说明
附图是用来提供对本发明的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本发明，但并不构成对本发明的限制。在附图中：
图1是现有技术中的信号转换装置的示意图；
图2是本发明所提供的信号转换装置的示意图；
图3是具有第一预定格式的标准数据包的示意图；
图4是具有第二预定格式的标准数据包的示意图；
图5是具有第三预定格式的数据包的示意图；
图6是利用包括RGB888芯片和EP387AP8F芯片的信号转换装置进行信号转换的规则示意图；
图7是本发明所提供的信号生成系统的结构示意图；以及
图8是本发明所提供的信号转换方法的流程图。
附图标记说明
100：像素信号发射芯片    200：转接单元
300：信号转换芯片        400：图像处理芯片
500：存储单元            600：显示面板
700：信号生成及输出单元
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本发明，并不用于限制本发明。
如图2所示，作为本发明的一个方面，提供一种信号转换装置，其中，所述信号转换装置包括：
像素信号发射芯片100，该像素信号发射芯片100用于接收并发出具有n种颜色的多个像素信号，该多个像素信号按照第一排列顺序排列；
信号转换芯片300，信号转换芯片300该能够将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包，从而利用该第一预定格式的显示信号数据包驱动预定尺寸(例如42寸)以下的液晶显示器。
此外，所述信号转换装置还包括：
转接单元200，该转接单元200的输入端与像素信号发射芯片100的输出端相连，且按照所述第一排列顺序排列的多个像素信号经过转接单元200的重新排序后形成第二排列顺序排列并输出；和
信号生成及输出单元700，用于根据所述信号转换芯片300输出的所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动比所述预定尺寸大的显示装置。
在该实施例中，信号转换芯片300能够将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包，并且其中：
具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每种颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组，信号转换芯片300具有M/2个输出端口，以分别将所述M/2组显示数据输出。
第三预定格式的显示信号数据包用于驱动大于预定尺寸的液晶显示面板，且具有第三预定格式的显示信号数据包中，对应于每种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。
需要指出的是，多个像素信号可以包括三种颜色的像素信号，也可以为四种颜色或更多种颜色的像素信号。当n为3时，像素信号即为RGB像素信号，当n为4时，像素信号即为RGBX像素信号，其中，X可以是白色或者黄色等其他颜色。
如上文中所述，由于在具有第三预定格式的显示信号数据包中，每种颜色的低(N-M)位显示数据均为噪声小模拟信号，因此，即便没有上述“每种颜色的低(N-M)位显示数据”，仍然 可以驱动比所述预定尺寸大的显示面板。
如上文中所述，具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。由此可知，在具有第二预定格式的显示信号数据包中，对应于各种颜色的显示信号的排列顺序与具有第三预定格式的显示数据包中对应于各种颜色的显示信号的排列顺序是一致的。。
如前所述，如果直接利用信号转换芯片300对像素信号发射芯片100发出的像素信号进行转换的话，将得到具有第一预定格式的显示信号数据包，具有第一预定格式的显示信号数据包中包括n*M位显示数据。如图1中所示，像素信号为RGB像素信号。相应地，具有第一预定格式的显示信号数据包具有3M位显示数据。需要指出的是，具有第一预定格式的显示信号数据包可以用于驱动所述预定尺寸以下的显示面板。
由此可知，本发明所提供的信号转换装置是在现有技术中的信号转换装置的基础上进行的改进。换言之，可以继续利用原有的信号生成系统驱动更大尺寸的显示屏。
在本发明中，对转接单元200的具体规格并不做限定。也就是说，本领域技术人员可以利用任意可以实现的方式将按照第一排列顺序排列的多个像素信号转换成按照第二排列顺序排列的多个像素信号。本领域技术人员应当理解的是，虽然多个像素信号的排列顺序有所改变，但是，多个像素信号的内容并没有改变。
在本发明的一种优选实施方式中，像素信号发射芯片100具有n*M个输出端口，且像素信号发射芯片100的每个输出端口用于输出一个像素信号。多种不同颜色的像素信号从n*M个输出端口中输出。当像素信号为RGB像素信号时，像素信号发射芯片100具有3M个输出端口。
转接单元200具有n*M个输入端口和n*M个输出端口，所 述转接单元的n*M个输入端口与像素信号发射芯片100的n*M个输出端口一一对应地相连，转接单元200的n*M个输入端口和转接单元200的n*M个输出端口之间通过连接通道按照预定规则一一对应地连接，以使得按照所述第一排列顺序输入的像素信号按照所述第二排列顺序输出。所述预定规则是指“使得按照所述第一排列顺序输入的像素信号按照所述第二排列顺序输出”的规则。同样地，当所述像素信号为RGB像素信号时，转接单元200具有3M个输入端口和3M个输出端口。
信号转换芯片300具有n*M个输入端口，信号转换芯片300的n*M个输入端口与所述转接单元的n*M个输出端口一一对应地相连。同样地，当所述像素信号为RGB像素信号时，信号转换芯片300具有3M个输入端口。
下面以图1和图2中所示的简单的例子说明上述“预定的规则”。在图1和图2所示的实施方式中，像素信号为RGB像素信号。
如图1中所示，在像素信号发射芯片100直接与信号转换芯片300相连的情况下，像素信号发射芯片100上输出像素信号R1的输出端口a1与信号转换芯片300上的输入端口d1相连；像素信号发射芯片100输出像素信号R2的输出端口a2与信号转换芯片300上的输入端口d2相连；像素信号发射芯片100上输出像素信号R3的输出端口a3与信号转换芯片300上的输入端口d3相连；像素信号发射芯片100上输出像素信号G1的输出端口a4与信号转换芯片300上的输入端口d4相连；像素信号发射芯片100上输出像素信号G2的输出端口a5与信号转换芯片300上的输入端口d5相连；像素信号发射芯片100上输出像素信号G3的输出端口a6与信号转换芯片300上的输入端口d6相连；像素信号发射芯片100上输出像素信号B1的输出端口a7与信号转换芯片300上的输入端口d7相连；像素信号发射芯片100上输出像素信号B2的输出端口a8与信号转换芯片300上的输入端口d8相连；输出像素信号B3的输出端口a9与信号转换芯片上的输入端口d9相连。
因此，信号转换芯片300接收到的RGB像素信号的第一排列顺序为R1，R2，R3，G1，G2，G3，B1，B2，B3。信号转换芯片300可以将具有第一排列顺序的RGB像素信号转换成具有第一预定格式的显示信号数据包。
如图2中所示，在像素信号发射芯片100通过转接单元200与信号转换芯片300相连的情况下，像素信号发射芯片100上输出像素信号R1的输出端口a1与转接单元200上的输入端口b1相连，转接单元200上的输入端口b1与转接单元200上的输出端口c3相连，转接单元200上的输出端口c3与信号转换芯片300上的输入端口d3相连；像素信号发射芯片100上输出像素信号R2的输出端口a2与转接单元200上的输入端口b2相连，转接单元200上的输入端口b2与转接单元200上的输出端口c1相连，转接单元200上的输出端口c1与信号转换芯片300上的输入端口d1相连；像素信号发射芯片100上输出像素信号R3的输出端口a3与转接单元200上的输入端口b3相连，转接单元200上的输入端口b3与转接单元200上的输出端口c2相连，转接单元200上的输出端口c2与信号转换芯片300上的输入端口d2相连。
像素信号发射芯片100上输出像素信号G1的输出端口a4与转接单元200上的输入端口b4相连，转接单元200上的输入端口b4与转接单元200上的输出端口c6相连，转接单元200上的输出端口c6与信号转换芯片300上的输入端口d6相连；像素信号发射芯片100上输出像素信号G2的输出端口a5与转接单元200上的输入端口b5相连，转接单元200上的输入端口b5与转接单元200上的输出端口c4相连，转接单元200上的输出端口c4与信号转换芯片300上的输入端口d4相连；像素信号发射芯片100上输出像素信号G3的输出端口a6与转接单元200上的输入端口b6相连，转接单元200上的输入端口b6与转接单元200上的输出端口c5相连，转接单元200上的输出端口c5与信号转换芯片300上的输入端口d5相连。
像素信号发射芯片100上输出像素信号B1的输出端口a7与 转接单元200上的输入端口b7相连，转接单元200上的输入端口b7与转接单元200上的输出端口c9相连，转接单元200上的输出端口c9与信号转换芯片300上的输入端口d9相连；像素信号发射芯片100上输出像素信号B2的输出端口a8与转接单元200上的输入端口b8相连，转接单元200上的输入端口b8与转接单元200上的输出端口c7相连，转接单元200上的输出端口c7与信号转换芯片300上的输入端口d7相连；像素信号发射芯片100上输出像素信号B3的输出端口a9与转接单元200上的输入端口b9相连，转接单元200上的输入端口b9与转接单元200上的输出端口c8相连，转接单元200上的输出端口c8与信号转换芯片300上的输入端口d8相连。
因此，信号转换芯片300接收到的RGB像素信号的第二排列顺序为R2，R3，R1，G2，G3，G1，B2，B3，B1。信号转换芯片300可以将具有第一排列顺序的RGB像素信号转换成具有第二预定格式的显示信号数据包。
在图2中所示的实施方式中，转接单元200结构简单，易于实现。
进一步优选地，转接单元200可以包括转接板，所述转接板上包括两组焊接盘，每组所述焊接盘包括n*M个焊接盘，一组所述焊接盘用作所述转接板的输入端口，另一组所述焊盘用作所述转接板的输出端口，两组所述焊接盘按照所述预定规则一一对应地导通。此处所述的转接板可以由“PCB小板”制成。转接板也是一种结构简单易于制造的电子元件。需要指出的是，在所述转接板上，对于任意一个焊盘而言，该焊盘仅与和该焊盘相对应的另一个焊盘导通，与其他的焊盘之间都是不导通的。此处所述的“导通”是指导电连接。
进一步优选地，如图2中所示，转接单元200还包括与所述转接板可拆卸地连接的排阻，该排阻包括n*M个电阻(如图2中虚线框所示)，n*M个电阻一一对应地连接在像素信号发射芯片100的n*M个输出端口和信号转换芯片300的n*M个输入端口之 间，所述转接板上连接在所述转接板的输入端口和相应输出端口之间的导线的电阻值小于电阻的电阻值，并且，当拆除所述转接板时，像素信号发射芯片200能够通过所述排阻将按照所述第一排列顺序排列的像素信号输出给信号转换芯片300。
当所述排阻与所述转接板相连时，转接板上输入端口与输出端口之间的导线将排阻上的电阻短路，因此，排阻此时并不发挥作用，仍然能够将按照第一排列顺序的像素信号转换成按照第二排列顺序的像素信号。因此，所述信号转换芯片可以输出具有第二预定格式的显示信号数据包
当将所述转接板拆除时，通过所述排阻的电阻将所述像素信号发射芯片的输出端口与所述信号转换芯片的输入端口相连，并且，输入至所述信号转换芯片的像素信号仍然具有第一排列顺序，所以，所述信号转换芯片可以输出具有第一预定格式的显示信号数据包。
也就是说，如果待驱动的显示面板为比所述预定尺寸大的显示面板时，可以不将所述排阻与所述转接板分离。如果待驱动的显示面板的尺寸小于所述预定尺寸的显示面板时，可以将所述转接板从所述转接单元上拆除。本发明所提供的信号转换装置既可以适用于尺寸较大的显示面板，又可以适用于尺寸较小的显示面板。
在本发明中，对所述显示信号数据包的具体格式并不做限定，例如，作为一种具体实施方式，所述显示信号数据包可以为低压差分信号(即，LVDS信号)数据包。
相应地，n为3，即，多种颜色的像素信号包括红色像素信号、绿色像素信号和蓝色像素信号，所述第一预定格式可以为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
图3中所示的是VESA格式数据包中的数据排列情况，图4中所示的是JEIDA格式数据包中的数据排列情况。从图4中可以看出，对应于蓝色像素信号的低两位数据B1、B0、对应于绿色像素信号的低两位数据G1、G0和对应于红色像素信号的低两位数 据R1、R0均位于JEIDA格式数据包的最后一组中。
图5中所示的是具有第二预定格式的显示信号数据包的示意图。从图中可以看出，数据被分为4组，并且，第二预定格式的显示信号数据包中的各个显示信号数据按照图6中的关系与第三种预定格式的显示信号的数据包中的各个显示信号相对应。即，第二预定格式的显示信号数据包中的显示信号比第三预定格式的显示信号数据包中的显示信号低两位。
本领域技术人员应当理解的是，在图3至图5中，“Clock”表示“时钟信号”，“LVDS Option＝High/Open→NS”是指“LVDS接口上，模式选择PIN针上电平为高(Hight)或开路(Open)，选择正常格式(即，VESA)格式”，“LVDS Option＝Low→JEIDA”是指“LVDS接口上，模式选择PIN针上电平为低(low)时，选择JEIDA格式”，“Previous Cycle”表示“前一周期”，“Current cycle”表示“当前周期”，“Next Cycle”表示“下一周期”，“CHx_0+”表示“LVDS接口的0通道正极”，“CHx_0-”表示“LVDS接口的0通道负极”，“CHx_1+”表示“LVDS接口的1通道正极”，“CHx_1-”表示“LVDS接口的1通道负极”，“CHx_2+”表示“LVDS接口的2通道正极”，“CHx_2-”表示“LVDS接口的2通道负极”，“CHx_3+”表示“LVDS接口的3通道正极”，“CHx_3-”表示“LVDS接口的3通道负极”，“CHx_4+”表示“LVDS接口的4通道正极”，“CHx_4-”表示“LVDS接口的4通道负极”，“DE”为使能信号(Data Enable)，NA表示空信号，即不输入信号。
作为本发明的一种具体实施方式，所述像素信号发射芯片100可以为RGB888芯片，所述RGB888芯片具有24个输出端口，所述转接单元200具有24个输出端口和24个输入端口，所述信号转换芯片300可以为EP387AP8F芯片。
作为本发明的另一个方面，如图7提供一种信号生成系统，所述信号生成系统包括图像处理主芯片400和信号转换装置，图像处理主芯片400用于将视频或图像转换为RGB像素信号，并输 送至所述信号转换装置的像素信号发射芯片100，其中，所述信号转换装置本发明所提供的上述信号转换装置。
如图7中所示，所述信号转换装置包括像素信号发射芯片100、转接单元200和信号转换芯片300。
作为本发明的还一个方面，提供一种显示设备，仍然如图7所示，所述显示设备包括显示面板600和信号生成系统，其中，所述信号生成系统为本发明所提供的上述信号生成系统，显示面板600包括显示信号输入接口，所述显示信号输入接口包括N/2个通道，所述信号转换芯片的M/2个输出端口分别与所述显示信号输入接口的前M/2个通道一一对应地相连。
具有第二预定格式的显示信号数据包通过所述显示信号输入接口接入所述显示面板中，用于驱动所述显示面板进行显示。
在所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式的具体实施方式中，所述预定尺寸可以为42寸。
所述显示设备可以为电视、电脑、交通工具中的广告机等显示设备。
优选地，显示设备还包括存储单元500，该存储单元用于预存视频或图像，存储单元500的输出端与图像处理主芯片400的输入端相连。
作为本发明的又一种具体实施方式，提供一种利用本发明所提供的上述信号转换装置进行的信号转换方法，图8是本发明所提供的信号转换方法的流程图。如图8所示，所述信号转换方法包括以下步骤：
步骤S802，将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包。
步骤S804，判断待驱动的显示装置的尺寸是否大于预定尺寸(例如，42寸)，如果是，则执行步骤S806，如果否，则执行步骤S808。
步骤S806，利用第一预定格式的显示信号数据包驱动显示装置。
步骤S808，将按照第一排列顺序排列的具有n颜色的像素信号转换成按照第二排列顺序排列。
步骤S810，将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包。
步骤S812，根据所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动显示装置。
在该实施例中，具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组；
用于驱动预定的显示面板的理论显示信号数据包具有第三预定格式，且具有第三预定格式的显示信号数据包中，对应于三种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。
如上文中所述，当像素信号为RGB像素信号时，n为3，当像素信号为RGBX像素信号时，n为4。
如上文中所述，所述显示信号数据包为低压差分信号数据包。相应地，n为3，所述像素信号发射芯片用于接收并发出具有红、绿、蓝三种颜色的像素信号，所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领 域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

  1. 一种信号转换装置，包括：像素信号发射芯片，该像素信号发射芯片用于接收并发出具有n种颜色的多个像素信号，该多个像素信号按照第一排列顺序排列；和信号转换芯片，其能够将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包，并将其输出以驱动预定尺寸的显示装置，
    其特征在于，所述信号转换装置还包括：
    转接单元，该转接单元的输入端与所述像素信号发射芯片的输出端相连，用于将按照所述第一排列顺序排列的多个像素信号重新排序为按照第二排列顺序排列并输出；和
    信号转换芯片，该信号转换芯片能够将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包；以及
    信号生成及输出单元，用于根据所述信号转换芯片输出的所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动比所述预定尺寸大的显示装置，其中，
    具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每种颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组，并且所述信号转换芯片输出所述M/2组显示数据；
    其中，在具有第三预定格式的显示信号数据包中，对应于每种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
    在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显 示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。
  2. 根据权利要求1所述的信号转换装置，其特征在于，
    所述像素信号发射芯片具有n*M个输出端口，且所述像素信号发射芯片的每个输出端口用于输出一个像素信号；
    所述转接单元具有n*M个输入端口和n*M个输出端口，所述转接单元的n*M个输入端口与所述像素信号发射芯片的n*M个输出端口一一对应地相连，所述转接单元的n*M个输入端口和所述转接单元的n*M个输出端口之间通过连接通道按照预定规则一一对应地连接，以使得按照所述第一排列顺序输入的像素信号按照所述第二排列顺序输出；
    所述信号转换芯片具有n*M个输入端口，所述信号转换芯片的3M个输入端口与所述转接单元的n*M个输出端口一一对应地相连。
  3. 根据权利要求2所述的信号转换装置，其特征在于，所述转接单元包括转接板，所述转接板上包括两组焊接盘，每组所述焊接盘包括n*M个焊接盘，一组所述焊接盘用作所述转接板的输入端口，另一组所述焊盘用作所述转接板的输出端口，两组所述焊接盘按照所述预定规则一一对应地导通。
  4. 根据权利要求3所述的信号转换装置，其特征在于，所述转接单元还包括与所述转接板可拆卸地连接的排阻，所述排阻包括n*M个电阻，n*M个所述电阻一一对应地连接在所述像素信号发射芯片的n*M个输出端口和所述信号转换芯片的n*M个输入端口之间，所述转接板上连接在所述转接板的输入端口和相应输出端口之间的导线的电阻值小于所述电阻的电阻值，并且，当拆除所述转接板时，所述像素信号发射芯片能够通过所述排阻将具有 所述第一排列顺序的像素信号输出给所述信号转换芯片。
  5. 根据权利要求1至4中任意一项所述的信号转换装置，其特征在于，所述显示信号数据包为低压差分信号数据包。
  6. 根据权利要求5所述的信号转换装置，其特征在于，n为3，所述像素信号发射芯片用于接收并发出具有红、绿、蓝三种颜色的像素信号，所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
  7. 一种信号生成系统，所述信号生成系统包括图像处理主芯片和信号转换装置，所述图像处理主芯片用于将视频或图像转换为像素信号，并输送至所述信号转换装置的像素信号发射芯片，其特征在于，所述信号转换装置为权利要求1至6中任意一项所述的信号转换装置。
  8. 一种显示设备，所述显示设备包括显示面板和信号生成系统，其特征在于，所述信号生成系统为权利要求7所述的信号生成系统，所述显示面板包括显示信号输入接口，所述显示信号输入接口包括N/2个通道，所述信号转换芯片的M/2个输出端口分别与所述显示信号输入接口的前M/2个通道一一对应地相连。
  9. 根据权利要求8所述的显示设备，其特征在于，所述显示设备还包括存储单元，所述存储单元用于预存视频或图像，所述存储单元的输出端与所述图像处理主芯片的输入端相连。
  10. 一种信号转换方法，包括步骤：将按照所述第一排列顺序排列的多个像素信号转换成具有第一预定格式的显示信号数据包，以驱动预定尺寸的显示装置的步骤，其特征在于，所述信号转换方法还包括如下步骤：
    将按照第一排列顺序排列的具有n种颜色的像素信号转换成按照第二排列顺序排列；
    将按照所述第二排列顺序排列的多个像素信号转换成具有第二预定格式的显示信号数据包；以及
    根据所述第二预定格式的显示信号数据包生成第三预定格式的显示信号数据包，并将其划分成组进行输出以驱动比所述预定尺寸大的显示装置，其中，
    具有所述第一预定格式的显示信号数据包和具有所述第二预定格式的显示信号数据包中，对应于每颜色的像素信号的显示数据均包括M位，M为偶数，在具有所述第二预定格式的显示信号数据包中，共n*M位显示数据被划分为M/2组；
    在具有第三预定格式的显示信号数据包中，对应于三种颜色的显示数据均包括N位，N为偶数，且N大于M，在具有所述第三预定格式的显示信号数据包中，共n*N位显示数据划分为N/2组，每种颜色的低(N-M)位显示数据位于后(N-M)/2组中，且每种颜色的低(N-M)位显示数据均为噪声小模拟信号；
    在具有所述第二预定格式的显示信号数据包中的M/2组显示数据与具有所述第三预定格式的显示信号数据包中的前M/2组显示数据一一对应，且在具有所述第二预定格式的显示信号数据包中的任意一个显示数据均比具有所述第三预定格式的显示信号数据包中相对应的显示数据低(N-M)位。
  11. 根据权利要求10所述的信号转换方法，其特征在于，所述显示信号数据包为低压差分信号数据包。
  12. 根据权利要求11所述的信号转换方法，其特征在于，n为3，所述像素信号发射芯片用于接收并发出具有红、绿、蓝三种颜色的像素信号，所述第一预定格式为VESA格式，所述第三预定格式为JEIDA格式，M为8，N为10。
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