WO2016115793A1 - 适用于amoled的tft背板制作方法及结构 - Google Patents

适用于amoled的tft背板制作方法及结构 Download PDF

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WO2016115793A1
WO2016115793A1 PCT/CN2015/078866 CN2015078866W WO2016115793A1 WO 2016115793 A1 WO2016115793 A1 WO 2016115793A1 CN 2015078866 W CN2015078866 W CN 2015078866W WO 2016115793 A1 WO2016115793 A1 WO 2016115793A1
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thin film
film transistor
layer
gate
active layer
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PCT/CN2015/078866
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English (en)
French (fr)
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张占东
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深圳市华星光电技术有限公司
武汉华星光电技术有限公司
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Priority to US14/655,723 priority Critical patent/US20160307929A1/en
Publication of WO2016115793A1 publication Critical patent/WO2016115793A1/zh

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Definitions

  • the present invention relates to the field of display technologies, and in particular, to a TFT backplane manufacturing method and structure suitable for AMOLED.
  • the flat display device has many advantages such as thin body, power saving, no radiation, and has been widely used.
  • the existing flat display devices mainly include a liquid crystal display (LCD) and an organic light emitting display (OLED).
  • the organic light-emitting diode display device has the advantages of self-luminescence, no backlight, high contrast, thin thickness, wide viewing angle, fast response speed, flexible panel, wide temperature range, simple structure and simple process. It is considered to be an emerging application technology for next-generation flat panel displays.
  • OLEDs can be classified into Passive Matrix OLED (PMOLED) and Active Matrix OLED (AMOLED) according to the type of driving.
  • the AMOLED has the characteristics of faster reaction speed, higher contrast, wider viewing angle, and the like, and generally includes a substrate, a thin film transistor (TFT) formed on the substrate, and an organic light emitting diode formed on the thin film transistor, the film The transistor drives the organic light emitting diode to emit light, thereby displaying a corresponding picture.
  • PMOLED Passive Matrix OLED
  • AMOLED Active Matrix OLED
  • the thin film transistor includes at least one driving thin film transistor (Driving TFT) and a switching thin film transistor (Switch TFT), and the switching thin film transistor controls driving of the thin film transistor to be turned on and off, and the driving thin film transistor is saturated
  • driving TFT driving thin film transistor
  • Switch TFT switching thin film transistor
  • the current generated in the state drives the organic light emitting diode to emit light
  • the panel gray scale control is realized by inputting different gray scale voltages to the driving thin film transistors to generate different driving currents.
  • the sub-threshold swing (S.S.) of the driving thin film transistor will directly affect the gray scale switching performance of the display panel.
  • the subthreshold swing of the thin film transistor depends on the size of the gate capacitance.
  • the size of the gate capacitance depends on the thickness of the gate insulating layer. Therefore, the subthreshold swing of the driving thin film transistor can be increased by increasing the thickness of the gate insulating layer. To improve the grayscale switching performance of the display panel.
  • a TFT backplane structure suitable for AMOLED includes a switching thin film transistor T1 and a driving thin film transistor T2, wherein the gate insulating layer has a two-layer structure, including a first gate insulating layer 4, and The second gate insulating layer 6 can achieve an effect of increasing the subthreshold swing of the driving thin film transistor T2 by adjusting the thickness of the second gate insulating layer 6.
  • the existing one applies to The fabrication process of the TFT backplane of the AMOLED is as follows: first, a buffer layer 2 is deposited on the substrate 1, followed by depositing an amorphous silicon (a-si) layer, and the amorphous silicon layer is converted into crystal by an excimer laser annealing (ELA) process.
  • a-si amorphous silicon
  • ELA excimer laser annealing
  • a polysilicon (poly-Si) layer patterned by the polysilicon layer, and ion doped to form an active layer 31 including a switching thin film crystal and an active layer 3 of the active layer 32 of the driving thin film transistor
  • a first gate insulating layer 4 on the active layer 3 and the buffer layer 2 by a chemical vapor deposition (CVD) process, forming a gate 5 of the switching thin film transistor by sputtering and photolithography, by chemical vapor deposition (CVD) a second gate insulating layer 6 is deposited on the gate 5 of the switching thin film transistor and the first gate insulating layer 4, and the gate 7 of the driving thin film transistor is formed by sputtering and photolithography, and then layers are sequentially formed.
  • CVD chemical vapor deposition
  • the insulating layer 8, the source/drain electrodes 9, complete the fabrication of the TFT backplane.
  • two gate insulating layers need to be deposited to increase the subthreshold swing of the driving thin film transistor T2, and the manufacturing process is cumbersome and the manufacturing efficiency is low.
  • the object of the present invention is to provide a TFT backplane manufacturing method suitable for AMOLED, which can simplify the fabrication process of the TFT backplane, reduce the number of fabrication processes, and achieve the purpose of increasing the subthreshold swing of the driving TFT with fewer processes. Improve grayscale switching and control performance of AMOLED panels.
  • the object of the present invention is to provide a TFT backplane structure suitable for AMOLED, which can increase the subthreshold swing of the driving TFT, improve the gray scale switching and control performance of the AMOLED panel, and has a simple manufacturing process.
  • the present invention first provides a TFT backplane manufacturing method suitable for an AMOLED, comprising the following steps:
  • Step 1 providing a substrate, depositing a buffer layer on the substrate;
  • Step 2 forming an active layer on the buffer layer, and depositing a gate insulating layer on the active layer and the buffer layer;
  • the active layer includes an active layer of a switching thin film transistor and an active layer of a driving thin film transistor;
  • Step 3 patterning the gate insulating layer to form a recess located above the active layer of the switching thin film transistor, so as to be located on the gate insulating layer above the active layer of the switching thin film transistor a thickness smaller than a thickness of the gate insulating layer over the active layer of the driving thin film transistor;
  • Step 4 forming a gate of the switching thin film transistor and driving a gate of the thin film transistor on the gate insulating layer by a sputtering and a photolithography process;
  • a gate of the switching thin film transistor is located on the recess
  • Step 5 Deposit an interlayer insulating layer on the gate of the switching thin film transistor, the gate of the driving thin film transistor, and the gate insulating layer.
  • the method for fabricating a TFT backplane for an AMOLED further includes the step of forming a source/drain and a driving thin film transistor of the switching thin film transistor in an active layer of the switching thin film transistor and a corresponding region of an active layer of the driving thin film transistor. Source/drain.
  • the step 2 includes:
  • Step 21 depositing an amorphous silicon layer on the buffer layer
  • Step 22 converting the amorphous silicon layer into a polysilicon layer by an excimer laser annealing process
  • Step 23 patterning the polysilicon layer, and performing an ion doping process on the polysilicon layer to form an active layer including an active layer of the switching thin film transistor and an active layer of the driving thin film transistor;
  • Step 24 depositing a gate insulating layer on the active layer and the buffer layer.
  • the step 24 deposits a gate insulating layer on the active layer and the buffer layer by a chemical vapor deposition process.
  • the substrate is a transparent substrate; the buffer layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof; and the gate insulating layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof.
  • the gate insulating layer is patterned by a photolithography process to form the recessed portion above the active layer of the switching thin film transistor.
  • the gate of the switching thin film transistor and the material of the gate of the driving thin film transistor are molybdenum; the interlayer insulating layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof; a source of the switching thin film transistor / The source/drain of the drain and the driving thin film transistor are in contact with the active layer of the switching thin film transistor and the corresponding region of the active layer of the driving thin film transistor through via holes formed on the interlayer insulating layer and the gate insulating layer .
  • the invention also provides a TFT backplane manufacturing method suitable for AMOLED, comprising the following steps:
  • Step 1 providing a substrate, depositing a buffer layer on the substrate;
  • Step 2 forming an active layer on the buffer layer, and depositing a gate insulating layer on the active layer and the buffer layer;
  • the active layer includes an active layer of a switching thin film transistor and an active layer of a driving thin film transistor;
  • Step 3 patterning the gate insulating layer to form a recess located above the active layer of the switching thin film transistor, so as to be located on the gate insulating layer above the active layer of the switching thin film transistor a thickness smaller than a thickness of the gate insulating layer over the active layer of the driving thin film transistor;
  • Step 4 forming a switching thin film transistor on the gate insulating layer by sputtering and photolithography a gate, and a gate of the driving thin film transistor;
  • a gate of the switching thin film transistor is located on the recess
  • Step 5 depositing an interlayer insulating layer on the gate of the switching thin film transistor, the gate of the driving thin film transistor, and the gate insulating layer;
  • Step 6 Form a source/drain of the switching thin film transistor and a source/drain of the driving thin film transistor in a corresponding region of the active layer of the switching thin film transistor and the active layer of the driving thin film transistor;
  • step 2 includes:
  • Step 21 depositing an amorphous silicon layer on the buffer layer
  • Step 22 converting the amorphous silicon layer into a polysilicon layer by an excimer laser annealing process
  • Step 23 patterning the polysilicon layer, and performing an ion doping process on the polysilicon layer to form an active layer including an active layer of the switching thin film transistor and an active layer of the driving thin film transistor;
  • Step 24 depositing a gate insulating layer on the active layer and the buffer layer.
  • the present invention also provides a TFT backplane structure suitable for an AMOLED, comprising:
  • a gate insulating layer disposed on the active layer and the buffer layer, wherein the gate insulating layer is provided with a recess corresponding to a position of the active layer of the switching thin film transistor;
  • the gate of the switching thin film transistor, the gate of the driving thin film transistor, and the interlayer insulating layer on the gate insulating layer are the same as the gate insulating layer.
  • the TFT backplane structure suitable for an AMOLED further includes a source/drain of a switching thin film transistor and a source of a driving thin film transistor provided in an active layer of the switching thin film transistor and a corresponding region of an active layer of the driving thin film transistor/ Drain.
  • the substrate is a transparent substrate; the gate of the switching thin film transistor and the gate of the driving thin film transistor are molybdenum; the buffer layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof;
  • the pole insulating layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof;
  • the interlayer insulating layer comprises one of a silicon oxide layer, a silicon nitride layer or a combination thereof; a source/drain of the switching thin film transistor
  • the source/drain of the driving thin film transistor is in contact with a corresponding region of the active layer of the switching thin film transistor and the active layer of the driving thin film transistor through via holes provided on the interlayer insulating layer and the gate insulating layer.
  • a TFT backplane suitable for AMOLED provided by the present invention
  • the manufacturing method forms a gate insulating layer by using a photolithography process on a gate insulating layer to form a gate insulating layer having a thickness difference, wherein a portion having a smaller thickness serves as a gate insulating layer of the switching TFT, and a portion having a larger thickness
  • the fabrication process of the TFT backplane is simplified, the number of fabrication processes is reduced, and the gate of the driving TFT is increased by a small number of processes without changing the thickness of the gate insulating layer of the switching TFT.
  • the thickness of the pole insulating layer increases the subthreshold swing of the driving TFT, and improves the gray scale switching and control performance of the AMOLED panel.
  • the present invention provides a TFT backplane structure suitable for AMOLEDs, wherein a single-layer gate insulating layer has a thickness difference by providing a recess portion in the gate insulating layer, wherein a portion having a smaller thickness serves as a gate insulating layer of the switching TFT.
  • the thicker portion serves as the gate insulating layer of the driving TFT, which can increase the subthreshold swing of the driving TFT, improve the gray scale switching and control performance of the AMOLED panel, and has a simple manufacturing process.
  • FIG. 1 is a schematic cross-sectional view showing a conventional TFT backplane structure suitable for an AMOLED
  • FIG. 2 is a flow chart of a method for fabricating a TFT backplane suitable for an AMOLED according to the present invention
  • step 1 is a schematic diagram of step 1 of a method for fabricating a TFT backplane for an AMOLED according to the present invention
  • step 2 is a schematic diagram of step 2 of a method for fabricating a TFT backplane for an AMOLED according to the present invention
  • step 3 is a schematic diagram of step 3 of a method for fabricating a TFT backplane for an AMOLED according to the present invention
  • FIG. 6 is a schematic diagram of step 4 of a method for fabricating a TFT backplane for an AMOLED according to the present invention
  • step 7 is a schematic diagram of step 5 of a method for fabricating a TFT backplane for an AMOLED according to the present invention.
  • FIG. 8 is a schematic diagram of a step 6 of a method for fabricating a TFT backplane for an AMOLED according to the present invention, and a cross-sectional view of a TFT backplane structure suitable for an AMOLED of the present invention.
  • the present invention first provides a TFT backplane manufacturing method suitable for AMOLED, comprising the following steps:
  • Step 1 As shown in FIG. 3, a substrate 10 is provided on which a buffer layer 20 is deposited.
  • the substrate 10 is a transparent substrate.
  • the substrate 10 is a glass substrate.
  • the buffer layer 20 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • Step 2 As shown in FIG. 4, an active layer 30 is formed on the buffer layer 20, and a gate insulating layer 40 is deposited on the active layer 30 and the buffer layer 20.
  • the active layer 30 includes an active layer 302 of a switching thin film transistor and an active layer 301 that drives a thin film transistor.
  • the gate insulating layer 40 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • step 2 further includes the following steps:
  • Step 21 depositing an amorphous silicon layer on the buffer layer 20;
  • Step 22 converting the amorphous silicon layer into a polysilicon layer by an excimer laser annealing process
  • Step 23 patterning the polysilicon layer, performing an ion doping process on the polysilicon layer, selecting an N-type ion or a P-type ion according to the type of the prepared thin film transistor, forming an active layer 302 including a switching thin film transistor and a driving film An active layer 30 of the active layer 301 of the transistor;
  • Step 24 depositing a gate insulating layer 40 on the active layer 30 and the buffer layer 20 by using a chemical vapor deposition process, and passing between the active layer 302 of the switching thin film transistor and the active layer 301 of the driving thin film transistor
  • the gate insulating layers 40 are spaced apart.
  • Step 3 as shown in FIG. 5, patterning the gate insulating layer 40 to form a recess 401 above the active layer 302 of the switching thin film transistor, so that the switching thin film transistor is located
  • the thickness of the gate insulating layer 40 above the source layer 302 is smaller than the thickness of the gate insulating layer 40 above the active layer 301 of the driving thin film transistor.
  • the gate insulating layer 40 is patterned by a photolithography process: first coating a photoresist on the gate insulating layer 40, and then passing the light through the reticle. Exposing the photoresist on the photoresist, removing a portion of the photoresist by the developer, defining a pattern required for forming the recess 401, and finally etching according to a pattern defined by the photoresist. That is, the depressed portion 401 and the gate insulating layer 40 having the depressed portion 401 are obtained.
  • the thickness of the gate insulating layer 40 corresponding to the switching thin film transistor T10 is smaller than the thickness of the gate insulating layer 40 corresponding to the driving thin film transistor T20 due to the presence of the depressed portion 401.
  • a difference in thickness is formed on the single-layered gate insulating layer 40.
  • the method of fabricating two layers of gate insulating layers in the prior art simplifies the fabrication process of the TFT backplane, reduces the number of fabrication processes, and increases the driving thin film transistor while ensuring the thickness of the gate insulating layer of the switching thin film transistor T10.
  • the thickness of the gate insulating layer of the T20 increases the subthreshold swing of the driving thin film transistor T20, and improves the gray scale switching and control performance of the AMOLED panel.
  • Step 4 as shown in FIG. 6, a gate 50 of the switching thin film transistor and a gate 60 of the driving thin film transistor are formed on the gate insulating layer 40 by a sputtering and photolithography process.
  • the gate 50 of the switching thin film transistor is located on the recess 401, and the gate 60 of the driving thin film transistor is located above the active layer 301 of the driving thin film transistor and is disposed on the gate insulating layer. On layer 40.
  • the material of the gate 50 of the switching thin film transistor and the gate 60 of the driving thin film transistor is molybdenum (Mo).
  • Mo molybdenum
  • Step 5 an interlayer insulating layer 70 is deposited on the gate 50 of the switching thin film transistor, the gate 60 of the driving thin film transistor, and the gate insulating layer 40.
  • the interlayer insulating layer 70 in the step 5 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • the method for fabricating a TFT backplane for an AMOLED further includes the step 6, as shown in FIG. 8, forming a switch in a corresponding region of the active layer 302 of the switching thin film transistor and the active layer 301 of the driving thin film transistor.
  • the source/drain 90 of the switching thin film transistor and the source/drain 80 of the driving thin film transistor pass through via holes formed on the interlayer insulating layer 70 and the gate insulating layer 40 and the switching thin film transistor.
  • the active layer 302 is in contact with a corresponding region of the active layer 301 of the driving thin film transistor.
  • the present invention further provides a TFT backplane structure suitable for an AMOLED, including:
  • the gate 50 of the switching thin film transistor, the gate 60 of the driving thin film transistor, and the interlayer insulating layer 70 on the gate insulating layer 40 are provided.
  • the TFT backplane structure suitable for the AMOLED further includes a source/drain 90 of the switching thin film transistor disposed in the active layer 302 of the switching thin film transistor and a corresponding region of the active layer 301 of the driving thin film transistor.
  • the source/drain 80 of the thin film transistor is driven.
  • the substrate 10 is a transparent substrate.
  • the substrate 10 is a glass substrate.
  • the buffer layer 20 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • the gate insulating layer 40 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • the material of the gate 50 of the switching thin film transistor and the gate 60 of the driving thin film transistor is molybdenum.
  • the interlayer insulating layer 70 includes one of a silicon oxide layer, a silicon nitride layer, or a combination thereof.
  • the source/drain 90 of the switching thin film transistor and the source/drain 80 of the driving thin film transistor pass through a via provided on the interlayer insulating layer 70 and the gate insulating layer 40 and an active layer of the switching thin film transistor 302 is in contact with a corresponding region of the active layer 301 of the driving thin film transistor to form a switching thin film transistor T10 and a driving thin film transistor T20.
  • the TFT backplane structure suitable for the AMOLED has a recess 401 disposed on the gate insulating layer 40 such that the gate insulating layer 40 of the single layer has a thickness difference, wherein a portion having a smaller thickness serves as a gate of the switching thin film transistor T10.
  • the insulating layer and the thicker portion serve as the gate insulating layer of the driving thin film transistor T20.
  • the subthreshold swing of the driving thin film transistor T20 can be increased, and the gray scale switching and control performance of the AMOLED panel can be improved.
  • only one gate insulating layer 40 needs to be formed, and the gate 50 of the switching thin film transistor and the gate 60 of the driving thin film transistor can be simultaneously formed in one process, the manufacturing process is simple, and the manufacturing process is simplified.
  • the TFT backplane manufacturing method for the AMOLED of the present invention forms a recessed portion by using a photolithography process on a gate insulating layer to form a gate insulating layer having a thickness difference, wherein the thickness is small.
  • the thicker portion serves as the gate insulating layer of the driving TFT, which simplifies the fabrication process of the TFT backplane, reduces the number of fabrication processes, and does not change the thickness of the gate insulating layer of the switching TFT.
  • the TFT backplane structure of the present invention is applicable to a TFT backplane structure of an AMOLED, wherein a single-layer gate insulating layer has a thickness difference by providing a recess portion in the gate insulating layer, wherein a portion having a smaller thickness serves as a gate insulating layer of the switching TFT, and a thickness is higher.
  • the large part serves as the gate insulating layer of the driving TFT, which can increase the subthreshold swing of the driving TFT, improve the gray scale switching and control performance of the AMOLED panel, and has a simple manufacturing process.

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Abstract

一种适用于AMOLED的TFT背板制作方法及结构。该方法包括：步骤1、提供一基板(10)，再沉积一缓冲层(20)；步骤2、在缓冲层(20)上依次形成有源层(30)、及栅极绝缘层(40)；步骤3、对栅极绝缘层(40)进行图案化处理，形成一凹陷部(401)；步骤4、形成开关薄膜晶体管(T10)的栅极(50)、及驱动薄膜晶体管(T20)的栅极(60)，开关薄膜晶体管(T10)的栅极(50)位于凹陷部(401)；步骤5、沉积层间绝缘层(70)。该方法通过制作一具有高度差的单层栅极绝缘层，简化了TFT背板的制作流程，增加了驱动薄膜晶体管的亚阈值摆幅，提高了AMOLED面板的灰阶切换与控制性能。

Description

适用于AMOLED的TFT背板制作方法及结构 技术领域
本发明涉及显示技术领域，尤其涉及一种适用于AMOLED的TFT背板制作方法及结构。
背景技术
平面显示器件具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。现有的平面显示器件主要包括液晶显示器件(Liquid Crystal Display，LCD)及有机发光二极管显示器件(Organic Light Emitting Display，OLED)。
有机发光二极管显示器件由于同时具备自发光，不需背光源、对比度高、厚度薄、视角广、反应速度快、可用于挠曲性面板、使用温度范围广、构造及制程较简单等优异特性，被认为是下一代平面显示器的新兴应用技术。
OLED按照驱动类型可分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)。AMOLED具有反应速度更快、对比度更高、视角更宽广等特点，其通常包括基板、形成于基板上的薄膜晶体管(Thin Film Transistor，TFT)及形成于薄膜晶体管上的有机发光二极管，所述薄膜晶体管驱动有机发光二极管发光，进而显示相应的画面。具体的，所述薄膜晶体管至少包括一个驱动薄膜晶体管(Driving TFT)和一个开关薄膜晶体管(Switch TFT)，通过所述开关薄膜晶体管控制驱动薄膜晶体管的打开与关闭，通过所述驱动薄膜晶体管在饱和状态时产生的电流驱动有机发光二级管发光，通过向驱动薄膜晶体管输入不同的灰阶电压产生不同的驱动电流实现面板灰阶控制。驱动薄膜晶体管的亚阈值摆幅(sub-threshold swing，S.S.)将直接影响显示面板的灰阶切换性能。
薄膜晶体管的亚阈值摆幅取决于栅极电容的大小，栅极电容的大小又取决于栅极绝缘层的厚度，因此可通过增加栅极绝缘层的厚度，提高驱动薄膜晶体管的亚阈值摆幅，以提升显示面板的灰阶切换性能。
请参阅图1，现有的一种适用于AMOLED的TFT背板结构包括开关薄膜晶体管T1与驱动薄膜晶体管T2，其中的栅极绝缘层为双层结构，包括第一栅极绝缘层4、及第二栅极绝缘层6，通过调整第二栅极绝缘层6的厚度可以达到增加驱动薄膜晶体管T2的亚阈值摆幅的效果。该现有的适用于 AMOLED的TFT背板的制作流程为：首先在基板1上沉积缓冲层2，接着沉积非晶硅(a-si)层，通过准分子激光退火(ELA)工艺将所述非晶硅层转化结晶为多晶硅(poly-Si)层，再将所述多晶硅层进行图案化处理，并进行离子掺杂，形成包括开关薄膜晶体的有源层31和驱动薄膜晶体管的有源层32的有源层3，通过化学气相沉积(CVD)工艺在有源层3及缓冲层2上沉积第一栅极绝缘层4，通过溅射及光刻工艺形成开关薄膜晶体管的栅极5，通过化学气相沉积(CVD)工艺在开关薄膜晶体管的栅极5及第一栅极绝缘层4上沉积第二栅极绝缘层6，通过溅射及光刻工艺形成驱动薄膜晶体管的栅极7，之后再依次形成层间绝缘层8、源/漏极9，完成TFT背板的制作。该制作方法中需要沉积两层栅极绝缘层来增加驱动薄膜晶体管T2的亚阈值摆幅，制作工艺较繁琐，制作效率较低。
发明内容
本发明的目的在于提供一种适用于AMOLED的TFT背板制作方法，该方法能够简化TFT背板的制作流程，减少制作工艺数量，以较少的制程达到增加驱动TFT亚阈值摆幅的目的，提高AMOLED面板的灰阶切换与控制性能。
本发明的目的还在于提供一种适用于AMOLED的TFT背板结构，能够增加驱动TFT的亚阈值摆幅，提高AMOLED面板的灰阶切换与控制性能，且制作工艺简单。
为实现上述目的，本发明首先提供一种适用于AMOLED的TFT背板制作方法，包括如下步骤：
步骤1、提供一基板，在所述基板上沉积一缓冲层；
步骤2、在所述缓冲层上形成有源层，再在所述有源层及缓冲层上沉积一栅极绝缘层；
所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
步骤3、对所述栅极绝缘层进行图案化处理，形成一位于所述开关薄膜晶体管的有源层上方的凹陷部，使位于所述开关薄膜晶体管的有源层上方的栅极绝缘层的厚度小于位于所述驱动薄膜晶体管的有源层上方的栅极绝缘层的厚度；
步骤4、通过溅射及光刻工艺在所述栅极绝缘层上形成开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极；
所述开关薄膜晶体管的栅极位于所述凹陷部上；
步骤5、在所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上沉积一层间绝缘层。
所述适用于AMOLED的TFT背板制作方法还包括步骤6、在所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域形成开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极。
所述步骤2包括：
步骤21、在所述缓冲层上沉积一非晶硅层；
步骤22、通过准分子激光退火工艺将所述非晶硅层转化为多晶硅层；
步骤23、图案化所述多晶硅层，再对多晶硅层进行离子掺杂制程，形成包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的有源层；
步骤24、在所述有源层及缓冲层上沉积一栅极绝缘层。
所述步骤24采用化学气相沉积工艺在所述有源层及缓冲层上沉积一栅极绝缘层。
所述基板为透明基板；所述缓冲层包括氧化硅层、氮化硅层之一或其组合；所述栅极绝缘层包括氧化硅层、氮化硅层之一或其组合。
所述步骤3中采用光刻工艺对所述栅极绝缘层进行图案化处理，形成所述位于开关薄膜晶体管的有源层上方的凹陷部。
所述开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极的材料为钼；所述层间绝缘层包括氧化硅层、氮化硅层之一或其组合；所述开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极均通过形成于层间绝缘层与栅极绝缘层上的过孔与所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域接触。
本发明还提供一种适用于AMOLED的TFT背板制作方法，包括如下步骤：
步骤1、提供一基板，在所述基板上沉积一缓冲层；
步骤2、在所述缓冲层上形成有源层，再在所述有源层及缓冲层上沉积一栅极绝缘层；
所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
步骤3、对所述栅极绝缘层进行图案化处理，形成一位于所述开关薄膜晶体管的有源层上方的凹陷部，使位于所述开关薄膜晶体管的有源层上方的栅极绝缘层的厚度小于位于所述驱动薄膜晶体管的有源层上方的栅极绝缘层的厚度；
步骤4、通过溅射及光刻工艺在所述栅极绝缘层上形成开关薄膜晶体管 的栅极、及驱动薄膜晶体管的栅极；
所述开关薄膜晶体管的栅极位于所述凹陷部上；
步骤5、在所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上沉积一层间绝缘层；
步骤6、在所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域形成开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极；
其中，所述步骤2包括：
步骤21、在所述缓冲层上沉积一非晶硅层；
步骤22、通过准分子激光退火工艺将所述非晶硅层转化为多晶硅层；
步骤23、图案化所述多晶硅层，再对多晶硅层进行离子掺杂制程，形成包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的有源层；
步骤24、在所述有源层及缓冲层上沉积一栅极绝缘层。
本发明还提供一种适用于AMOLED的TFT背板结构，包括：
基板；
设于所述基板上缓冲层；
设于所述缓冲层上的有源层，所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
设于所述有源层及缓冲层上的栅极绝缘层，所述栅极绝缘层对应于所述开关薄膜晶体管的有源层的位置设有一凹陷部；
设于所述凹陷部上的开关薄膜晶体管的栅极、位于所述驱动薄膜晶体管的有源层的上方并设于所述栅极绝缘层上的驱动薄膜晶体管的栅极；
设于所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上的层间绝缘层。
所述适用于AMOLED的TFT背板结构还包括设于所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域的开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极。
所述基板为透明基板；所述开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极的材料为钼；所述缓冲层包括氧化硅层、氮化硅层之一或其组合；所述栅极绝缘层包括氧化硅层、氮化硅层之一或其组合；所述层间绝缘层包括氧化硅层、氮化硅层之一或其组合；所述开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极均通过设于层间绝缘层与栅极绝缘层上的过孔与所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域接触。
本发明的有益效果：本发明提供的一种适用于AMOLED的TFT背板 制作方法通过在一层栅极绝缘层上采用光刻工艺形成一凹陷部，形成具有厚度差的栅极绝缘层，其中厚度较小的部分作为开关TFT的栅极绝缘层，厚度较大的部分作为驱动TFT的栅极绝缘层，简化了TFT背板的制作流程，减少了制作工艺数量，在不改变开关TFT的栅极绝缘层厚度的前提下，以较少的制程增加了驱动TFT的栅极绝缘层的厚度，从而增加了驱动TFT的亚阈值摆幅，提高了AMOLED面板的灰阶切换与控制性能。本发明提供的一种适用于AMOLED的TFT背板结构，通过在栅极绝缘层设置凹陷部，使得单层栅极绝缘层具有厚度差，其中厚度较小的部分作为开关TFT的栅极绝缘层，厚度较大的部分作为驱动TFT的栅极绝缘层，能够增加驱动TFT的亚阈值摆幅，提高AMOLED面板的灰阶切换与控制性能，且制作工艺简单。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有的一种适用于AMOLED的TFT背板结构的剖面示意图；
图2为本发明的适用于AMOLED的TFT背板制作方法的流程图；
图3为本发明的适用于AMOLED的TFT背板制作方法的步骤1的示意图；
图4为本发明的适用于AMOLED的TFT背板制作方法的步骤2的示意图；
图5为本发明的适用于AMOLED的TFT背板制作方法的步骤3的示意图；
图6为本发明的适用于AMOLED的TFT背板制作方法的步骤4的示意图；
图7为本发明的适用于AMOLED的TFT背板制作方法的步骤5的示意图；
图8为本发明的适用于AMOLED的TFT背板制作方法的步骤6的示意图，暨本发明的适用于AMOLED的TFT背板结构的剖面示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2，本发明首先提供一种适用于AMOLED的TFT背板制作方法，包括如下步骤：
步骤1、如图3所示，提供一基板10，在所述基板10上沉积一缓冲层20。
具体的，所述基板10为透明基板，优选的，所述基板10为玻璃基板。所述缓冲层20包括氧化硅层、氮化硅层之一或其组合。
步骤2、如图4所示，在所述缓冲层20上形成有源层30，再在所述有源层30及缓冲层20上沉积一栅极绝缘层40。
所述有源层30包括开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301。所述栅极绝缘层40包括氧化硅层、氮化硅层之一或其组合。
具体地，所述步骤2又包括如下步骤：
步骤21、在所述缓冲层20上沉积一非晶硅层；
步骤22、通过准分子激光退火工艺将所述非晶硅层转化为多晶硅层；
步骤23、图案化所述多晶硅层，再对多晶硅层进行离子掺杂制程，根据所制备的薄膜晶体管的类型选择N型离子或P型离子，形成包括开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301的有源层30；
步骤24、采用化学气相沉积工艺在所述有源层30及缓冲层20上沉积一栅极绝缘层40，所述开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301之间通过所述栅极绝缘层40隔开。
步骤3、如图5所示，对所述栅极绝缘层40进行图案化处理，形成一位于所述开关薄膜晶体管的有源层302上方的凹陷部401，使位于所述开关薄膜晶体管的有源层302上方栅极绝缘层40的厚度小于位于所述驱动薄膜晶体管的有源层301上方的栅极绝缘层40的厚度。
具体地，该步骤3中，采用光刻工艺对所述栅极绝缘层40进行图案化处理：先在所述栅极绝缘层40上涂覆一层光刻胶，然后使光线通过光罩照射于光刻胶上将该光刻胶曝光，再通过显影剂除去部分光刻胶，定义出用于形成所述凹陷部401所需的图案，最后按照通过光刻胶定义出的图案进行蚀刻，即得到所述凹陷部401及具有该凹陷部401的栅极绝缘层40。
值得一提的是，由于所述凹陷部401的存在，使得对应于开关薄膜晶体管T10的栅极绝缘层40的厚度小于对应于驱动薄膜晶体管T20的栅极绝缘层40的厚度。该步骤3在单层栅极绝缘层40上形成厚度差，相比较现 有技术中先后制作两层栅极绝缘层的方法，简化了TFT背板的制作流程，减少了制作工艺数量，在保证开关薄膜晶体管T10的栅极绝缘层厚度不变的同时增加了驱动薄膜晶体管T20的栅极绝缘层厚度，增加了驱动薄膜晶体管T20的亚阈值摆幅，提高了AMOLED面板的灰阶切换与控制性能。
步骤4、如图6所示，通过溅射及光刻工艺在所述栅极绝缘层40上形成开关薄膜晶体管的栅极50、及驱动薄膜晶体管的栅极60。
具体地，所述开关薄膜晶体管的栅极50位于所述凹陷部401上，所述驱动薄膜晶体管的栅极60位于所述驱动薄膜晶体管的有源层301的上方并设于所述栅极绝缘层40上。所述开关薄膜晶体管的栅极50、及驱动薄膜晶体管的栅极60的材料为钼(Mo)。与现有技术相比，该开关薄膜晶体管的栅极50与驱动薄膜晶体管的栅极60同时形成，进一步简化了制作流程，减少了制作工艺数量，提高了生产效率。
步骤5、如图7所示，在所述开关薄膜晶体管的栅极50、驱动薄膜晶体管的栅极60、及栅极绝缘层40上沉积一层间绝缘层70。
具体地，该步骤5中所述层间绝缘层70包括氧化硅层、氮化硅层之一或其组合。
进一步地，所述适用于AMOLED的TFT背板制作方法还包括步骤6、如图8所示，在所述开关薄膜晶体管有源层的302和驱动薄膜晶体管的有源层301的相应区域形成开关薄膜晶体管的源/漏极90和驱动薄膜晶体管的源/漏极80。
具体地，所述开关薄膜晶体管的源/漏极90和驱动薄膜晶体管的源/漏极80均通过形成于层间绝缘层70与栅极绝缘层40上的过孔与所述开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301的相应区域接触。
请参阅图8，本发明还提供一种适用于AMOLED的TFT背板结构，包括：
基板10；
设于所述基板10上缓冲层20；
设于所述缓冲层20上的有源层30，所述有源层30包括开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301；
设于所述有源层30及缓冲层20上的栅极绝缘层40，所述栅极绝缘层40对应于所述开关薄膜晶体管的有源层302的位置设有一凹陷部401；
设于所述凹陷部401上的开关薄膜晶体管的栅极50、位于所述驱动薄膜晶体管的有源层301的上方并设于所述栅极绝缘层40上的驱动薄膜晶体管的栅极60；
设于所述开关薄膜晶体管的栅极50、驱动薄膜晶体管的栅极60、及栅极绝缘层40上的层间绝缘层70。
进一步地，所述适用于AMOLED的TFT背板结构还包括设于所述开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301的相应区域的开关薄膜晶体管的源/漏极90和驱动薄膜晶体管的源/漏极80。
具体地，所述基板10为透明基板，优选的，所述基板10为玻璃基板。所述缓冲层20包括氧化硅层、氮化硅层之一或其组合。所述栅极绝缘层40包括氧化硅层、氮化硅层之一或其组合。所述开关薄膜晶体管的栅极50、及驱动薄膜晶体管的栅极60的材料为钼。所述层间绝缘层70包括氧化硅层、氮化硅层之一或其组合。所述开关薄膜晶体管的源/漏极90和驱动薄膜晶体管的源/漏极80均通过设于层间绝缘层70与栅极绝缘层40上的过孔与所述开关薄膜晶体管的有源层302和驱动薄膜晶体管的有源层301的相应区域接触，形成开关薄膜晶体管T10和驱动薄膜晶体管T20。
所述适用于AMOLED的TFT背板结构通过在栅极绝缘层40上设置凹陷部401，使得单层的栅极绝缘层40具有厚度差，其中厚度较小的部分作为开关薄膜晶体管T10的栅极绝缘层，厚度较大的部分作为驱动薄膜晶体管T20的栅极绝缘层，相比于现有技术，一方面能够增加驱动薄膜晶体管T20的亚阈值摆幅，提高AMOLED面板的灰阶切换与控制性能，一方面仅需制作一层栅极绝缘层40，且开关薄膜晶体管的栅极50和驱动薄膜晶体管的栅极60能够在一道制程中同时形成，制作工艺简单，制作流程得到简化。
综上所述，本发明的适用于AMOLED的TFT背板制作方法通过在一层栅极绝缘层上采用光刻工艺形成一凹陷部，形成具有厚度差的栅极绝缘层，其中厚度较小的部分作为开关TFT的栅极绝缘层，厚度较大的部分作为驱动TFT的栅极绝缘层，简化了TFT背板的制作流程，减少了制作工艺数量，在不改变开关TFT的栅极绝缘层厚度的前提下，以较少的制程增加了驱动TFT的栅极绝缘层的厚度，从而增加了驱动TFT的亚阈值摆幅，提高了AMOLED面板的灰阶切换与控制性能。本发明的适用于AMOLED的TFT背板结构，通过在栅极绝缘层设置凹陷部，使得单层栅极绝缘层具有厚度差，其中厚度较小的部分作为开关TFT的栅极绝缘层，厚度较大的部分作为驱动TFT的栅极绝缘层，能够增加驱动TFT的亚阈值摆幅，提高AMOLED面板的灰阶切换与控制性能，且制作工艺简单。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (15)

  1. 一种适用于AMOLED的TFT背板制作方法，包括如下步骤：
    步骤1、提供一基板，在所述基板上沉积一缓冲层；
    步骤2、在所述缓冲层上形成有源层，再在所述有源层及缓冲层上沉积一栅极绝缘层；
    所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
    步骤3、对所述栅极绝缘层进行图案化处理，形成一位于所述开关薄膜晶体管的有源层上方的凹陷部，使位于所述开关薄膜晶体管的有源层上方的栅极绝缘层的厚度小于位于所述驱动薄膜晶体管的有源层上方的栅极绝缘层的厚度；
    步骤4、通过溅射及光刻工艺在所述栅极绝缘层上形成开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极；
    所述开关薄膜晶体管的栅极位于所述凹陷部上；
    步骤5、在所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上沉积一层间绝缘层。
  2. 如权利要求1所述的适用于AMOLED的TFT背板制作方法，还包括步骤6、在所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域形成开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极。
  3. 如权利要求1所述的适用于AMOLED的TFT背板制作方法，其中，所述步骤2包括：
    步骤21、在所述缓冲层上沉积一非晶硅层；
    步骤22、通过准分子激光退火工艺将所述非晶硅层转化为多晶硅层；
    步骤23、图案化所述多晶硅层，再对多晶硅层进行离子掺杂制程，形成包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的有源层；
    步骤24、在所述有源层及缓冲层上沉积一栅极绝缘层。
  4. 如权利要求3所述的适用于AMOLED的TFT背板制作方法，其中，所述步骤24采用化学气相沉积工艺在所述有源层及缓冲层上沉积一栅极绝缘层。
  5. 如权利要求1所述的适用于AMOLED的TFT背板制作方法，其中，所述基板为透明基板；所述缓冲层包括氧化硅层、氮化硅层之一或其组合；所述栅极绝缘层包括氧化硅层、氮化硅层之一或其组合。
  6. 如权利要求1所述的适用于AMOLED的TFT背板制作方法，其中，所述步骤3中采用光刻工艺对所述栅极绝缘层进行图案化处理，形成所述位于开关薄膜晶体管的有源层上方的凹陷部。
  7. 如权利要求2所述的适用于AMOLED的TFT背板制作方法，其中，所述开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极的材料为钼；所述层间绝缘层包括氧化硅层、氮化硅层之一或其组合；所述开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极均通过形成于层间绝缘层与栅极绝缘层上的过孔与所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域接触。
  8. 一种适用于AMOLED的TFT背板制作方法，包括如下步骤：
    步骤1、提供一基板，在所述基板上沉积一缓冲层；
    步骤2、在所述缓冲层上形成有源层，再在所述有源层及缓冲层上沉积一栅极绝缘层；
    所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
    步骤3、对所述栅极绝缘层进行图案化处理，形成一位于所述开关薄膜晶体管的有源层上方的凹陷部，使位于所述开关薄膜晶体管的有源层上方的栅极绝缘层的厚度小于位于所述驱动薄膜晶体管的有源层上方的栅极绝缘层的厚度；
    步骤4、通过溅射及光刻工艺在所述栅极绝缘层上形成开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极；
    所述开关薄膜晶体管的栅极位于所述凹陷部上；
    步骤5、在所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上沉积一层间绝缘层；
    步骤6、在所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域形成开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极；
    其中，所述步骤2包括：
    步骤21、在所述缓冲层上沉积一非晶硅层；
    步骤22、通过准分子激光退火工艺将所述非晶硅层转化为多晶硅层；
    步骤23、图案化所述多晶硅层，再对多晶硅层进行离子掺杂制程，形成包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的有源层；
    步骤24、在所述有源层及缓冲层上沉积一栅极绝缘层。
  9. 如权利要求8所述的适用于AMOLED的TFT背板制作方法，其中，所述步骤24采用化学气相沉积工艺在所述有源层及缓冲层上沉积一栅极绝 缘层。
  10. 如权利要求8所述的适用于AMOLED的TFT背板制作方法，其中，所述基板为透明基板；所述缓冲层包括氧化硅层、氮化硅层之一或其组合；所述栅极绝缘层包括氧化硅层、氮化硅层之一或其组合。
  11. 如权利要求8所述的适用于AMOLED的TFT背板制作方法，其中，所述步骤3中采用光刻工艺对所述栅极绝缘层进行图案化处理，形成所述位于开关薄膜晶体管的有源层上方的凹陷部。
  12. 如权利要求8所述的适用于AMOLED的TFT背板制作方法，其中，所述开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极的材料为钼；所述层间绝缘层包括氧化硅层、氮化硅层之一或其组合；所述开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极均通过形成于层间绝缘层与栅极绝缘层上的过孔与所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域接触。
  13. 一种适用于AMOLED的TFT背板结构，包括：
    基板；
    设于所述基板上缓冲层；
    设于所述缓冲层上的有源层，所述有源层包括开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层；
    设于所述有源层及缓冲层上的栅极绝缘层，所述栅极绝缘层对应于所述开关薄膜晶体管的有源层的位置设有一凹陷部；
    设于所述凹陷部上的开关薄膜晶体管的栅极、位于所述驱动薄膜晶体管的有源层的上方并设于所述栅极绝缘层上的驱动薄膜晶体管的栅极；
    设于所述开关薄膜晶体管的栅极、驱动薄膜晶体管的栅极、及栅极绝缘层上的层间绝缘层。
  14. 如权利要求13所述适用于AMOLED的TFT背板结构，还包括设于所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域的开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极。
  15. 如权利要求14所述适用于AMOLED的TFT背板结构，其中，所述基板为透明基板；所述开关薄膜晶体管的栅极、及驱动薄膜晶体管的栅极的材料为钼；所述缓冲层包括氧化硅层、氮化硅层之一或其组合；所述栅极绝缘层包括氧化硅层、氮化硅层之一或其组合；所述层间绝缘层包括氧化硅层、氮化硅层之一或其组合；所述开关薄膜晶体管的源/漏极和驱动薄膜晶体管的源/漏极均通过设于层间绝缘层与栅极绝缘层上的过孔与所述开关薄膜晶体管的有源层和驱动薄膜晶体管的有源层的相应区域接触。
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