WO2016082391A1 - 光电二极管及其制备方法、x射线探测器及其制备方法 - Google Patents
光电二极管及其制备方法、x射线探测器及其制备方法 Download PDFInfo
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Definitions
- Embodiments of the present invention generally relate to the field of semiconductor technology, and more particularly to photodiodes and methods of fabricating the same, X-ray detectors, and methods of fabricating the same.
- X-ray inspection is widely used in medical, safety, non-destructive testing, scientific research and other fields, and plays an increasingly important role in the national economy and the people's death.
- film photography is commonly used for X-ray inspection.
- X-ray film photography has high image quality and can provide reliable information on the physical condition of the sample being tested and the actual situation of the defect.
- it has the disadvantages of complicated operation process, high running cost, difficult to save results, inconvenient query, and vulnerable to strong light damage to the eyes of the reviewers.
- X-ray digital radiography (DR) detection technology appeared in the late 1990s.
- X-ray digital camera systems use a flat panel detector with a pixel size of less than 0.1 mm, so that the image quality and resolution are comparable to that of film photography, while overcoming the appearance of film photography.
- Disadvantages also provide convenience for computer processing of images. Due to the different electronic conversion modes, digital X-ray photography can be divided into direct conversion type (Direct DR) and indirect conversion type (Indirect DR).
- Direct DR direct conversion type
- Indirect DR indirect conversion type
- the direct conversion type X-ray flat panel detector is composed of a radiation receiver, a command processor and a power source.
- the ray receiver includes a scintillation crystal screen (Gd 2 O 2 S or CsI), a large-area amorphous silicon sensor array, a readout circuit, and the like.
- the scintillation crystal screen is used to convert X-ray photons into visible light, and the large-scale integrated amorphous silicon sensor array close to it converts the visible light on the screen into electrons, which are then digitized by the readout circuit and transmitted to a computer to form a display. Digital image.
- the indirect conversion type detector is composed of an X-ray conversion layer, an amorphous silicon photodiode, a thin film transistor, a signal storage basic pixel unit, and a signal amplification and signal reading circuit.
- the structure of the indirect flat panel detector is mainly composed of a scintillator (ytterbium iodide) or a phosphor (sulfurium oxysulfide) layer plus an amorphous silicon layer having a photodiode function, and a TFT array.
- a scintillator or phosphor layer can be converted into an electrical signal by X-ray exposure, and the power of each pixel is passed through a thin film transistor array.
- the charge signal is read and converted into a digital signal and transmitted to a computer image processing system for integration into an X-ray image.
- the PIN photodiode is a key component of the indirect X-ray detection substrate, which determines the absorption efficiency of visible light, and has a great influence on key indicators such as X-ray dose, X-ray imaging resolution, and image response speed.
- the preparation method of the PIN photodiode of the indirect X-ray detecting substrate mainly includes PECVD (plasma chemical vapor deposition) and ion implantation, wherein the PECVD technology passes different process gases (eg, SiH 4 , NH 3 , N 2 O, PH). 3 , H 2 , B 2 H 6 , etc.) PIN devices can be formed quickly and easily, but the disadvantage is that the doping concentration is fixed, and it is impossible to achieve special regional doping. In order to improve the performance of the PIN device, ion implantation technology is needed. Cooperate with it.
- a PIN photodiode for an X-ray detector comprising a thin film transistor including a gate electrode, a gate insulating layer, which are sequentially stacked on a substrate, An active layer and a source/drain electrode layer, the PIN photodiode including a first doped layer, a second doped layer, and an intrinsic layer between the first and second doped layers, which are sequentially stacked, the a doped layer is disposed on the source/drain electrode layer, wherein the second doped layer is provided with a heavily doped region having a doping concentration greater than a doping concentration of the second doped layer, the heavily doped region The region is electrically connected to the cathode of the PIN photodiode.
- the heavily doped regions may be arranged in a grid shape, and the cathodes may be arranged in a grid shape matching them.
- the surface of the second doped layer facing the cathode may be provided to have a pile structure.
- the pile structure may be formed by isotropic etching of the surface of the second doped layer by a dry etching technique.
- the first doped layer may be an n+ ⁇ -Si:H layer
- the intrinsic layer may be an ⁇ -Si:H layer
- the second doped layer may be p+ ⁇ -Si:
- the H layer, the heavily doped region may be a p++ ⁇ -Si:H layer; alternatively, the second doped layer may be an n+ ⁇ -Si:H layer, and the intrinsic layer may be ⁇ -Si:H
- the layer, the first doped layer may be a p+ ⁇ -Si:H layer, and the heavily doped region may be an n++ ⁇ -Si:H layer.
- the heavily doped region may be formed by an ion implantation process.
- the heavily doped region may have a shape of a trench formed in the intrinsic layer and the second doped layer, a portion of the cathode being disposed within the trench.
- the ion implantation process may be doped using B 2 H 6 or PH 3 as an ion source.
- a method of preparing the above PIN photodiode comprising the steps of:
- the thin film transistor including a gate electrode, a gate insulating layer, an active layer, and a source/drain electrode layer which are sequentially stacked on the substrate;
- the step of forming the grid-shaped heavily doped region may include heavily doping the second doped layer using an ion implantation process such that the heavily doped region is formed in the second doped layer.
- the step of forming the grid-shaped heavily doped region may include: patterning the intrinsic layer and the second doped layer to form a trench penetrating the intrinsic layer and partially located in the second doped layer a trench; and heavily doping the trench using an ion implantation process to form the heavily doped region in the form of a trench.
- the patterning step of the plurality of layers of the PIN photodiode may include: applying photoresist, developing, post-baking, dry etching to achieve patterning and stripping the photoresist.
- the first doped layer and the second doped layer of the PIN photodiode may be separately formed by ion implantation.
- the ⁇ -Si:H layer may be deposited by a PECVD process, and the ⁇ -Si:H may be doped with B 2 H 6 or PH 3 as an ion source to form a P+ ⁇ -Si:H layer or N+ ⁇ -
- the Si:H layer is used as the first doped layer; then the ⁇ -Si:H layer is deposited by PECVD, and a part of the ⁇ -Si:H layer is doped with PH 3 or B 2 H 6 as the ion source to form N+ ⁇ -
- the Si:H layer or the P+ ⁇ -Si:H layer serves as the second doped layer, and the undoped portion of the ⁇ -Si:H layer serves as the intrinsic layer.
- the thicknesses of the first doped layer and the second doped layer may be respectively
- the thickness of the intrinsic layer can be
- an X-ray detector includes: a substrate; a thin film transistor formed on the substrate, the thin film transistor including a gate electrode, a gate insulating layer, which are sequentially stacked on the substrate, An active layer and a source/drain electrode layer; any of the above PIN photodiodes; and a layer of scintillating material covering at least the PIN photodiode.
- a method of preparing the above X-ray detector comprising the steps of: forming the thin film transistor on a substrate; and forming a PIN photodiode according to any of the above methods of fabricating a PIN photodiode Forming a layer of scintillating material covering at least the PIN photodiode and packaging.
- FIG. 1 is a schematic view of a grid-like metal cathode of a PIN photodiode according to an embodiment of the present invention
- FIG. 2 is a schematic cross-sectional view of the X-ray detector taken along line I-I of FIG. 1 in accordance with an embodiment of the present invention
- FIG. 3 is a schematic cross-sectional view of the X-ray detector taken along line I-I of FIG. 1 in accordance with another embodiment of the present invention.
- FIGS. 1 and 2 a schematic structural view of a PIN photodiode and an X-ray detector using the same according to an embodiment of the present invention is shown.
- the X-ray detector of the present invention mainly refers to an indirect conversion type detector.
- the X-ray detector includes an X-ray conversion layer, an amorphous silicon photodiode, a thin film transistor, a signal storage basic pixel unit, and corresponding components such as a signal amplification and signal reading circuit.
- the PIN photodiode for the X-ray detector and its corresponding structure for the sake of brevity, only the above-mentioned parts are shown in the view of the invention, while other relevant parts are omitted. .
- Those skilled in the art can know the arrangement of the above structures from the prior art as needed, and therefore will not be described in detail herein.
- the PIN photodiode includes a first doped layer 6, a second doped layer 8, and an intrinsic layer 7 between the first and second doped layers 6, 8, the first doping
- the layer 6 is disposed on the source/drain electrode layer 5 of the thin film transistor of the X-ray detector (for example, disposed on the drain electrode), and the second doping layer 8 is electrically connected to the cathode 11 of the PIN photodiode.
- the second doped layer 8 is provided with a heavily doped region 9 having a doping concentration greater than that of the second doped layer 8.
- the heavily doped regions 9 are arranged in a grid shape, and as shown in FIG. 1, the cathodes 11 are arranged in a grid shape matching the heavily doped regions 9. That is, the heavily doped region 9 and the cathode 11 are arranged to have the same grid-like shape, and a portion of the cathode 11 is directly disposed above the heavily doped region 9. Since the cathode 11 is formed in a mesh shape, it functions to reduce reflected X-rays as compared with the planar cathode of the prior art.
- the thin film transistor is disposed at a vacancy in the lower left corner shown in FIG. 1; as shown in FIG. 2, the thin film transistor includes a gate electrode 2, a gate insulating (GI) layer 3, and an active layer which are sequentially stacked on the substrate 1. 4 and the source/drain electrode layer 5, the thin film transistor is covered with a passivation layer 10, and the substrate 1 is further provided with a resin layer 12 covering the thin film transistor and the PIN photodiode and a scintillation layer 13.
- the passivation layer 10 is also overlaid on a second doped layer 8, which is formed on the passivation layer 10 and electrically connected to the second doped layer 8 through vias in the passivation layer 10.
- the surface of the second doping layer 8 facing the cathode 11 is provided to have a pile or relief structure 15.
- the surface of the second doped layer 8 is isotropically etched using a dry etching technique to form the pile or relief structure 15.
- the use of a pile or relief structure can increase the total reflection of X-rays at the interface position and increase the absorption of X-rays by the PIN photodiode device.
- the surface of the second doped layer 8 facing the cathode 11 may also be provided with other non-flat or rough structures that facilitate absorption of X-rays.
- the first doped layer 6 is an n+ ⁇ -Si:H layer
- the intrinsic layer 7 is an ⁇ -Si:H layer
- the second doped layer 8 is a p+ ⁇ -Si:H layer.
- the heavily doped region 9 is a p++ ⁇ -Si:H region or layer.
- the second doped layer 8 is an n+ ⁇ -Si:H layer
- the intrinsic layer 7 is an ⁇ -Si:H layer
- the first doped layer 6 is p+ The ⁇ -Si:H layer
- the heavily doped region 9 is an n++ ⁇ -Si:H region or layer.
- the method of preparing an X-ray detector includes the following steps:
- Step 1 Initially cleaning the glass substrate 1; depositing a metal gate layer (the thickness of the metal gate layer is usually 2-3 times the depth of the cathode trench (described below); coating the metal gate layer, exposing, developing, After baking and etching to achieve patterning and stripping of the photoresist, finally forming a gate 2 having a predetermined pattern as shown;
- Step 2 Depositing a gate insulating (GI) layer 3; depositing an active layer 4 (eg, ⁇ -Si:H, LTPS, IGZO, ITZO, ZnON); patterning, exposing, developing, and patterning the active layer 4 Post-baking and etching to realize patterning and stripping of the photoresist; depositing source/drain electrode layer 5 (S/D electrode layer);
- GI gate insulating
- Step 3 Depositing multiple layers of the PIN photodiode (N+ ⁇ -Si:H layer 6, respectively, whose thickness is Intrinsic layer 7 ( ⁇ -Si:H), its thickness is P+ ⁇ -Si: H layer 8, the thickness of which is And patterning, exposing, developing, post-baking, and dry etching the plurality of layers of the PIN photodiode to realize patterning of each layer of the PIN photodiode and stripping the photoresist;
- Step 4 Isotropic etching of a surface of the PIN photodiode (specifically, the surface of the second doped layer 8 facing away from the intrinsic layer 7, ie facing the surface of the cathode 11 to be subsequently formed) by dry etching. , achieving sueding or non-planarization of the surface (obtaining a suede or relief structure 15);
- Step 5 Applying, exposing, developing, and post-baking the second doped layer 8 of the PIN photodiode to form a pattern, and performing high-dose re-doping of P++ by ion implantation (using B 2 H 6 as a process gas) process. Miscellaneous, forming a grid-like heavily doped region 9 and stripping the photoresist;
- Step 6 performing an annealing activation treatment (for example, high temperature annealing, rapid thermal annealing) on the entire substrate to activate the doped ions;
- an annealing activation treatment for example, high temperature annealing, rapid thermal annealing
- Step 7 Perform pattern coating, exposure, development, post-baking and etching on the S/D electrode layer 5 to realize patterning and stripping of the photoresist; it can be understood that the patterning of the S/D electrode layer can be deposited in the deposition source/ After the drain electrode layer and before depositing the layers of the PIN photodiode;
- Step 8 Deposition passivation (PVX) layer 10 (eg, Si x N y , Al x O y , TiO 2 ), patterning, exposing, developing, post-baking the PVX layer, and corresponding to heavy doping The PVX layer is etched at the location of the region 9 to form a grid-like via hole penetrating the PVX layer, and the photoresist is stripped;
- PVX position passivation
- Step 9 Depositing a metal cathode layer (eg, Mo, Al, Ti, Cu, Nd), patterning, exposing, developing, post-baking, and etching the metal cathode layer to form a grid-shaped metal cathode 11 and stripping the light Engraving; wherein a portion of the metal cathode 11 is filled into the via hole in the passivation layer 10 to be in contact with the heavily doped region 9;
- a metal cathode layer eg, Mo, Al, Ti, Cu, Nd
- Step 10 Coating the resin layer 12 and exposing, developing, and post-baking to form a pattern; evaporating the scintillation material layer 13 and encapsulating the entire device to finally complete the preparation of the X-ray detector.
- the heavily doped region 9 is formed by an ion implantation process; as discussed and illustrated in FIG. 3 below, the heavily doped region may be in the PIN photodiode
- the scavenging layer and the second doped layer are patterned to form an ion implantation process after the trench 16 is formed therein, and a portion of the cathode 11 is disposed within the trench 16.
- Fig. 3 differs in the preparation process in steps 3 and 5, for example, by replacing it with steps 3' and 5' described below:
- Step 3' depositing layers of the PIN photodiode (N+ ⁇ -Si:H layer 6, respectively, whose thickness is Intrinsic layer 7 (Intrinsic ⁇ -Si: H), the thickness of which is P+ ⁇ -Si: H layer 8, the thickness of which is And patterning, exposing, developing, post-baking, and dry etching the layers of the PIN photodiode to pattern the layers of the PIN photodiode and strip the photoresist.
- Intrinsic layer 7 Intrinsic ⁇ -Si: H
- P+ ⁇ -Si: H layer 8 the thickness of which is
- And patterning, exposing, developing, post-baking, and dry etching the layers of the PIN photodiode to pattern the layers of the PIN photodiode and strip the photoresist.
- Step 5' pattern coating, exposing, developing, post-baking, and dry etching the intrinsic layer and the second doped layer of the PIN photodiode to form a cathode trench 16 (the trench depth is greater than N+a- The thickness of the Si:H layer), the cathode trench 16 is heavily doped with a large dose of P++ by ion implantation (using PH 3 as a process gas) to form the trench heavily doped region 9, and the photoresist is stripped.
- the preparation of the PIN photodiode in step 3 above may also be replaced by ion implantation.
- it can be deposited by PECVD process
- the thickness of the ⁇ -Si:H layer is doped by ion implantation using PH 3 or B 2 H 6 as an ion source to form an ⁇ -Si:H layer to form a P+ ⁇ -Si:H layer or N+ ⁇ -Si: Layer H; then deposited by PECVD Or a larger thickness of the ⁇ -Si:H layer, and then doping the ⁇ -Si:H layer with B 2 H 6 or PH 3 as an ion source by ion implantation. Thickness of N+ ⁇ -Si:H layer or P+ ⁇ -Si:H layer.
- the embodiment of the invention mainly uses the PECVD technology to realize the preparation of the PIN photodiode, and proposes a combination of photolithography, dry etching, PECVD, ion implantation and the like to change the structure of the existing PIN device and improve the performance of the PIN device.
- a practical technical solution mainly uses the PECVD technology to realize the preparation of the PIN photodiode, and proposes a combination of photolithography, dry etching, PECVD, ion implantation and the like to change the structure of the existing PIN device and improve the performance of the PIN device.
- a novel PIN photodiode device and a manufacturing method thereof are provided, which utilize dry etching to realize that the entire PIN photodiode device has a textured or textured structure.
- the pile or relief structure of the PIN photodiode device can increase the total reflection of X-rays at the interface position, increase the absorption of X-rays by the PIN photodiode device; the pile structure of the PIN photodiode device Combined with a grid-like metal cathode, the total reflection principle is used to increase the light absorption efficiency of the PIN photodiode, improve the surface defect state density of the PIN photodiode device, and improve the photoelectric conversion efficiency of the PIN photodiode device.
- the refractive index of amorphous silicon film prepared by PECVD is generally between 3.2 and 4.0 due to different process conditions.
- the refractive index of SiNx film in the passivation layer or anti-reflective layer material used in the present invention is generally 1.7-3.0, Al.
- the refractive index of the 2 O 3 film is generally 1.7, and the refractive index of the TiO 2 film is generally 2.4, which is excellent in total reflection under favorable surface topography.
- the surface of the PIN photodiode device is heavily doped by ion implantation or PECVD to form a grid-like heavily doped region, reduce surface resistance, cancel the transparent cathode layer, and change the metal cathode to
- the mesh shape has the functions of reducing the reflected X-rays, improving the absorption efficiency of the photo-generated carriers, improving the device performance of the PIN photodiode, reducing the preparation process, and reducing the production cost, compared with the prior art planar cathode.
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Abstract
Description
Claims (17)
- 一种用于X射线探测器的PIN光电二极管,X射线探测器包括薄膜晶体管,该薄膜晶体管包括依次层叠地设置在基板上的栅极、栅极绝缘层、有源层和源/漏电极层,所述PIN光电二极管包括依次层叠的第一掺杂层、第二掺杂层以及位于第一和第二掺杂层之间的本征层,所述第一掺杂层设置源/漏电极层上,其特征在于,所述第二掺杂层中设置有掺杂浓度比该第二掺杂层的掺杂浓度更大的重掺杂区,所述重掺杂区与PIN光电二极管的阴极电连接。
- 根据权利要求1所述的PIN光电二极管,其特征在于,所述重掺杂区布置成网格状,并且所述阴极布置成与之相匹配的网格状。
- 根据权利要求1或2所述的PIN光电二极管,其特征在于,所述第二掺杂层的面向所述阴极的表面设置成具有绒面结构。
- 根据权利要求3所述的PIN光电二极管,其特征在于,所述绒面结构是利用干法刻蚀技术对所述第二掺杂层的所述表面进行各向同性刻蚀而形成的。
- 根据权利要求1-4中任一项所述的PIN光电二极管,其特征在于,所述第一掺杂层为n+α-Si:H层,本征层为α-Si:H层,第二掺杂层为p+α-Si:H层,重掺杂区为p++α-Si:H层;或所述第二掺杂层为n+α-Si:H层,本征层为α-Si:H层,第一掺杂层为p+α-Si:H层,重掺杂区为n++α-Si:H层。
- 根据权利要求1-5中任一项所述的PIN光电二极管,其特征在于,所述重掺杂区通过离子注入工艺形成。
- 根据权利要求1-5中任一项所述的PIN光电二极管,其特征在于,所述重掺杂区具有沟槽的形状,该沟槽形成在本征层和第二掺杂层中,所 述阴极的一部分布置在所述沟槽内。
- 根据权利要求6或7所述的PIN光电二极管,其特征在于,所述离子注入工艺使用B2H6或PH3作为离子源进行掺杂。
- 一种制备如权利要求1-8中任一项所述的PIN光电二极管的方法,包括下述步骤:提供基板,该基板上已经形成有X射线探测器的薄膜晶体管,该薄膜晶体管包括依次层叠地设置在基板上的栅极、栅极绝缘层、有源层和源/漏电极层;在源/漏电极层的远离有源层的一侧上沉积PIN光电二极管的多个层并进行图形化,所述多个层包括第一掺杂层、第二掺杂层以及位于第一和第二掺杂层之间的本征层,第一掺杂层设置在源/漏电极层上;形成网格状的重掺杂区,该重掺杂区与第二掺杂层接触;进行退火活化处理,以激活掺杂的离子;在基板上沉积至少覆盖薄膜晶体管和第二掺杂层的钝化层并进行图形化,以在钝化层中在对应于重掺杂区的位置处形成通孔;以及在钝化层上沉积位于第二掺杂层上方的阴极材料层,并对阴极材料层进行图形化以形成网格状的阴极,阴极的一部分布置在所述通孔内,使得阴极与重掺杂区电接触或连接。
- 根据权利要求9所述的方法,其特征在于,形成网格状的重掺杂区的步骤包括:采用离子注入工艺对第二掺杂层进行重掺杂,使得重掺杂区形成在第二掺杂层中。
- 根据权利要求9所述的方法,其特征在于,形成网格状的重掺杂区的步骤包括:对本征层和第二掺杂层进行构图工艺,以形成贯穿本征层并部分地位于第二掺杂层中的沟槽;以及采用离子注入工艺对沟槽进行重掺杂,以形成沟槽形式的所述重掺杂区。
- 根据权利要求9-11中任一项所述的方法,其特征在于,所述PIN光电二极管的所述多个层的图形化步骤包括:涂覆光刻胶、显影、后烘、干法刻蚀以实现图形化并剥离光刻胶。
- 根据权利要求9-11中任一项所述的方法,其特征在于,采用离子注入方式分别形成PIN光电二极管的第一掺杂层和第二掺杂层。
- 根据权利要求13所述的方法,其特征在于,采用PECVD工艺沉积α-Si:H层,使用B2H6或者PH3作为离子源掺杂α-Si:H,形成P+α-Si:H层或者N+α-Si:H层作为第一掺杂层;之后采用PECVD工艺沉积α-Si:H层,使用PH3或者B2H6作为离子源掺杂α-Si:H层的一部分,形成N+α-Si:H层或者P+α-Si:H层作为第二掺杂层,α-Si:H层的未被掺杂的部分作为本征层。
- 一种X射线探测器,所述X射线探测器包括:基板;形成在基板上的薄膜晶体管,该薄膜晶体管包括依次层叠地设置在基板上的栅极、栅极绝缘层、有源层和源/漏电极层;如权利要求1-8中任一项所述的PIN光电二极管;和至少覆盖PIN光电二极管的闪烁材料层。
- 一种制备如权利要求16所述的X射线探测器的方法,包括下述步骤:在基板上形成所述薄膜晶体管;以及根据权利要求9-15中任一项所述的方法形成PIN光电二极管;形成至少覆盖PIN光电二极管的闪烁材料层并进行封装。
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