WO2016080117A1 - Feuille d'étanchéité équipée d'un séparateur et procédé de production de dispositif à semi-conducteurs - Google Patents

Feuille d'étanchéité équipée d'un séparateur et procédé de production de dispositif à semi-conducteurs Download PDF

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Publication number
WO2016080117A1
WO2016080117A1 PCT/JP2015/079163 JP2015079163W WO2016080117A1 WO 2016080117 A1 WO2016080117 A1 WO 2016080117A1 JP 2015079163 W JP2015079163 W JP 2015079163W WO 2016080117 A1 WO2016080117 A1 WO 2016080117A1
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Prior art keywords
sealing sheet
separator
sealing
sheet
semiconductor chip
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PCT/JP2015/079163
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English (en)
Japanese (ja)
Inventor
豪士 志賀
智絵 飯野
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日東電工株式会社
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Application filed by 日東電工株式会社 filed Critical 日東電工株式会社
Priority to SG11201703904YA priority Critical patent/SG11201703904YA/en
Priority to KR1020177007630A priority patent/KR102370954B1/ko
Priority to CN201580062102.9A priority patent/CN107004608A/zh
Publication of WO2016080117A1 publication Critical patent/WO2016080117A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00—Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731—Location prior to the connecting process
    • H01L2224/73101—Location prior to the connecting process on the same surface
    • H01L2224/73103—Bump and layer connectors
    • H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Definitions

  • the present invention relates to a sealing sheet with a separator and a method for manufacturing a semiconductor device.
  • a sealing resin for example, a sealing sheet made of a thermosetting resin is known (see, for example, Patent Document 1). Such a sealing sheet is usually covered with a separator before being used.
  • a semiconductor chip is embedded in a sealing sheet with a separator on the opposite surface of the sealing sheet. Thereafter, the separator is peeled off, and then the sealing sheet is thermally cured.
  • the present invention has been made in view of the above-described problems, and an object thereof is to provide a sealing sheet with a separator capable of improving the appearance of a semiconductor device to be manufactured, and a method for manufacturing a semiconductor device. There is to do.
  • the present inventors diligently studied the cause of the deterioration of the appearance of the semiconductor device. As a result, when the sheet
  • the present invention is a sealing sheet with a separator, A separator; A sealing sheet laminated on the separator, The separator is characterized in that the surface in contact with the sealing sheet is treated with an aminoalkyd release agent.
  • the surface of the separator that contacts the sealing sheet is treated with the aminoalkyd mold release agent. Therefore, after the sealing sheet is thermally cured, the separator can be easily peeled from the sealing sheet.
  • the sealing sheet with the separator is disposed on the semiconductor chip, the semiconductor chip is embedded in the sealing sheet, and a sealing body in which the semiconductor chip is embedded in the sealing sheet is formed. (Step C below), and the sealing sheet of the sealing body can be thermally cured with the separator still attached (Step D below). Thereby, the surface roughness at the time of thermosetting of the sheet
  • seat for sealing of an separator is processed with the amino alkyd type release agent, a separator can be easily peeled from the sheet
  • the peel strength between the sealing sheet and the separator after heating at 150 ° C. for 1 hour is less than 0.4 N / 100 mm width.
  • the separator is more easily sealed after the sealing sheet is thermally cured. Can be peeled from the sheet.
  • the sealing sheet preferably includes an epoxy resin.
  • the present inventors have found that the peel strength between a separator treated with an aminoalkyd release agent and a sealing sheet containing an epoxy resin is low even after heating. That is, when the sealing sheet contains an epoxy resin, the peel strength from the separator after heating can be further reduced.
  • a method for manufacturing a semiconductor device includes: Preparing a laminate in which a semiconductor chip is fixed on a support; and Preparing the separator-equipped sealing sheet X, Step B for disposing the separator-equipped sealing sheet on the semiconductor chip of the laminate, Step C of embedding the semiconductor chip in the sealing sheet and forming a sealing body in which the semiconductor chip is embedded in the sealing sheet; Step D for thermosetting the sealing sheet of the sealing body; And a step E of peeling the separator after the step D.
  • the sealing sheet with the separator is arranged on the semiconductor chip, the semiconductor chip is embedded in the sealing sheet, and the sealing body in which the semiconductor chip is embedded in the sealing sheet is provided.
  • step C the sheet
  • a separator is peeled from the sheet
  • the separator-equipped sealing sheet 10 has a configuration in which a separator 16 and a sealing sheet 11 are laminated.
  • separator 16 examples include a plastic film (for example, a polyethylene terephthalate (PET) film, a polyethylene film, a polypropylene film), a nonwoven fabric, and paper.
  • PET polyethylene terephthalate
  • the substrate may be a single layer or two or more layers.
  • the surface of the separator 16 in contact with the sealing sheet 11 is treated with an aminoalkyd release agent. Therefore, after the sealing sheet 11 is thermally cured, the separator 16 can be easily peeled off from the sealing sheet 11.
  • the thickness of the separator 16 is not particularly limited, but is preferably 10 ⁇ m or more, more preferably 25 ⁇ m or more from the viewpoint of handling properties when the separator is peeled off. Moreover, it is preferable that it is 200 micrometers or less from a viewpoint of the ease of peeling of a separator, and it is more preferable that it is 100 micrometers or less.
  • the size and shape of the separator 16 in plan view are not particularly limited, but can be the same as the size and shape of the sealing sheet 11 in plan view as in this embodiment (see FIG. 1). ). Further, the size and shape of the separator 16 in plan view may be larger than the size and shape of the sealing sheet 11.
  • the separator 16 may be embossed on the contact surface with the sealing sheet 11. When the embossing is performed, the appearance after the process D can be further improved.
  • the constituent material of the sealing sheet 11 preferably includes a thermosetting resin, and particularly preferably includes an epoxy resin and a phenol resin as a curing agent. Thereby, favorable thermosetting is obtained. Moreover, when the sheet
  • the epoxy resin is not particularly limited.
  • triphenylmethane type epoxy resin, cresol novolac type epoxy resin, biphenyl type epoxy resin, modified bisphenol A type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, modified bisphenol F type epoxy resin, dicyclopentadiene type Various epoxy resins such as an epoxy resin, a phenol novolac type epoxy resin, and a phenoxy resin can be used. These epoxy resins may be used alone or in combination of two or more.
  • the epoxy equivalent is 150 to 250 and the softening point or the melting point is 50 to 130 ° C., solid at room temperature. From the viewpoint, triphenylmethane type epoxy resin, cresol novolac type epoxy resin, and biphenyl type epoxy resin are more preferable.
  • the phenol resin is not particularly limited as long as it causes a curing reaction with the epoxy resin.
  • a phenol novolac resin, a phenol aralkyl resin, a biphenyl aralkyl resin, a dicyclopentadiene type phenol resin, a cresol novolak resin, a resole resin, or the like is used.
  • These phenolic resins may be used alone or in combination of two or more.
  • phenol resin those having a hydroxyl equivalent weight of 70 to 250 and a softening point of 50 to 110 ° C. are preferably used from the viewpoint of reactivity with the epoxy resin, and phenol phenol is particularly preferable from the viewpoint of high curing reactivity.
  • a novolac resin can be suitably used. From the viewpoint of reliability, low hygroscopic materials such as phenol aralkyl resins and biphenyl aralkyl resins can also be suitably used.
  • the blending ratio of the epoxy resin and the phenol resin is blended so that the total of hydroxyl groups in the phenol resin is 0.7 to 1.5 equivalents with respect to 1 equivalent of the epoxy group in the epoxy resin from the viewpoint of curing reactivity. It is preferable to use 0.9 to 1.2 equivalents.
  • the total content of the epoxy resin and the phenol resin in the sealing sheet 11 is preferably 2.5% by weight or more, and more preferably 3.0% by weight or more. Adhesive force with respect to the semiconductor chip 23, the semiconductor wafer 22, etc. is acquired favorably as it is 2.5 weight% or more.
  • the total content of the epoxy resin and the phenol resin in the sealing sheet 11 is preferably 20% by weight or less, and more preferably 10% by weight or less. Hygroscopicity can be reduced as it is 20 weight% or less.
  • the sealing sheet 11 may include a thermoplastic resin. Thereby, the handleability at the time of non-hardening and the low stress property of hardened
  • thermoplastic resin examples include natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, ethylene-vinyl acetate copolymer, ethylene-acrylic acid copolymer, ethylene-acrylic acid ester copolymer, polybutadiene resin, polycarbonate resin, heat Plastic polyimide resin, polyamide resin such as 6-nylon and 6,6-nylon, phenoxy resin, acrylic resin, saturated polyester resin such as PET and PBT, polyamideimide resin, fluororesin, styrene-isobutylene-styrene block copolymer, etc. Is mentioned. These thermoplastic resins can be used alone or in combination of two or more. Of these, a styrene-isobutylene-styrene block copolymer is preferable from the viewpoint of low stress and low water absorption.
  • the content of the thermoplastic resin in the sealing sheet 11 can be 1.5% by weight or more and 2.0% by weight or more. A softness
  • the content of the thermoplastic resin in the sealing sheet 11 is preferably 6% by weight or less, and more preferably 4% by weight or less. Adhesiveness with the semiconductor chip 23 and the semiconductor wafer 22 is favorable as it is 4 weight% or less.
  • the sealing sheet 11 preferably contains an inorganic filler.
  • the inorganic filler is not particularly limited, and various conventionally known fillers can be used.
  • quartz glass, talc, silica such as fused silica and crystalline silica
  • alumina aluminum nitride
  • nitriding Examples thereof include silicon and boron nitride powders. These may be used alone or in combination of two or more. Among these, silica and alumina are preferable, and silica is more preferable because the linear expansion coefficient can be satisfactorily reduced.
  • silica powder is preferable, and fused silica powder is more preferable.
  • fused silica powder examples include spherical fused silica powder and crushed fused silica powder. From the viewpoint of fluidity, spherical fused silica powder is preferable. Among these, those having an average particle diameter in the range of 10 to 30 ⁇ m are preferable, and those having a mean particle diameter in the range of 15 to 25 ⁇ m are more preferable.
  • the average particle diameter can be derived, for example, by using a sample arbitrarily extracted from the population and measuring it using a laser diffraction / scattering particle size distribution measuring apparatus.
  • the content of the inorganic filler in the sealing sheet 11 is preferably 75 to 95% by weight, and more preferably 78 to 95% by weight with respect to the entire sealing sheet 11.
  • the thermal expansion coefficient can be suppressed to be low, so that mechanical breakage due to thermal shock can be suppressed.
  • the content of the inorganic filler is 95% by weight or less with respect to the entire sealing sheet 11, flexibility, fluidity, and adhesiveness are improved.
  • the sealing sheet 11 includes a curing accelerator.
  • the curing accelerator is not particularly limited as long as it can cure the epoxy resin and the phenol resin, and examples thereof include organophosphorus compounds such as triphenylphosphine and tetraphenylphosphonium tetraphenylborate; 2-phenyl-4, And imidazole compounds such as 5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole.
  • organophosphorus compounds such as triphenylphosphine and tetraphenylphosphonium tetraphenylborate
  • 2-phenyl-4, And imidazole compounds such as 5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole.
  • 2-phenyl-4,5-dihydroxymethylimidazole is preferred because the curing reaction does not proceed rapidly even when the temperature during kneading increases, and the sealing sheet 11 can be satisfactorily produced.
  • the content of the curing accelerator is preferably 0.1 to 5 parts by weight with respect to 100 parts by weight of the total of the epoxy resin and the phenol resin.
  • the sealing sheet 11 may contain a flame retardant component. This can reduce the expansion of combustion when ignition occurs due to component short-circuiting or heat generation.
  • a flame retardant component for example, various metal hydroxides such as aluminum hydroxide, magnesium hydroxide, iron hydroxide, calcium hydroxide, tin hydroxide, complex metal hydroxides; phosphazene flame retardants, etc. should be used. Can do.
  • the sealing sheet 11 preferably contains a silane coupling agent.
  • the silane coupling agent is not particularly limited, and examples thereof include 3-glycidoxypropyltrimethoxysilane.
  • the content of the silane coupling agent in the sealing sheet 11 is preferably 0.1 to 3% by weight. When the content is 0.1% by weight or more, sufficient strength of the cured product can be obtained and the water absorption rate can be lowered. If it is 3% by weight or less, the outgas amount can be lowered.
  • the sealing sheet 11 preferably contains a pigment or a dye.
  • the pigment is not particularly limited, and examples thereof include carbon black.
  • the content of the pigment or dye in the sealing sheet 11 is preferably 0.1 to 2% by weight. When the content is 0.1% by weight or more, good marking properties are obtained.
  • seat for sealing after hardening can be ensured as it is 2 weight% or less.
  • the thickness of the sealing sheet 11 is not particularly limited, but is 50 ⁇ m to 2000 ⁇ m, preferably 70 ⁇ m to 1200 ⁇ m, for example, from the viewpoint of use as a sealing sheet and from the viewpoint of suitably embedding the semiconductor chip 23. More preferably, it can be set to 100 ⁇ m to 700 ⁇ m.
  • the size and shape of the sealing sheet 11 are not particularly limited, but it is preferably a shape that can be laminated in a manner that does not protrude from the semiconductor wafer 22 (laminated body) when viewed in plan.
  • the size and shape of the sealing sheet 11 can be the same as or larger than the size and shape of the semiconductor wafer 22 (laminated body) in plan view.
  • the peeling strength Z1 between the sealing sheet 11 and the separator 16 after heating at 150 ° C. for 1 hour is 0.4 N / min under the conditions of a peeling angle of 180 ° and a peeling speed of 300 mm / min.
  • the width is preferably less than 100 mm, more preferably less than 0.35 N / 100 mm, and even more preferably less than 0.3 N / 100 mm.
  • the peel strength Z1 is less than 0.4 N / 100 mm, the separator 16 can be more easily peeled from the sealing sheet 11 after the sealing sheet 11 is thermally cured.
  • the said peeling strength Z1 is so preferable that it is small, it is 0.01 N / 100mm width or more, for example.
  • the manufacturing method of the sealing sheet 11 is not particularly limited, a method of preparing a kneaded product of the resin composition for forming the sealing sheet 11 and coating the obtained kneaded product, or the obtained kneading A method of plastically processing an object into a sheet is preferable. Thereby, since the sheet
  • a kneaded product is prepared by melt-kneading each component described below with a known kneader such as a mixing roll, a pressure kneader, or an extruder, and the obtained kneaded product is coated or plastically processed into a sheet. Shape.
  • the temperature is preferably equal to or higher than the softening point of each component described above, for example, 30 to 150 ° C., and preferably 40 to 140 ° C., more preferably 60 to 120 in consideration of the thermosetting property of the epoxy resin. ° C.
  • the time is, for example, 1 to 30 minutes, preferably 5 to 15 minutes.
  • the kneading is preferably performed under reduced pressure conditions (under reduced pressure atmosphere). Thereby, while being able to deaerate, the penetration
  • the pressure under reduced pressure is preferably 0.1 kg / cm 2 or less, more preferably 0.05 kg / cm 2 or less.
  • the lower limit of the pressure under reduced pressure is not particularly limited, but is, for example, 1 ⁇ 10 ⁇ 4 kg / cm 2 or more.
  • the kneaded material after melt-kneading is preferably applied in a high temperature state without cooling.
  • the coating method is not particularly limited, and examples thereof include a bar coating method, a knife coating method, and a slot die method.
  • the temperature at the time of coating is preferably not less than the softening point of each component described above, and considering the thermosetting property and moldability of the epoxy resin, for example, 40 to 150 ° C., preferably 50 to 140 ° C., more preferably 70 to 120 ° C.
  • the plastic working method is not particularly limited, and examples thereof include a flat plate pressing method, a T-die extrusion method, a screw die extrusion method, a roll rolling method, a roll kneading method, an inflation extrusion method, a coextrusion method, and a calendar molding method.
  • the plastic working temperature is preferably not less than the softening point of each component described above, and is 40 to 150 ° C., preferably 50 to 140 ° C., more preferably 70 to 120 ° C. in consideration of the thermosetting property and moldability of the epoxy resin. is there.
  • the sealing sheet 11 can also be obtained by adjusting the varnish by dissolving and dispersing a resin or the like for forming the sealing sheet 11 in an appropriate solvent, and coating the varnish.
  • the manufacturing method of the semiconductor device is as follows: Preparing a laminate in which a semiconductor chip is flip-chip bonded to a circuit forming surface of a semiconductor wafer; and Step B for disposing a sealing sheet and a protective film on the semiconductor chip of the laminate, Step C of embedding the semiconductor chip in the sealing sheet and forming a sealing body in which the semiconductor chip is embedded in the sealing sheet; Step D for thermosetting the sealing sheet of the sealing body; After the step D, a step E of peeling the protective film is included.
  • the “laminated body in which the semiconductor chip is fixed on the support” in the present invention is “a laminated body in which the semiconductor chip is flip-chip bonded to the circuit formation surface of the semiconductor wafer” will be described. To do.
  • the present embodiment is a so-called chip-on-wafer semiconductor device manufacturing method.
  • FIGS. 2 to 11 are schematic cross-sectional views for explaining the method for manufacturing a semiconductor device according to this embodiment.
  • a stacked body 20 in which a semiconductor chip 23 is flip-chip bonded to a circuit forming surface 22a of a semiconductor wafer 22 is prepared (step A).
  • the semiconductor wafer 22 corresponds to a “support” of the present invention.
  • the laminated body 20 is obtained as follows, for example.
  • one or a plurality of semiconductor chips 23 having a circuit formation surface 23a and a semiconductor wafer 22 having a circuit formation surface 22a are prepared.
  • the shape and size of the semiconductor wafer 22 (support) in plan view can be the same as the size and shape of the sealing sheet 11 in plan view, for example, a circle having a diameter of 200 mm or more. be able to.
  • the semiconductor chip 23 is flip-chip bonded to the circuit forming surface 22 a of the semiconductor wafer 22.
  • a known device such as a flip chip bonder or a die bonder can be used.
  • the bumps 23b formed on the circuit formation surface 23a of the semiconductor chip 23 and the electrodes 22b formed on the circuit formation surface 22a of the semiconductor wafer 22 are electrically connected.
  • the resin sheet 24 for underfill may be affixed on the circuit formation surface 23a of the semiconductor chip 23.
  • the gap between the semiconductor chip 23 and the semiconductor wafer 22 can be resin-sealed.
  • a method for flip-chip bonding the semiconductor chip 23 to which the underfill resin sheet 24 is attached to the semiconductor wafer 22 is disclosed in, for example, Japanese Patent Application Laid-Open No. 2013-115186. Detailed description is omitted.
  • Step X the sealing sheet with separator 10 (see FIG. 1) in which the sealing sheet 11 and the separator 16 are laminated in advance is prepared.
  • Step B the laminate 20 may be first disposed on the lower heating plate 32, and then the sealing sheet 11 with a separator may be disposed on the laminate 20, and the separator 20 is sealed on the laminate 20.
  • the sheet 11 may be laminated first, and then a laminate in which the laminate 20 and the separator-equipped sealing sheet 11 are laminated may be disposed on the lower heating plate 32.
  • Step C heat pressing is performed by the lower heating plate 32 and the upper heating plate 34 to embed the semiconductor chip 23 in the sealing sheet 11, and the semiconductor chip 23 is embedded in the sealing sheet 11.
  • the sealed body 28 thus formed is formed (step C).
  • the temperature is, for example, 40 to 100 ° C., preferably 50 to 90 ° C.
  • the pressure is, for example, 0.1 to 10 MPa, preferably Is 0.5 to 8 MPa
  • the time is, for example, 0.3 to 10 minutes, preferably 0.5 to 5 minutes.
  • the pressure reducing conditions the pressure is, for example, 0.1 to 5 kPa, preferably 0.1 to 100 Pa, and the reduced pressure holding time (the time from the start of pressure reduction to the start of pressing) is, for example, 5 to 600 seconds. Yes, preferably 10 to 300 seconds.
  • step C As shown in FIG. 6, the resin (sealing sheet 11) washed away in the surface direction by step C is cut as necessary, and the protruding portion is removed.
  • the sealing sheet 11 is thermally cured (step D). Specifically, for example, the entire sealing body 28 in which the semiconductor chip 23 mounted on the semiconductor wafer 22 is embedded in the sealing sheet 11 is heated.
  • the heating temperature is preferably 100 ° C or higher, more preferably 120 ° C or higher.
  • the upper limit of the heating temperature is preferably 200 ° C. or lower, more preferably 180 ° C. or lower.
  • the heating time is preferably 10 minutes or more, more preferably 30 minutes or more.
  • the upper limit of the heating time is preferably 180 minutes or less, more preferably 120 minutes or less.
  • the upper limit is preferably 10 MPa or less, more preferably 5 MPa or less.
  • the separator 16 is peeled off (process E). Since the separator 16 has a surface in contact with the sealing sheet 11 treated with an aminoalkyd release agent, the separator 16 can be easily peeled off from the sealing sheet 11 after thermosetting.
  • the sealing sheet 11 of the sealing body 28 is ground to expose the back surface 23 c of the semiconductor chip 23.
  • the method for grinding the sealing sheet 11 is not particularly limited, and examples thereof include a grinding method using a grindstone that rotates at high speed.
  • the surface of the semiconductor wafer 22 opposite to the side on which the semiconductor chip 23 is mounted is ground to form a via (Via) 22c (see FIG. 9), and then the wiring layer 27 having the wiring 27a. (See FIG. 10).
  • the method for grinding the semiconductor wafer 22 is not particularly limited, and examples thereof include a grinding method using a grindstone that rotates at high speed.
  • bumps 27b protruding from the wiring 27a may be formed.
  • Conventionally known circuit board and interposer manufacturing techniques such as a semi-additive method and a subtractive method can be applied to the method of forming the wiring layer 27, and thus detailed description thereof is omitted here.
  • a substrate mounting step for mounting the semiconductor device 29 on a separate substrate can be performed.
  • a known device such as a flip chip bonder or a die bonder can be used.
  • the sealing sheet 10 with the separator is disposed on the semiconductor chip 23, the semiconductor chip 23 is embedded in the sealing sheet 11.
  • the sealing body 28 embedded in the sealing sheet 11 is formed (Step C).
  • seat 11 for sealing of the sealing body 28 is thermoseted in the state with the separator 16 attached (process D). Since the sealing sheet 11 is thermoset while the separator 16 is still attached, surface roughness during the thermosetting of the sealing sheet 11 can be suppressed. And the separator 16 is peeled from the sheet
  • the separator 16 Since the surface of the separator 16 in contact with the sealing sheet 11 is treated with an aminoalkyd release agent, the separator 16 can be easily peeled off from the sealing sheet 11 after thermosetting. Even after heat curing, the separator 16 can be easily peeled off from the sealing sheet 11, so that it is possible to obtain the semiconductor device 29 with suppressed surface roughness and good appearance.
  • heat sealing is performed by the lower heating plate 32 and the upper heating plate 34 so that the semiconductor chip 23 is embedded in the sealing sheet 11 and the semiconductor chip 23 is embedded in the sealing sheet 11.
  • the case where the body 28 is formed has been described. That is, the case where the semiconductor chip is embedded in the sealing sheet by the flat plate press has been described.
  • the process C for forming the sealing body in which the semiconductor chip is embedded in the sealing sheet is not limited to this example. For example, compression molding using a mold may be used.
  • the layer configuration of the sealing sheet in the present invention is not limited to this example, and 2 It may be a layer or more.
  • the semiconductor device manufacturing method according to the present invention is a so-called chip-on-wafer semiconductor device manufacturing method. That is, the case where the “laminated body in which the semiconductor chip is fixed on the support” in the present invention is “a laminated body in which the semiconductor chip is flip-chip bonded to the circuit formation surface of the semiconductor wafer” has been described.
  • the method for manufacturing a semiconductor device according to the present invention is not limited to this example.
  • the support of the present invention is a temporary fixing material, and may be removed after step D (step of thermally curing the sealing sheet of the sealing body). That is, a method for manufacturing a semiconductor device according to another embodiment is as follows.
  • Step B for disposing a sealing sheet and a protective film on the semiconductor chip of the laminate, Step C of embedding the semiconductor chip in the sealing sheet and forming a sealing body in which the semiconductor chip is embedded in the sealing sheet; Step D for thermosetting the sealing sheet of the sealing body;
  • the manufacturing method of the semiconductor device including the process E which peels the said protective film after the said process D.
  • a rewiring may be formed at a portion (circuit formation surface) where the semiconductor chip is exposed.
  • a semiconductor device called a fan-out (fan-out) type wafer level package (WLP) can be manufactured.
  • Examples of the temporary fixing material include a heat release sheet containing a conventionally known foaming agent.
  • the thermal release sheet is described in detail, for example, in Japanese Patent Application Laid-Open No. 2009-040930 as a thermally expandable pressure-sensitive adhesive layer, and thus the description thereof is omitted here.
  • the present invention is not limited to the above-described embodiment, and each step may or may not be performed within the scope not departing from the gist of the present invention. Further, the steps may be performed in any order within the scope of the present invention.
  • Epoxy resin A (trade name “YSLV-80XY”, manufactured by Nippon Steel Chemical Co., Ltd.) 100 parts
  • Epoxy resin B (trade name “Epicoat 828”, manufactured by Mitsubishi Chemical Corporation, bisphenol A type epoxy resin, Epokin equivalent 185 g / eq) 97 parts
  • phenol resin (trade name “MEH-7500-3S”, manufactured by Meiwa Kasei Co., Ltd.) 90 parts
  • inorganic filler A (trade name “FB-9454FC”, manufactured by Denki Kagaku Kogyo Co., Ltd.) 2894 parts
  • inorganic filler Agent B (trade name “FB-5SDC”, manufactured by Denki Kagaku Kogyo Co., Ltd., fused spherical silica, average particle size 5 ⁇ m) 99 parts
  • silane coupling agent (trade name “KBM-403”, manufactured by Shin-Etsu Chemical Co., Ltd.) 3 parts, 7 parts of carbon black (trade name “KBM-403”, manufactured
  • a polyethylene terephthalate film (trade name “PET-50-SHP-AO”, manufactured by Fujiko Co., Ltd.) having a thickness of 50 ⁇ m whose surface was release-treated with an aminoalkyd release agent was used. Then, the same separator was bonded to the exposed surface side of the sealing sheet A to obtain a sealing sheet A with a double-sided separator.
  • Epoxy resin A (trade name “YSLV-80XY”, manufactured by Nippon Steel Chemical Co., Ltd.) 100 parts, phenol resin (trade name “MEH-7851-SS”, manufactured by Meiwa Kasei Co., Ltd.) 85 parts, thermoplastic resin (trade name “ SIBSTAR 072T “(manufactured by Kaneka) 84 parts, inorganic filler A (trade name” FB-9454FC ", manufactured by Denki Kagaku Kogyo) 2254 parts, silane coupling agent (trade name” KBM-403 ", manufactured by Shin-Etsu Chemical Co., Ltd.) ) 2 parts, 8 parts carbon black (trade name “# 20”, manufactured by Mitsubishi Chemical) and 3 parts curing accelerator (trade name “2PHZ-PW”, manufactured by Shikoku Kasei Kogyo Co., Ltd.) Heat at 60 ° C for 2 minutes, 80 ° C for 2 minutes, 120 ° C for 6 minutes in this order, and melt knea
  • the obtained kneaded material was coated on a separator by a slot die method under a condition of 120 ° C. to form a sheet, and a sealing sheet B having a thickness of 500 ⁇ m was produced.
  • a separator a polyethylene terephthalate film (trade name “PET-50-SHP-AO”, manufactured by Fujiko Co., Ltd.) having a thickness of 50 ⁇ m whose surface was release-treated with an aminoalkyd release agent was used. Thereafter, the same separator was bonded to the exposed surface side of the sealing sheet B to obtain a sealing sheet B with a double-sided separator.
  • Epoxy resin A (trade name “YSLV-80XY”, manufactured by Nippon Steel Chemical Co., Ltd.) 100 parts, Epoxy resin B (trade name “Epicoat 828”, manufactured by Mitsubishi Chemical Corporation, bisphenol A type epoxy resin, Epokin equivalent 185 g / eq) 169 parts, phenol resin (trade name “MEH-7785-SS”, manufactured by Meiwa Kasei Co., Ltd.) 169 parts, thermoplastic resin (trade name “SIBSTAR 072T”, manufactured by Kaneka) 96 parts, inorganic filler A (product) Name "FB-9454FC”, manufactured by Denki Kagaku Kogyo Co., Ltd.) 4685 parts, inorganic filler B (trade name "FB-5SDC”, manufactured by Denki Kagaku Kogyo Co., Ltd., fused spherical silica, average particle size 5 ⁇ m) 145 parts, silane coupling 9 parts of an agent (trade name “KBM-403”, manufactured
  • a polyethylene terephthalate film (trade name “PET-50-SHP-AO”, manufactured by Fujiko Co., Ltd.) having a thickness of 50 ⁇ m whose surface was release-treated with an aminoalkyd release agent was used. Then, the same separator was bonded to the exposed surface side of the sealing sheet C to obtain a sealing sheet C with a double-sided separator.
  • Example 4 Epoxy resin A (trade name “YSLV-80XY”, manufactured by Nippon Steel Chemical Co., Ltd.) 100 parts, phenol resin (trade name “H-4”, manufactured by Meiwa Kasei Co., Ltd.) 55 parts, inorganic filler A (trade name “FB”) -5SDC ", manufactured by Denki Kagaku Kogyo Co., Ltd.) 473 parts, silane coupling agent (trade name” KBM-403 ", manufactured by Shin-Etsu Chemical Co., Ltd.) 0.2 part, carbon black (trade name”# 20 ", manufactured by Mitsubishi Chemical Corporation) ) 1 part and 2 parts of a curing accelerator (trade name “2E4MZ-A”, manufactured by Shikoku Kasei Kogyo Co., Ltd.) and blended at 60 ° C.
  • a curing accelerator trade name “2E4MZ-A”, manufactured by Shikoku Kasei Kogyo Co., Ltd.
  • a kneaded product was coated on a separator by a slot die method under a condition of 120 ° C. to form a sheet, and a sealing sheet D having a thickness of 500 ⁇ m was produced.
  • a separator a polyethylene terephthalate film (trade name “PET-50-SHP-AO”, manufactured by Fujiko Co., Ltd.) having a thickness of 50 ⁇ m whose surface was release-treated with an aminoalkyd release agent was used. Then, the same separator was bonded to the exposed surface side of the sealing sheet D to obtain a sealing sheet D with a double-sided separator.
  • Example 1 A sealing sheet E with a double-sided separator was obtained in the same manner as in Example 1 except that a polyethylene terephthalate film having a thickness of 50 ⁇ m subjected to silicone release treatment was used as the separator.
  • Example 2 A sealing sheet F with a double-sided separator was obtained in the same manner as in Example 2 except that a polyethylene terephthalate film having a thickness of 50 ⁇ m subjected to silicone release treatment was used as the separator.
  • Example 3 A sealing sheet G with a double-sided separator was obtained in the same manner as in Example 3 except that a polyethylene terephthalate film having a thickness of 50 ⁇ m subjected to silicone release treatment was used as the separator.
  • Example 4 A sealing sheet H with a double-sided separator was obtained in the same manner as in Example 4 except that a polyethylene terephthalate film having a thickness of 50 ⁇ m subjected to silicone release treatment was used as the separator.
  • the separators on one side of the prepared sealing sheets A to H with double-sided separator were peeled off and placed on a silicon wafer having a width of 100 mm, a length of 200 mm, and a thickness of 780 ⁇ m. At this time, the silicon wafer surface and the sealing sheet surface were in contact with each other. Next, using a vacuum press apparatus (trade name “VACUUM ACE”, manufactured by Mikado Technos Co., Ltd.), it is hot-pressed under the following conditions, and a laminate of a silicon wafer and a sealing sheet (thickness of silicon wafer: 780 ⁇ m). The thickness of the sealing sheet was 300 ⁇ m, and the total thickness was 1080 ⁇ m.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)
  • Adhesive Tapes (AREA)

Abstract

La présente invention concerne une feuille d'étanchéité équipée d'un séparateur qui comprend un séparateur et une feuille d'étanchéité qui est stratifiée sur le séparateur, la surface du séparateur qui est en contact avec la feuille d'étanchéité étant traitée avec un agent de libération amino-alkyde.
PCT/JP2015/079163 2014-11-17 2015-10-15 Feuille d'étanchéité équipée d'un séparateur et procédé de production de dispositif à semi-conducteurs WO2016080117A1 (fr)

Priority Applications (3)

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SG11201703904YA SG11201703904YA (en) 2014-11-17 2015-10-15 Separator-equipped sealing sheet and semiconductor device production method
KR1020177007630A KR102370954B1 (ko) 2014-11-17 2015-10-15 세퍼레이터를 갖는 밀봉용 시트 및 반도체 장치의 제조 방법
CN201580062102.9A CN107004608A (zh) 2014-11-17 2015-10-15 带有隔片的密封用片以及半导体装置的制造方法

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JP2013038315A (ja) * 2011-08-10 2013-02-21 Ajinomoto Co Inc 半導体パッケージの製造方法
JP2013048284A (ja) * 2012-11-01 2013-03-07 Lintec Corp 樹脂封止型半導体装置の製造方法
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JP2005142208A (ja) * 2003-11-04 2005-06-02 Dainippon Printing Co Ltd 半導体装置製造用接着シート
JP4730652B2 (ja) 2004-06-02 2011-07-20 ナガセケムテックス株式会社 電子部品の製造方法
JP5343502B2 (ja) * 2008-10-08 2013-11-13 ダイニック株式会社 自己粘着性フィルム及びその製造方法
JP2011068822A (ja) * 2009-09-28 2011-04-07 Hitachi Kasei Polymer Co Ltd セパレータ付き接着フィルム
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CN103165544A (zh) * 2011-12-12 2013-06-19 日东电工株式会社 层叠片、及使用层叠片的半导体装置的制造方法
KR20160020587A (ko) * 2012-01-20 2016-02-23 아사히 가세이 이-매터리얼즈 가부시키가이샤 수지 조성물, 적층체, 다층 프린트 배선판 및 다층 플렉시블 배선판 및 그 제조 방법
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JP2013038315A (ja) * 2011-08-10 2013-02-21 Ajinomoto Co Inc 半導体パッケージの製造方法
JP2013157408A (ja) * 2012-01-27 2013-08-15 Nitto Denko Corp 発光ダイオード装置およびその製造方法
JP2013048284A (ja) * 2012-11-01 2013-03-07 Lintec Corp 樹脂封止型半導体装置の製造方法

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KR20170084015A (ko) 2017-07-19
SG11201703904YA (en) 2017-06-29
JP6677966B2 (ja) 2020-04-08
TW201618959A (zh) 2016-06-01
TWI715541B (zh) 2021-01-11

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