WO2016078515A1 - 一种谐振整流装置、谐振整流控制方法及装置 - Google Patents

一种谐振整流装置、谐振整流控制方法及装置 Download PDF

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Publication number
WO2016078515A1
WO2016078515A1 PCT/CN2015/093852 CN2015093852W WO2016078515A1 WO 2016078515 A1 WO2016078515 A1 WO 2016078515A1 CN 2015093852 W CN2015093852 W CN 2015093852W WO 2016078515 A1 WO2016078515 A1 WO 2016078515A1
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Prior art keywords
field effect
effect transistor
output module
primary
controlling
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PCT/CN2015/093852
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English (en)
French (fr)
Inventor
范杰
石新明
孙伟
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小米科技有限责任公司
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Application filed by 小米科技有限责任公司 filed Critical 小米科技有限责任公司
Priority to MX2016000465A priority Critical patent/MX359057B/es
Priority to KR1020167000002A priority patent/KR101900577B1/ko
Priority to EP15851631.0A priority patent/EP3051679B1/en
Priority to JP2016559498A priority patent/JP2017501675A/ja
Priority to RU2016103766A priority patent/RU2627680C1/ru
Priority to US15/090,738 priority patent/US9871458B2/en
Publication of WO2016078515A1 publication Critical patent/WO2016078515A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present disclosure relates to the field of application circuit technologies, and in particular, to a resonant rectifying device, a resonant rectification control method and device.
  • a circuit that transfers primary energy of a transformer to a secondary output is mainly used in a resonant manner.
  • the boost circuit raises the voltage to a preset voltage
  • a half-bridge circuit composed of two field effect transistors controls the preset voltage to charge the capacitor.
  • the capacitor and the transformer in series form an LC resonant circuit.
  • the energy of the resonant circuit is transmitted from the primary to the secondary by the transformer.
  • the secondary receives the energy, the energy is transmitted to the load through the rectifier diode for use by the load.
  • the leakage inductance of the transformer is not a constant and can only be controlled within a certain interval, so if the circuit is in accordance with the resonant frequency If you work, you should work in a capacitive area, which is the area where the capacitor dominates.
  • the leakage inductance causes the energy of the primary coil to be less than the theoretical value, which reduces the energy conversion efficiency.
  • the secondary loop rectifier circuit is mostly realized by a diode. Since the diode always has a current flowing, if the internal resistance of the diode is relatively large, the conversion efficiency is greatly affected, and the power consumption is large.
  • embodiments of the present disclosure provide a resonant rectifying device, a resonant rectification control method, and a device.
  • a resonant rectifying device comprising: a primary input module, a secondary output module, and a transformer,
  • the primary input module transfers energy through the transformer to the secondary output module
  • the primary input module includes a first field effect transistor and a second field effect transistor connected in series between the voltage source and the ground; a first junction capacitance connected between the source and the drain of the first field effect transistor; Second field effect crystal a second junction capacitance between the source and the drain of the tube; a first inductor connected to both ends of the primary coil of the transformer, one end of the first inductor being connected to the first field effect transistor and the first through a first capacitor Between the two field effect transistors, the other end of the first inductor is connected to the ground;
  • the secondary output module includes: a source of the third field effect transistor is connected to one end of the transformer secondary coil, and a source of the fourth field effect transistor is connected to the other end of the transformer secondary coil; A drain of the three field effect transistor is coupled to a drain of the fourth field effect transistor and coupled to an output of the secondary output module through a second capacitor and a first resistor connected in parallel.
  • the primary input module further includes: a second inductor
  • One end of the first inductor is connected between the first field effect transistor and the second field effect transistor through a first capacitor and a second inductor connected in series.
  • a resonant rectification control method for controlling the resonant rectifying device of the 1 or 2, the method comprising:
  • the secondary output module transfers energy, and the secondary output module stores energy;
  • the output module transmits energy, and the secondary output module outputs energy
  • the second field effect transistor and the fourth field effect transistor are sequentially turned on, such that the primary output module transfers energy to the secondary output module, and the secondary output module stores energy;
  • the primary output module delivers energy to the secondary output module, and the secondary output module outputs energy.
  • the method further includes:
  • T is the on-time of the first field effect transistor and the second field effect transistor
  • L r is the inductance value of the second inductor in the primary output module
  • C r is the first capacitance in the primary output module The value of the capacitor.
  • an on time of the first field effect transistor and the second field effect transistor is greater than an on time of the third field effect transistor and the fourth field effect transistor.
  • controlling a pulse width of a secondary driving signal of the third field effect transistor and the fourth field effect transistor relative to a pulse width delay of controlling a primary driving signal of the first field effect transistor and the second field effect transistor a preset delay time, the preset conduction delay time and a preset off delay time, wherein the preset conduction delay time is used to control the third field effect transistor and the fourth field effect transistor The delay is turned on, and the preset off-delay time is used to control the third field effect transistor and the fourth field effect transistor to be turned off.
  • a resonant rectification control apparatus for controlling the resonant rectifying apparatus, the apparatus comprising:
  • a first control module configured to control the first field effect transistor and the second field effect transistor to be turned on during a first period of a duty cycle, and control the third field effect transistor to be turned off, so that the primary output module receives energy from the power source;
  • the third field effect transistor is turned on such that the capability of the primary output module is transferred to the secondary output module through the transformer; controlling the third field effect transistor to be turned off prior to the first field effect transistor, such that The primary output module no longer transfers energy to the secondary output module, the secondary output module stores energy;
  • the output module transmits energy, and the secondary output module outputs energy
  • the second field effect transistor and the fourth field effect transistor are sequentially turned on, such that the primary output module transfers energy to the secondary output module, and the secondary output module stores energy;
  • the primary output module delivers energy to the secondary output module, and the secondary output module outputs energy.
  • the device further includes:
  • an obtaining module configured to acquire an on-time of the first field effect transistor and the second field effect transistor, wherein the on-time is calculated according to the following formula:
  • T is the on-time of the first field effect transistor and the second field effect transistor
  • L r is the inductance value of the second inductor in the primary output module
  • C r is the first capacitance in the primary output module The value of the capacitor.
  • the device further includes:
  • a second control module configured to control a pulse width of a secondary driving signal of the third field effect transistor and the fourth field effect transistor with respect to controlling a primary driving signal of the first field effect transistor and the second field effect transistor
  • the pulse width delays a preset delay time, the preset delay time includes: a preset conduction delay time and a preset off delay time, wherein the preset conduction delay time is used to control the third field effect transistor and the fourth The field effect transistor is delayed in conduction, and the predetermined off-delay time is used to control the third field effect transistor and the fourth field effect transistor to be turned off.
  • the technical solution provided by the embodiment of the present disclosure may include the following beneficial effects: the rectifier diode in the secondary end of the resonant rectifying device is replaced by the third MOS transistor and the fourth MOS transistor, which can effectively disconnect the loop of the secondary end and reduce Or, the influence of the coupling on the load is eliminated, and in the circuit of the embodiment, the opening time of the MOS tube of the primary side and the secondary side is sequential, and after the MOS tube of the primary side is first opened, the MOS tube of the secondary end is delayed for a certain period of time. After the MOS transistor of the secondary side is turned off, the MOS transistor of the primary end is turned off for a while, effectively avoiding the influence of magnetic flux leakage on the load.
  • FIG. 1 is a circuit diagram of a resonant rectifying device according to an exemplary embodiment
  • FIG. 2 is a circuit diagram of a resonant rectifying device according to another exemplary embodiment
  • FIG. 3 is a circuit operation timing diagram of a resonant rectifying device according to an exemplary embodiment
  • FIG. 4 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment
  • FIG. 5 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment
  • FIG. 6 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment
  • FIG. 7 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment
  • FIG. 8 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment
  • FIG. 9 is a schematic diagram of a primary driving signal and a secondary driving signal of a resonant rectifying device according to an exemplary embodiment
  • FIG. 10 is a block diagram of a resonant rectification control apparatus according to an exemplary embodiment
  • FIG. 11 is a circuit configuration diagram of a resonant rectification control apparatus according to an exemplary embodiment.
  • a diode is generally used at the secondary end of the resonant circuit. Since the diode is always turned on, it means that the secondary end is always a complete discharge loop.
  • the secondary side does not require current, due to the coupling of the primary side, a small current will be generated at the secondary side, there will be loss with current, and this current will make the coupling current not reach the load required. Energy, load work is unstable.
  • the transformer will generate magnetic flux leakage, and the magnetic flux leakage will cause large interference in the magnetic field space. This always-on characteristic of the diode will cause the current spike generated by the magnetic flux leakage to be transmitted to the secondary side, and the secondary end will also Corresponding current spikes can easily damage the load equipment.
  • the diode of the secondary end of the resonant rectifier circuit can be replaced by a field effect transistor (MOS transistor), and the problem of magnetic flux leakage and coupling current loss is solved; and an inductor can be added at the primary end of the resonant rectifier circuit. Solve the problem of leakage.
  • MOS transistor field effect transistor
  • FIG. 1 is a circuit diagram of a resonant rectifying device according to an exemplary embodiment. As shown in FIG. 1 , the device includes a primary input module 11 , a transformer T1 , and a secondary output module 12 .
  • the primary input module 11 transfers energy to the secondary output module 12 through the transformer T1.
  • the primary input module 11 includes a first MOS transistor S1 and a second MOS transistor S2 connected in series between the voltage source V in and the ground; and a first junction capacitance C connected between the source and the drain of the first MOS transistor S1.
  • the secondary output module 12 includes: a source of the third MOS transistor S3 is connected to one end of the secondary coil of the transformer T1, a source of the fourth MOS transistor S4 is connected to the other end of the secondary coil of the transformer T1; and a third MOS transistor S3 a drain connected to the drain of the fourth MOS transistor S4 and in parallel with a second resistor and a first capacitor C O R L connected to the output of the secondary output block 12.
  • replacing the rectifier diode in the secondary end of the resonant rectifying device with the third MOS transistor and the fourth MOS transistor can effectively disconnect the loop of the secondary end, reduce or eliminate the influence of the coupling on the load, and
  • the MOS tube opening time of the primary side and the secondary side is sequential, after the MOS tube of the primary side is first opened, the MOS tube of the secondary end is opened for a certain time delay; and the MOS tube of the secondary end is turned off. After that, the MOS transistor at the primary end is turned off for a while, effectively avoiding the influence of magnetic flux leakage on the load.
  • FIG. 2 is a circuit diagram of a resonant rectifying device according to another exemplary embodiment.
  • the primary input module 11 further includes: a second inductor L r .
  • One end of the first inductor L m is connected between the first MOS transistor S1 and the second MOS transistor S2 through the first capacitor C r and the second inductor L r connected in series.
  • adding an inductor at the primary end can compensate for the L value caused by the leakage inductance is too small, so that the actual resonance frequency is equal to or greater than the theoretical resonance frequency, so that the actual resonance point falls in the inductive region, and the leakage inductance problem has been solved. Improve energy conversion efficiency.
  • FIG. 3 is a circuit operation timing diagram of a resonant rectifying device according to an exemplary embodiment. As shown in FIG. 3, one duty cycle of the resonant rectifying device is divided into five time periods.
  • the present invention also provides a resonant rectification control method for controlling a resonant rectifying device to operate in accordance with a circuit operating sequence as shown in FIG. A duty cycle of the resonant rectifying device is divided into five time segments, and the specific control flow in each time segment is separately described below.
  • FIG. 4 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment.
  • the first MOS transistor S1 and the second field effect crystal S2 are controlled to be turned on, and the third MOS transistor S3 is controlled to be turned off. such that the primary output module 11 receives energy from the power source V in.
  • FIG. 5 is a schematic diagram showing current flow of a resonant rectifying device according to an exemplary embodiment. As shown in FIG. 5, the first MOS transistor S1, the second MOS transistor S2, the third MOS transistor S3, and the fourth MOS transistor S4 are controlled to be turned off.
  • the second junction capacitor C oss2 of the second MOS transistor S2 is discharged, and the second MOS transistor S2 is in a zero voltage switching state during the next conduction period, at which time the current on the second inductor L r is kept continuous, for the first
  • the first junction capacitance C oss1 of the MOS transistor S1 is charged until the voltage across the first junction capacitance C oss1 reaches the power supply voltage V in , and the voltage across the second junction capacitance C oss2 is set from V in to 0.
  • junction capacitance C oss of the MOS transistor is a function of VDS, and it can be known that:
  • the entire circuit is in the ZVS state.
  • FIG. 6 is a schematic diagram showing a current flow direction of a resonant rectifying device according to an exemplary embodiment. As shown in FIG. 6, the first MOS transistor S1, the second MOS transistor S2, the third MOS transistor S3, and the fourth MOS transistor S4 are controlled to be turned off. The primary output module 11 no longer transfers energy to the secondary output module 12, and the secondary output module 12 outputs energy.
  • FIG. 7 is a schematic diagram showing a current flow direction of a resonant rectifying device according to an exemplary embodiment. As shown in FIG. 7, the second MOS transistor S2 and the fourth MOS transistor S4 are controlled to be sequentially turned on, so that the primary output module 11 is output to the secondary. Module 12 delivers energy and secondary output module 12 stores energy.
  • FIG. 8 is a schematic diagram showing a current flow direction of a resonant rectifying device according to an exemplary embodiment.
  • the first MOS transistor S1, the second MOS transistor S2, the third MOS transistor S3, and the fourth MOS transistor S4 are controlled to be turned off.
  • the first junction capacitor C oss1 of the first MOS transistor S1 is discharged, and the first MOS transistor S1 is in a zero voltage switching state in the next conduction period, and at the same time, the primary output module 11 does not suddenly disappear due to the characteristics of the inductance.
  • the primary output module 11 delivers energy to the secondary output module 12 and the secondary output module 12 outputs energy.
  • the MOS tube of the resonant rectifying device is alternately turned on by the control device, thereby effectively avoiding the influence of the magnetic flux leakage on the load.
  • the control device By replacing the rectifier diode in the secondary side with the MOS tube, synchronous rectification is realized, the conversion efficiency is improved, the stability of the load device is improved, the load device is effectively protected, and the load device is prevented from being damaged.
  • zero voltage switching technology can be used to reduce the energy loss on the MOS tube.
  • adding an inductor at the primary end can compensate for the L value caused by the leakage inductance is too small, so that the actual resonance frequency is equal to or greater than the theoretical resonance frequency, so that the actual resonance point falls in the inductive region, the leakage inductance problem is solved, and the energy conversion is improved. effectiveness.
  • the method further includes:
  • T is the on-time of the first field effect transistor and the second field effect transistor
  • L r is the inductance value of the second inductor in the primary output module
  • C r is the first capacitance in the primary output module The value of the capacitor.
  • an on time of the first field effect transistor and the second field effect transistor is greater than an on time of the third field effect transistor and the fourth field effect transistor.
  • FIG. 9 is a schematic diagram showing a primary driving signal and a secondary driving signal of a resonant rectifying device according to an exemplary embodiment.
  • the third field effect transistor and the fourth field effect transistor are controlled.
  • a pulse width of the secondary drive signal is delayed by a preset delay time relative to a pulse width of the primary drive signal of the first field effect transistor and the second field effect transistor, the preset delay time comprising: a preset conduction delay a preset on-delay time for controlling the third field effect transistor and the fourth field effect transistor to be delayed, and the preset off-delay time for controlling the third The field effect transistor and the fourth field effect transistor are delayed turned off.
  • the preset on-delay time and the preset off-delay time can be respectively set to the pulse width of the primary driving signal. 10%.
  • the turn-on delay is a factor that considers the switching delay and duty cycle of the primary half-bridge MOS transistor, that is, in the case where the current value is not positive, the secondary drive signal cannot be high, otherwise there will be Reverse current is recharged to the primary.
  • the cut-off delay is to consider the switching delay of the secondary synchronous rectification MOS transistor. When the current is still decreasing, the secondary driving signal must go low in advance, otherwise there will be reverse current recharging.
  • FIG. 10 is a block diagram of a resonant rectification control apparatus, according to an exemplary embodiment. As shown in FIG. 10, the apparatus includes a first control module 101.
  • the first control module 101 is configured to control the first field effect transistor and the second field effect transistor to be turned on during a first period of a duty cycle to control the third field effect transistor to be turned off, so that the primary output module receives energy from the power source. Controlling the third field effect transistor to be turned on such that the capability of the primary output module is transferred to the secondary output module through the transformer; controlling the third field effect transistor to be turned off prior to the first field effect transistor, such that The primary output module no longer transfers energy to the secondary output module, the secondary output module stores energy;
  • the output module transmits energy, and the secondary output module outputs energy
  • the second field effect transistor and the fourth field effect transistor are sequentially turned on, such that the primary output module transfers energy to the secondary output module, and the secondary output module stores energy;
  • the primary output module delivers energy to the secondary output module, and the secondary output module outputs energy.
  • the device further includes:
  • the acquisition module 102 is configured to acquire on-times of the first field effect transistor and the second field effect transistor, the on-time being calculated according to the following formula:
  • T is the on-time of the first field effect transistor and the second field effect transistor
  • L r is the inductance value of the second inductor in the primary output module
  • C r is the first capacitance in the primary output module The value of the capacitor.
  • the device further includes:
  • the second control module 103 is configured to control a pulse width of a secondary drive signal of the third field effect transistor and the fourth field effect transistor relative to a primary drive signal for controlling the first field effect transistor and the second field effect transistor
  • the pulse width delays a preset delay time, the preset delay time includes: a preset conduction delay time and a preset off delay time, wherein the preset conduction delay time is used to control the third field effect transistor and the The four field effect transistors are delayed in conduction, and the predetermined off delay time is used to control the third field effect transistor and the fourth field effect transistor to be delayed off.
  • the resonant rectification control device in this embodiment can also implement the above functions by using an actual circuit, as follows:
  • FIG. 11 is a circuit structural diagram of a resonant rectification control apparatus according to an exemplary embodiment, as shown in FIG. 11, and when the resonant rectification circuit is in a light load or no load mode, the control circuit must adopt a frequency conversion manner. Maintain high efficiency. Therefore, the FM control mode is employed at this time.
  • the output voltage Vout of the control circuit is reduced.
  • the voltage division networks Rf1 and Rf2 the voltage of the positive phase input terminal VFB of the amplifier A is also lowered. At this time, the output terminal of A is low level and low.
  • the mode selection circuit outputs a high level to the inverting input of amplifier C.
  • the signal output by the amplifier C at this time passes through the logic control circuit, and the logic control circuit selects the FM control mode.
  • the essence is that the logic control circuit changes the charge and discharge time constant of the charge pump by controlling the PGA.
  • the external CT/RT fails, and the CT/RT only determines the lowest resonance frequency; the PGA controls the charge and discharge of the charge pump, and then controls The slope of the sawtooth wave generated by the crystal (provided that the energy storage is the same for each cycle).
  • the internal comparator is compared with the sawtooth wave, thereby changing the frequency of the control pulse, and outputting four sets of driving signals, respectively driving the switching half-bridge MOS tube and the secondary synchronous rectifying MOS tube to realize FM control.
  • the control circuit When the load of the resonant rectifier circuit is at full load, the control circuit does not need to be converted, and is in a resonant frequency state, that is, a PWM control mode.
  • the voltage of the output voltage of the control circuit Vout will rise, and the voltage at the VFB terminal of the positive-phase input terminal of the amplifier A obtained by the voltage-dividing networks Rf1 and Rf2 will also rise, and the output terminal FEAO of A is at a high level.
  • the level of the output of the mode circuit is selected to be connected to the inverting input of the amplifier C, and the output control signal selects the PWM control mode in the logic circuit, and compares with the crystal sawtooth wave in the chip, and outputs four groups of driving signals, respectively Drive switch half-bridge MOS tube, and secondary synchronous rectification MOS tube to realize PWM control.
  • the output current reaches the set maximum limit current
  • the voltage value sampled by the detection terminal ILIM is compared with the amplifier D, and the amplifier D controls the selection switch inside the logic circuit, that is, the SD port of the control circuit.
  • the port is directly connected to ground to control the operating state of the circuit (stop working or continue to work).

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Abstract

一种谐振整流装置、谐振整流控制方法及装置。谐振整流装置将谐振整流装置的次级端（12）中的整流二极管替换成MOS管，用于通过谐振整流电路初级端（11）和次级端（12）的谐振和同步整流，实现电量利用率的提高。

Description

一种谐振整流装置、谐振整流控制方法及装置
本申请基于申请号为201410676697.4、申请日为2014年11月21日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本公开涉及应用电路技术领域，尤其涉及一种谐振整流装置、谐振整流控制方法及装置。
背景技术
随着电子设备的功能越来越复杂，而交互界面越来越简单的趋势，必然导致控制芯片的集成度越来越高，功耗也越来越大。对芯片的应用电路来说，需要通过更合理的电路拓扑结构和合理的逻辑控制电路实现提高效率。
相关技术中，主要采用使用谐振的方式，将变压器初级能量传递到次级输出的电路。升压电路将电压升到预设电压后，由两颗场效应晶体管组成的半桥电路控制预设电压给电容充电。而串联的电容和变压器构成LC谐振电路，谐振电路的能量由变压器从初级传递到次级，次级接收到能量后，通过整流二极管将能量传递给负载，供负载使用。
相关技术中存在如下问题：
(1)由于变压器有漏感的存在，所以这种将电容和变压器并联的方式，并非真正意义上的谐振电路，也就是说，LC并未工作在谐振点。而且变压器的漏感不是一个常数，只能控制在某个区间内，所以该电路如果按照谐振频率
Figure PCTCN2015093852-appb-000001
工作的话，应该工作在容性区，也就是电容占主导的区域。漏感现象导致初级线圈的能量小于理论值，也就降低了能量的转换效率。
(2)次级圈整流电路多是通过二极管实现，由于二极管始终有电流流过，如果二极管的内阻比较大，会极大影响转换效率，功耗较大。
发明内容
为克服相关技术中存在的问题，本公开实施例提供一种谐振整流装置、谐振整流控制方法及装置。
根据本公开实施例的第一方面，提供一种谐振整流装置，其特征在于，包括：初级输入模块、次级输出模块及变压器，
所述初级输入模块将能量通过所述变压器传递到所述次级输出模块；
所述初级输入模块包括，串联于电压源与地之间的第一场效应晶体管和第二场效应晶体管；连接于第一场效应晶体管的源极和漏极之间的第一结电容；连接于第二场效应晶体 管的源极和漏极之间的第二结电容；连接于所述变压器初级线圈两端的第一电感，所述第一电感的一端通过第一电容连接于所述第一场效应晶体管和第二场效应晶体管之间，所述第一电感的另一端与地连接；
所述次级输出模块包括：第三场效应晶体管的源极与所述变压器次级线圈的一端连接，第四场效应晶体管的源极与所述变压器次级线圈的另一端连接；所述第三场效应晶体管的漏极与所述第四场效应晶体管的漏极连接，并通过并联的第二电容和第一电阻连接于所述次级输出模块的输出端。
可选的，所述初级输入模块还包括：第二电感；
所述第一电感的一端通过串联的第一电容和第二电感连接于所述第一场效应晶体管和第二场效应晶体管之间。
根据本公开实施例的第二方面，提供一种谐振整流控制方法，用于对所述述1或2的谐振整流装置进行控制，所述方法包括：
在一个工作周期的第一时间段，控制第一场效应晶体管和第二场效应晶体管导通，控制第三场效应晶体管截止，使得初级输出模块从电源接收能量；控制所述第三场效应晶体管导通，使得所述初级输出模块存储的能力通过变压器向次级输出模块传递；控制所述第三场效应晶体管先于所述第一场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第二时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第二场效应晶体管的第二结电容放电，第二场效应晶体管在下一个导通周期处于零电压切换状态，对所述第一场效应晶体管的第一结电容充电，直到所述第一结电容两端电压达到所述电源电压；
在所述工作周期的第三时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块输出能量；
在所述工作周期的第四时间段，控制第二场效应晶体管和第四场效应晶体管相继导通，使得所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第五时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第一场效应晶体管的第一结电容放电，第一场效应晶体管在下一个导通周期处于零电压切换状态，所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块输出能量。
可选的，所述方法还包括：
获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
Figure PCTCN2015093852-appb-000002
其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
可选的，所述第一场效应晶体管和第二场效应晶体管的导通时间大于所述第三场效应晶体管和第四场效应晶体管的导通时间。
可选的，控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
根据本公开实施例的第三方面，提供一种谐振整流控制装置，用于对所述述谐振整流装置进行控制，所述装置包括：
第一控制模块，用于在一个工作周期的第一时间段，控制第一场效应晶体管和第二场效应晶体管导通，控制第三场效应晶体管截止，使得初级输出模块从电源接收能量；控制所述第三场效应晶体管导通，使得所述初级输出模块存储的能力通过变压器向次级输出模块传递；控制所述第三场效应晶体管先于所述第一场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第二时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第二场效应晶体管的第二结电容放电，第二场效应晶体管在下一个导通周期处于零电压切换状态，对所述第一场效应晶体管的第一结电容充电，直到所述第一结电容两端电压达到所述电源电压；
在所述工作周期的第三时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块输出能量；
在所述工作周期的第四时间段，控制第二场效应晶体管和第四场效应晶体管相继导通，使得所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第五时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第一场效应晶体管的第一结电容放电，第一场效应晶体管在下一个导通周期处于零电压切换状态，所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块输出能量。
可选的，所述装置还包括：
获取模块，用于获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
Figure PCTCN2015093852-appb-000003
其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输 出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
可选的，所述装置还包括：
第二控制模块，用于控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
本公开的实施例提供的技术方案可以包括以下有益效果：将谐振整流装置的次级端中的整流二极管换成第三MOS管和第四MOS管，可以有效地断开次级端的回路，降低或者消除耦合对负载的影响，并且，本实施例电路中，初级端和次级端的MOS管打开时间是有先后顺序的，初级端的MOS管先打开后，延时一定时间次级端的MOS管才打开；而次级端的MOS管关断后，再延时一段时间初级端的MOS管才关断，有效地避免了漏磁对负载的影响。这样，通过将次级端中的整流二极管换成MOS管，实现了同步整流，提高转换效率，提高负载设备工作的稳定性，有效保护负载设备，避免负载设备被损坏。并且，可以使用零电压切换技术，降低MOS管上的能量损耗。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。
图1是根据一示例性实施例示出的一种谐振整流装置的电路图；
图2是根据另一示例性实施例示出的一种谐振整流装置的电路图；
图3是根据一示例性实施例示出的一种谐振整流装置的电路工作时序图；
图4是根据一示例性实施例示出的谐振整流装置的电流流向示意图；
图5是根据一示例性实施例示出的谐振整流装置的电流流向示意图；
图6是根据一示例性实施例示出的谐振整流装置的电流流向示意图；
图7是根据一示例性实施例示出的谐振整流装置的电流流向示意图；
图8是根据一示例性实施例示出的谐振整流装置的电流流向示意图；
图9是根据一示例性实施例示出的谐振整流装置的初级驱动信号和次级驱动信号的示意图；
图10是根据一示例性实施例示出的一种谐振整流控制装置的框图；
图11是根据一示例性实施例示出的一种谐振整流控制装置的电路结构图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本公开相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本公开的一些方面相一致的装置和方法的例子。
相关技术中，在谐振电路的次级端一般使用的是二极管，由于二极管是一直导通的，也就意味着次级端始终是一个完整的放电回路。当次级端不需要电流时，由于初级端的耦合作用，一定会在次级端产生一个小的电流，有了电流就会有损耗，而且这个电流还会使得耦合电流达不到负载所需要的能量，负载工作不稳定。另外，变压器会产生漏磁，且漏磁会导致磁场空间有大的干扰，二极管的这种始终导通的特性，会使得漏磁所产生的电流尖峰传递到次级端，次级端也会相应的产生电流尖峰，容易对负载设备造成损坏。
本发明实施例中，可将谐振整流电路的次级端的二极管用场效应晶体管(MOS管)替换，已解决漏磁和耦合电流损耗的问题；还可在谐振整流电路的初级端增加一个电感以解决漏感问题。
图1是根据一示例性实施例示出的一种谐振整流装置的电路图，如图1所示，该装置包括：初级输入模块11、变压器T1及次级输出模块12。
其中，初级输入模块11将能量通过变压器T1传递到次级输出模块12。
初级输入模块11包括，串联于电压源Vin与地之间的第一MOS管S1和第二MOS管S2；连接于第一MOS管S1的源极和漏极之间的第一结电容Coss1；连接于第二MOS管S2的源极和漏极之间的第二结电容Coss2；连接于变压器T1初级线圈两端的第一电感Lm，第一电感Lm的一端通过第一电容Cr连接于第一MOS管S1和第二MOS管S2之间，第一电感Lm的另一端与地连接。
次级输出模块12包括：第三MOS管S3的源极与变压器T1次级线圈的一端连接，第四MOS管S4的源极与变压器T1次级线圈的另一端连接；第三MOS管S3的漏极与第四MOS管S4的漏极连接，并通过并联的第二电容CO和第一电阻RL连接于次级输出模块12的输出端。
本实施例中，将谐振整流装置的次级端中的整流二极管换成第三MOS管和第四MOS管，可以有效地断开次级端的回路，降低或者消除耦合对负载的影响，并且，本实施例电路中，初级端和次级端的MOS管打开时间是有先后顺序的，初级端的MOS管先打开后，延时一定时间次级端的MOS管才打开；而次级端的MOS管关断后，再延时一段时间初级端的MOS管才关断，有效地避免了漏磁对负载的影响。这样，通过将次级端中的整流二极管换成MOS管，实现了同步整流，提高转换效率，提高负载设备工作的稳定性，有效保护负载设备，避免负载设备被损坏，进一步提高了能量利用率，延长电量使用时间。并且，可以使用零电压切换技术，降低MOS管上的能量损耗。
图2是根据另一示例性实施例示出的一种谐振整流装置的电路图，如图2所示，可选的，初级输入模块11还包括：第二电感Lr。第一电感Lm的一端通过串联的第一电容Cr 和第二电感Lr连接于第一MOS管S1和第二MOS管S2之间。
在可选方案中，在初级端增加一个电感，可以弥补漏感造成的L值偏小，使得实际谐振频率等于或者大于理论谐振频率，让实际谐振点落在感性区域，已解决漏感问题，提高能量的转换效率。
图3是根据一示例性实施例示出的一种谐振整流装置的电路工作时序图，如图3所示，将该谐振整流装置的一个工作周期分为五个时间段。本发明还提供给一种谐振整流控制方法，用于控制谐振整流装置按照如图3所示的电路工作时序进行工作。将该谐振整流装置的一个工作周期划分为5个时间段，以下分别对每个时间段内的具体控制流程进行说明。
(一)第一时间段
图4是根据一示例性实施例示出的谐振整流装置的电流流向示意图，如图4所示，控制第一MOS管S1和第二场效应晶体S2管导通，控制第三MOS管S3截止，使得初级输出模块11从电源Vin接收能量。控制第三MOS管S3导通，使得初级输出模块11存储的能力通过变压器T1向次级输出模块12传递；控制第三MOS管S3先于第一MOS管S1截止，使得初级输出模块11不再向所次级输出模块12传递能量，次级输出模块12存储能量。
(二)第二时间段
图5是根据一示例性实施例示出的谐振整流装置的电流流向示意图，如图5所示，控制第一MOS管S1、第二MOS管S2、第三MOS管S3和第四MOS管S4截止，使得所述第二MOS管S2的第二结电容Coss2放电，第二MOS管S2在下一个导通周期处于零电压切换状态，此时第二电感Lr上的电流保持连续，对第一MOS管S1的第一结电容Coss1充电，直到第一结电容Coss1两端电压达到所述电源电压Vin，而第二结电容Coss2两端电压从Vin放到0。
MOS管的结电容Coss为VDS的函数，可知：
Figure PCTCN2015093852-appb-000004
其中C′OSS为MOS管在VDS＝V′oss条件下的结电容，可以通过MOS管制造商的资料手册中查知。
在第二时间段，整个电路处于ZVS状态。
(三)第三时间段
图6是根据一示例性实施例示出的谐振整流装置的电流流向示意图，如图6所示，控制第一MOS管S1、第二MOS管S2、第三MOS管S3和第四MOS管S4截止，使得初级输出模块11不再向次级输出模块12传递能量，次级输出模块12输出能量。
(四)第四时间段
图7是根据一示例性实施例示出的谐振整流装置的电流流向示意图，如图7所示，控制第二MOS管S2和第四MOS管S4相继导通，使得初级输出模块11向次级输出模块12传递能量，次级输出模块12存储能量。
由于第二MOS管S2的导通形成了回路，开始释放能量，第一电容Cr上的电压为
Figure PCTCN2015093852-appb-000005
当第四MOS管S4也导通时，能量从初级输出模块11经第四MOS管S4向次级输出模块12传递，同时给第二电容CO充电。
(五)第五时间段
图8是根据一示例性实施例示出的谐振整流装置的电流流向示意图，如图8所示，控制第一MOS管S1、第二MOS管S2、第三MOS管S3和第四MOS管S4截止，使得所述第一MOS管S1的第一结电容Coss1放电，第一MOS管S1在下一个导通周期处于零电压切换状态，同时，初级输出模块11由于电感的特性，电流不会突然消失，保证谐振电流的连续性。初级输出模块11向次级输出模块12传递能量，次级输出模块12输出能量。
在本实施例中，通过控制装置来控制谐振整流装置的MOS管交替导通，有效地避免了漏磁对负载的影响。通过将次级端中的整流二极管换成MOS管，实现了同步整流，提高转换效率，提高负载设备工作的稳定性，有效保护负载设备，避免负载设备被损坏。并且，可以使用零电压切换技术，降低MOS管上的能量损耗。另外，在初级端增加一个电感，可以弥补漏感造成的L值偏小，使得实际谐振频率等于或者大于理论谐振频率，让实际谐振点落在感性区域，已解决漏感问题，提高能量的转换效率。
可选的，方法还包括：
获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
Figure PCTCN2015093852-appb-000006
其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
可选的，所述第一场效应晶体管和第二场效应晶体管的导通时间大于所述第三场效应晶体管和第四场效应晶体管的导通时间。
图9是根据一示例性实施例示出的谐振整流装置的初级驱动信号和次级驱动信号的示意图，如图9所示，可选的，控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
例如，预设导通延迟时间和预设截止延迟时间可分别设定为初级驱动信号的脉宽的 10％。
在可选方案中，导通延迟是考虑初级半桥MOS管的开关延迟和占空比等因素，也即在电流值非正的情况下，次级驱动信号不能为高电平，否则会有逆电流回灌到初级。截止延迟是考虑次级同步整流MOS管的开关延迟，当电流仍在减小时，次级驱动信号要提前变低电平，否则会有逆电流回灌。
图10是根据一示例性实施例示出的一种谐振整流控制装置的框图。如图10所示，该装置包括第一控制模块101。
该第一控制模块101被配置为在一个工作周期的第一时间段，控制第一场效应晶体管和第二场效应晶体管导通，控制第三场效应晶体管截止，使得初级输出模块从电源接收能量；控制所述第三场效应晶体管导通，使得所述初级输出模块存储的能力通过变压器向次级输出模块传递；控制所述第三场效应晶体管先于所述第一场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第二时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第二场效应晶体管的第二结电容放电，第二场效应晶体管在下一个导通周期处于零电压切换状态，对所述第一场效应晶体管的第一结电容充电，直到所述第一结电容两端电压达到所述电源电压；
在所述工作周期的第三时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块输出能量；
在所述工作周期的第四时间段，控制第二场效应晶体管和第四场效应晶体管相继导通，使得所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块存储能量；
在所述工作周期的第五时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第一场效应晶体管的第一结电容放电，第一场效应晶体管在下一个导通周期处于零电压切换状态，所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块输出能量。
如图10所示，可选的，该装置还包括：
获取模块102被配置为获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
Figure PCTCN2015093852-appb-000007
其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
如图10所示，可选的，该装置还包括：
第二控制模块103被配置为控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号 的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
关于上述实施例中的装置，其中各个模块执行操作的具体方式已经在有关该方法的实施例中进行了详细描述，此处将不做详细阐述说明。
本实施例中的谐振整流控制装置，也可采用实际电路来实现上述功能，具体如下：
图11是根据一示例性实施例示出的一种谐振整流控制装置的电路结构图，如图11所示，而当谐振整流电路处于轻载或者空载模式时，控制电路必须采用变频的方式，维持高效率。因此，此时采用FM控制模式。当轻载或者空载时，控制电路输出电压Vout降低，经分压网络Rf1和Rf2，放大器A的正相输入端VFB的电压也会降低，此时A的输出端FEAO为低电平，低于模式选择电路内部基准电压，模式选择电路输出高电平到放大器C的反向输入端。放大器C此时输出的信号经过逻辑控制电路，逻辑控制电路选择FM控制模式。其实质是逻辑控制电路通过控制PGA来改变电荷泵的充放电时间常数，此时外接的CT/RT失效，CT/RT只决定最低的谐振频率；通过PGA来控制电荷泵的充放电，进而控制晶振所生成的锯齿波的斜率大小(前提是每个周期的储能相同)。内部的比较器和锯齿波比较，从而改变控制脉冲的频率，输出的四组驱动信号，分别驱动开关半桥MOS管，和次级的同步整流MOS管，实现FM控制。
当谐振整流电路的负载处于满载时，控制电路不需要变频，处于谐振频率状态，也即PWM控制模式。控制电路输出电压Vout的电压会升高，经分压网络Rf1和Rf2得到的放大器A正相输入端VFB端的电压也会升高，此时A的输出端FEAO为高电平。然后选择模式电路输出的电平与放大器C的反向输入端相接，其输出的控制信号在逻辑电路中选择PWM控制模式，与芯片内的晶振锯齿波比较，输出的四组驱动信号，分别驱动开关半桥MOS管，和次级的同步整流MOS管，实现PWM控制。当输出电流达到所设定的最大极限电流时，检测端ILIM所取样的电压值，与放大器D比较，放大器D控制逻辑电路内部的选择开关，也即控制电路的SD端口。该端口与地直接连接，从而控制电路的工作状态(停止工作或者继续工作)。
本领域技术人员在考虑说明书及实践这里公开的发明后，将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由下面的权利要求指出。
应当理解的是，本公开并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限制。

Claims (9)

  1. 一种谐振整流装置，其特征在于，包括：初级输入模块、次级输出模块及变压器，
    所述初级输入模块将能量通过所述变压器传递到所述次级输出模块；
    所述初级输入模块包括，串联于电压源与地之间的第一场效应晶体管和第二场效应晶体管；连接于第一场效应晶体管的源极和漏极之间的第一结电容；连接于第二场效应晶体管的源极和漏极之间的第二结电容；连接于所述变压器初级线圈两端的第一电感，所述第一电感的一端通过第一电容连接于所述第一场效应晶体管和第二场效应晶体管之间，所述第一电感的另一端与地连接；
    所述次级输出模块包括：第三场效应晶体管的源极与所述变压器次级线圈的一端连接，第四场效应晶体管的源极与所述变压器次级线圈的另一端连接；所述第三场效应晶体管的漏极与所述第四场效应晶体管的漏极连接，并通过并联的第二电容和第一电阻连接于所述次级输出模块的输出端。
  2. 根据权利要求1所述的装置，其特征在于，所述初级输入模块还包括：第二电感；
    所述第一电感的一端通过串联的第一电容和第二电感连接于所述第一场效应晶体管和第二场效应晶体管之间。
  3. 一种谐振整流控制方法，其特征在于，用于对所述述权利要求1或2的谐振整流装置进行控制，所述方法包括：
    在一个工作周期的第一时间段，控制第一场效应晶体管和第二场效应晶体管导通，控制第三场效应晶体管截止，使得初级输出模块从电源接收能量；控制所述第三场效应晶体管导通，使得所述初级输出模块存储的能力通过变压器向次级输出模块传递；控制所述第三场效应晶体管先于所述第一场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块存储能量；
    在所述工作周期的第二时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第二场效应晶体管的第二结电容放电，第二场效应晶体管在下一个导通周期处于零电压切换状态，对所述第一场效应晶体管的第一结电容充电，直到所述第一结电容两端电压达到所述电源电压；
    在所述工作周期的第三时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块输出能量；
    在所述工作周期的第四时间段，控制第二场效应晶体管和第四场效应晶体管相继导通，使得所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块存储能量；
    在所述工作周期的第五时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第一场效应晶体管的第一结电容放电，第一场效应晶体管在下一个导通周期处于零电压切换状态，所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块输出能量。
  4. 根据权利要求3所述的方法，其特征在于，所述方法还包括：
    获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
    Figure PCTCN2015093852-appb-100001
    其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
  5. 根据权利要求4所述的方法，其特征在于，所述第一场效应晶体管和第二场效应晶体管的导通时间大于所述第三场效应晶体管和第四场效应晶体管的导通时间。
  6. 根据权利要求3所述的方法，其特征在于，
    控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
  7. 一种谐振整流控制装置，其特征在于，用于对所述述权利要求1或2的谐振整流装置进行控制，所述装置包括：
    第一控制模块，用于在一个工作周期的第一时间段，控制第一场效应晶体管和第二场效应晶体管导通，控制第三场效应晶体管截止，使得初级输出模块从电源接收能量；控制所述第三场效应晶体管导通，使得所述初级输出模块存储的能力通过变压器向次级输出模块传递；控制所述第三场效应晶体管先于所述第一场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块存储能量；
    在所述工作周期的第二时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第二场效应晶体管的第二结电容放电，第二场效应晶体管在下一个导通周期处于零电压切换状态，对所述第一场效应晶体管的第一结电容充电，直到所述第一结电容两端电压达到所述电源电压；
    在所述工作周期的第三时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述初级输出模块不再向所述次级输出模块传递能量，所述次级输出模块输出能量；
    在所述工作周期的第四时间段，控制第二场效应晶体管和第四场效应晶体管相继导通，使得所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块存储能量；
    在所述工作周期的第五时间段，控制第一场效应晶体管、第二场效应晶体管、第三场效应晶体管和第四场效应晶体管截止，使得所述第一场效应晶体管的第一结电容放电，第一场效应晶体管在下一个导通周期处于零电压切换状态，所述初级输出模块向所述次级输出模块传递能量，所述次级输出模块输出能量。
  8. 根据权利要求7所述的装置，其特征在于，所述装置还包括：
    获取模块，用于获取所述第一场效应晶体管和第二场效应晶体管的导通时间，所述导通时间根据以下公式计算：
    Figure PCTCN2015093852-appb-100002
    其中，T为所述第一场效应晶体管和第二场效应晶体管的导通时间，Lr为所述初级输出模块中第二电感的电感值，Cr为所述初级输出模块中第一电容的电容值。
  9. 根据权利要求7所述的装置，其特征在于，所述装置还包括：
    第二控制模块，用于控制所述第三场效应晶体管和第四场效应晶体管的次级驱动信号的脉宽相对于控制所述第一场效应晶体管和第二场效应晶体管的初级驱动信号的脉宽延迟预设延迟时间，所述预设延迟时间包括：预设导通延迟时间和预设截止延迟时间，所述预设导通延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟导通，所述预设截止延迟时间用于控制所述第三场效应晶体管和第四场效应晶体管延迟截止。
PCT/CN2015/093852 2014-11-21 2015-11-05 一种谐振整流装置、谐振整流控制方法及装置 WO2016078515A1 (zh)

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