WO2016067799A1 - Procédé de production d'un film semi-conducteur à oxyde métallique, film semi-conducteur à oxyde métallique, transistor en couches minces et dispositif électronique - Google Patents

Procédé de production d'un film semi-conducteur à oxyde métallique, film semi-conducteur à oxyde métallique, transistor en couches minces et dispositif électronique Download PDF

Info

Publication number
WO2016067799A1
WO2016067799A1 PCT/JP2015/077296 JP2015077296W WO2016067799A1 WO 2016067799 A1 WO2016067799 A1 WO 2016067799A1 JP 2015077296 W JP2015077296 W JP 2015077296W WO 2016067799 A1 WO2016067799 A1 WO 2016067799A1
Authority
WO
WIPO (PCT)
Prior art keywords
oxide semiconductor
metal oxide
film
semiconductor film
metal
Prior art date
Application number
PCT/JP2015/077296
Other languages
English (en)
Japanese (ja)
Inventor
真宏 高田
Original Assignee
富士フイルム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士フイルム株式会社 filed Critical 富士フイルム株式会社
Priority to KR1020177010201A priority Critical patent/KR101967564B1/ko
Priority to JP2016556442A priority patent/JP6257799B2/ja
Publication of WO2016067799A1 publication Critical patent/WO2016067799A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/1201Manufacture or treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/14Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material, or by the simultaneous addition of the electroluminescent material in or onto the light source

Definitions

  • the present invention relates to a method for manufacturing a metal oxide semiconductor film, and a metal oxide semiconductor film, a thin film transistor, and an electronic device.
  • a metal oxide film as an oxide semiconductor film or an oxide conductor film has been put into practical use in production by a vacuum film forming method, and is currently attracting attention.
  • it is required to form a metal oxide semiconductor film at a low temperature. Therefore, research and development have been actively conducted on the production of an oxide semiconductor film by a liquid phase process for the purpose of forming an oxide semiconductor film having high semiconductor characteristics at low temperature and easily under atmospheric pressure. ing.
  • Recently, a method for manufacturing a thin film transistor (TFT) having high transport properties at a low temperature of 150 ° C. or lower by applying a solution on a substrate and using ultraviolet rays has been reported (see Non-Patent Document 1). ).
  • the thin film containing the precursor of the metal oxide semiconductor is formed by heating at about 150 ° C. to volatilize the solvent, and then in the presence of oxygen.
  • a method of manufacturing a metal oxide semiconductor by irradiating with ultraviolet light has been disclosed (see Patent Document 1).
  • Non-Patent Document 1 only the one containing indium in the metal oxide semiconductor film showed high transport characteristics, and the transistor operation was confirmed in the Zn—Sn—O system containing no indium. I reported that I could't. Patent Document 1 only describes a metal oxide semiconductor containing indium.
  • Non-Patent Document 2 reports an attempt to apply an annealing process combined with ultraviolet irradiation in the production of a Zn—Sn—O-based thin film that is a metal oxide semiconductor containing no indium.
  • Non-Patent Document 2 in order to realize a good transistor operation, an annealing treatment in combination with ultraviolet irradiation is performed, followed by an annealing treatment in a vacuum. It is necessary to apply. Therefore, there is a problem that the production cost increases.
  • An object of the present invention is to solve such problems of the prior art, and can be formed easily, at a low temperature, and under atmospheric pressure using an inexpensive material that does not contain indium, which is a rare metal.
  • An object of the present invention is to provide a metal oxide semiconductor film manufacturing method capable of forming an oxide semiconductor film having high semiconductor characteristics, and a metal oxide semiconductor film, a thin film transistor, and an electronic device.
  • the present inventor applied a solution containing zinc and tin as a solvent and metal components on a substrate to form a metal oxide semiconductor precursor film.
  • the total metal component in the semiconductor precursor film is zinc and tin, and the composition ratio of zinc and tin is 0.7 ⁇ Sn / (Sn + Zn) ⁇ 0.9, whereby indium
  • an oxide semiconductor film that can be easily formed at low temperature and under atmospheric pressure and has high semiconductor characteristics can be formed using an inexpensive material that does not include the present invention, and the present invention has been completed. That is, it has been found that the above object can be achieved by the following configuration.
  • [3] The method for producing a metal oxide semiconductor film according to [1] or [2], wherein the temperature of the substrate during ultraviolet irradiation is maintained at 250 ° C. or lower in the conversion step.
  • [4] The metal oxide according to any one of [1] to [3], wherein in the conversion step, the ultraviolet ray irradiated to the metal oxide semiconductor precursor film has an illuminance with a wavelength of 300 nm or less of 30 mW / cm 2 or more.
  • a method for manufacturing a semiconductor film [5] The method for producing a metal oxide semiconductor film according to any one of [1] to [4], wherein the conversion step is performed in an atmosphere containing 1% by volume or more of oxygen.
  • [6] The method for producing a metal oxide semiconductor film according to any one of [1] to [5], wherein 95% or more of all metal components in the metal oxide semiconductor precursor film are zinc and tin.
  • [7] The method for producing a metal oxide semiconductor film according to any one of [1] to [6], wherein the solution is obtained by dissolving a metal salt or metal halide of zinc and tin in a solvent.
  • [8] The method for producing a metal oxide semiconductor film according to any one of [1] to [7], wherein the solvent is methanol, methoxyethanol, or water.
  • an oxide having high semiconductor characteristics that can be easily formed at a low temperature and under atmospheric pressure using an inexpensive material that does not contain indium which is a rare metal.
  • a metal oxide semiconductor film manufacturing method capable of forming a semiconductor film, and a metal oxide semiconductor film, a thin film transistor, and an electronic device can be provided.
  • a numerical range expressed using “to” means a range including numerical values described before and after “to” as a lower limit value and an upper limit value.
  • the effect of improving the characteristics of the metal oxide semiconductor film by the ultraviolet irradiation treatment can be made extremely high by appropriately selecting the composition ratio of zinc and tin. Specifically, by appropriately selecting the composition ratio of zinc and tin, grain boundary formation and surface roughness increase accompanying crystallization of the metal oxide semiconductor film can be suppressed, and the carrier density can be appropriately set. Since the range can be controlled, the effect of improving the characteristics of the metal oxide semiconductor film by the ultraviolet irradiation treatment can be made extremely high.
  • a metal oxide semiconductor film having high electron transfer characteristics can be obtained at a low temperature process of 250 ° C. or less under atmospheric pressure using a material that does not contain indium which is a rare metal. .
  • the manufacturing method of the present invention can manufacture a metal oxide semiconductor film under atmospheric pressure, it is not necessary to use a large vacuum apparatus.
  • an inexpensive resin substrate with low heat resistance can be used.
  • An inexpensive material that does not contain indium, which is a rare metal, can be used. Accordingly, the manufacturing cost of the metal oxide semiconductor film can be significantly reduced.
  • a flexible electronic device such as a flexible display can be manufactured at low cost.
  • Metal oxide semiconductor precursor film forming step First, a solution (metal oxide semiconductor precursor solution) containing tin as a main component and at least zinc as a solvent and a metal component is prepared and applied onto a substrate to form a metal oxide semiconductor precursor film.
  • a solution metal oxide semiconductor precursor solution
  • 80% or more of all metal components in the film are zinc and tin, and zinc and tin
  • the composition ratio is 0.7 ⁇ Sn / (Sn + Zn) ⁇ 0.9.
  • the structure of the substrate may be a single layer structure or a laminated structure.
  • the substrate is not particularly limited, and for example, an inorganic substrate such as YSZ (Yttria-Stabilized Zirconia), glass, a resin substrate, or a composite material thereof can be used.
  • an inorganic substrate such as YSZ (Yttria-Stabilized Zirconia), glass, a resin substrate, or a composite material thereof can be used.
  • a resin substrate and a composite material thereof are preferable in terms of light weight and flexibility.
  • the resin substrate is preferably excellent in heat resistance, dimensional stability, solvent resistance, electrical insulation, workability, low air permeability, low moisture absorption, and the like.
  • the resin substrate may include a gas barrier layer for preventing permeation of moisture and oxygen, an undercoat layer for improving the flatness of the resin substrate and adhesion to the lower electrode, and the like.
  • the thickness of the substrate in the present invention is not particularly limited, but is preferably 50 ⁇ m or more and 500 ⁇ m or less.
  • the thickness of the substrate is 50 ⁇ m or more, the flatness of the substrate itself is further improved.
  • the thickness of the substrate is 500 ⁇ m or less, the flexibility of the substrate itself is further improved, and the use as a substrate for a flexible device becomes easier.
  • the metal oxide semiconductor precursor solution contains tin as a main component as a solvent and a metal component, and contains at least zinc.
  • the main component in the present invention means that 50% or more of the total metal components in the solution are occupied by tin, and may contain a small amount of other metal components as necessary.
  • the component ratio in the total metal components of zinc and tin is preferably 90% or more, and more preferably 95% or more.
  • the said solution may contain a small amount of indium of less than 5%, and 1% or less is more preferable.
  • the metal component in the solution is basically the same as the metal component in the metal oxide semiconductor precursor film. Therefore, in the present invention, the composition ratio of zinc and tin in the above solution is 0.7 ⁇ Sn / (Sn + Zn) ⁇ 0.9.
  • the solution in the present invention is obtained by weighing a solute as a raw material so that the solution has a desired concentration, and stirring and dissolving in a solvent.
  • the time for stirring and the temperature of the solution during stirring are not particularly limited as long as the solute is sufficiently dissolved.
  • the concentration of the metal component in the metal oxide semiconductor precursor solution can be arbitrarily selected according to the viscosity and the desired film thickness, but is 0.01 mol / L or more from the viewpoint of the flatness and productivity of the thin film. It is preferable that it is 1.0 mol / L or less.
  • the metal oxide semiconductor precursor solution After the metal oxide semiconductor precursor solution is applied on the substrate, it may be naturally dried to form a metal oxide semiconductor precursor film. However, the coating film is dried by heat treatment to obtain a metal oxide semiconductor precursor film. It is preferable. By drying, the fluidity of the coating film can be reduced, and the flatness of the finally obtained metal oxide semiconductor film can be improved. In addition, by selecting an appropriate drying temperature (35 ° C. or more and 100 ° C. or less), it is easy to finally obtain a metal oxide semiconductor film having higher electron transfer characteristics.
  • the method for the heat treatment is not particularly limited, and can be selected from hot plate heating, electric furnace heating, infrared heating, microwave heating, and the like.
  • the metal oxide semiconductor precursor film is converted into a metal oxide semiconductor film by performing an ultraviolet irradiation treatment in a state where the metal oxide semiconductor precursor film is heated.
  • 80% or more of all metal components in the film are zinc and tin, and the composition ratio of zinc and tin is 0.7 ⁇ Sn / (Sn + Zn). ) ⁇ 0.9, the effect of improving the characteristics of the metal oxide semiconductor film can be extremely enhanced by ultraviolet irradiation treatment at atmospheric pressure and at a low temperature of 250 ° C. or lower.
  • the substrate temperature in the conversion step into the metal oxide semiconductor film is preferably 250 ° C. or lower, and more preferably higher than 120 ° C. If the substrate temperature in the conversion step is 250 ° C. or less, an increase in thermal energy can be suppressed to reduce the manufacturing cost, and application to a resin substrate with low heat resistance can be facilitated. In addition, when the temperature is higher than 120 ° C., a metal oxide semiconductor film having high electron transfer characteristics can be obtained in a shorter time. Moreover, from the viewpoint of manufacturing cost and the viewpoint of application to a resin substrate, more than 120 ° C. and 200 ° C. or less are more preferable.
  • the heating means for the substrate in the conversion step is not particularly limited, and may be selected from hot plate heating, electric furnace heating, infrared heating, microwave heating, and the like.
  • the ultraviolet ray applied to the metal oxide semiconductor precursor film preferably has an illuminance with a wavelength of 300 nm or less of 30 mW / cm 2 or more, and more preferably 50 mW / cm 2 .
  • the illuminance is set to 30 mW / cm 2 or more, a metal oxide semiconductor film having high electron transfer characteristics can be obtained.
  • the upper limit of illumination intensity is 500 mW / cm ⁇ 2 > or less from a viewpoint of apparatus cost.
  • the ultraviolet irradiation in the conversion process may be performed until the metal oxide semiconductor precursor film is converted into the metal oxide semiconductor film.
  • the ultraviolet irradiation time is preferably 5 minutes or more and 120 minutes or less from the viewpoint of productivity.
  • the conversion step can be performed in the atmosphere under atmospheric pressure, and is preferably performed in an atmosphere containing 1% by volume or more of oxygen.
  • an atmosphere containing oxygen a metal oxide semiconductor film having high electron transfer characteristics can be easily obtained.
  • atmosphere is preferable from a viewpoint of production cost.
  • SIMS is known as an analytical method that can detect an element constituting an object with very high sensitivity, and collides beam-like ions (primary ions) with the object to be analyzed, and forms the object by collision. Ions are ionized (secondary ions). A constituent element and its amount are detected by mass analysis of the secondary ions.
  • the metal component in the metal oxide semiconductor film produced by the production method of the present invention is basically the same as the metal component in the metal oxide semiconductor precursor film. Therefore, 80% or more of all metal components in the metal oxide semiconductor film are zinc and tin, and the composition ratio of zinc and tin is 0.7 ⁇ Sn / (Sn + Zn) ⁇ 0.9.
  • the ratio of zinc and tin to the total metal components in the metal oxide semiconductor film, and the composition ratio of zinc and tin are determined by XPS measurement (X-ray photoelectron spectroscopy) on the surface of the metal oxide semiconductor film. The number of atoms of such metals can be measured and calculated as the ratio of zinc and tin, and the composition ratio of zinc and tin.
  • the metal oxide semiconductor film can be segmented and the ratio of zinc to tin and the composition ratio can be calculated by EDX measurement (energy dispersive X-ray spectroscopy) of a cross-sectional TEM (transmission electron microscope) of the film. .
  • a metal oxide semiconductor film manufactured using the manufacturing method of the present invention is used as an active layer of a thin film transistor.
  • the manufacturing method of the metal oxide semiconductor film of this invention and the metal oxide semiconductor film manufactured by it are not limited to the active layer of TFT.
  • the element structure of the TFT according to the present invention is not particularly limited, and is either a so-called reverse stagger structure (also referred to as a bottom gate type) or a stagger structure (also referred to as a top gate type) based on the position of the gate electrode. Also good.
  • a so-called reverse stagger structure also referred to as a bottom gate type
  • a stagger structure also referred to as a top gate type
  • either a so-called top contact type or bottom contact type may be used.
  • the top gate type is a form in which a gate electrode is disposed on the upper side of the gate insulating film and an active layer is formed on the lower side of the gate insulating film when the substrate on which the TFT is formed is the lowermost layer.
  • the bottom gate type is a form in which a gate electrode is disposed below the gate insulating film and an active layer is formed above the gate insulating film.
  • the bottom contact type is a mode in which the source / drain electrodes are formed before the active layer and the lower surface of the active layer is in contact with the source / drain electrodes.
  • the top contact type is the type in which the active layer is the source / drain. In this embodiment, the upper surface of the active layer is in contact with the source / drain electrodes.
  • FIG. 1 is a schematic diagram showing an example of a top contact type TFT according to the present invention having a top gate structure.
  • the above-described oxide semiconductor film is stacked as an active layer 14 on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 are disposed on the active layer 14 so as to be spaced apart from each other, and a gate insulating film 20 and a gate electrode 22 are sequentially stacked thereon.
  • FIG. 2 is a schematic view showing an example of a bottom contact type TFT according to the present invention having a top gate structure.
  • the source electrode 16 and the drain electrode 18 are disposed on one main surface of the substrate 12 so as to be separated from each other. Then, the above-described oxide semiconductor film, the gate insulating film 20, and the gate electrode 22 are sequentially stacked as the active layer.
  • FIG. 3 is a schematic view showing an example of a TFT according to the present invention having a bottom gate structure and a top contact type.
  • the gate electrode 22, the gate insulating film 20, and the above-described oxide semiconductor film as the active layer 14 are sequentially stacked on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 are spaced apart from each other on the surface of the active layer 14.
  • FIG. 4 is a schematic view showing an example of a bottom contact type TFT according to the present invention having a bottom gate structure.
  • the gate electrode 22 and the gate insulating film 20 are sequentially stacked on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 are disposed on the surface of the gate insulating film 20 so as to be spaced apart from each other, and the above-described oxide semiconductor film is stacked thereon as the active layer 14.
  • the top gate type thin film transistor 10 shown in FIG. 1 will be mainly described.
  • the thin film transistor of the present invention is not limited to the top gate type and may be a bottom gate type thin film transistor.
  • the metal oxide semiconductor film is formed on the substrate 12 through the above-described metal oxide semiconductor precursor film forming step and conversion step, and the metal oxide semiconductor film is used as an active layer. Pattern to the shape.
  • a metal oxide semiconductor precursor film having an active layer pattern is formed in advance by any of the above-described inkjet method, dispenser method, letterpress printing method, and intaglio printing method, and converted to a metal oxide semiconductor film. Is preferred.
  • a protective film (not shown) on the active layer 14 for protecting the active layer 14 when the source / drain electrodes 16 and 18 are etched.
  • the protective film may be formed continuously with the metal oxide semiconductor film, or may be formed after patterning of the metal oxide semiconductor film.
  • the protective film may be a metal oxide layer or an organic material such as a resin. The protective layer may be removed after forming the source / drain electrodes.
  • Source / drain electrodes 16 and 18 are formed on the active layer 14.
  • Source / drain electrodes are made of high conductivity so as to function as electrodes, respectively, such as Al, Mo, Cr, Ta, Ti, Au, Ag, etc., Al—Nd, Ag alloy, tin oxide, zinc oxide
  • a metal oxide conductor thin film such as indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), or In—Ga—Zn—O can be used.
  • the source / drain electrodes 16 and 18 are formed by, for example, a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method.
  • the film may be formed according to a method appropriately selected in consideration of suitability with the material to be used.
  • the film thickness of each electrode is preferably 10 nm or more and 1000 nm or less, and more preferably 50 nm or more and 100 nm or less in consideration of film forming properties, patterning properties by etching or lift-off methods, conductivity, and the like.
  • the source / drain electrodes 16 and 18 may be formed by patterning into a predetermined shape by an etching or lift-off method, or may be directly formed by an inkjet method or the like. At this time, it is preferable to pattern all layers of the source / drain electrodes 16 and 18 and wirings connected to these electrodes simultaneously.
  • the gate insulating film 20 After forming the source / drain electrodes 16 and 18 and the wiring, the gate insulating film 20 is formed.
  • the gate insulating film 20 preferably has a high insulating property.
  • an insulating film such as SiO 2 , SiNx, SiON, Al 2 O 3 , Y 2 O 3 , Ta 2 O 5 , HfO 2 , or a compound thereof is at least used. It may be an insulating film including two or more, and may have a single layer structure or a laminated structure.
  • the gate insulating film 20 is a material used from a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method or an ion plating method, or a chemical method such as CVD or plasma CVD method.
  • the film can be formed according to a method appropriately selected in consideration of the suitability of
  • the gate insulating film 20 needs to have a thickness for reducing leakage current and improving voltage resistance. On the other hand, if the gate insulating film 20 is too thick, the driving voltage is increased.
  • the thickness of the gate insulating film 20 is preferably 10 nm to 10 ⁇ m, more preferably 50 nm to 1000 nm, and particularly preferably 100 nm to 400 nm.
  • the gate electrode 22 is a material used from, for example, a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method.
  • the film is formed according to a method appropriately selected in consideration of the suitability of
  • the film thickness of the gate electrode 22 is preferably 10 nm or more and 1000 nm or less, and more preferably 50 nm or more and 200 nm or less in consideration of film forming properties, patterning properties by etching or lift-off methods, conductivity, and the like.
  • the gate electrode 22 may be formed by patterning into a predetermined shape by an etching or lift-off method, or the pattern may be directly formed by an inkjet method or the like. At this time, it is preferable to pattern the gate electrode 22 and the wiring connected to the gate electrode 22 simultaneously.
  • the use of the thin film transistor of the present invention described above is not particularly limited, but exhibits high transport characteristics. Therefore, for example, an electro-optical device (for example, a liquid crystal display device, an organic EL (Electro Luminescence) display device, an inorganic EL display device, etc.) In a display device, etc.), and a flexible display formed on a resin substrate having low heat resistance. Furthermore, the thin film transistor of the present invention is suitably used as a driving element (driving circuit) in various electronic devices such as various sensors such as an X-ray sensor and MEMS (Micro Electro Mechanical System).
  • driving element driving circuit
  • various electronic devices such as various sensors such as an X-ray sensor and MEMS (Micro Electro Mechanical System).
  • FIG. 5 shows a schematic sectional view of a part of an example of a liquid crystal display device using the thin film transistor of the present invention
  • FIG. 6 shows a schematic configuration diagram of electrical wiring.
  • the liquid crystal display device 100 of the present embodiment includes a plurality of gate wirings 113 that are parallel to each other and data wirings 114 that are parallel to each other and intersect the gate wirings 113.
  • the gate wiring 113 and the data wiring 114 are electrically insulated.
  • the TFT 10 is provided in the vicinity of the intersection between the gate wiring 113 and the data wiring 114.
  • the gate electrode 22 of the TFT 10 is connected to the gate wiring 113, and the source electrode 16 of the TFT 10 is connected to the data wiring 114.
  • the drain electrode 18 of the TFT 10 is connected to the pixel lower electrode 104 through a contact hole 116 provided in the gate insulating film 20 (a conductor is embedded in the contact hole 116).
  • the pixel lower electrode 104 forms a capacitor 118 together with the grounded counter upper electrode 106.
  • FIG. 7 shows a schematic sectional view of a part of an example of an active matrix organic EL display device using the thin film transistor of the present invention
  • FIG. 8 shows a schematic configuration diagram of electric wiring.
  • the upper electrode 210 may be a top emission type using a transparent electrode, or the bottom electrode 208 and each TFT electrode may be a transparent electrode.
  • FIG. 9 shows a schematic sectional view of a part of an example of an X-ray sensor using the thin film transistor of the present invention
  • FIG. 10 shows a schematic configuration diagram of its electric wiring.
  • the X-ray sensor 300 of this embodiment includes the TFT 10 and the capacitor 310 formed on the substrate 12, the charge collection electrode 302 formed on the capacitor 310, the X-ray conversion layer 304, and the upper electrode 306. Composed.
  • a passivation film 308 is provided on the TFT 10.
  • the capacitor 310 has a structure in which an insulating film 316 is sandwiched between a capacitor lower electrode 312 and a capacitor upper electrode 314.
  • the capacitor upper electrode 314 is connected to one of the source electrode 16 and the drain electrode 18 (the drain electrode 18 in FIG. 9) of the TFT 10 through a contact hole 318 provided in the insulating film 316.
  • the charge collection electrode 302 is provided on the capacitor upper electrode 314 in the capacitor 310 and is in contact with the capacitor upper electrode 314.
  • the X-ray conversion layer 304 is a layer made of amorphous selenium, and is provided so as to cover the TFT 10 and the capacitor 310.
  • the upper electrode 306 is provided on the X-ray conversion layer 304 and is in contact with the X-ray conversion layer 304.
  • X-rays enter from the upper electrode 306 side in FIG. 9 and generate electron-hole pairs in the X-ray conversion layer 304.
  • the generated charge is accumulated in the capacitor 310 and read out by sequentially scanning the TFT 10.
  • a TFT having a top gate structure is provided in the liquid crystal display device 100, the organic EL display device 200, and the X-ray sensor 300 of the above embodiment.
  • the TFT is not limited to this, and FIGS. A TFT having the structure shown in FIG.
  • a metal oxide semiconductor precursor film is formed by applying the following solution on the substrate to form a metal oxide semiconductor precursor film, and then irradiating the metal oxide semiconductor precursor film with ultraviolet rays in a heated state.
  • a metal oxide semiconductor film was formed by converting to a metal oxide semiconductor film.
  • substrate A p-type silicon substrate with a thermal oxide film was used as the substrate.
  • the thermal oxide film of this substrate was used as the gate insulating film of the TFT.
  • the prepared solution was spin-coated on a p-type silicon 1 inch ⁇ 1 inch substrate with a thermal oxide film at a rotational speed of 5000 rpm for 30 seconds, and then dried on a hot plate heated to 60 ° C. for 5 minutes.
  • Ultraviolet illuminance with a peak wavelength of 254 nm at the sample position is measured using a UV integrating light meter (manufactured by Hamamatsu Photonics Co., Ltd., controller C9536, sensor head H9536-254, having spectral sensitivity in the range of over 200 nm to about 300 nm). It was 51 mW / cm 2 when measured.
  • a source / drain electrode was formed on the metal oxide semiconductor film obtained above by vapor deposition, thereby producing a simple TFT.
  • the source / drain electrodes were formed by pattern film formation using a metal mask, and Ti was formed to a thickness of 50 nm.
  • the source / drain electrode size was 1 mm ⁇ 1 mm, respectively, and the distance between the electrodes was 0.2 mm.
  • Example 2 The solution was prepared by setting the mixing ratio of the tin chloride solution and the zinc acetate solution to 7: 3, and the composition ratio Sn / (Sn + Zn) of zinc and tin of the metal oxide semiconductor precursor film was set to 0.7.
  • a simple TFT was fabricated by forming a metal oxide semiconductor film in the same manner as in Example 1.
  • Example 3 A simple TFT was produced by forming a metal oxide semiconductor film in the same manner as in Example 1 except that the substrate temperature during the ultraviolet irradiation treatment in the conversion step was 230 ° C.
  • Example 4 A simple TFT was produced by forming a metal oxide semiconductor film in the same manner as in Example 1 except that the ultraviolet light illuminance during the ultraviolet irradiation treatment in the conversion step was 80 mW / cm 2 .
  • Example 5 A simple TFT was produced by forming a metal oxide semiconductor film in the same manner as in Example 1 except that the metal oxide semiconductor precursor solution shown below was used.
  • Gallium nitrate (Ga (NO 3 ) 3 xH 2 O, 5N, manufactured by Kojundo Chemical Laboratory Co., Ltd.) and indium nitrate (In (NO 3 ) 3 xH 2 O, 4N, manufactured by Kojundo Chemical Laboratory Co., Ltd.) )
  • 2-methoxyethanol (reagent special grade, manufactured by Wako Pure Chemical Industries, Ltd.) to prepare 0.3 mol / L gallium nitrate solution and indium nitrate solution, and then gallium nitrate solution and nitric acid solution
  • the gallium indium mixed solution was prepared by mixing the indium solution at a ratio of 1: 4.
  • the metal oxide semiconductor precursor is prepared by mixing the solution of the zinc / tin composition ratio Sn / (Sn + Zn) 0.9 used in Example 1 and the gallium indium mixed solution in a ratio of 4: 1.
  • a body solution was prepared. That is, in the above solution, the ratio of zinc and tin is 80%, and the composition ratio Sn / (Sn + Zn) between zinc and tin is 0.9.
  • Example 6 Except that the mixing ratio of the zinc / tin composition ratio Sn / (Sn + Zn) 0.9 used in Example 1 and the gallium indium mixed solution was 9: 1, the same procedure as in Example 5 was performed. A metal oxide semiconductor precursor solution was prepared, a metal oxide semiconductor film was formed, and a simple TFT was produced. That is, in the above solution, the ratio of zinc and tin is 90%, and the composition ratio Sn / (Sn + Zn) between zinc and tin is 0.9.
  • Example 2 The solution was prepared by setting the mixing ratio of the tin chloride solution and the zinc acetate solution to 6: 4, except that the composition ratio Sn / (Sn + Zn) of zinc and tin of the metal oxide semiconductor precursor film was 0.6.
  • a simple TFT was fabricated by forming a metal oxide semiconductor film in the same manner as in Example 1.
  • Example 3 A simple TFT was fabricated by forming a metal oxide semiconductor film in the same manner as in Example 1 except that no ultraviolet irradiation was performed in the conversion step.
  • the simple TFT of the example provided with the metal oxide semiconductor film manufactured by the manufacturing method of the present invention has a large linear mobility and high semiconductor characteristics as compared with the simple TFT of the comparative example.
  • the composition ratio of zinc and tin of the metal oxide semiconductor precursor film is in the range of 0.7 ⁇ Sn / (Sn + Zn) ⁇ 0.9. It can be seen that the linear mobility can be increased. Moreover, it can be seen from the comparison between Example 1 and Examples 5 and 6 that the higher the ratio of tin and zinc in all metal components, the greater the linear mobility.
  • linear mobility does not change even if the illumination intensity of the ultraviolet-ray in a conversion process is enlarged from the comparison with Example 1 and Example 4.
  • FIG. This shows that it is sufficient to irradiate ultraviolet rays having sufficient illuminance to convert the metal oxide semiconductor precursor film. It can also be seen from Examples 1 to 4 that the linear mobility can be increased even by heating at a low temperature of 250 ° C. or lower.
  • Comparative Example 1 and Comparative Example 4 both show the behavior of the conductor, but Comparative Example 4 in which ultraviolet irradiation is not performed is more than Comparative Example 1 in which ultraviolet irradiation is performed. It can be seen that the electron transfer characteristics are higher. From this, it can be seen that in order to obtain the effect of the ultraviolet irradiation treatment, it is necessary to appropriately select the range of the composition ratio of zinc and tin. From the above, the effects of the present invention are clear.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

L'invention concerne : un procédé de production d'un film semi-conducteur à oxyde métallique, qui permet de former simplement un film semi-conducteur à oxyde comportant des caractéristiques élevées de semi-conducteur à basse température et à pression atmosphérique au moyen d'un matériau peu coûteux exempt d'indium, qui est un métal rare ; un film semi-conducteur à oxyde métallique ; un transistor en couches minces ; et un dispositif électronique. Ce procédé de production d'un film semi-conducteur à oxyde métallique consiste à : former, dans une étape de formation de film précurseur, un film précurseur de semi-conducteur à oxyde métallique par l'application d'une solution qui contient du zinc et de l'étain en tant que composants métalliques, et un solvant, sur un substrat ; et convertir, dans une étape de conversion, le film précurseur de semi-conducteur à oxyde métallique en un film semi-conducteur à oxyde métallique par l'exposition du film précurseur de semi-conducteur à oxyde métallique à une lumière ultraviolette, pendant que le film précurseur de semi-conducteur à oxyde métallique est chauffé. Au moins 80% de tous les composants métalliques du film précurseur de semi-conducteur à oxyde métallique sont constitués de zinc et d'étain, et le rapport de composition du zinc et de l'étain satisfait la relation 0,7 ≤ Sn/(Sn + Zn) ≤ 0,9.
PCT/JP2015/077296 2014-10-27 2015-09-28 Procédé de production d'un film semi-conducteur à oxyde métallique, film semi-conducteur à oxyde métallique, transistor en couches minces et dispositif électronique WO2016067799A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020177010201A KR101967564B1 (ko) 2014-10-27 2015-09-28 금속 산화물 반도체막의 제조 방법과, 금속 산화물 반도체막, 박막 트랜지스터 및 전자 디바이스
JP2016556442A JP6257799B2 (ja) 2014-10-27 2015-09-28 金属酸化物半導体膜、薄膜トランジスタおよび電子デバイス

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014218391 2014-10-27
JP2014-218391 2014-10-27

Publications (1)

Publication Number Publication Date
WO2016067799A1 true WO2016067799A1 (fr) 2016-05-06

Family

ID=55857145

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/077296 WO2016067799A1 (fr) 2014-10-27 2015-09-28 Procédé de production d'un film semi-conducteur à oxyde métallique, film semi-conducteur à oxyde métallique, transistor en couches minces et dispositif électronique

Country Status (4)

Country Link
JP (1) JP6257799B2 (fr)
KR (1) KR101967564B1 (fr)
TW (1) TWI663652B (fr)
WO (1) WO2016067799A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017152540A (ja) * 2016-02-24 2017-08-31 日本放送協会 塗布型酸化物半導体、薄膜トランジスタ、表示装置および塗布型酸化物半導体の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258057A (ja) * 2009-04-22 2010-11-11 Konica Minolta Holdings Inc 金属酸化物半導体、その製造方法、及びそれを用いた薄膜トランジスタ
JP2012253331A (ja) * 2011-05-11 2012-12-20 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP2013531383A (ja) * 2010-07-02 2013-08-01 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. 薄膜トランジスタ
JP2014516453A (ja) * 2011-01-28 2014-07-10 ノースウェスタン ユニバーシティ 金属酸化物薄膜およびナノ材料から誘導される金属複合薄膜の低温製造

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2009011224A1 (ja) 2007-07-18 2010-09-16 コニカミノルタホールディングス株式会社 金属酸化物半導体の製造方法、それにより得られた薄膜トランジスタ

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258057A (ja) * 2009-04-22 2010-11-11 Konica Minolta Holdings Inc 金属酸化物半導体、その製造方法、及びそれを用いた薄膜トランジスタ
JP2013531383A (ja) * 2010-07-02 2013-08-01 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. 薄膜トランジスタ
JP2014516453A (ja) * 2011-01-28 2014-07-10 ノースウェスタン ユニバーシティ 金属酸化物薄膜およびナノ材料から誘導される金属複合薄膜の低温製造
JP2012253331A (ja) * 2011-05-11 2012-12-20 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017152540A (ja) * 2016-02-24 2017-08-31 日本放送協会 塗布型酸化物半導体、薄膜トランジスタ、表示装置および塗布型酸化物半導体の製造方法

Also Published As

Publication number Publication date
TWI663652B (zh) 2019-06-21
KR20170051519A (ko) 2017-05-11
TW201616578A (zh) 2016-05-01
KR101967564B1 (ko) 2019-04-09
JP6257799B2 (ja) 2018-01-10
JPWO2016067799A1 (ja) 2017-08-17

Similar Documents

Publication Publication Date Title
JP6180908B2 (ja) 金属酸化物半導体膜、薄膜トランジスタ、表示装置、イメージセンサ及びx線センサ
JP6117124B2 (ja) 酸化物半導体膜及びその製造方法
JP6181306B2 (ja) 金属酸化物膜の製造方法
JP6246952B2 (ja) 酸化物保護膜の製造方法、及び薄膜トランジスタの製造方法
US9779938B2 (en) Metal oxide thin film, method of producing same, and coating solution for forming metal oxide thin film used in said method
JP6096102B2 (ja) 金属酸化物半導体膜の製造方法
JP6177711B2 (ja) 金属酸化物膜の製造方法、金属酸化物膜、薄膜トランジスタ、及び電子デバイス
JP6061831B2 (ja) 金属酸化物膜の製造方法及び薄膜トランジスタの製造方法
JP6257799B2 (ja) 金属酸化物半導体膜、薄膜トランジスタおよび電子デバイス
JP6271760B2 (ja) 金属酸化物膜の製造方法及び薄膜トランジスタの製造方法
JP6195986B2 (ja) 金属酸化物半導体膜の製造方法及び薄膜トランジスタの製造方法
JP6086854B2 (ja) 金属酸化物膜の製造方法、金属酸化物膜、薄膜トランジスタ、表示装置、イメージセンサ及びx線センサ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15854917

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2016556442

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20177010201

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15854917

Country of ref document: EP

Kind code of ref document: A1