WO2015169142A1 - 一种多值相变存储器单元 - Google Patents

一种多值相变存储器单元 Download PDF

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Publication number
WO2015169142A1
WO2015169142A1 PCT/CN2015/076515 CN2015076515W WO2015169142A1 WO 2015169142 A1 WO2015169142 A1 WO 2015169142A1 CN 2015076515 W CN2015076515 W CN 2015076515W WO 2015169142 A1 WO2015169142 A1 WO 2015169142A1
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phase change
material layer
change material
heating electrode
electrode
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French (fr)
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胡晓程
魏益群
楼海君
林信南
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Peking University Shenzhen Graduate School
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Peking University Shenzhen Graduate School
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching

Definitions

  • the present invention relates to the field of semiconductor memory technologies, and in particular, to a multi-value phase change memory unit.
  • Phase change memory is a solid-state semiconductor non-volatile memory with high density, low power consumption, high speed and stable performance. It is considered to be one of the strong competitors of next-generation memory technology. Depending on the application, a high density phase change memory is required to achieve as much storage capacity as possible within a certain area. In order to achieve the same memory array to store more states, the technique of multi-value storage is applied to the phase change memory. By increasing the logical number of individual memory cells, the information storage density can be greatly improved, thereby effectively increasing the storage capacity of the phase change memory.
  • FIGS. 1 and 2 there are various structures for multi-value storage, such as the multi-valued phase change memory cell structure shown in FIGS. 1 and 2.
  • the structure shown in Figure 1 has only one heating electrode.
  • A11 is the substrate
  • A12 is the bottom electrode
  • A14 is the phase change material layer
  • A15 is the top electrode
  • A16 and A17 are the electrodes for connecting the external circuit
  • A13 is Insulation
  • A18 is the metal used to connect A12 and A16.
  • the phase change memory of FIG. 1 since there is only one heating electrode, and the phase change material is in direct contact, the atoms are intermingled, and the device is unstable. As shown in FIG.
  • A21 is a substrate
  • A22 is a heat insulating layer
  • A23 and A25 are phase change material layers
  • A24 is a barrier layer
  • A26 is a metal electrode.
  • a barrier layer is added in the middle of the phase change material, and the different thickness of the barrier layer may fluctuate the performance of the device.
  • the contact layer may have contact problems with the phase change material. .
  • the present invention provides a multi-valued phase change memory cell including a phase change material layer, a heating electrode, a top electrode, a bottom electrode, and a heat insulating material layer, the phase change material layer including a first phase change material layer and a second phase change material layer, the heating electrode comprising a first heating electrode and a second heating electrode; the top electrode is located at the top of the first heating electrode, and the bottom of the first heating electrode is connected to the first phase transition a top of the material layer, a bottom of the first phase change material layer is connected to a top of the second phase change material layer, a bottom of the second phase change material layer is connected to the second heating electrode, and the bottom electrode is located The bottom of the second heating electrode, the layer of insulating material wraps the phase change material layer and the heating electrode.
  • an area of the first heating electrode that is in contact with the first phase change material layer is different from an area of the second heating electrode that is in contact with the second phase change material layer.
  • the shape of the first heating electrode and the second heating electrode are both cylindrical, and the radius of the first heating electrode is different from the radius of the second heating electrode.
  • the material of the first phase change material layer is a GeTe phase change material
  • the material of the second phase change material layer is a Ge 2 Sb 2 Te 5 phase change material
  • the radius of the first heating electrode is smaller than The radius of the second heating electrode is described.
  • an area of the first heating electrode in contact with the first phase change material layer is smaller than an area of the first phase change material layer, and the second heating electrode and the first phase change material The area in which the layers are in contact is smaller than the area of the second phase change material layer.
  • first phase change material layer and the second phase change material layer are formed of different metal sulfides.
  • the material of the heating electrode is a metal nitride.
  • the material of the top electrode and the bottom electrode includes tungsten or aluminum.
  • the material of the heat insulating material layer is silicon dioxide.
  • the novel multi-valued phase change memory cell of the present invention is made of a phase change material of a stacked structure and two heating electrodes respectively connected to opposite ends of the phase change material, so that the first phase change material layer and the current pulse are
  • the second phase change material layer undergoes a phase change in sequence, resulting in a crystalline state, a crystalline state, a crystalline state, an amorphous state, an amorphous state, an amorphous state, and the like, which provides a possibility for realizing multi-value storage.
  • the different phase change materials are sequentially phase-changed by the first heating electrode and the second heating electrode of different sizes, and the temperature of the boundary of the two phase change materials is maintained at a low temperature throughout the operation, due to the mutual impurity
  • the degree of temperature is affected by the temperature, thus providing the possibility of preventing atomic impurities, thereby enhancing the stability of the device operation.
  • 1 and 2 are schematic structural diagrams of a conventional multi-value phase change memory unit
  • FIG. 3 is a schematic diagram of a two-dimensional axisymmetric of a multi-valued phase change memory cell according to an embodiment of the present invention
  • FIG. 5 is a control group of a multi-valued phase change memory cell according to an embodiment of the present invention, wherein a temperature distribution on a symmetry axis of a material changes with current density during a RESET process;
  • FIG. 6 is an R-I curve of a multi-valued phase change memory cell in a RESET process according to an embodiment of the present invention.
  • the embodiment provides a multi-value phase change memory unit including a top electrode, a first heating electrode, a first phase change material layer, a second phase change material layer, a second heating electrode, a bottom electrode, and a heat insulating material layer, wherein
  • the top electrode is located at the top of the first heating electrode, the bottom of the first heating electrode is connected to the top of the first phase change material layer, the bottom of the first phase change material layer is connected to the top of the second phase change material layer, and the second phase change material
  • the bottom of the layer is connected to the second heating electrode, the bottom electrode is located at the bottom of the second heating electrode, and the layer of insulating material surrounds the first heating electrode, the first phase change material layer, the second phase change material layer and the second heating electrode.
  • the first phase change material layer and the second phase change material layer may be formed of different metal sulfides, for example, the material of the first phase change material layer is Ge 2 Sb 2 Te 5 phase change material (referred to as GST for short). Material), the material of the second phase change material layer is GeTe phase change material (referred to as GT material).
  • the material of the first heating electrode and the second heating electrode may be a metal nitride.
  • the material of the top electrode and the bottom electrode may be tungsten or aluminum.
  • the material of the heat insulating material layer is silicon dioxide.
  • the area of the first heating electrode in contact with the first phase change material layer is smaller than the area of the first phase change material layer
  • the area of the second heating electrode in contact with the first phase change material layer is smaller than the first The area of the two phase change material layer.
  • phase change regions of the first phase change material layer and the second phase change material layer of the present embodiment are far away from the material interface, thereby avoiding atomic mismatch to a maximum extent.
  • this embodiment removes the barrier layer compared to the multi-value phase change memory cell of FIG. 2 having no electrode structure.
  • the difference between the embodiment and the embodiment 1 is that the size of the first heating electrode and the second heating electrode is limited, that is, the area of the first heating electrode that is in contact with the first phase change material layer and the second The area of the heating electrode that is in contact with the second phase change material layer is different.
  • the basis for this limitation is that the smaller the contact surface, the larger the current, the more obvious the heating effect; thus, the first phase change material layer and the second phase change material layer can maintain the sequential phase change without the presence of the first phase change material layer.
  • the second phase change material layer When the phase change region is close to the interface between the first phase change material layer and the second phase change material layer, the second phase change material layer has no phase change or has undergone phase change but the phase change region is small and insufficient to cover the electrode, thereby It effectively prevents the mutual impurity between the interfaces of the two phase change materials, thereby enhancing the stability of the operation of the device; in addition, since the phase change region is small, the power consumption can be reduced.
  • the shape of the first heating electrode and the second heating electrode are both cylindrical (of course, the heating electrode may also have other shapes, such as a rectangular parallelepiped, etc.) as an example for stacking multi-value phase transition of the asymmetric double electrode of the present embodiment.
  • the memory cell is described in detail, and it is apparent that the radius of the first heating electrode is different from the radius of the second heating electrode.
  • the material of the first phase change material layer is GT material
  • the material of the second phase change material layer is GST material. Since the melting point of the GST material is low, the phase transition temperature is relatively small, and the melting point determines the crystalline state to the amorphous state. The change, the phase transition temperature determines the change from amorphous to crystalline. If the radius is small, the phase change will be faster. Therefore, in this case, the radius of the GST material must be large, that is, the first phase change.
  • the radius of the material layer is less than the radius of the second phase change material layer.
  • FIG. 3 The two-dimensional axisymmetric schematic diagram of the multi-valued phase change memory cell of this example is shown in FIG. 3, which includes a top electrode 101, a heat insulating layer 102, a GT end heating electrode 103, a GT phase change material 104, and a GST in order from top to bottom.
  • the phase change material 105, the GST end heating electrode 106 and the bottom electrode 107, the heat insulating material encloses the phase change material and the heating electrode.
  • the heating electrode material may be TiN
  • the top electrode and bottom electrode material may be W.
  • the performance of the multi-valued phase change memory cell of this example is studied based on COMSOL finite element software simulation.
  • the device is studied in RESET. Phase transitions during operation.
  • the thickness of the phase change material is 100 nm and the radius is 300 nm; the radius of the heating electrode of the GT end is smaller than the radius of the heating electrode of the GST end, which are 11 nm and 40 nm, respectively, and the length is 200 nm; the top electrode and the bottom The electrode has a thickness of 200 nm and a radius of 450 nm.
  • a normal current density is applied to the top electrode and the bottom electrode is grounded.
  • Figures 4a-4d show the phase distributions solved by the temperature distribution when the current densities J are 5.5e 8 , 6.5e 8 , 7.5e 8 , 8.5e 8 A/m 2 , respectively.
  • the phase change occurs first at the GST end, the phase change region gradually increases and covers the heating electrode; then the GT terminal begins to phase change, and the phase change region gradually covers the end heating electrode.
  • the phase change material of the stack structure can be phase-transformed under the action of the asymmetric heating electrode, and multi-value storage can be realized.
  • the phase change region of the device is mushroom type, so the phase change region is smaller and the power consumption is lower than that of the device without the heating electrode.
  • the atomic mutual impurity level of the material interface is mainly affected by temperature.
  • the temperature is a predetermined value, for example, 673K, the degree of mutual impurity is very slight.
  • This temperature value serves as a reference point for the degree of mutual impurity.
  • the multi-value phase change memory cell of the stacked structure without barrier layer in this example can maintain the temperature at the interface of the phase change material at a low level during the RESET operation due to the asymmetric heating electrode.
  • the degree of mutual impurity at the interface of the phase change material is also low, which makes it possible to completely suppress the mutual impurity degree of the atom.
  • the lowest point of all curve temperatures is at the material interface, and the interface temperature increases with increasing current density, but is always maintained at a low level.
  • the heating electrode can effectively lower the interface temperature compared to a device without a heating electrode.
  • the atomic impurity is at a very slight level, so the structure can effectively suppress the operation.
  • the atoms are mixed and improve the stability of the device operation.
  • the device needs to have a stable intermediate resistance.
  • the current window corresponding to the intermediate resistance is the threshold current difference between the two resistance changes.
  • the large current window can ensure the stability of the intermediate resistance and reasonable programming current design.
  • Figure 6 shows the RI curve of the device unit during the entire RESET process. It can be seen that as the current increases, the resistance of the device unit has two sudden rises, and the intermediate resistance is relatively flat.
  • the current window is about 0.125 mA.
  • the stacked dual-electrode stacked multi-valued phase change memory cell of this example can realize multi-value storage and is easy to perform external circuit programming.
  • the phase change memory of the embodiment adopts an asymmetric double heating electrode stacking structure, and the phase change material undergoes phase change in sequence under the action of the electrode, forming three resistance states of low, medium and high, and can realize multi-value storage. Moreover, it is possible to ensure that the temperature at the interface of the phase change material is maintained at a low level without using a barrier layer, thereby suppressing atomic diffusion at the interface and ensuring stable multi-value storage performance of the device; and the asymmetric double electrode can Concentrating the phase change region at the interface between the phase change material and the heating electrode can reduce power consumption and provide a new idea and solution for further development of phase change memory multi-value storage.

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Abstract

一种多值相变存储器单元，包括相变材料层（104、105）、加热电极（103、106）、顶电极（101）、底电极（107）和隔热材料层（102），相变材料层（104、105）包括第一相变材料层（104）和第二相变材料层（105），加热电极（103、106）包括第一加热电极（103）和第二加热电极（106）；顶电极（101）位于第一加热电极（103）的顶部，第一加热电极（103）的底部接第一相变材料层（104）的顶部，第一相变材料层（104）的底部接第二相变材料层（105）的顶部，第二相变材料层（105）的底部接第二加热电极（106），底电极（107）位于第二加热电极（106）的底部，隔热材料层（102）包裹相变材料层（104、105）和加热电极（103、106）。多值相变存储器单元，其通过堆垛结构及两个加热电极，使得在电流脉冲作用下，第一相变材料层和第二相变材料层依次发生相变，产生晶态\晶态、晶态\非晶态、非晶态\非晶态等相态，为实现多值存储提供可能。

Description

一种多值相变存储器单元 技术领域
本发明涉及半导体存储技术领域，具体涉及一种多值相变存储器单元。
 背景技术
相变存储器是一种固态半导体非易失性存储器，具有密度大、功耗低、速度高、性能稳定等优点，被认为是下一代存储技术的有力竞争者之一。根据一些应用场合，需要高密度的相变存储器，以便在一定的面积内尽可能实现更多的存储容量。为了实现相同的存储阵列来存储更多的状态，多值存储的技术被运用在了相变存储器上。通过提高单个存储单元的逻辑数目，可以很大程度上提高信息存储密度，从而有效提升相变存储器的存储容量。
目前多值存储的结构有多种，例如图1和图2所示的多值相变存储器单元结构。如图1所示的结构只有一个加热电极，图中A11为衬底，A12为底电极，A14为相变材料层，A15为顶电极，A16和A17为用于连接外电路的电极，A13为隔热层，A18为用于连接A12和A16的金属。对于图1的相变存储器，由于只有一个加热电极，且相变材料直接接触，导致原子互杂，器件工作不稳定。如图2所示的结构，图中A21为衬底，A22为隔热层，A23和A25为相变材料层，A24为阻挡隔层，A26为金属电极。图2所示的结构中在相变材料中间增加阻挡隔层，该阻挡隔层的不同厚度会对器件的性能产生波动，此外，除了厚度有波动，隔层与相变材料接触可能存在接触问题。
 发明内容
本发明的目的之一是，提供一种新型的多值相变存储器单元，可以使得相变区域远离材料界面，以提高工作稳定性。
本发明的另一目的是，提供一种新型的多值相变存储器单元，可以去除阻挡隔层且能最大限度降低相变材料界面之间的原子互杂。
对此，本发明提供一种多值相变存储器单元，包括相变材料层、加热电极、顶电极、底电极和隔热材料层，所述相变材料层包括第一相变材料层和第二相变材料层，所述加热电极包括第一加热电极和第二加热电极；所述顶电极位于所述第一加热电极的顶部，所述第一加热电极的底部接所述第一相变材料层的顶部，所述第一相变材料层的底部接所述第二相变材料层的顶部，所述第二相变材料层的底部接所述第二加热电极，所述底电极位于所述第二加热电极的底部，所述隔热材料层包裹所述相变材料层和所述加热电极。
进一步地，所述第一加热电极的与第一相变材料层相接的面积和所述第二加热电极的与所述第二相变材料层相接的面积不同。
优选地，所述第一加热电极和所述第二加热电极的形状均为圆柱形，所述第一加热电极的半径与所述第二加热电极的半径不同。
优选地，所述第一相变材料层的材料为GeTe相变材料，所述第二相变材料层的材料为Ge2Sb2Te5相变材料，所述第一加热电极的半径小于所述第二加热电极的半径。
进一步地，所述第一加热电极的与所述第一相变材料层相接触的面积小于所述第一相变材料层的面积，所述第二加热电极的与所述第一相变材料层相接触的面积小于所述第二相变材料层的面积。
进一步地，所述第一相变材料层和所述第二相变材料层由不同的金属硫化物形成。
进一步地，所述加热电极的材料为金属氮化物。
进一步地，所述顶电极和所述底电极的材料包括钨或铝。
进一步地，所述隔热材料层的材料为二氧化硅。
本发明的新型多值相变存储器单元由于通过堆垛结构的相变材料以及分别与相变材料相对的两端连接的两个加热电极，使得在电流脉冲作用下，第一相变材料层和第二相变材料层依次发生相变，产生晶态\晶态、晶态\非晶态、非晶态\非晶态等相态，为实现多值存储提供可能。
一种实施例中，通过不同大小的第一加热电极和第二加热电极，使不同相变材料依次相变且保证两种相变材料边界的温度在整个操作过程中维持低温，由于原子互杂的程度受温度影响，因此为防止原子互杂提供了可能，进而可增强器件工作的稳定性。
附图说明
图1和图2为现有多值相变存储器单元的结构示意图；
图3为本发明一种实施例的多值相变存储器单元的二维轴对称示意图；
图4a、图4b、图4c和图4d分别为本发明一种实施例的多值相变存储器单元在RESET过程中随电流密度J=5.5e8、6.5e8、7.5e8、8.5e8A/m2变化的相态分布示意图；
图5为本发明一种实施例的多值相变存储器单元在RESET过程中随电流密度变化材料对称轴上的温度分布以及无加热电极结构对照组；
图6为本发明一种实施例的多值相变存储器单元在RESET过程中的R-I曲线。
具体实施方式
下面通过具体的实施例并结合附图对本发明作进一步详细的描述。
实施例1：
本实施例提供一种多值相变存储器单元，包括顶电极、第一加热电极、第一相变材料层、第二相变材料层、第二加热电极、底电极和隔热材料层，其中，顶电极位于第一加热电极的顶部，第一加热电极的底部接第一相变材料层的顶部，第一相变材料层的底部接第二相变材料层的顶部，第二相变材料层的底部接第二加热电极，底电极位于第二加热电极的底部，隔热材料层包裹第一加热电极、第一相变材料层、第二相变材料层和第二加热电极。
在本实施例中，第一相变材料层和第二相变材料层可以由不同的金属硫化物形成，例如第一相变材料层的材料为Ge2Sb2Te5相变材料（简称GST材料），第二相变材料层的材料为GeTe相变材料（简称GT材料）。
在本实施例中，第一加热电极和第二加热电极的材料可以为金属氮化物。
在本实施例中，顶电极和底电极的材料可以是钨或铝。
在本实施例中，隔热材料层的材料为二氧化硅。
在本实施例中，第一加热电极的与第一相变材料层相接触的面积小于第一相变材料层的面积，第二加热电极的与第一相变材料层相接触的面积小于第二相变材料层的面积。这样的设定是考虑到发生相变了不一定就会阻值突变，只有相变区域（近似半球形）完全覆盖了电极以后，阻值才会突增，该半球体积随着电流增加体积逐渐增大；这就需要在两个材料完全覆盖电极后，相变区域体积不能大到靠近两种材料的边界。
相比图1的只有一个加热电极结构的多值相变存储器单元，本实施例的第一相变材料层和第二相变材料层的相变区域远离材料界面，能最大限度避免原子互杂，从而可以提高器件工作稳定性；相比图2的没有电极结构的多值相变存储器单元，本实施例去除了阻挡隔层。
实施例2：
本实施例相比实施例1的不同之处在于，对第一加热电极和第二加热电极的大小做出限定，即第一加热电极的与第一相变材料层相接的面积和第二加热电极的与第二相变材料层相接的面积不同。这样限定的依据是，接触面越小，电流越大，加热效果越明显；从而第一相变材料层和第二相变材料层能够保持依次相变，不会存在第一相变材料层的相变区域靠近第一相变材料层和第二相变材料层的界面时第二相变材料层还没有相变的情况或者已经相变但相变区域很小且不足以覆盖电极，从而可以有效防止两种相变材料界面之间的原子互杂，进而增强器件工作的稳定性；此外，由于相变区域较小，从而可以使功耗降低。
这里以第一加热电极和第二加热电极的形状均为圆柱形（当然，加热电极也可以是其它形状，例如长方体等）为例对本实施例的非对称双电极的堆垛式多值相变存储器单元进行详细说明，显然第一加热电极的半径与第二加热电极的半径不同。同时该举例中第一相变材料层的材料为GT材料，第二相变材料层的材料为GST材料，由于GST材料熔点低，相变温度也比较小，而熔点决定晶态到非晶态的变化，相变温度决定非晶态到晶态的变化，如果半径小的话，其相变将更快，因此，就本例而言，必须GST材料的半径大，即此时第一相变材料层的半径小于第二相变材料层的半径。
本例的多值相变存储器单元的二维轴对称示意图如图3所示，其从上到下依次包括顶电极101、隔热层102、GT端加热电极103、GT相变材料104、GST相变材料105、GST端加热电极106和底电极107，隔热材料包裹相变材料与加热电极。具体实现时加热电极材料可以是TiN，顶电极和底电极材料可以是W。
这里采用基于COMSOL 有限元软件模拟研究本例的多值相变存储器单元的性能，研究器件在RESET 操作过程中的相变情况。该举例中，假设相变材料厚度均为100纳米，半径为300纳米；GT端加热电极的半径小于GST端加热电极半径，分别为11纳米和40纳米，长度均为200纳米；顶电极和底电极厚度为200纳米，半径450纳米。
在顶电极施加法向电流密度，底电极接地。电流密度J=6.5e8A/m2时，在器件单元的温度分布中，高温区集中在相变材料与加热电极接触的区域，故RESET操作过程中主要在该区域发生相变。
图4a-4d分别表示电流密度J分别为5.5e8, 6.5e8, 7.5e8, 8.5e8A/m2时，通过温度分布求解的相态分布。GST端首先发生相变，相变区域逐渐增大并覆盖加热电极；随后GT端开始相变，其相变区域逐渐覆盖该端加热电极。可以看出该堆垛结构的相变材料在非对称加热电极的作用下能够依次相变，能够实现多值存储。根据相态分布可以看出该器件相变区域为蘑菇型，故相比于无加热电极的器件，其相变区域比较小，功耗比较低。
根据现有研究的相关文献可知，材料界面的原子互杂程度主要受温度的影响，温度越低，互杂程度越低，当温度为一预定值例如673K时，互杂程度很轻微，可以将该温度值作为原子互杂程度的基准点。实验表明，采用本例的无阻挡隔层的堆垛结构多值相变存储器单元，在RESET操作过程中，由于非对称加热电极能够将相变材料界面处的温度始终维持在较低的水平，使得相变材料界面处的原子互杂程度也较低，从而为完全抑制原子互杂程度提供了可能。如图5所示，所有曲线温度最低点均在材料界面处，界面温度随着电流密度的增加而增加，但始终维持在较低的水平。相比于没有加热电极的器件，加热电极可以有效降低界面温度。当J= 8.5e8A/m2时，器件处于高阻态，但界面温度仍低于650K，根据上述分析，此时原子互杂处在很轻微的水平，故该结构可以有效抑制操作过程中的原子互杂，提高器件工作的稳定性。
器件要实现稳定的多值存储，需要有稳定的中间阻值。中间阻值对应的电流窗口是两次阻值突变时阈值电流差值，大的电流窗口能够保证中间阻值稳定以及合理的编程电流设计。图6为器件单元在整个RESET过程中的R-I曲线，可以看出随着电流的增大，器件单元的阻值有两次突增，且中间阻值的比较平坦，电流窗口大约为0.125毫安，说明本例的非对称双电极的堆垛式多值相变存储器单元能够实现多值存储且容易进行外电路编程设计。
综上，本实施例的相变存储器采用非对称双加热电极堆垛结构，相变材料在电极的作用下，依次发生相变，形成低、中、高三种电阻态，能够实现多值存储，而且能够在不使用阻挡隔层的情况下保证相变材料界面处温度维持在较低的水平，从而抑制界面处的原子扩散，保证器件具有稳定的多值存储性能；同时非对称双电极能能够使相变区域集中位于相变材料与加热电极的界面处，能够降低功耗，为进一步发展相变存储器多值存储提供了一种新思路和方案。
以上内容是结合具体的优选实施方式对本发明所做的进一步详细说明，不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本发明的保护范围。

Claims (9)

  1. 一种多值相变存储器单元，包括相变材料层、加热电极、顶电极、底电极和隔热材料层，其特征在于，所述相变材料层包括第一相变材料层和第二相变材料层，所述加热电极包括第一加热电极和第二加热电极；所述顶电极位于所述第一加热电极的顶部，所述第一加热电极的底部接所述第一相变材料层的顶部，所述第一相变材料层的底部接所述第二相变材料层的顶部，所述第二相变材料层的底部接所述第二加热电极，所述底电极位于所述第二加热电极的底部，所述隔热材料层包裹所述相变材料层和所述加热电极。
  2. 如权利要求1所述的多值相变存储器单元，其特征在于，所述第一加热电极的与第一相变材料层相接的面积和所述第二加热电极的与所述第二相变材料层相接的面积不同。
  3. 如权利要求2所述的多值相变存储器单元，其特征在于，所述第一加热电极和所述第二加热电极的形状均为圆柱形，所述第一加热电极的半径与所述第二加热电极的半径不同。
  4. 如权利要求3所述的多值相变存储器单元，其特征在于，所述第一相变材料层的材料为GeTe相变材料，所述第二相变材料层的材料为Ge2Sb2Te5相变材料，所述第一加热电极的半径小于所述第二加热电极的半径。
  5. 如权利要求1所述的多值相变存储器单元，其特征在于，所述第一加热电极的与所述第一相变材料层相接触的面积小于所述第一相变材料层的面积，所述第二加热电极的与所述第一相变材料层相接触的面积小于所述第二相变材料层的面积。
  6. 如权利要求1所述的多值相变存储器单元，其特征在于，所述第一相变材料层和所述第二相变材料层由不同的金属硫化物形成。
  7. 如权利要求1所述的多值相变存储器单元，其特征在于，所述加热电极的材料为金属氮化物。
  8. 如权利要求1所述的多值相变存储器单元，其特征在于，所述顶电极和所述底电极的材料包括钨或铝。
  9. 如权利要求1所述的多值相变存储器单元，其特征在于，所述隔热材料层的材料为二氧化硅。
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