WO2015169043A1 - 补偿像素电路及显示装置 - Google Patents

补偿像素电路及显示装置 Download PDF

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Publication number
WO2015169043A1
WO2015169043A1 PCT/CN2014/087897 CN2014087897W WO2015169043A1 WO 2015169043 A1 WO2015169043 A1 WO 2015169043A1 CN 2014087897 W CN2014087897 W CN 2014087897W WO 2015169043 A1 WO2015169043 A1 WO 2015169043A1
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Prior art keywords
switching element
module
driving transistor
pixel circuit
voltage
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PCT/CN2014/087897
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English (en)
French (fr)
Inventor
马占洁
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP14861144.5A priority Critical patent/EP3142099B1/en
Priority to US14/443,511 priority patent/US9478164B2/en
Publication of WO2015169043A1 publication Critical patent/WO2015169043A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2230/00—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present disclosure relates to a compensation pixel circuit and a display device.
  • AMOLED Active Matrix/Organic Light Emitting Diode
  • the back film transistor has uniformity and stability problems in the production process.
  • the stability of the TFT is lowered after the bias is turned on for a long time.
  • the present disclosure provides a compensation pixel circuit and a display device that not only have a function of compensating for a threshold voltage offset, but also have a function of resetting a gate voltage of a driving transistor, thereby greatly reducing frames and frames. The effect of the signal between.
  • a compensation pixel circuit comprising: an organic light emitting diode and a driving transistor, the first end of the driving transistor being connected to an anode of the organic light emitting diode, the compensation pixel circuit further comprising:
  • a reset module comprising: a capacitor connected at a first end to a gate of the driving transistor, the reset module for discharging a gate of the driving transistor to reduce a gate voltage to a threshold voltage of the organic light emitting diode Size
  • a data voltage writing module configured to discharge a gate voltage of the driving transistor to reduce a threshold voltage of the organic light emitting diode, and connect the data voltage to the second end of the driving transistor;
  • a illuminating control module configured to, after the data voltage writing is completed, change a source of the driving transistor and a second end of the capacitor to a working voltage of a high level
  • a switch module configured to disconnect the driving transistor from the organic light emitting diode when the data voltage is connected to the second end of the driving transistor.
  • the reset module further includes a sixth switching element and a seventh switching element, wherein: the first end and the second end of the sixth switching element are respectively connected to the gate and the first end of the driving transistor The second end of the seventh switching element is connected to a predetermined voltage, and the first end of the seventh switching element is connected to the second end of the capacitor.
  • the signals connected to the control terminals of the sixth switching element and the seventh switching element are used to control the two switching elements to be in an open state when the reset module and the data voltage writing module are in operation.
  • the illumination control module is in the off state when it is working.
  • the data voltage writing module includes a third switching element; a first end of the third switching element is connected to a second end of the driving transistor; and a second end of the third switching element is associated with data The voltage lines are connected.
  • the signal connected to the control terminal of the third switching element is used to control the third switching element to be in an on state when the data voltage writing module is in operation, in the reset module and the illumination control module It is closed when working.
  • the illumination control module includes a fourth switching element and a fifth switching element, the second end of which is connected to a high-level operating voltage line; the first end of the fourth switching element and the driving transistor The second end of the fifth switching element is connected to the second end of the capacitor.
  • the signals connected to the control terminals of the fourth switching element and the fifth switching element are used to control the two switching elements to be in a closed state when the reset module and the data voltage writing module are in operation.
  • the illumination control module is turned on when it is working.
  • the switch module includes a second switching element; a first end of the second switching element is connected to an anode of the organic light emitting diode; and a second end of the second switching element is opposite to the driving transistor The first end is connected.
  • the driving transistor and the second to seventh switching elements are all thin film transistors.
  • a display device including any of the above compensation images is provided Prime circuit.
  • the compensation pixel circuit structure proposed in the embodiment of the present disclosure is such that the current that ultimately drives the OLED to emit light is independent of the threshold voltage Vth and the bias voltage V DD . Therefore, it not only compensates for the OLED current deviation caused by the threshold voltage shift, but also has the function of compensating for the influence of the signal voltage attenuation on the current.
  • the reset module in the circuit can reset the gate voltage of the driving transistor, that is, the upper frame signal has little influence on the lower frame signal, which greatly reduces the influence of the signal between the frame and the frame.
  • FIG. 1 is a schematic structural diagram of a compensation pixel circuit in an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram showing the circuit structure of a 7T1C compensation pixel circuit in an embodiment of the present disclosure
  • FIG. 3 is a timing chart showing the operation of a 7T1C compensation pixel circuit in one embodiment of the present disclosure.
  • FIG. 1 schematically shows the structure of a compensation pixel circuit of a first embodiment of the present disclosure.
  • the circuit includes an organic light emitting diode D1 and a driving transistor M1.
  • the first end of the driving transistor M1 is connected to the anode of the organic light emitting diode D1 via a switching module.
  • the compensation pixel circuit further includes:
  • the reset module includes a capacitor C1 connected to the gate of the driving transistor M1 at the first end for discharging the gate of the driving transistor M1 to reduce the gate voltage to a threshold voltage of the organic light emitting diode D1;
  • a data voltage writing module configured to supply the data voltage VData to the second end of the driving transistor M1 after the gate of the driving transistor M1 is discharged and the gate voltage is reduced to the threshold voltage of the organic light emitting diode D1;
  • the illuminating control module is configured to, after the data voltage writing is completed, change the source of the driving transistor M1 and the second end of the capacitor C1 to a working voltage V DD of a high level; (the corresponding low-level working voltage is connected V SS at the cathode of D1);
  • a switching module for disconnecting the driving when the data voltage is supplied to the second end of the driving transistor M1 The connection of the transistor M1 to the organic light emitting diode D1.
  • a transistor has a gate, a source and a drain, and the term "first end of the driving transistor M1" as used herein refers to an end connected to the anode of the organic light emitting diode D1, depending on the type of transistor selected, possibly Is the source or drain of the transistor.
  • the reset module is for discharging the gate of the driving transistor M1 to lower the gate voltage to the threshold voltage of the organic light emitting diode D1, and it includes the capacitor C1 whose first terminal is connected to the gate of the driving transistor M1, this A discharge process is obviously accomplished by capacitor C1. Since the anode of D1 is obviously connected to one end of C1, in order to achieve such a function, only the M1 gate terminal, the C1 second terminal and the anode of D1 can be connected to one point, that is, the second end of the capacitor C1 is connected to one. A constant voltage having a higher voltage value than the operating voltage of the low level causes the potential at the gate of M1 to be discharged through D1, eventually causing the potential of the point to become the threshold voltage of D1. It can be seen that the connection relationship between the gate of M1 and D1 is hidden here. Similar connection relationships as shown in Fig. 1 are also included in the above description of the structure or function.
  • the compensation pixel circuit is divided into three working phases of a reset phase, a data voltage writing phase and an illumination phase in chronological order.
  • the entire working process is sequentially performed in the order of the reset module, the data writing module, and the lighting control module. That is, the three modules sequentially implement their main functions in the three corresponding working phases, and the switch module implements its functions simultaneously with the data writing module.
  • FIG. 2 schematically shows a circuit configuration of a 7T1C compensation pixel circuit of an embodiment of the present disclosure.
  • the circuit includes an organic light emitting diode D1, a driving transistor M1, second to seventh switching elements M2 to M7, and a storage capacitor C1.
  • the reset module includes a sixth switching element M6 and a seventh switching element M7 in addition to the capacitor C1.
  • the first end and the second end of the sixth switching element M6 are respectively connected to the gate and the first end of the driving transistor M1; the second end of the seventh switching element M7 is connected to a predetermined voltage Vinitial, and the first end of the seventh switching element M7 Connected to the second end of capacitor C1.
  • the gates of the sixth switching element M6 and the seventh switching element M7 are connected to the signal line G2, and the signal line G2 is used to control the two switching elements to be in an on state when the reset module and the data voltage writing module are in operation, in the illumination control module It is closed when working.
  • the data voltage writing module includes a third switching element M3; the first end of the third switching element M3 is connected to the second end of the driving transistor M1; the second end of the third switching element M3 is connected to the data voltage line VData Connected.
  • the gate of the third switching element M3 is connected to the signal line G1.
  • the signal line G1 is used to control the third switching element M3 to be in an on state when the data voltage writing module is in operation, and is in a closed state when the reset module and the illumination control module are in operation.
  • the illumination control module includes a fourth switching element M4 and a fifth switching element M5, both of which are connected to a high-level operating voltage line VDD .
  • the first end of the fourth switching element M4 is connected to the second end of the driving transistor M1; the first end of the fifth switching element M5 is connected to the second end of the capacitor C1.
  • the gates of the fourth switching element M4 and the fifth switching element M5 are connected to the signal line EM1, and the signal line EM1 is used to control the two switching elements to be in a closed state when the reset module and the data voltage writing module are in operation, in the illumination control module It is on when it is working.
  • the switch module includes a second switching element M2; the first end of the second switching element M2 is coupled to the anode of the organic light emitting diode D1. The second end of the second switching element M2 is connected to the first end of the driving transistor M1.
  • the switch module is for disconnecting the driving transistor M1 from the organic light emitting diode D1 when the data voltage VData is supplied to the second end of the driving transistor M1, the signal EM2 connected to the control terminal of the second switching element M2 is actually The upper is the signal inverted from the above G1 signal.
  • the switching element refers to an element that controls whether the first end and the second end are in communication by a control terminal signal, which of course can be realized by a plurality of specific electrical components.
  • the basic configuration and the connection relationship of the circuit are as described above, wherein the driving transistor M1 and the organic light emitting diode D1 constitute a basic OLED driving relationship, and the second to seventh switching elements M2-M7 can be respectively connected by their respective The signal control switch on the control terminal is in the on/off state.
  • the potential zeros of all bias voltages are connected to the same common terminal, and the potential zeros of all signal voltages are also connected to the same common terminal.
  • the driving transistor and the second to seventh switching elements are all thin film transistors TFT.
  • the thin film transistor used in the present embodiment is a P-channel thin film transistor.
  • the first ends of the driving transistors, the second to seventh switching elements each represent a drain, and the second ends of the driving transistors and the second to seventh switching elements each represent a source,
  • the control terminals of the second to seventh switching elements each represent a gate.
  • it can also be replaced by other types of transistors.
  • the compensation pixel circuit since the compensation pixel circuit includes 7 TFTs and 1 capacitor, it can also be called a novel 7T1C compensation pixel circuit according to a naming manner commonly used in the art.
  • FIG. 3 schematically shows the operation timing of the 7T1C compensation pixel circuit of the embodiment of the present disclosure. Based on The 7T1C compensation pixel circuit under exemplary conditions, the working principle of the circuit can be described as follows with reference to FIG. 3:
  • the operation of the circuit can be divided into, for example, three phases: a reset phase (ab), a data write phase (bc), and a light-emitting phase (c- ).
  • the EM1 signal and the G1 signal are at a high level, the transistors M3, M4, and M5 are in a off state; and the EM2 and G2 signals are at a low level, and the low level of EM2 causes the transistor M2 to be turned on, while The M2 source and drain nodes C and D are connected in conduction.
  • the low level of the G2 signal causes transistors M6 and M7 to turn on.
  • the transistor M7 is thus turned on to reset the node A potential of the storage capacitor C1 to the Vinitial signal. Further, the transistor M6 is turned on to connect the gate and drain of the driving transistor M1 to each other.
  • the nodes B, C, and D are connected to each other, and the potential of the storage capacitor C1 at the node B is discharged through the organic light emitting diode D1 to a low voltage, which is the threshold voltage of the organic light emitting diode D1.
  • the organic light emitting diode D1 is in a state of being turned off and not emitting light.
  • the EM2 signal goes high, causing transistor M2 to turn off. G2 remains low while G1 also goes low, which causes transistor M3 to turn on, and data signal VData is written to the source of drive transistor M1 through M3.
  • G2 since G2 is kept at a low level, the M1 connected to the OLED operates in the saturation region, and the potential at point B becomes VData+Vth.
  • the potential at point A is Vinitial, so that the potential across the storage capacitor C1 becomes Vintial and VData+Vth, respectively.
  • G1 and G2 go high, causing transistors M3, M6, M7 to turn off.
  • EM1 and EM2 become low level, so that transistors M4, M5 and M2 are turned on.
  • the potential of the storage capacitor A is changed from Vinitial to V DD .
  • the potential of node A becomes V DD +VData+ Vth-Vinitial, at this time, the transistor M1 is in the saturation region.
  • the saturation region current formula the current flowing out of M1 is
  • K in the same structure is relatively stable and can be regarded as a constant here.
  • the current flowing through the organic light emitting diode D1 connected to the drain of the driving transistor M1 is only related to Vinitial and VData, and is independent of Vth and V DD . Since Vinitial does not form a current loop, the gate voltage of the driving transistor M1 can be reset to a fixed value each time under the action of the reset module, without being subjected to IR Drop (voltage drop, meaning background technology) The effect of the voltage decay on the gate signal line is mentioned. Therefore, the Vth unevenness caused by the manufacturing process of the backplane does not cause the problem that the current flowing through the OLED is not uniform, that is, the problem of uneven illumination is not caused.
  • the potential of the node A of the storage capacitor C1 is always a V DD signal when the light is emitted, and no charge loss occurs, which ensures the potential stability of the node A, so that the current of the M1 is stabilized, and the organic light emitting diode D1 is stably illuminated.
  • the above embodiments are only used to illustrate the technical solutions of the present disclosure, and are not limited thereto.
  • an embodiment of the present disclosure further provides a display device including any of the above-described compensation pixel circuits.
  • the display device can be any product or component having a display function, such as an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the circuit When the circuit is designed as a pixel unit in the array substrate, since the signal lines G1 and EM2 are signals for controlling data voltage writing, one of G1 and EM2 can be connected according to the high and low levels of the gate line driving signal. On the gate line of the row, the other directly takes its inverted signal. For the signal lines EM1 and G2, it is used to reset the gate voltage, and thus can be realized by designing a corresponding reset switch signal line, or can be obtained by a certain logic circuit operation according to the gate line signal.
  • the display device provided by the embodiment of the present disclosure has the same technical features as any of the above-mentioned compensation pixel circuits, the same technical problem can be solved, and the same technical effect is produced.
  • the compensation pixel circuit structure proposed in the embodiment of the present disclosure is such that the current that ultimately drives the OLED to emit light is independent of the threshold voltage Vth and the bias voltage V DD . Therefore, it not only compensates for the OLED current deviation caused by the threshold voltage shift, but also has the function of compensating for the influence of the signal voltage attenuation on the current.
  • the reset module in the circuit can reset the gate voltage of the driving transistor, that is, the upper frame signal has almost no influence on the lower frame signal, which greatly reduces the influence of the signal between the frame and the frame.
  • the compensation pixel circuit and the display device proposed by the present disclosure not only have the function of compensating for the threshold voltage offset, but also have the function of resetting the gate voltage of the driving transistor, which greatly reduces the influence of the signal between the frame and the frame. At the same time, the uniformity and temperature of the OLED illumination are ensured.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种补偿像素电路及显示装置。补偿像素电路包括有机发光二极管（D1）和驱动晶体管（M1），驱动晶体管（M1）的第一端与有机发光二极管（D1）的阳极相连；该补偿像素电路还包括复位模块、数据电压写入模块、发光控制模块和开关模块。复位模块包括第一端与驱动晶体管（M1）的栅极相连的电容（C1），用于使驱动晶体管（M1）的栅极放电，使栅极电压降至有机发光二极管（D1）的阈值电压的大小。数据电压写入模块，用于在驱动晶体管（M1）的栅极放电，使栅极电压降至有机发光二极管（D1）的阈值电压的大小后，将数据电压连接至驱动晶体管（M1）的第二端。发光控制模块，用于在数据电压写入完成后，将驱动晶体管（M1）的源极和电容（C1）的第二端连接至高电平的工作电压。开关模块，用于在数据电压连接在驱动晶体管（M1）的第二端时断开驱动晶体管（M1）与有机发光二极管（D1）的连接。补偿像素电路能补偿阈值电压偏移，并且降低帧与帧之间信号的影响。

Description

补偿像素电路及显示装置 技术领域
本公开涉及一种补偿像素电路及显示装置。
背景技术
有源矩阵有机发光二极管(Active Matrix/Organic Light Emitting Diode，AMOLED)显示是一种应用于电视和移动设备中的显示技术，以其低功耗，低成本，大尺寸的特点在对功耗敏感的便携式电子设备中有着广阔的应用前景。
目前在AMOLED显示领域中，尤其是大尺寸基板设计中，背板薄膜晶体管(Thin Film Transistor，TFT)在生产工艺过程中存在着均匀性以及稳定性问题。一方面会使得不同TFT之间存在阈值电压偏移，另一方面还会在长时间开启偏压后出现TFT稳定性下降。这些问题都使得驱动OLED电流的不均匀、稳定，影响显示效果。
现有技术中，存在有很多只考虑阈值电压偏移这一问题而进行AMOLED补偿电路设计，但是这些设计却都忽视了一个问题：随着AMOLED尺寸大型化的趋势，栅信号线的负载也会越来越大，导致栅信号线上会出现电压的衰减，进而影响显示区电流均匀性。这样的问题会使得OLED发光不均匀，降低显示效果。
发明内容
针对现有技术的不足，本公开提供一种补偿像素电路及显示装置，其不仅具有补偿阈值电压偏移的功能，还具有使驱动晶体管的栅极电压复位的功能，极大地降低了帧与帧之间信号的影响。
按照本公开的一个方面，提供一种补偿像素电路，包括有机发光二极管和驱动晶体管，所述驱动晶体管的第一端与所述有机发光二极管的阳极相连，所述补偿像素电路还包括：
复位模块，包括第一端与所述驱动晶体管的栅极相连的电容，所述复位模块用于使所述驱动晶体管的栅极放电，使栅极电压降至所述有机发光二极管的阈值电压的大小；
数据电压写入模块，用于在所述驱动晶体管的栅极放电，使栅极电压降至所述有机发光二极管的阈值电压的大小后，将数据电压接至所述驱动晶体管的第二端；
发光控制模块，用于在数据电压写入完成后，将所述驱动晶体管的源极和所述电容的第二端改接至高电平的工作电压；
开关模块，用于数据电压接在所述驱动晶体管的第二端时断开所述驱动晶体管与所述有机发光二极管的连接。
可替换地，所述复位模块还包括第六开关元件和第七开关元件，其中：所述第六开关元件的第一端和第二端分别与所述驱动晶体管的栅极和第一端相连；所述第七开关元件的第二端接预定电压，所述第七开关元件的第一端与所述电容的第二端相连。
可替换地，所述第六开关元件和第七开关元件的控制端所接信号用于控制这两个开关元件在所述复位模块和所述数据电压写入模块工作时处于开启状态，在所述发光控制模块工作时处于关闭状态。
可替换地，所述数据电压写入模块包括第三开关元件；所述第三开关元件的第一端与所述驱动晶体管的第二端相连；所述第三开关元件的第二端与数据电压线相连。
可替换地，所述第三开关元件的控制端所接信号用于控制所述第三开关元件在所述数据电压写入模块工作时处于开启状态，在所述复位模块和所述发光控制模块工作时处于关闭状态。
可替换地，所述发光控制模块包括第四开关元件和第五开关元件，其第二端都与高电平的工作电压线相连；所述第四开关元件的第一端与所述驱动晶体管的第二端相连；所述第五开关元件的第一端与所述电容的第二端相连。
可替换地，所述第四开关元件和第五开关元件的控制端所接信号用于控制这两个开关元件在所述复位模块和所述数据电压写入模块工作时处于关闭状态，在所述发光控制模块工作时处于开启状态。
可替换地，所述开关模块包括第二开关元件；所述第二开关元件的第一端与所述有机发光二极管的阳极相连；所述第二开关元件的第二端与所述驱动晶体管的第一端相连。
可替换地，所述驱动晶体管、第二至第七开关元件均为薄膜晶体管。
按照本公开的另一方面，提供一种显示装置，包括上述任意一种补偿像 素电路。
本公开的实施例至少具有如下的有益效果：
在本公开实施例中所提出的补偿像素电路结构，使得最终驱动OLED发光的电流与阈值电压Vth和偏置电压VDD无关。从而其不但能补偿阈值电压偏移所造成的OLED电流偏差，还具有补偿信号电压衰减对电流影响的功能。
同时，由于电路中的复位模块可以使驱动晶体管的栅极电压复位，即使得上帧信号对下帧信号几乎没有影响，极大降低了帧与帧之间信号的影响。
当然，实施本公开实施例中的任一产品或方法并不一定需要同时达到以上所述的所有优点。
附图说明
图1是本公开一个实施例中补偿像素电路的结构示意图；
图2是本公开一个实施例中7T1C补偿像素电路的电路结构示意图；
图3是本公开一个实施例中7T1C补偿像素电路的工作时序图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合附图，对本公开实施例进行清楚、完整地描述。
实施例1
图1示意性示出本公开第一实施例的补偿像素电路的结构。如图1所示，该电路包括有机发光二极管D1和驱动晶体管M1。驱动晶体管M1的第一端经过开关模块与所述有机发光二极管D1的阳极相连。该补偿像素电路还包括：
复位模块，包括第一端与驱动晶体管M1的栅极相连的电容C1，用于使驱动晶体管M1的栅极放电，使栅极电压降至有机发光二极管D1的阈值电压的大小；
数据电压写入模块，用于在驱动晶体管M1的栅极放电、使栅极电压降至有机发光二极管D1的阈值电压的大小后，将数据电压VData提供给驱动晶体管M1的第二端；
发光控制模块，用于在数据电压写入完成后，将驱动晶体管M1的源极和电容C1的第二端改接至高电平的工作电压VDD；(对应的低电平的工作电压为接在D1阴极的VSS)；
开关模块，用于在数据电压被提供给驱动晶体管M1的第二端时断开驱动 晶体管M1与有机发光二极管D1的连接。
众所周知，晶体管具有栅极、源极和漏极，而这里所说的“驱动晶体管M1的第一端”指的是与有机发光二极管D1的阳极相连的一端，视所选用晶体管类型的不同，可能是晶体管的源极或漏极。
由于复位模块用于使驱动晶体管M1的栅极放电，使栅极电压降至有机发光二极管D1的阈值电压的大小，且其包括第一端与驱动晶体管M1的栅极相连的电容C1，所以这一放电过程很显然地是通过电容C1完成的。由于D1的阳极很显然地要和C1的一端相连，所以为实现这样的功能只能使M1栅极端、C1第二端以及D1的阳极连于一点，也就是将电容C1的第二端连接一个与低电平的工作电压相比电压值较高的恒定电压，使得M1的栅极处的电位经过D1进行放电，最终使得该点电位变为D1的阈值电压。可见，这里隐含了M1的栅极也和D1相连的连接关系。类似的图1所示的连接关系也都是包含在上述关于结构或功能的说明当中的。
可见，该补偿像素电路按时间顺序分为复位阶段、数据电压写入阶段和发光阶段三个工作阶段。整个工作过程是按照复位模块、数据写入模块和发光控制模块这样的顺序依次进行的。即，这三个模块依次在这三个对应的工作阶段中实现其主要功能，而开关模块是和数据写入模块同时实现其功能的。
为了更清楚地说明本公开的技术方案，下面以一种示例性条件下的7T1C补偿像素电路介绍本公开实施例的技术方案和技术效果。
图2示意示出本公开实施例的7T1C补偿像素电路的电路结构。参见图2，该电路包括有机发光二极管D1、驱动晶体管M1、第二至第七开关元件M2至M7和存储电容C1。
复位模块除电容C1之外还包括第六开关元件M6和第七开关元件M7。第六开关元件M6的第一端和第二端分别与驱动晶体管M1的栅极和第一端相连；第七开关元件M7的第二端接预定电压Vinitial，第七开关元件M7的第一端与电容C1的第二端相连。
第六开关元件M6和第七开关元件M7的栅极与信号线G2连接，信号线G2用于控制这两个开关元件在复位模块和数据电压写入模块工作时处于开启状态，在发光控制模块工作时处于关闭状态。
数据电压写入模块包括第三开关元件M3；第三开关元件M3的第一端与驱动晶体管M1的第二端相连；第三开关元件M3的第二端与数据电压线VData 相连。
第三开关元件M3的栅极与信号线G1连接，信号线G1用于控制第三开关元件M3在数据电压写入模块工作时处于开启状态，在复位模块和发光控制模块工作时处于关闭状态。
发光控制模块包括第四开关元件M4和第五开关元件M5，它们的第二端都与高电平的工作电压线VDD相连。第四开关元件M4的第一端与驱动晶体管M1的第二端相连；第五开关元件M5的第一端与电容C1的第二端相连。
第四开关元件M4和第五开关元件M5的栅极与信号线EM1连接，信号线EM1用于控制这两个开关元件在复位模块和数据电压写入模块工作时处于关闭状态，在发光控制模块工作时处于开启状态。
开关模块包括第二开关元件M2；第二开关元件M2的第一端与有机发光二极管D1的阳极相连。第二开关元件M2的第二端与驱动晶体管M1的第一端相连。
由于开关模块是用于在数据电压VData被提供到驱动晶体管M1的第二端时断开驱动晶体管M1与有机发光二极管D1的连接的，所以接在第二开关元件M2控制端上的信号EM2实际上就是与上述G1信号反相的信号。
这里，开关元件指由控制端信号控制其第一端与第二端是否连通的元件，当然其可以由多种具体电器元件实现。
可见，该电路的基本构成和连接关系如上所述，其中的驱动晶体管M1和有机发光二极管D1构成基本的OLED驱动关系，而第二至第七开关元件M2-M7可分别由其各自接在的控制端上的信号控制开关处于开启/关闭状态。当然，所有偏置电压的电位零点都连于同一个公共端上，所有信号电压的电位零点也都连于同一个公共端上。
可替换地，所述驱动晶体管、第二至第七开关元件均为薄膜晶体管TFT。这里，本实施例中采用的薄膜晶体管为P型沟道的薄膜晶体管。对应于这种情形，所述驱动晶体管、第二至第七开关元件的第一端均代表漏极，所述驱动晶体管、第二至第七开关元件的第二端均代表源极，所述第二至第七开关元件的控制端均代表栅极。当然，其也可以用其他类型的晶体管作等效替代。
从而，由于本补偿像素电路包含了7个TFT和1个电容，所以也可以按本领域常用的命名方式而称为新型7T1C补偿像素电路。
图3示意性示出本公开实施例的7T1C补偿像素电路的工作时序。基于上 述示例性条件下的7T1C补偿像素电路，该电路的工作原理可参照图3描述如下：
如图3所示，参见该电路的工作时序图，总体来说，该电路的工作可分为例如三个阶段：复位阶段(a-b)、数据写入阶段(b-c)、和发光阶段(c-)。
具体来说，在复位阶段中，EM1信号和G1信号为高电平，晶体管M3，M4，M5处于关闭状态；而EM2和G2信号为低电平，EM2的低电平使得晶体管M2开启，同时使M2源漏极节点C和D导通连接起来。G2信号的低电平，使得晶体管M6和M7开启。从而晶体管M7开启使得存储电容C1的节点A电位复位成Vinitial信号。另外，晶体管M6的导通，使驱动晶体管M1的栅漏极相互连接。这样，节点B，C，D便相互连接，存储电容C1在节点B的电位会通过有机发光二极管D1进行放电至一个低电压，该电压就是有机发光二极管D1的阈值电压。当然，此时有机发光二极管D1处于关闭不发光的状态。
在数据写入阶段中，EM2信号变为高电平，使得晶体管M2关闭。G2保持低电平，同时G1也变为低电平，这使得晶体管M3开启，而数据信号VData就通过M3写入到了驱动晶体管M1的源极。此时，因为G2一直保持低电平，与OLED连接的M1工作于饱和区，其B点电位就变为了VData+Vth。而A点电位为Vinitial，这样存储电容C1两端电位就分别变为Vintial和VData+Vth。
在发光阶段中，G1和G2变为高电平，使得晶体管M3，M6，M7关闭。EM1和EM2变为低电平，使得晶体管M4，M5和M2开启，M5开启后，存储电容A点电位由Vinitial变成VDD，根据电荷守恒原理，节点A的电位变成VDD+VData+Vth-Vinitial,此时晶体管M1处于饱和区，根据饱和区电流公式可知，流出M1的电流是
Figure PCTCN2014087897-appb-000001
其中，相同结构中的K相对稳定，在这里可以视为常量。
因此，在OLED发光的过程中，流经与驱动晶体管M1漏极相连接的有机 发光二极管D1的电流就只与Vinitial和VData相关，而与Vth和VDD无关。而Vinitial由于不会形成一个电流回路，因此在复位模块的作用下驱动晶体管M1的栅极电压可以每次都被复位至在一个固定值上，不会受到IR Drop(电压下降，意即背景技术中所说的栅信号线上的电压衰减)现象的影响。从而不会因为背板制造工艺原因所造成的Vth不均匀而造成流经OLED的电流大小不均匀的问题，即不会造成发光不均匀的问题。同时，存储电容C1的节点A的电位在发光时一直为VDD信号，不会产生电荷流失，保证了节点A的电位稳定性，使得M1的电流稳定，从而有机发光二极管D1发光稳定。当然，以上实施例仅用以说明本公开的技术方案，而非对其限制。尽管参照前述实施例对本公开进行了详细的说明，本领域的普通技术人员应当理解：无论在具体实施过程中采用什么样结构的复位模块、数据写入模块、发光控制模块和开关模块，只要其具有上述补偿像素电路的功能，就可以参照本公开实施例所说明的工作原理进行发明的实施，其无疑没有脱离本公开各实施例技术方案的精神和范围。
实施例2
基于相同的发明构思，本公开实施例还提出了一种显示装置，该显示装置包括上述任意一种补偿像素电路。该显示装置可以为：OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
在将该电路设计成阵列基板中的像素单元时，由于信号线G1和EM2是控制数据电压写入的信号，所以根据栅线驱动信号的高低电平可以将G1和EM2中的一个接到对应于该行的栅线上，另一个直接取其反相信号。对于信号线EM1和G2，其是用于将栅极电压复位的，因而可以通过设计相应的复位开关信号线来实现，或者可以根据栅线信号通过一定的逻辑电路运算后得到。
由于本公开实施例提供的显示装置与上述任意一种补偿像素电路具有相同的技术特征，所以也能解决同样的技术问题，产生相同的技术效果。
综上所述，在本公开实施例中所提出的补偿像素电路结构，使得最终驱动OLED发光的电流与阈值电压Vth和偏置电压VDD无关。从而其不但能补偿阈值电压偏移所造成的OLED电流偏差，还具有补偿信号电压衰减对电流影响的功能。同时，由于电路中的复位模块可以使驱动晶体管的栅极电压复位，即使得上帧信号对下帧信号几乎没有影响，极大降低了帧与帧之间信号的影 响。所以，本公开所提出的补偿像素电路和显示装置不仅具有补偿阈值电压偏移的功能，还具有使驱动晶体管的栅极电压复位的功能，极大地降低了帧与帧之间信号的影响，可以同时保证OLED发光的均匀性和温度性。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。
以上实施例仅用以说明本公开的技术方案，而非对其限制；尽管参照前述实施例对本公开进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本公开各实施例技术方案的精神和范围。
本申请要求于2014年5月8日递交的中国专利申请第201410194265.X号的优先权，在此全文引用该中国专利申请公开的内容作为本申请的一部分。

Claims (10)

  1. 一种补偿像素电路，包括有机发光二极管和驱动晶体管，所述驱动晶体管的第一端与所述有机发光二极管的阳极相连，其中，所述补偿像素电路还包括：
    复位模块，包括第一端与所述驱动晶体管的栅极相连的电容，所述复位模块用于使所述驱动晶体管的栅极放电，使栅极电压降至所述有机发光二极管的阈值电压的大小；
    数据电压写入模块，用于在所述驱动晶体管的栅极放电，使栅极电压降至所述有机发光二极管的阈值电压的大小后，将数据电压连接至所述驱动晶体管的第二端；
    发光控制模块，用于在数据电压写入完成后，将所述驱动晶体管的源极和所述电容的第二端连接至高电平的工作电压；
    开关模块，用于在数据电压连接在所述驱动晶体管的第二端时断开所述驱动晶体管与所述有机发光二极管的连接。
  2. 根据权利要求1所述的补偿像素电路，其中，所述复位模块还包括第六开关元件和第七开关元件，其中：
    所述第六开关元件的第一端和第二端分别与所述驱动晶体管的栅极和第一端相连；
    所述第七开关元件的第二端接预定电压，所述第七开关元件的第一端与所述电容的第二端相连。
  3. 根据权利要求2所述的补偿像素电路，其中，所述第六开关元件和第七开关元件的控制端所接信号用于控制这两个开关元件在所述复位模块和所述数据电压写入模块工作时处于开启状态，在所述发光控制模块工作时处于关闭状态。
  4. 根据权利要求1-3之一所述的补偿像素电路，其中，所述数据电压写入模块包括第三开关元件；
    所述第三开关元件的第一端与所述驱动晶体管的第二端相连；
    所述第三开关元件的第二端与数据电压线相连。
  5. 根据权利要求4所述的补偿像素电路，其特征在于，所述第三开关元 件的控制端所接信号用于控制所述第三开关元件在所述数据电压写入模块工作时处于开启状态，在所述复位模块和所述发光控制模块工作时处于关闭状态。
  6. 根据权利要求1-5之一所述的补偿像素电路，其中，所述发光控制模块包括第四开关元件和第五开关元件，其第二端都与高电平的工作电压线相连；
    所述第四开关元件的第一端与所述驱动晶体管的第二端相连；
    所述第五开关元件的第一端与所述电容的第二端相连。
  7. 根据权利要求6所述的补偿像素电路，其中，所述第四开关元件和第五开关元件的控制端所接信号用于控制这两个开关元件在所述复位模块和所述数据电压写入模块工作时处于关闭状态，在所述发光控制模块工作时处于开启状态。
  8. 根据权利要求1-7之一所述的补偿像素电路，其中，所述开关模块包括第二开关元件；
    所述第二开关元件的第一端与所述有机发光二极管的阳极相连；
    所述第二开关元件的第二端与所述驱动晶体管的第一端相连。
  9. 根据权利要求1-8中任意一项所述的补偿像素电路，其中，所述驱动晶体管、第二至第七开关元件均为薄膜晶体管。
  10. 一种显示装置，包括如权利要求1-9中任意一项所述的补偿像素电路。
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