WO2015077970A1 - 软性显示器组件的制作方法及其制作的软性显示器组件 - Google Patents

软性显示器组件的制作方法及其制作的软性显示器组件 Download PDF

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WO2015077970A1
WO2015077970A1 PCT/CN2013/088102 CN2013088102W WO2015077970A1 WO 2015077970 A1 WO2015077970 A1 WO 2015077970A1 CN 2013088102 W CN2013088102 W CN 2013088102W WO 2015077970 A1 WO2015077970 A1 WO 2015077970A1
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layer
flexible display
display component
substrate
graphene
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French (fr)
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胡国仁
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
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    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
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    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6731—Top-gate only TFTs
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    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
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    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
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    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
    • H10D86/0229—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials characterised by control of the annealing or irradiation parameters
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    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
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    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
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    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
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    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
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    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
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    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
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    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
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    • H10D62/881—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being a two-dimensional material
    • H10D62/882—Graphene

Definitions

  • the present invention relates to a method of fabricating a flexible display assembly and a flexible display assembly therefor.
  • CTR cathode ray tubes
  • FPD flat panel display
  • a thin film transistor (TFT) substrate is one of the important components of a flexible display.
  • TFT thin film transistor
  • the selection and development of substrate materials is the most important issue in the development of flexible displays.
  • the choice of flexible substrate materials is plastic substrate (piasrie substrate), ultra-thin glass
  • plastic substrate thin glass substrate, and metal foil, wherein the plastic substrate is ideal for lightness, impact resistance, and low cost, but the plastic substrate has problems such as high temperature resistance and large thermal expansion.
  • FIG. 1 is a schematic structural diagram of a conventional flexible thin film transistor substrate, comprising: a glass substrate 100, a soft substrate 300 formed on a glass substrate, and a protective layer formed on the flexible substrate 300.
  • 500 A low temperature polysilicon layer 700 formed on the security 500 and a thin film crystal array (not shown) formed on the low temperature polysilicon layer 700, wherein the protective layer 500 includes a silicon nitride layer 502 formed on the flexible substrate 300 and formed
  • the silicon oxide layer 504 on the silicon nitride layer 502, the low temperature polysilicon layer 700 is generally formed by an annealing process through an amorphous silicon layer, and since the formation of the low temperature polysilicon layer 700 also requires laser activation, laser activation generates 4
  • the large amount of heat when the heat is transferred to the flexible substrate 300, may cause deformation of the flexible substrate 300, which seriously affects the quality of the flexible thin film transistor substrate.
  • another flexible thin film transistor substrate has increased the thickness of the silicon oxide layer 504 of the protective layer 500 (from about 500 nm to about 1 2 ⁇ m) to isolate Heat is transferred to the flexible substrate 300.
  • this method is to some extent
  • Another object of the present invention is to provide a flexible display assembly which is simple in structure, less affected by heat during processing, and has a relatively thin thickness to facilitate thinning.
  • the present invention provides a method for fabricating a flexible display assembly, comprising the steps of: step 2, forming a graphene layer on the softness;
  • Step 3 forming a protective layer on the graphene layer
  • Step 4 Form a low temperature polysilicon layer on the protective layer.
  • the soft substrate is made of polyethylene terephthalate, polyethylene naphthalate, or polyimide.
  • the graphene layer is formed on the flexible substrate by a microwave chemical vapor deposition, transfer or spin coating process, and the graphene layer has a thickness of from 0 nm to 00 nm.
  • the protective layer includes at least one layer of a silicon nitride layer and a silicon oxide layer.
  • the low temperature polysilicon layer is formed by an amorphous silicon layer through an annealing process and then processed by a doping and laser activation process.
  • the invention also provides a method for manufacturing a flexible display assembly, comprising the following steps: Step 1. providing a soft substrate;
  • Step 2 forming a graphene layer on the soft substrate
  • Step 3 forming a protective layer on the graphene layer
  • Step 4 forming a low temperature polysilicon layer on the protective layer
  • the soft substrate is made of polyethylene terephthalate, polyethylene naphthalate, or polyimide.
  • the graphene layer is formed on the flexible substrate by a microwave chemical vapor deposition, transfer or spin coating process, and the graphene layer has a thickness of I Omii - 100 nm.
  • the protective layer includes at least one layer of a silicon nitride layer and a silicon oxide layer.
  • the low temperature polysilicon layer is formed by an amorphous silicon layer through an annealing process and then processed by a doping and laser activation process.
  • the present invention also provides a flexible display assembly comprising: a flexible substrate, a graphene layer formed on the flexible substrate, a protective layer formed on the graphene layer, and a low temperature multi-layer formed on the protective layer.
  • the soft substrate is made of polyethylene terephthalate, polyethylene naphthalate, or polyimide.
  • the graphene layer is formed on the flexible substrate by a microwave chemical vapor deposition, transfer or spin coating process, and the graphene layer has a thickness of from 0 nm to 00 nm.
  • the protective layer includes at least one layer of a silicon nitride layer and a silicon oxide layer.
  • the low temperature polysilicon layer is formed by an amorphous silicon layer through an annealing process, and then processed by a doping and laser activation process.
  • the method for fabricating the flexible display assembly of the present invention and the flexible display assembly thereof can effectively extract heat generated in the process of the low temperature polysilicon layer by forming a graphene layer on a soft substrate, thereby avoiding The effect of heat on the soft substrate, at the same time, does not require an increase in the thickness of the protective layer, reduces internal stress, and facilitates thinning.
  • FIG. 1 is a schematic structural view of a conventional flexible thin film transistor substrate
  • FIG. 2 is a schematic structural view of another conventional flexible thin film transistor substrate
  • FIG. 3 is a flow chart of a method of fabricating a flexible display assembly of the present invention.
  • FIG. 4 is a schematic structural view of a flexible display assembly of the present invention.
  • the present invention provides a method for fabricating a flexible display assembly, and the package step 1 provides a flexible substrate 22.
  • the flexible substrate 22 is made of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide ( ⁇ ). In the present embodiment, the flexible substrate 22 is formed on the glass substrate 20.
  • a graphene layer 24 is formed on the flexible substrate 22.
  • the graphene layer 24 is formed on the flexible substrate 22 by a microwave chemical vapor deposition (micro wave CVD), transfer or spin coating process.
  • Graphene is a single-layered sheet-like structure composed of carbon atoms.
  • the three-dimensional structure of graphene has ultra-high equivalent thermal conductivity and ultra-low interfacial thermal resistance, so the graphene layer 24 has excellent thermal conductivity.
  • the heat can be well derived to protect the soft substrate 22.
  • the thickness of the graphene layer 24 is not particularly required, but from the viewpoint of facilitating the reduction in thickness, the thickness is preferably from 10 nm to 100 nm.
  • the graphene layer 24 can be an entire layer and can be patterned to suit different requirements of different products.
  • Step 3 A protective layer 26 is formed on the graphene layer 24.
  • the protective layer 26 includes at least one layer of a silicon nitride layer (SiNx) 262 and a silicon oxide layer (SiOx) 264.
  • the protective layer 26 is a stack of a silicon nitride layer 262 and a silicon oxide layer 264.
  • the silicon oxide layer 264 can be formed by a chemical vapor deposition method.
  • the thickness of the silicon oxide layer 264 in the protective layer 26 can be relatively thin (in this case, the thickness of the silicon oxide layer 264 can be about 500 nm), compared with the conventional increase in the thickness of the silicon oxide layer. In the case where the thickness of the silicon oxide layer is 1 - 2 ⁇ ⁇ , the thickness is significantly reduced; thereby ensuring a relatively small thickness of the entire flexible display assembly.
  • Step 4 Form a low temperature polysilicon layer 28 on the protective layer 26.
  • the low temperature polysilicon layer 28 is formed by an amorphous silicon layer through an annealing process and then processed by doping, laser activation, or the like.
  • the laser is activated, the heat generated by the laser is led out through the graphene layer 24, which can effectively prevent the soft substrate 22 from being affected by the heat, and does not need to thicken the thickness of the protective layer 26, thereby facilitating the thinning.
  • the present invention also provides a flexible display assembly, comprising: a soft substrate
  • the flexible display assembly is formed on a glass substrate 20.
  • the flexible substrate 22 is made of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide (PI).
  • the graphene layer 24 is formed on the flexible substrate 22 by a microwave chemical vapor deposition (micro wave CVD), transfer or spin coat process.
  • Graphene is a single-layered sheet-like structure composed of carbon atoms.
  • the three-dimensional structure of graphene has ultra-high equivalent thermal conductivity and ultra-low interfacial thermal resistance, so the graphene layer 24 has excellent thermal conductivity. Good heat transfer and protection of soft substrates There are no special requirements, but from the perspective of thinning
  • the protective layer 26 includes at least one layer of a silicon nitride layer 262 and a silicon oxide layer 264.
  • the protective layer 26 is a laminate of a silicon nitride layer 262 and a silicon oxide layer 264, wherein nitriding A silicon layer 262 is formed on the graphene layer 24, and a silicon oxide layer 264 is formed on the silicon nitride layer 262.
  • the silicon nitride layer 262 and the silicon oxide layer 264 can be formed by chemical vapor deposition.
  • the thickness of the silicon oxide layer 264 in the protective layer 26 can be relatively thin (in this case, the thickness of the silicon oxide layer 264 can be about 500 nm), compared with the conventional increase in the thickness of the silicon oxide layer. In the case where the thickness of the silicon oxide layer is 1 - 2 ⁇ ⁇ , the thickness is significantly reduced; the thickness of the entire flexible display assembly is relatively small.
  • the low temperature polysilicon layer 28 is formed by an amorphous silicon layer through an annealing process and then processed by doping, laser activation, or the like.
  • the laser is activated, the heat generated by the laser is led out through the graphene layer 24, which can effectively prevent the soft substrate 22 from being affected by the heat, and does not need to thicken the thickness of the protective layer 26, thereby facilitating the thinning.
  • the graphene layer 24 can be an entire layer and can be patterned to suit different requirements of different products.
  • the method for fabricating the flexible display assembly of the present invention and the flexible display assembly thereof can effectively derive the heat generated in the process of the low temperature polysilicon layer by forming a graphene layer on the soft substrate, thereby avoiding heat.
  • the effect on the soft substrate does not need to increase the thickness of the protective layer, reduce the internal stress, and is conducive to thinning.

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Abstract

一种软性显示器组件的制作方法及其制作的软性显示器组件。所述方法包括：步骤1、提供软性基底（22）；步骤2、在该软性基底（22）上形成石墨烯层（24）；步骤3、在石墨烯层（24）上形成保护层（26）；步骤4、在保护层（26）上形成低温多晶硅层（28）。通过在软性基底（22）上形成石墨烯层（24）能够有效导出低温多晶硅层（28）制程中所产生的热量，进而避免热量对软性基底（22）的影响，同时不需要增加保护层（26）的厚度，减小了内部应力，且利于薄型化。

Description

本发明涉及显 尤其涉及一种软性显示器组件的制作方法及其 制作的软性显示器组件。 背景;
随着显示技术与信息产品的蓬勃发展：
( cathode ray tubes , CRT )进入平面显示器 ( flat panel display, FPD ) 时 代。 而软性显示器（flexible display ) 更因其与现有刚性玻璃面板平面显示 器相比， 具有更轻薄、 可挠曲、 耐冲击等性能而具安全性， 且不受场合、 空间限制， 成为下一代显示器发展的新趋势。
软性薄膜晶体管 （ thin film transistor, TFT )基板是软性显示器的重要 组件之一， 其基板材料的选择与开发更是软性显示器发展上最重要的议 题。 目前软性基板材料的选择有塑料基板（piasrie substrate ) 、 超薄玻璃
( thin glass )基板、 以及金属软板 ( metal foil ) ， 其中塑料基板可以实现 轻薄、 耐冲击、 低成本的理想， 但塑料基板具有不耐高温制程、 热膨胀系 数较大等问题。
请参阅图 1 , 为现有的一种软性薄膜晶体管基板的结构示意图， 其包 括： 玻璃基板 100、 形成于玻璃基板 】00上的软性基底 300、 形成于软性 基底 300上的保护层 500、 形成于保 500上的低温多晶硅层 700及形 成于低温多晶硅层 700上的薄膜晶体 阵列 （未图示） ， 其中保护层 500 包括形成于软性基底 300上的氮化硅层 502及形成于氮化硅层 502上的氧 化硅层 504， 低温多晶硅层 700 —般通过非晶硅层经由退火工艺形成， 且， 由于低温多晶硅层 700 的形成还需要经过激光活化， 而激光活化会产 生 4艮大的热量， 当该热量传递到软性基底 300 时， 可能导致软性基底 300 变形， 严重影响软性薄膜晶体管基板的品质。
如图 2所示， 为了解决上述问题， 现有另一种软性薄膜晶体管基板增 加了保护层 500，的氧化硅层 504，的厚度 （从 500nm 左右增加到 1- 2 μ m ) ， 以隔绝热量传递到软性基底 300 上。 虽然， 该种方法在一定程度上
300变形的几率， 但， 由于氧化硅层 504'的厚度过大， 则
Figure imgf000002_0001
， 影响软性薄膜晶体管基板的卷曲性能， 同时， 还可能造 成低温多硅层 700结晶不良等问题。 发明内容
本发明的目的在于提供一种软性显示器组件的制作方法， 其制程简 单， 能有效避.免热量对软性基底的影响， 提升了软性显示器组件的品质。
本发明的另一目的在于提供一种软性显示器组件， 其结构简单， 在制 程中受热量影响较小， 且具有较薄的厚度， 利于实现薄型化。
为实现上述目的， 本发明提供一种软性显示器组件的制作方法， 包括 以下步骤： ^骤 2、 在该软性 ^上形成石墨烯层；
步骤 3、 在石墨烯层上形成保护层；
步骤 4、 在保护层上形成低温多晶硅层。
所述软性基底由聚对苯二曱酸乙二醇酯、 聚萘二曱酸乙二醇酯、 或聚 酰亚胺制成。
所述石墨烯层通过微波化学气相沉积、 转移或旋涂工艺形成于所述软 性基底上， 所述石墨烯层厚度为〗0nm- 00nm。
所述保护层包括氮化硅层、 氧化硅层至少一层。
所述低温多晶硅层通过非晶硅层经由退火工艺形成， 再通过掺杂、 激 光活化工艺处理。
本发明还提供一种软性显示器组件的制作方法， 包括以下步骤： 步骤 1、 提供软性基底；
步糠 2、 在该软性基底上形成石墨烯层；
步骤 3、 在石墨烯层上形成保护层；
步骤 4、 在保护层上形成低温多晶硅层；
其中， 所述软性基底由聚对苯二甲酸乙二醇酯、 聚萘二甲酸乙二醇 酯、 或聚酰亚胺制成。
所述石墨烯层通过微波化学气相沉积、 转移或旋涂工艺形成于所述软 性基底上， 所述石墨烯层厚度为 I Omii- 100nm。
所述保护层包括氮化硅层、 氧化硅层至少一层。
所述低温多晶硅层通过非晶硅层经由退火工艺形成， 再通过掺杂、 激 光活化工艺处理。
本发明还提供一种软性显示器组件， 包括： 软性基底、 形成于软性基 底上的石墨烯层、 形成于石墨烯层上的保护层及形成于保护层上的低温多 凌层。 所述软性基底由聚对苯二曱酸乙二醇酯、 聚萘二曱酸乙二醇酯、 或聚 酰亚胺制成。
所述石墨烯层通过微波化学气相沉积、 转移或旋涂工艺形成于所述软 性基底上， 所述石墨烯层厚度为〗0nm- 00nm。
所述保护层包括氮化硅层、 氧化硅层至少一层。
所述低温多晶硅层通过非晶硅层经由退火工艺形成， 再通过掺杂、 激 光活化工艺处理„
本发明的有益效果： 本发明的软性显示器组件的制作方法及其制作的 软性显示器组件， 通过在软性基底上形成石墨烯层， 有效导出低温多晶硅 层制程中所产生的热量， 进而避免热量对软性基底的影响， 同时， 不需要 增加保护层的厚度， 减小了内部应力， 且利于薄型化。
为了能更进一步了解本发明的特征以及技术内容， 请参阅以下有关本 发明的详细说明与酎图， 然而附图仅提供参考与说明用， 并非用来对本发 明加以限制。 附图说明
下面结合附图， 通过对本发明的具体实施方式详细描述， 将使本发明 的技术方案及其它有益效果显而易见
附图中，
图 1为现有的一种软性薄膜晶体管基板的结构示意图；
图 2为现有的另一种软性薄膜晶体管基板的结构示意图；
图 3为本发明软性显示器组件的制作方法的流程图；
图 4为本发明软性显示器组件的结构示意图。
为更进一步阐述本发明所采取的技术手段及其效果， 以下结合本发明 的优选实施例及其附图进行详细描述。
请参阅图 3及图 4, 本发明提供一种软性显示器组件的制作方法， 包 步骤 1、 提供软性基底 22。
所述软性基底 22由聚对苯二甲酸乙二醇酯（PET ) 、 聚萘二曱酸乙二 醇酯 （PEN ) 、 或聚酰亚胺（Ρΐ )制成。 在本实施例中， 所述软性基底 22 形成于玻璃基板 20上。
Figure imgf000004_0001
在该软性基底 22上形成石墨烯层 24。 所述石墨烯 ( graphene )层 24 通过微波化学气相沉积 ( micro wave CVD ) 、 转移或旋涂（spin coat )工艺形成于所述软性基底 22上。 石墨烯 是一种由碳原子构成的单层片状结构的材料， 三维立体结构的石墨烯具有 超高等效热导率和超低界面热阻， 因此该石墨烯层 24 具有优异的导热效 果， 能够很好的导出热量， 保护软性基底 22。 其中， 所述石墨烯层 24厚 度没有特别要求， 但从利于薄型化的方面考虑， 优选厚度为 lOnm- 100nm。
值得一提的是， 该石墨烯层 24 可以为一整层还可以进行图案化， 以 适应不同产品的不同要求。
步骤 3、 在石墨烯层 24上形成保护层 26。
所述保护层 26 包括氮化硅层（SiNx ) 262、 氧化硅层（ SiOx ) 264至 少一层， 在本实施例中， 所述保护层 26 为氮化硅层 262 与氧化硅层 264 的叠层， 其中， 氮化硅层 262形成于石墨烯层 24上， 氧化硅层 264形成 于氮化硅层 262上。 所述氮化硅层 262. 氧化硅层 264可利用化学气相沉 积法形成。
其中， 由于设置了石墨烯层 24， 故而保护层 26中氧化硅层 264的厚 度可以相对较薄 （此时氧化硅层 264厚度可以为 500nm左右） ， 相较于传 统的增加氧化硅层厚度的方案 （此时氧化硅层厚度为 1- 2 μ ηι ) 而言， 厚度 明显减小； 进而保证整个软性显示器组件的厚度相对较小。
步骤 4、 在保护层 26上形成低温多晶硅层 28。
所述低温多晶硅层 28 通过非晶硅层经由退火工艺形成， 然后再通过 掺杂、 激光活化等工艺处理。 激光活化时， 激光产生的热量通过石墨烯层 24导出， 能有效避免软性基底 22 受到热量的影响， 且不需要加厚保护层 26的厚度， 利于实现薄型化。
请参阅图 4， 本发明还提供一种软性显示器组件， 包括： 软性基底
22、 形成于软性基底 22上的石墨烯层 24、 形成于石墨烯层 24上的保护层 26及形成于保护层 26上的低温多晶硅层 28。 在本实施例中， 所述软性显 示器组件形成于玻璃基板 20上。
具体地， 所述软性基底 22由聚对苯二甲酸乙二醇酯（PET ) 、 聚萘二 曱酸乙二醇酯（PEN ) 、 或聚酰亚胺（PI ) 制成。 所述石墨烯层 24通过微 波化学气相沉积 ( micro wave CVD ) 、 转移或旋涂 ( spin coat ) 工艺形成 于所述软性基底 22 上。 石墨烯是一种由碳原子构成的单层片状结构的材 料， 三维立体结构的石墨烯具有超高等效热导率和超低界面热阻， 因此该 石墨烯层 24 具有优异的导热效果， 能够很好的导出热量， 保护软性基底 度没有特别要求， 但从利于薄型化的方面
Figure imgf000006_0001
所述保护层 26包括氮化硅层 262、 氧化硅层 264至少一层， 在本实施 例中， 所述保护层 26为氮化硅层 262与氧化硅层 264的叠层， 其中， 氮 化硅层 262 形成于石墨烯层 24 上， 氧化硅层 264 形成于氮化硅层 262 上。 所述氮化硅层 262、 氧化硅层 264可利用化学气相沉积法形成。
其中， 由于设置了石墨烯层 24, 故而保护层 26中氧化硅层 264的厚 度可以相对较薄 （此时氧化硅层 264厚度可以为 500nm左右） , 相较于传 统的增加氧化硅层厚度的方案 （此时氧化硅层厚度为 1 - 2 μ ιη ) 而言， 厚度 明显减小； 进 ^保证整个软性显示器组件的厚度相对较小。
所述低温多晶硅层 28 通过非晶硅层经由退火工艺形成， 然后再通过 掺杂、 激光活化等工艺处理。 激光活化时， 激光产生的热量通过石墨烯层 24导出， 能有效避免软性基底 22 受到热量的影响， 且不需要加厚保护层 26的厚度， 利于实现薄型化。
值得一提的是， 该石墨烯层 24 可以为一整层还可以进行图案化， 以 适应不同产品的不同要求。
综上所述， 本发明的软性显示器组件的制作方法及其制作的软性显示 器组件， 通过在软性基底上形成石墨烯层， 有效导出低温多晶硅层制程中 所产生的热量， 进而避免热量对软性基底的影响， 同时， 不需要增加保护 层的厚度， 减小了内部应力， 且利于薄型化。
以上所述， 对于本领域的普通技术人员来说， 可以根据本发明的技术 方案和技术构思作出其他各种相应的改变和变形， 而所有这些改变和变形 都应属于本发明权利要求的保护范围。

Claims

-种软性显示器组件的制作方法， 步骤 2、 在该软性 底上形成石墨婦层;
步骤 3、 在石墨烯层上形成保护层；
步骤 4、 在保护层上形成低温多晶硅层。
2、 如权利要求 1 所述的软性显示器组件的制作方法. 其中， 所述软 性基底由聚对苯
Figure imgf000007_0001
或聚酰亚胺制 成。
3、 如权利要求 1 所述的软性显示器组件的制作方法， 其中 所述石 墨烯层通过微波化学气相沉积、 工艺形成于所述软性基底上， 所述石墨烯层厚度为 lOmn- 100nm。
4、 如权利要求 1 所述的软性显示器组件的制作方法 其中， 所述保 护层包括氮化硅层、 氧化硅层至少一层。
5、 如权利要求 所述的软性显示器组件的制作方法 其中， 所述低 温多晶硅层通过非晶硅层经由退火工艺形成， 再通过掺杂 激光活化工艺 处理。
6、 一种软性显示器组件的制作方法， 包括以下步骤：
步骤 1、 提供软性基底；
在该软性基底上形成石墨烯层；
Figure imgf000007_0002
在石墨烯层上形成保护层；
步骤 4、 在保护层上形成低温多晶硅层；
其中， 所述软性基底由聚对苯二甲酸乙二醇酯、 聚 甲酸乙二醇 或聚酰亚胺制成。
7、 如权利要求 6
墨婦层通过微波化学气相沉积、
Figure imgf000007_0003
所述石墨烯层厚度为 lOmn- l()0nm。
8、 如权利要求 6 所述的软性显示器组件的制作方法 其中， 所述保 护层包括氮化硅层、 氧化硅层至少一层。
9、 如权利要求 6 所述的软性显示器组件的制作方法 其中， 所述低 温多晶硅层通过非晶硅层经由退火工艺形成，
Figure imgf000007_0004
激光活化工艺 处理。
10、 一种软性显示器组件， 包括： 软性基底、 形成于软性基底上的石 墨烯层、 形成于石墨烯层上的保护层及形成于保护层上的低温多晶硅层。
11、 如权利要求 10 所述的软性显示器组件， 其中， 所述软性基底由 聚对苯二甲酸乙二醇酯、 聚萘二曱酸乙二醇酯、 或聚酰亚胺制成。
12、 如权利要求 10 所述的软性显示器组件， 其中， 所述石墨烯层通 过微波化学气相沉积 转移或旋涂工艺形成于所述软性基底上， 所述石墨 歸层厚度为 iOmn- 100nm。
13、 如权利要求 10 所述的软性显示器组件， 其中， 所述保护层包括 氮化^层、 氧化硅层至少一层。
14、 如权利要求 10 所述的软性显示器组件， 其中， 所述低温多晶硅 层通过非晶硅层经由退火工艺形成， 再通过捧杂、 激光活化工艺处理。
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