WO2015018843A1 - Composant optoélectronique et son procédé de fabrication - Google Patents

Composant optoélectronique et son procédé de fabrication Download PDF

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Publication number
WO2015018843A1
WO2015018843A1 PCT/EP2014/066852 EP2014066852W WO2015018843A1 WO 2015018843 A1 WO2015018843 A1 WO 2015018843A1 EP 2014066852 W EP2014066852 W EP 2014066852W WO 2015018843 A1 WO2015018843 A1 WO 2015018843A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
optoelectronic
semiconductor chip
housing
contact portion
Prior art date
Application number
PCT/EP2014/066852
Other languages
German (de)
English (en)
Inventor
Patrick Kromotis
Emanuel HOFMANN
Ludwig PEYKER
Torsten Baade
Simone KIENER
Kristin Grosse
Original Assignee
Osram Opto Semiconductors Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Priority to US14/909,850 priority Critical patent/US9564566B2/en
Priority to JP2016532670A priority patent/JP6194426B2/ja
Priority to CN201480044613.3A priority patent/CN105431952B/zh
Publication of WO2015018843A1 publication Critical patent/WO2015018843A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • optoelectronic components with optoelekt ⁇ tronic semiconductor chips with housings, which have embedded lead frame portions made of copper.
  • optoelectronic devices of the optoelectronic semiconductor chip is disposed on a lead frame ⁇ portion and embedded in a potting material.
  • copper can diffuse out of the lead frame portions such optoelectronic devices through the molding material to a pn junction of the optoelectronic semiconductor chip.
  • the diffused copper may cause Degrada ⁇ tion of the optoelectronic semiconductor chip.
  • An object of the present invention is to provide an optoelectronic device. This object is achieved by an optoelectronic component having the features of claim 1.
  • Another object of the vorlie ⁇ constricting invention is to provide a method for producing an optoelectronic component. This object is achieved by a method having the features of claim 8.
  • the dependent claims specify various developments.
  • An optoelectronic component comprises a housing, which has an electrically conductive first contact section, and an optoelectronic semiconductor chip, which is arranged on the first contact section.
  • the opto ⁇ electronic semiconductor chip and the first contact portion are at least partially covered by a first layer, the one Silicone has.
  • a second layer is disposed, which comprises S1O 2 .
  • a third layer is arranged.
  • S1O 2 second layer comprising DIE ses optoelectronic component as a diffusion barrier.
  • the second layer comprising S1O 2 can act as a diffusion barrier for copper.
  • the first contact section comprises copper.
  • the first contact portion by a high electrical conductivity.
  • the first Kon ⁇ clock section can thereby advantageously by soldering
  • the housing has a housing frame.
  • the ers ⁇ te contact portion is embedded in the housing frame.
  • the Ge ⁇ housing frame for example, a plastic, for example, an epoxy resin, or have a ceramic.
  • the housing frame of the optoelectronic component can be produced for example by a molding process (molding process) or by a casting process by means of a spindle dispenser, jetter or time pressure dispenser.
  • the housing has a cavity.
  • the first Kon ⁇ clock section is disposed in a bottom portion of the cavity.
  • the optoelectronic semiconductor chip of this optoelectronic component can be arranged in the cavity of the housing and protected there from damage by external me ⁇ chanical influences.
  • the cavity can also, for example, be an optical reflector of the optoelectronic see make up component.
  • the first layer, second layer and third layer arranged above the first contact section and the optoelectronic semiconductor chip of the optoelectronic component can advantageously be arranged in the cavity with little technical outlay.
  • the third layer of the optoelectronic component can serve for a mechanical protection of the optoelectronic semiconductor chip.
  • the third layer can also take over other functions.
  • the third layer can effect a wavelength conversion of an electromagnetic radiation emitted by the optoelectronic semiconductor chip of the optoelectronic component.
  • the first layer has a thickness between 1 ⁇ m and 100 ⁇ m, preferably a thickness between 5 ⁇ m and 20 ⁇ m.
  • Example ⁇ example may comprise the first layer of the optoelectronic Bauele ⁇ ments a thickness of 10 ym.
  • the first layer is thereby so thin that within the first layer a diffusion of copper can take place only to a very small extent.
  • the second layer has a thickness between 10 nm and 1 ym on, preferably a thickness between 50 nm and 200 nm.
  • the second layer of the optoelectronic component can have a thickness of 100 nm.
  • the second layer of the optoelectronic Bauele ⁇ ments then acts as a diffusion barrier for copper.
  • the housing has an electrically conductive second contact section, which is electrically insulated from the first contact section.
  • the opto ⁇ electronic semiconductor chip of the optoelectronic device can then be electrically controlled via the first contact portion and the second contact portion.
  • a method for producing an optoelectronic component comprises steps of providing a housing which has an electrically conductive first contact section for arranging an optoelectronic semiconductor chip on the first contact section, for arranging a first layer comprising a silicone on at least parts of the optoelectronic ⁇ Semiconductor chips and the first contact portion, for forming a second layer having S1O 2 on a surface of the first layer, and for disposing a third layer over the second layer.
  • this method enables production of a optoelekt ⁇ tronic device, in which a S1O 2 having second layer as a diffusion barrier, in particular as a diffusion barrier for copper ⁇ acts.
  • the second layer is formed by converting a portion of the first layer.
  • the production of the second layer is thereby particularly easy.
  • no separate process step for depositing the second layer is required for the production of the second layer.
  • the conversion of the part of the first layer takes place by oxidation.
  • the first layer contained Si in S1O 2 is converted.
  • the conversion of the part of the first layer takes place by means of a plasma treatment.
  • a plasma treatment is suitable in to convert Si contained in the first layer into S1O 2 .
  • the plasma acts substantially on the surface of the ers ⁇ th layer, so that the second layer is formed on the surface of the first layer.
  • the first layer is arranged by casting or jetting.
  • this allows a cost-effective and reproducible arrangement of the first layer.
  • the method is advantageously suitable for mass production.
  • Figure 1 is a schematic sectional view of a optoelektroni- see device.
  • FIG. 1 shows a schematic sectional side view of part of an optoelectronic component 100.
  • the optoelectronic component 100 may be, for example, a light-emitting diode component.
  • the optoelectronic device 100 includes a housing 200.
  • the housing 200 has a top surface 201 and one of the upper ⁇ side 201 opposite bottom 202.
  • the housing 200 of the optoelectronic device 100 includes a Ge ⁇ houses mimic 400 and an embedded in the housing frame 400 lead frame 300.
  • the housing frame 400 may, for example, an electrically insulating plastic material, wherein ⁇ have play, an epoxy resin, or a ceramic.
  • the housing frame 400 may be prepared for example by a molding process (molding process) or by a casting process by means of spin ⁇ del dispenser, Jetter or time-pressure dispenser.
  • the lead frame 300 may also be referred to as a leadframe.
  • the lead frame 300 comprises an electrically conductive material, such as a metal.
  • the leadframe 300 may comprise copper. Copper has the advantage of being highly electrically conductive and is suitable for electrical contacting by means of soldering.
  • the lead frame 300 has an upper side 301 and an upper side 302 opposite the upper side 301.
  • the Lei ⁇ terrahmen 300 is in a first contact portion 310 and with a second contact portion 320th
  • the first Kon ⁇ clock section 310 and the second contact portion 320 are physically separated and mutually electrically insulated from each other.
  • the contact portions 310, 320 may also be referred to as Lei ⁇ terrahmenabête.
  • the contact portions 310, 320 of the leadframe 300 are embedded in the housing frame 400 such that both the top surface 301 and the bottom surface 302 of the leadframe
  • the housing 200 of the optoelectronic component 100 has a cavity 410 on its upper side 201.
  • the cavity 410 is formed as a recess in the housing frame 400 on the upper side 201 of the housing 200.
  • the cavity 410 may for example comprise a nikschei- benförmigen or a rectangular cross section. In the sectional view of FIG. 1, the cavity 410 tapers, starting from the upper side 201 of the housing 200, to a pyramid. dull-shaped. However, the cavity 410 could also have a cylindrical shape or other shape.
  • the cavity 410 of the housing 200 of the optoelectronic component 100 has a bottom area 420 and a peripheral wall 430.
  • the wall 430 is formed by the material of the housing frame ⁇ 400.
  • the wall 430 forms a lateral surface of the cavity 410.
  • the wall 430 of the cavity 410 of the housing 200 of the optoelectronic component 100 may form a reflector gate, which serves emitted by the optoelectronic component 100 of electromagnetic radiation to bün ⁇ spindles.
  • the bottom region 420 forms a bottom surface of the cavity 410. In the bottom region 420 of the cavity 410 of the housing 200, parts of the top side 301 of the first contact section 310 and the second contact section 320 of the leadframe 300 are exposed.
  • the optoelectronic component 100 further comprises an optoelectronic semiconductor chip 500.
  • the optoelectronic semiconductor chip 500 may be, for example, a light emitting diode chip (LED chip).
  • the optoelectronic semiconductor chip 500 has an upper side 501 and a lower side 502 opposite the upper side 501.
  • the top surface 501 of the opto ⁇ electronic semiconductor chip 500 forms a radiation emission area of the optoelectronic semiconductor chip 500.
  • the optoelectronic semiconductor chip 500 is to bebil ⁇ det, forming at its radiation emitting surface upper ⁇ page 501 electromagnetic radiation, for example visual ⁇ bares light to radiate.
  • a first electrical contact surface 510 of the opto ⁇ electronic semiconductor chip 500 is formed on the upper side 501 of the optoelectronic semiconductor chip 500.
  • a second electrical contact surface 520 is formed on the underside 502 of the optoelectronic semiconductor chip 500. Via the first electrical contact surface 510 and the second electrical contact area 520 cal ⁇ an electrical voltage to the optoelectronic semiconductor chip 500 can be applied to the Optoelectronic semiconductor chip 500 to emit electromagnetic radiation.
  • the optoelectronic semiconductor chip 500 is arranged in the cavity 410 of the housing 200 of the optoelectronic component 100.
  • the optoelectronic semiconductor chip 500 is in the bottom region 420 of the cavity 410 on the upper side 301 of the first contact portion 310 of the lead frame 300 angeord ⁇ net.
  • the optoelectronic semiconductor chip 500 is connected to the first contact section 310 by means of a conductive connection 530.
  • the conductive connection 530 establishes an electrically conductive contact between the second electrical contact surface 520 of the optoelectronic semiconductor chip 500 on the underside 502 of the optoelectronic semiconductor chip 500 and the first contact section 310.
  • the lead compound 530 may be ge example, by a solder forms ⁇ .
  • the formed on the upper surface 501 of the optoelectronic semiconductor chip 500 first electrical contact surface 510 of the optoelectronic semiconductor chip 500 by means of a bonding wire 540 electrically conductive section to the second contact distances 320 of the lead frame 300 of the housing 200 of the opto ⁇ electronic device 100 is connected.
  • the bonding wire 540 preferably runs completely within the cavity 410 of the housing 200. Instead of the bonding wire 540, another electrically conductive connection between the first electrical contact surface 510 of the optoelectronic
  • the optoelectronic semiconductor chip 500, the bottom region 420 and parts of the wall 430 of the cavity 410 of the housing 200 of the optoelectronic component 100 are covered by a first layer 610.
  • the first layer 610 thereby covers vorzugt the entire upper surface 501 of the optoelectronic semiconductor chip 500 and between the top 501 and the bottom 502 of the optoelectronic semiconductor chip 500 extending side surfaces of the optoelectronic semiconductor chip 500.
  • the first layer 610 be ⁇ vorzugt in the bottom region 420 of the cavity 410 of the Housing 200 exposed parts of the top 301 of the first contact ⁇ section 310 and the second contact portion 320 of the Lei ⁇ terrahmens 300.
  • the first layer 610 forms a continuous and closed layer.
  • the first layer 610 comprises a silicone.
  • Layer 610 may have been applied, for example, by potting or by jetting. Jetting here refers to a method in which the material of the first layer 610 is applied under pressure through a nozzle.
  • the first layer was preferably applied after the arrangement of the optoelectronic semiconductor chip 500 in the cavity 410 and to the on ⁇ arrange the bonding wire 540,610.
  • the first layer 610 has a thickness 611.
  • the thickness 611 is preferably between 1 ⁇ m and 100 ⁇ m. More preferably, the thickness 611 of the first layer 610 is between 5 ym and 20 ym. For example, the first layer 610 may have a thickness 611 of 10 ym.
  • the first layer 610 in comparison to the dimensions of the optoelectronic semiconductor chip 500 and the cavity 410 of the housing 200 on a ge ⁇ rings thickness.
  • a two ⁇ th layer 620 is arranged on a surface 612 of the first layer 610.
  • the second layer 620 has S1O 2 .
  • the second layer 620 has a thickness 621.
  • the di ⁇ blocks 621 of the second layer 620 is preferably between 10 nm and 1 ym. Particularly preferably, the thickness 621 of the second layer 620 is between 50 nm and 200 nm. For example, the second layer 620 may have a thickness of 621 100 nm aufwei ⁇ sen.
  • the second layer 620 is preferably formed by converting a portion of the first layer 610 disposed on the surface 612 of the first layer 610. In this case, part of the material of a part of the first layer 610 was oxidized. Here, Si has been converted from the first layer 610 in S1O.
  • the converting the arranged on the Oberflä ⁇ surface 612 of the first layer 610 portion of the first layer 610 is effected by means of a plasma treatment.
  • Forming the second layer 620 by converting a portion of the material of the first layer 610 may also be referred to as glazing.
  • a third layer 630 is disposed above the second layer 620.
  • the third layer 630 preferably substantially completely fills the cavity 410.
  • the third layer 630 may have a thickness that is significantly greater than the thickness 611 of the first layer 610 and the thickness 621 of the second layer 620.
  • the opto-electro ⁇ African semiconductor chip 500 and the bonding wire 540 in essential are preferred chen a ⁇ completely embedded in the material of the third layer 630th As a result, the third layer 630 protects the opto ⁇ electronic semiconductor chip 500 and the bonding wire 540 from damage due to external mechanical influences.
  • the third layer 630 can comprise a silicone, and have been playing introduced at ⁇ by casting in the cavity 410th
  • the third layer 630 may also have embedded wavelength converting particles are seen to before ⁇ , a wavelength of the preview by the optoelectronic semiconductor chip emitted 500 electromagnetic
  • the embedded wavelength converting particles can absorb electromagnetic this Strah ⁇ lung having a first wavelength and subsequently ⁇ td electromagnetic radiation having a second, typically as larger emitting wavelength.
  • the wavelength-converting particles may, for example, be an organic phosphor or an inorganic phosphor. believe it.
  • the wavelength-converting particles may also comprise quantum dots.
  • the first layer 610, second layer 620 and the third layer 630 together form a casting 600 optoelekt ⁇ tronic device 100th
  • the second layer 620 of the encapsulation 600 having the SiO 2 2 of the optoelectronic component 100 forms a diffusion barrier. Specifically, the second layer 620 forms a barrier for copper Diffu ⁇ sion. From the contact portions 310, 320 of the lead frame 300 of the housing 200 of the optoelectronic device 100 dissolved copper, the second layer 620 can not or only to a small extent penetrate. This prevents that from the contact portions 310, 320 of the Lei ⁇ terrahmens 300 dissolved copper through the potting 600 to a near the top 501 of the optoelectronic semiconductor chip 500 arranged pn junction of the optoelectronic semiconductor chip 500 can diffuse.
  • a diffusion of copper to the pn junction of the optoelectronic semiconductor chip 500 could contribute to a degradation of the optoelectronic semiconductor chip 500.
  • the diffusion barrier formed by the second layer 620 prevents or reduces such degradation of the optoelectronic semiconductor chip 500 caused by diffusion of copper.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention concerne un composant optoélectronique comprenant un boîtier qui présente une première partie de contact électroconductrice et une puce semi-conductrice optoélectronique qui est disposée sur la première partie de contact. La puce semi-conductrice optoélectronique et la première partie de contact sont recouvertes au moins en partie par une première couche qui présente une silicone. Une deuxième couche qui présente du SiO2 est disposée sur une surface de la première couche. Une troisième couche est disposée au-dessus de la deuxième couche.
PCT/EP2014/066852 2013-08-08 2014-08-05 Composant optoélectronique et son procédé de fabrication WO2015018843A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US14/909,850 US9564566B2 (en) 2013-08-08 2014-08-05 Optoelectronic component and method for the production thereof
JP2016532670A JP6194426B2 (ja) 2013-08-08 2014-08-05 オプトエレクトロニクス部品およびその製造方法
CN201480044613.3A CN105431952B (zh) 2013-08-08 2014-08-05 光电组件以及用于生产所述光电组件的方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102013215650.2A DE102013215650B4 (de) 2013-08-08 2013-08-08 Optoelektronisches Bauelement und Verfahren zu seiner Herstellung
DE102013215650.2 2013-08-08

Publications (1)

Publication Number Publication Date
WO2015018843A1 true WO2015018843A1 (fr) 2015-02-12

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CN105431952B (zh) 2018-05-18
DE102013215650A1 (de) 2015-03-05
DE102013215650B4 (de) 2021-10-28
JP6194426B2 (ja) 2017-09-06
CN105431952A (zh) 2016-03-23
JP2016527729A (ja) 2016-09-08
US20160190410A1 (en) 2016-06-30

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