Classifications

• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
• • B—PERFORMING OPERATIONS; TRANSPORTING
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  • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
  • B32B9/00—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00
  • B32B9/005—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising one layer of ceramic material, e.g. porcelain, ceramic tile
  • B32B9/007—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising one layer of ceramic material, e.g. porcelain, ceramic tile comprising carbon, e.g. graphite, composite carbon
• • B—PERFORMING OPERATIONS; TRANSPORTING
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  • B32B9/00—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00
  • B32B9/04—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising such particular substance as the main or only constituent of a layer, which is next to another layer of the same or of a different material
  • B32B9/041—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising such particular substance as the main or only constituent of a layer, which is next to another layer of the same or of a different material of metal
• • H—ELECTRICITY
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02455—Group 13/15 materials
  • H01L21/02458—Nitrides
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  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02494—Structure
  • H01L21/02496—Layer structure
  • H01L21/02499—Monolayers
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02527—Carbon, e.g. diamond-like carbon
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02587—Structure
  • H01L21/0259—Microstructure
• • H—ELECTRICITY
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B32—LAYERED PRODUCTS
  • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
  • B32B2457/00—Electrical equipment
  • B32B2457/14—Semiconductor wafers
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
  • C23C16/34—Nitrides
  • C23C16/342—Boron nitride
• • H—ELECTRICITY
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
  • H01L21/02639—Preparation of substrate for selective deposition
  • H01L21/02645—Seed materials

Definitions

• the field of the invention relates generally to a method for producing graphene and other atomically thick sheets on a substrate, such as a semiconductor substrate, and more specifically to a method for producing layers of atomically thick sheets of graphene on an intervening layer, which is in contact with the semiconductor substrate, or atomically thick sheets of a material on a layer of graphene, which is in contact with the semiconductor substrate.
• Graphene is the hexagonal arrangement of carbon atoms forming a one- atom thick planar sheet of sp 2 hybridized (double bonded) carbon atoms arranged in a honeycomb lattice.
• Graphene is a promising electronic material. It has the potential to significantly impact the semiconductor industry due to its superior electrical, thermal, mechanical, and optical properties while at the same time offering compatibility with existing semiconductor processing techniques.
• Graphene has shown extraordinary applications, including single molecule detection, ultrafast FETs, hydrogen visualization- template for TEM, and tunable spintronic devices. Furthermore, it exhibits high thermal conductivity (25 x silicon), high mechanical strength (strongest nanomaterial), high optical transparency (80%), carrier controlled interband/optical-transition and flexible structure.
• graphene is a semi-metal with zero band-gap owing to the conduction band touching the valence band at two points (K and K') in the Brillouin zone.
• Graphene' s high density of ⁇ -electrons from the sp 2 carbon atoms and carrier- confinement in an open crystallographic structure imparts it with the highest mobility measured to date.
• substrates are necessary.
• Current processes require graphene to be transferred from a metal base to the desired substrate. This transfer process of an atomically -thick sheet is challenging and leads to low yield and a significant density of folds and tears.
• the transfer process generally uses a material like PMMA on graphene followed by dissolution of the metal foil, then graphene is interfaced to the silicon dioxide layer, and finally the PMMA is removed leaving graphene on S1O2 on Silicon.
• the present invention is directed to a method of preparing a multilayer article from a semiconductor substrate, the semiconductor substrate comprising two major, generally parallel surfaces, one of which is the front surface of the semiconductor substrate and the other of which is a back surface of the semiconductor substrate, and a circumferential edge joining the front and back semiconductor substrate surfaces.
• the method comprises (a) forming a metal film on the front surface of the semiconductor substrate, the metal film comprising a front metal film surface, a back metal film surface, and a bulk metal region between the front and back metal film surfaces, wherein the back metal film surface is in contact with the front semiconductor substrate surface.
• the method comprises (b) forming a layer of boron nitride between the front surface of the semiconductor substrate and the back metal film surface.
• the method comprises (c) forming a layer of graphene between the front surface of the semiconductor substrate and the back metal film surface.
• the present invention is further directed to a method of preparing a semiconductor substrate, the semiconductor substrate comprising two major, generally parallel surfaces, one of which is the front surface of the semiconductor substrate and the other of which is a back surface of the semiconductor substrate, and a circumferential edge joining the front and back semiconductor substrate surfaces.
• the method comprises forming a first metal film on the front surface of the semiconductor substrate, the first metal film comprising a front metal film surface, a back metal film surface, and a bulk metal region between the front and back metal film surfaces, wherein the back metal film surface is in contact with the front semiconductor substrate surface; forming a layer of boron nitride between the front surface of the semiconductor substrate and the back metal film surface; removing the first metal film; depositing a layer comprising a carbon- rich polymer on the layer of boron-nitride; forming a second metal film on the carbon- rich polymer layer, the second metal film comprising a front metal film surface, a back metal film surface, and a bulk metal region between the front and back metal film surfaces, wherein the back metal film surface is in contact with the layer comprising the carbon-rich polymer; and heating the semiconductor substrate comprising the layer of boron-nitride, the layer comprising the carbon-rich polymer, and the second metal film thereon in the presence of hydrogen to a temperature sufficient
• the present invention is still further directed to a multilayer article comprising: a semiconductor substrate comprising two major, generally parallel surfaces, one of which is the front surface of the donor substrate and the other of which is a back surface of the donor substrate, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces; a layer of boron nitride in contact with the front surface of the semiconductor substrate; and a layer of graphene in contact with the layer of boron nitride.
• the present invention is still further directed to a multilayer article comprising: a semiconductor substrate comprising two major, generally parallel surfaces, one of which is the front surface of the donor substrate and the other of which is a back surface of the donor substrate, a circumferential edge joining the front and back surfaces, and a central plane between the front and back surfaces; a layer of graphene in contact with the front surface of the semiconductor substrate; and a layer of boron nitride in contact with the layer of graphene.
• FIG. 1 is a depiction of the structure of graphene on planar boron nitride. Graphene's carbons are arranged in a two dimensional planar honeycomb lattice.
• FIG. 2A is a depiction of the initial structure of the semiconductor substrate.
• FIG. 2B is a depiction of a graphene-on-boron nitride layer on a semiconductor substrate after the CVD processing of the films and etching of the top layers and metal.
• the present invention is directed to a method for forming graphene directly on a substrate, e.g., a semiconductor substrate, such as a semiconductor wafer.
• a substrate e.g., a semiconductor substrate, such as a semiconductor wafer.
• direct it is meant that the graphene is formed on the substrate without layer transfer.
• Direct formation does not preclude the presence of intervening layers between the substrate and the graphene layer. That is, the graphene may be formed on the surface of the substrate, or it may be formed on a surface of a layer that is in contact with the substrate.
• an intervening layer is deposited on the front surface of a semiconductor substrate.
• additional layers may be deposited upon the graphene layer.
• the present invention is therefore additionally directed to a multilayer article comprising a semiconductor substrate, an intervening layer, and a layer of graphene.
• the intervening layer comprises a material that is isoelectronic to the carbon lattice of graphene.
• the isoelectronic intervening layer comprises boron nitride
• the multilayer article comprises a semiconductor substrate, an intervening layer of boron nitride, and a layer of graphene. See FIG. 1, which is a depiction of a graphene layer 10 on a boron nitride layer 20, which may be prepared according to the method of the present invention. See also FIG.
• FIG. 2B which is a depiction of a graphene layer 10 in contact with a boron nitride layer 20 on a semiconductor substrate 30 (further comprising a dielectric layer 40) after the CVD processing of the films and etching of the top layers and metal.
• a graphene layer is deposited on the front surface of a semiconductor substrate.
• a layer of another material preferably a material that is isoelectronic with graphene, is formed on the graphene layer.
• an additional graphene layer may be deposited upon the layer comprising the isoelectronic material.
• the present invention is therefore additionally directed to a multilayer article comprising a semiconductor substrate, a layer of graphene, and a layer of a material that is isoelectronic to graphene.
• the isoelectronic intervening layer comprises boron nitride
• the multilayer article comprises a semiconductor substrate, an intervening layer of graphene, and a layer of boron nitride.
• an additional layer of graphene may be deposited on the layer of boron nitride.
• the method of the present invention enables coating at least a portion of a large diameter semiconductor wafer, e.g., a silicon wafer coated with silicon dioxide, with at least a layer of graphene.
• a large diameter semiconductor wafer e.g., a silicon wafer coated with silicon dioxide
• the method of the present invention enables coating at least a portion of a large diameter semiconductor wafer, e.g., a silicon wafer coated with silicon dioxide, with at least a layer of graphene.
• semiconductor substrate comprises an intervening layer of an isoelectronic material to graphene, e.g., boron nitride.
• the semiconductor substrate comprises an intervening layer of graphene, and a layer of an isoelectronic material to graphene, e.g., boron nitride.
• the semiconductor substrate comprises a first layer of graphene, and a layer of an isoelectronic material to graphene, e.g., boron nitride, and a second layer of graphene on the layer of boron nitride.
• the method of the present invention enables coating at least a portion of a large diameter semiconductor wafer, e.g., a silicon wafer coated with silicon dioxide, with a layer of boron nitride and a single mono-atomic layer of graphene.
• the method of the present invention enables coating at least a portion of a large diameter semiconductor wafer, e.g., a silicon wafer coated with silicon dioxide, with an intervening layer of boron nitride and with two mono-atomic layers of. That is, the graphene layer comprises two layers of graphene of mono-atomic thickness.
• the method of the present invention enables coating at least a portion of a large diameter semiconductor wafer, e.g., a silicon wafer coated with silicon dioxide, with a layer of boron nitride and a layer of graphene having three or more layers of graphene of mono-atomic thickness. That is, the graphene layer comprises three or more layers of graphene of mono-atomic thickness.
• the method of the present invention enables the deposition of several consecutive layers of mono-atomically thick graphene layers, such as between 2 layers of mono-atomically thick graphene and about 100 layers of mono-atomically thick graphene.
• the graphene layer comprises between 2 layers of mono-atomically thick graphene and about 50 layers of mono-atomically thick graphene, such as between 3 layers of mono-atomically thick graphene and about 50 layers of mono-atomically thick graphene.
• the layer of boron nitride and the layer of graphene may be deposited in either order.
• the multilayer structure comprises a semiconductor wafer, e.g., a silicon wafer, comprising a silicon oxide layer and a silicon nitride layer.
• the boron nitride layer may be a single mono-atomically thick layer, a layer comprising two layers of mono-atomically thick boron nitride, or a multilayer of mono-atomically thick boron nitride comprising three or more layers of boron nitride.
• the boron nitride layer may comprise between 2 and about 100 consecutive layers of mono-atomically thick boron nitride layers, such as between 2 and about 50 consecutive layers of mono-atomically thick boron nitride layers, such as between 3 and about 50 consecutive layers of mono- atomically thick boron nitride layers.
• the entire major surface of the wafer may be coated with a layer or a multi-layer of graphene.
• a portion of the major surface of the wafer may be coated with a layer or a multi-layer of graphene.
• multilayer stacks of alternating boron nitride layers and graphene layers may be formed on a substrate, e.g., a semiconductor substrate.
• a boron nitride layer may be the first deposited layer, i.e., is in direct contact with the substrate, or the graphene layer may be the first deposited layer.
• the multilayer may comprise a single stack of one layer of graphene and one layer of boron nitride on the substrate.
• the multilayer may comprise two to about 100, such as about two to about 50 stacks, each stack comprising one layer of graphene and one layer of boron nitride on the substrate.
• Each layer herein may comprise one, two, three or more, such as about 50 mono-atomically thick layers of the graphene or boron nitride.
• the method of the present invention relies on deposition of a metal film on the major surface of a semiconductor substrate.
• the metal film comprises a metal that catalyzes the dissociation of the layer atoms, e.g., carbon, nitrogen, and boron, from precursor compounds and molecules. In some embodiments, these dissociated atoms either dissolve within the metal layer, followed by precipitation from the layer upon cooling.
• the metal film comprises nickel
• the nickel metal film absorbs boron and nitrogen atoms (in the boron nitride deposition process) or carbon atoms (in the graphene deposition process), and the absorbed atoms precipitate out during the cooling step and the quality of the layers relates to the cooling rate.
• these dissociated atoms diffuse through the grain- boundaries to produce graphene or BN directly on the metal-substrate interface.
• the atoms diffuse through the grain-boundary and nucleate at the metal- substrate interface to form layers of boron nitride and graphene.
• graphene and BN may also be produced at the front surface (metal-air interface) of the metal film. In such embodiments, layers that form on the front surface of the metal film are removed separately (e.g., via oxygen plasma).
• a semiconductor substrate e.g., a silicon wafer which may comprise a dielectric layer such as silicon oxide and/or silicon nitride
• a metal film deposition step is subject to a metal film deposition step.
• the semiconductor substrate comprising the metal film is exposed to precursors comprising boron and nitrogen atoms at a temperature sufficient to in-diffuse boron and nitrogen atoms into the bulk of the metal film.
• the article is then cooled to segregate and precipitate a layer of boron nitride between the semiconductor substrate and the back surface of the metal film.
• the multilayer structure is exposed to a carbon source whereby carbon is absorbed into the metal film.
• the order of layer deposition may be reversed to prepare a layer of graphene directly on the substrate, followed by a layer of boron nitride.
• multiple layer depositions may be carried out to thereby prepare multilayer films comprising one or more graphene layers, each having an intervening layer of boron nitride.
• the graphene and boron nitride stacks may comprise graphene as the layer in direct contact with the semiconductor substrate or may comprise boron nitride as the layer in direct contact with the semiconductor substrate.
• the carbon source may be a hydrocarbon- containing self-assembled monolayer or a carbon-rich polymer that is deposited on a surface of the semiconductor substrate prior to deposition of the metal film.
• the carbon source may be a combination of a hydrocarbon-containing self- assembled monolayer and a carbon-rich polymer, both of which are deposited on a surface of the semiconductor substrate prior to deposition of the metal film.
• the carbon source may be a carbon-rich gas, e.g., methane, in which carbon is absorbed into the metal film during a vapor deposition process.
• a solid carbon source e.g., self-assembled monolayer and/or polymer, may be placed between the semiconductor substrate and the metal film, and the method further includes carbon absorption from a carbon-containing gas.
• the metal deposited on the major surface of the semiconductor substrate has high solubility at the temperature of deposition of the boron and nitrogen (in the step of forming the boron nitride layer) and carbon (at the step of forming the graphene).
• An exemplary such metal is nickel.
• the boron and nitrogen may be absorbed into the metal from the source of boron and the source of nitrogen or combined source of boron and nitrogen.
• boron and nitrogen segregates and precipitates from the metal film thereby depositing at least one layer of boron nitride between the semiconductor substrate and the metal film.
• carbon may be absorbed into the metal film from the solid or gaseous carbon source.
• carbon segregates and precipitates from the metal film thereby depositing at least one layer of graphene between the boron nitride layer and the metal film.
• the metal deposited on the major surface of the semiconductor substrate has a low or substantially zero carbon solubility at the temperature of boron/nitrogen deposition and carbon deposition.
• Such metals include, e.g., copper.
• the copper metal film may comprise copper grains.
• the B and N atoms diffuse through the grain-boundaries and nucleate at the substrate-copper interface.
• boron nitride segregates from the copper layer and forms a layer of boron nitride between the front surface of the semiconductor substrate and the back surface of the metal film.
• the carbon source e.g., a gaseous carbon or a carbon containing polymer, causing carbon atoms to diffuse between the copper grains.
• the metal surface catalyzes the growth of at least one layer of graphene between the boron nitride layer and the metal film.
• the metal layer may be deposited over the entire major surface of the semiconductor substrate. In some embodiments, the metal layer may be deposited over a portion of the substrate, such as at least about 10% of the total area of the major surface, or at least about 25% of the total area, or at least about 50% of the total area, or at least about 75% of the total area. In some embodiments, the metal layer may be deposited over the entire major surface of the semiconductor substrate and thereafter metal may be removed, using conventional lithography techniques, to thereby leave a desired pattern of metal deposition on the major surface of the substrate.
• the metal film may be removed, e.g., by etching, thereby yielding a multilayer semiconductor structure comprising a semiconductor substrate, a layer of material that is isoelectronic to graphene, e.g., boron nitride, and a layer of graphene.
• the multilayer semiconductor structure comprises a semiconductor substrate, a layer of graphene, and a layer of material that is isoelectronic to graphene, e.g., boron nitride.
• the layers of graphene and boron nitride may contain a single mono-atomically thick layer of the material, or may contain multiple mono-atomically thick layers of the material, such as between 2 and about 100 mono-atomically thick layers, or between 2 and about 50 mono-atomically thick layers, or between 3 and about 50 mono-atomically thick layers. Still further embodiments comprise stacks of alternating layers of graphene and boron nitride.
• the graphene layer has the same dimensions as the metal layer deposited on the major surface of the semiconductor substrate.
• the method enables preparation of graphene layers having desired patterns, e.g., by lithography of the metal layer, on the major surface of the semiconductor substrate.
• the graphene is deposited without any layer transfer steps.
• the graphene layer or layers is/are formed directly on a semiconductor substrate, i.e., without a layer transfer step.
• Direct formation on the semiconductor substrate does not preclude the presence of an intervening layer, e.g., a layer of an isoelectronic material such as boron nitride.
• a semiconductor substrate may comprise two major, generally parallel surfaces, one of which is a front surface of the substrate and the other of which is a back surface of the substrate.
• a circumferential edge joins the front and back surfaces, and a central plane lies between the front and back surfaces.
• the front surface and the back surface of the substrate may be substantially identical.
• a surface is referred to as a "front surface” or a “back surface” merely for convenience and generally to distinguish the surface upon which the operations of method of the present invention are performed.
• the operations of the invention are performed on the front surface of the semiconductor substrate.
• the operations of the present invention are performed on both the front surface and the back surface of the semiconductor substrate.
• the semiconductor substrate comprises a semiconductor wafer.
• the semiconductor wafer comprises a material selected from among silicon, silicon carbide, silicon germanium, silicon nitride, silicon dioxide, gallium arsenic, gallium nitride, indium phosphide, indium gallium arsenide, and germanium.
• the semiconductor wafer may comprise combinations of such materials, e.g., in a multilayer structure.
• the semiconductor wafer has a diameter of at least about 20 mm, more typically between about 20 mm and about 500 mm.
• the diameter is at least about 20 mm, at least about 45 mm, at least about 90 mm, at least about 100 mm, at least about 150 mm, at least about 200 mm, at least about 250 mm, at least about 300 mm, at least about 350 mm, or even at least about 450 mm.
• the semiconductor wafer may have a thickness between about 100 micrometers and about 5000 micrometers, such as between about 100 micrometers and about 1500 micrometers.
• the semiconductor wafer comprises a wafer sliced from a single crystal silicon wafer which has been sliced from a single crystal ingot grown in accordance with conventional Czochralski crystal growing methods. Such methods, as well as standard silicon slicing, lapping, etching, and polishing techniques are disclosed, for example, in F. Shimura, Semiconductor Silicon Crystal Technology, Academic Press, 1989, and Silicon Chemical Etching, (J. Grabmaier ed.) Springer-Verlag, N.Y., 1982 (incorporated herein by reference).
• the semiconductor silicon substrate is a polished silicon wafer grown by the CZ method.
• the silicon substrate may have any crystal orientation, e.g., (100), (1 10), and (1 11).
• Silicon wafer resistivity is not critical to forming a graphene layer on the substrate.
• resistivity may vary depending upon end use requirements.
• the wafer may be heavily doped, may be semi-insulating, or may have a doping profile somewhere between.
• the resistivity of the wafer may therefore vary from about 1 milliohm-cm to about 10 kiloohm-cm.
• one or more of the major surfaces of the semiconductor substrate may be modified with a dielectric layer.
• the semiconductor substrate comprises a silicon wafer, the front surface layer of which is oxidized.
• the front surface layer i.e., the layer upon which the metal film is deposited, is oxidized.
• the front surface of the silicon wafer is preferably oxidized such that the front surface layer of the silicon wafer comprises a silicon dioxide (S1O 2 ) layer having a thickness between about 30 nm and about 1000 nm, between about 50 nm and about 500 nm, preferably between about 50 nm and about 300 nm, such as between about 90 nm and about 300 nanometers thick, or between about 90 nm and about 200 nanometers thick.
• the front surface of the silicon wafer may be thermally oxidized via wet or dry oxidation, as is known in the art. Oxidation generally occurs at temperatures between about 800°C and about 1200°C using water vapor and/or oxygen.
• the semiconductor substrate may comprise a layer of silicon nitride.
• the semiconductor substrate comprises a silicon wafer, the front surface layer of which is oxidized as described above, which is followed by deposition of a silicon nitride layer.
• a silicon nitride layer may be deposited on the silicon oxide layer since silicon nitride advantageously forms a barrier layer to reduce diffusion of metal atoms, e.g., nickel, into the silicon oxide layer.
• the silicon nitride layer may range in thickness from about 50 nanometers to about 1000 nanometers. In some embodiments, the silicon nitride layer may range in thickness from about 50 nanometers to about 500 nanometers.
• the silicon nitride layer may range in thickness from about 70 nanometers to about 250 nanometers.
• the thickness of the silicon nitride layer is determined in view of the trade-off between device performance, such that thinner layers are preferred, and an effective barrier to prevent in-diffusion of impurities into the semiconductor substrate, such that thicker layers are preferred.
• Silicon nitride may be deposited on the surface of the silicon oxide layer by contacting the substrate with an atmosphere of nitrogen at elevated temperature.
• the semiconductor may be exposed to nitrogen gas or ammonia at temperatures ranging from about 700°C to about 1300°C.
• silicon nitride is formed by chemical vapor deposition at about 800°C.
• the major surface of the semiconductor substrate e.g., a silicon wafer comprising a silicon oxide layer and optionally a silicon nitride layer
• a metal film is coated with a metal film.
• the metal layer may be deposited over the entire major surface of the semiconductor substrate.
• the metal layer may be deposited over a portion of the substrate, such as at least about 10% of the total area of the major surface, or at least about 25% of the total area, or at least about 50% of the total area, or at least about 75% of the total area.
• the metal layer may be deposited over the entire major surface of the semiconductor substrate and thereafter metal may be removed selectively, using conventional lithography techniques, to thereby leave a desired pattern of metal deposition on the major surface of the substrate.
• the front surface layer of the semiconductor substrate is coated with a metal film. The front surface layer may be completely coated with metal, partially coated with metal, or coated with a metal pattern by lithography.
• the semiconductor substrate comprises a semiconductor wafer having a dielectric layer thereon.
• the semiconductor substrate comprises a silicon wafer having a silicon dioxide front surface layer, and the metal film is deposited onto the silicon dioxide front surface layer.
• the silicon dioxide layer may be completely coated with metal, partially coated with metal, or coated with a metal pattern by lithography.
• the semiconductor substrate comprises a silicon wafer having a silicon dioxide layer and a silicon nitride front surface layer, and the metal film is deposited onto the silicon nitride front surface layer.
• the silicon nitride layer may be completely coated with metal, partially coated with metal, or coated with a metal pattern by lithography.
• the surfaces of the metal film may be referred to as a "front metal film surface” and "a back metal film surface.”
• the back metal film surface is in contact with the front semiconductor substrate surface layer, which may comprise a dielectric layer, e.g., a silicon oxide layer or a silicon oxide layer and silicon nitride layer.
• a bulk metal region is between the front and back metal film surfaces.
• Metals suitable for the present invention include nickel, copper, iron, platinum, palladium, ruthenium, cobalt, and alloys thereof.
• the metal film comprises nickel.
• the metal comprises copper.
• the metal film may be deposited by techniques known in the art, including sputtering, evaporation, ion beam evaporation, chemical vapor deposition, electrolytic plating, and metal foil bonding.
• the metal film is deposited by sputtering or evaporation using, e.g., a Sputtering and Metal evaporation Unit.
• Electrolytic metal plating may occur according to the methods described by Supriya, L.; Claus, R. O. Solution-Based Assembly of Conductive Gold Film on Flexible Polymer Substrates: Langmuir 2004, 20, 8870-8876.
• the metal film may be deposited by chemical vapor deposition at relatively low temperatures, such as between about 100°C and about 300°C, such as about 200°C.
• the metal film is between about 50 nanometers and about 20 micrometers thick, such as between about 50 nanometers and about 10 micrometers thick, such as between about 50 nanometers and about 1000 nanometers, such as between about 100 nanometers and about 500 nanometers, such as between about 100 nanometers and about 400 nanometers, such as about 300 nanometers or about 500 nanometers.
• the metal film may comprise metal that has relatively high solubility for boron, nitrogen, and carbon at elevated temperatures (i.e., generally greater than 500°C, or greater than 800°C, such as about 1000°C), which enables in-diffusion of boron and nitrogen during deposition of the boron-nitride layer step and in-diffusion of carbon during the graphene layer step.
• the metal also has low or substantially zero boron, nitrogen, or carbon solubility at cooler temperatures to thereby enable segregation and precipitation or boron and nitrogen into boron nitride and precipitation of carbon into graphene in a subsequent cooling step.
• High solubility metal films at the temperature of in-diffusion include nickel, iron, palladium, and cobalt.
• the metal film comprises metal having carbon solubility of at least about 0.05 atomic % at 1000°C, preferably at least about 0.10 atomic % at 1000°C, ever more preferably at least about 0.15 atomic % at 1000°C.
• the metal film comprises metal having carbon solubility less than about 3 atomic % at 1000°C, preferably less than about 2 atomic % at 1000°C.
• the metal film comprises nickel, which has a carbon solubility of about 0.2 atomic % at 1000°C, which is the chamber temperature for carbon in-diffusion when nickel is the metal film.
• the metal film comprises iron, which has a carbon solubility of about 0.02 atomic % at 800°C, which is the chamber temperature for carbon in-diffusion when iron is the metal film.
• the metal film comprises cobalt, which has a carbon solubility of about 1.6 atomic % at 1000°C, which is the chamber temperature for carbon in-diffusion when cobalt is the metal film.
• the metal film may comprise metal that has low or substantially zero solubility or boron, nitrogen, and carbon even at elevated temperatures (i.e., generally greater than 500°C, or greater than 800°C, such as about 1000°C).
• Low solubility metal films include copper, platinum, and ruthenium.
• carbon solubility is virtually zero in copper at temperatures greater than 500°C, or greater than 800°C, such as about 1000°C.
• the gaseous atoms e.g., boron and nitrogen or carbon
• the carbon containing gas or the carbon containing polymer is degraded by hydrogen on copper. Carbon-carbon bond formation into graphene is catalyzed by on the copper surface.
• the multilayer structure may be cleaned.
• the multilayer structure comprises the semiconductor substrate, optional surface dielectric layer (e.g., silicon dioxide, which may additionally comprise a silicon nitride layer), a polymer film (in those embodiments wherein a polymer film is deposited prior to deposition of the metal film, as explained more fully below), and metal film.
• the multilayer structure may be cleaned by heating the structure in a vacuum furnace in a reducing atmosphere.
• a chemical vapor deposition system may be used where only baking under high vacuum is performed.
• the reducing atmosphere comprises hydrogen gas or other reducing gas.
• An inert carrier gas may be used, such as argon or helium.
• the temperature during exposure to the reducing atmosphere is preferably between about 800°C and about 1200°C, such as about 1000°C.
• the pressure is preferably sub- atmospheric, such as less than about 100 Pa (less than 1 Torr), preferably less than about 1 Pa (less than 0.01 Torr), even more preferably less than about 0.1 Pa (less than 0.001 Torr), and even more preferably less than about 0.01 Pa (less than 0.0001 Torr).
• the cleaning anneal may adjust the grain size of the metal film, e.g., increase the grain size at elevated temperatures.
• a layer of a material that is isoelectronic with graphene is formed between the front surface of the semiconductor substrate and the back surface of the metal film.
• the isoelectronic material comprises a boron nitride layer and more specifically, the hexagonal form of boron nitride, a-BN.
• the boron nitride layer may be formed by contacting the front metal film surface with a boron-containing gas and a nitrogen-containing gas or a boron and nitrogen containing gas at a temperature sufficient to in-diffuse boron atoms and nitrogen atoms into the bulk metal region of the metal film.
• the boron and nitrogen sources may be solids or liquids at room temperature.
• the boron and nitrogen sources are gaseous at the temperature of in-diffusion.
• Suitable boron sources include diborane (B 2 H 6 ), trichloroborane (BCI 3 ), and trifluoroborane (BF3).
• Suitable nitrogen sources include nitrogen or ammonia.
• the gas may comprise nitrogen and hydrogen.
• the gas may comprise both boron and nitrogen, such as borazine
• the gaseous atmosphere may comprise inert carrier gases, such as helium and argon.
• the metal film is preferably contacted with sources of boron and nitrogen in an approximately 1 : 1 molar ratio of boron atoms and nitrogen atoms, although the ratio may vary from about 2: 1 to about 1 :2.
• the boron- containing gas and the nitrogen-containing gas may be different gases.
• the boron-containing gas comprises diborane
• the nitrogen-containing gas comprises ammonia.
• the multilayer substrate (refer to FIG. 2A, which depicts a semiconductor substrate 30 having a dielectric layer 40 and a metal layer (e.g., nickel or copper) 50 thereon) may be exposed to a gas 22 comprising diborane (B 2 H 6 ) and the ammonia (NH 3 ) in a 1 :2 molar ratio of B2H 6 : NH 3 .
• the boron- containing gas and the nitrogen-containing gas are the same gas.
• the boron-containing gas and the nitrogen-containing gas comprises trichloroborazine (e.g., 2,4,6-trichloroborazine, H 3 B 3 CI 3 N 3 ), which comprises boron and nitrogen in a 1 : 1 molar ratio.
• trichloroborazine e.g., 2,4,6-trichloroborazine, H 3 B 3 CI 3 N 3
• a suitable instrument for exposing the surface of the metal film is a chemical vapor depositor with a bubbler.
• the semiconductor substrate 30 having a dielectric layer 40 and a metal layer (e.g., nickel or copper) 50 thereon is exposed to a carbon-containing gas 12 (e.g., methane) in the graphene deposition process.
• a carbon-containing gas 12 e.g., methane
• the multilayer structure undergoes a heating and cooling cycle to bring about in-diffusion of boron and nitrogen into the bulk metal region of the metal film, followed by segregation and precipitation of boron nitride between the semiconductor surface and the back surface of the metal film during cooling.
• the metal film may be nickel, for example, in which the temperature is sufficient to solubilize boron and nitrogen atoms in the bulk metal region.
• the metal film may comprise a metal such as copper in which boron atoms and nitrogen atoms in-diffuse into the bulk metal region by migrating through copper grain boundaries.
• a single mono- atomic layer of hexagonal boron nitride is precipitated between the semiconductor surface and the back surface of the metal film during cooling.
• multiple layers of mono-atomic hexagonal boron nitride are precipitated between the semiconductor surface and the back surface of the metal film during cooling, such as at least two layers of mono-atomic hexagonal boron nitride, such as between two and about 100 layers of mono-atomic hexagonal boron nitride, or between two and about 50 layers of mono-atomic hexagonal boron nitride, or between three and about 50 layers of mono- atomic hexagonal boron nitride.
• boron nitride may precipitate on the front surface of the metal film.
• Cooling the multilayer structure lowers the solubility of boron and nitrogen within the bulk region of the metal film, which causes the boron and nitrogen to segregate from the metal film and precipitation of boron nitride between the front surface of the semiconductor substrate and the back surface of the metal film.
• the metal film comprises a metal in which boron and nitrogen have low solubility, e.g., copper
• cooling causes segregation of boron and nitrogen from between the copper grains and onto the front surface of the semiconductor substrate as a layer of boron nitride.
• the method of the present invention is useful for preparing a multilayer article comprising the semiconductor substrate, which is optionally modified with a dielectric layer on the front surface thereof, a layer of boron nitride in contact with the front surface of the semiconductor substrate; and a metal film in contact with the layer of boron nitride.
• the temperature during in-diffusion of boron and nitrogen may range from about 500°C to about 1 100°C, such as from about 700°C to about 1000°C, such as from about 800°C for iron or about 1000°C for nickel.
• the multilayer structure is cooled to thereby segregate and precipitate graphene during cooling.
• the cooling rate is preferably controlled to a rate of about 5°C/second to about 50°C/second, such as about
• the pressure of the chamber may vary from about 0.1 Pascals (about 1 mTorr) to about 70 Pascals (about 500 mTorr).
• the atmosphere is preferably a reducing atmosphere, which may comprise between about 1% and about 99% hydrogen, such as from about 70% and about 99% hydrogen, preferably about 95% hydrogen, balance inert gas.
• the method of the present invention further comprises the step of removing the layer of boron nitride from the front metal film surface prior to contacting the metal film with the carbon-containing gas.
• the layer of boron nitride on the front film surface may be removed by oxygen plasma etching.
• the multilayer structure comprising the semiconductor substrate, optionally a dielectric layer, an intervening boron nitride layer, and the metal film may be exposed to a carbon- containing gas to thereby in-diffuse atomic carbon into the bulk region of the metal film.
• Atomic carbon may be solubilized in metal films comprising metals having high solubility for carbon, e.g., nickel, or may migrate between metal grains in metal films comprising metals having low solubility for carbon, e.g., copper.
• a carbon-containing gas (12 in FIG. 2A) flow may be added to the reducing gas flow.
• the carbon-containing gas may be selected from among volatile hydrocarbons, for example, methane, ethane, ethylene, acetylene, propane, propylene, propyne, butanes, butylenes, butynes, and the like.
• the carbon-containing gas e.g., methane
• the atmosphere may be a reducing atmosphere, further comprising a reducing gas, such as hydrogen.
• the gas may comprise methane gas and hydrogen gas in a ration from about 1 : 1 to about 1 : 100, such as about 1 : 10.
• the minimum temperature during carbon in-diffusion and absorption is generally at least about 500°C.
• the maximum temperature during carbon in-diffusion and absorption is generally no more than about 1 100°C. In general, the temperature is preferably between about 700°C and about 1000°C. In general, the pressure inside the reaction chamber during hydrogen gas/methane flow is between about 600 Pa (about 5 Torr) and about 8000 Pa (about 60 Torr), preferably between about 1300 Pa (about 10 Torr) and about 7000 Pa (about 50 Torr).
• the flow of gases is stopped and the multilayer is held at the temperature of in-diffusion for a sufficient duration to allow the carbon to distribute throughout the bulk region of the metal film.
• the proper duration for carbon in-diffusion to yield a product having the desired number of mono-atomically thick graphene layers may be determined by creating a calibration curve in which the number of layers of the segregated graphene in the final product is a function of the carbon in-diffusion duration.
• the calibration curve may be used to determine ideal carbon in-diffusion durations sufficient to yield a single mono-atomically thick graphene layer or multiple mono- atomically thick graphene layers.
• the duration of equilibration after the flow of carbon- containing gas is stopped may range from about 5 seconds to about 3600 seconds, such as about 600 seconds to about 1800 seconds. In some embodiments, the duration of carbon in diffusion is very short, such as about 10 seconds. Thereafter, the multilayer structure is rapidly cooled, as described above.
• carbon in addition to the carbon-containing gas or as an alternative to the carbon-containing, carbon may be provided in solid form as either a carbon-containing self-assembled monolayer and/or a carbon-rich polymer.
• the substrate is prepared substantially as disclosed herein.
• a semiconductor substrate e.g., a silicon wafer, may be prepared with an oxide layer and optionally an additional nitride layer.
• the semiconductor wafer comprises a silicon wafer comprising a silicon oxide layer.
• the semiconductor wafer comprises a silicon wafer comprising a silicon oxide layer and a silicon nitride layer.
• a metal film is deposited on the semiconductor substrate, as described herein.
• a layer of boron nitride is formed between the semiconductor substrate and the metal film, as described herein. Thereafter, as necessary, a layer of boron nitride on the outer surface of the metal film, if one forms, may be removed, followed by removal of the metal film, thereby preparing a semiconductor substrate comprising a layer of boron nitride thereon.
• a solid carbon source provides carbon for forming the graphene layer
• the solid carbon source is deposited upon the layer of boron nitride.
• the solid carbon source may comprise a self-assembled monolayer and/or a carbon-rich polymer.
• a metal film is then deposited upon the solid carbon source.
• the multilayer structure is then subjected to a heating and cooling cycle to grow a layer of graphene between the layer of boron nitride and the metal layer.
• a self- assembled monolayer or few-layer comprising a hydrocarbon or a hydrocarbon with nitrogen and/or boron may be deposited on the semiconductor substrate.
• the hydrocarbon-containing moiety acts as a source of carbon (or B and/or N), which will in- diffuse into the subsequently applied metal film during a heating cycle or degrade into graphene (or doped graphene) wherein the metal film comprises a metal having low or substantially zero carbon solubility.
• the hydrocarbon provides a carbon source for graphene formation on the intervening layer of boron nitride deposited on the front surface layer of the semiconductor substrate.
• a carbon- rich polymer is deposited on the semiconductor substrate, e.g., a semiconductor wafer having a dielectric layer thereon and a previously formed layer of boron nitride therein, prior to forming the metal film.
• the carbon-rich polymer is deposited on a metal layer that has been deposited on the major surface of the semiconductor wafer, the substrate further comprising an intervening boron nitride layer.
• a carbon-rich polymer is deposited on the semiconductor substrate, e.g., a semiconductor wafer having a dielectric layer thereon and a previously formed layer of boron nitride, prior to forming the metal film, or a carbon-rich polymer layer is deposited on the surface of the metal film.
• the carbon-rich polymer acts as the source of carbon, which will in-diffuse into the subsequently applied metal film during a heating cycle or degrade into graphene wherein the metal film comprises a metal having low or substantially zero carbon solubility.
• the carbon-rich polymer may be selected from the group consisting of polymethylmethacrylate (PMMA), polybutadiene, polystyrene, poly(acrylonitrile-co- butadiene-co-styrene) (ABS), polyethylene, polypropylene, poly(4'- vinylhexaphenylbenzene)s, and combinations thereof.
• the polymer or carbon-containing film may contain nitrogen or boron in order to produce nitrogen-doped or boron-doped graphene sheets.
• Nitrogen-containing polymers suitable for the present invention include melamine formaldehyde, polyacrylonitrile, poly(2,5 pyridine), polypyrrole,
• Boron doping may be achieved by preparing a carbon-containing layer comprising boron alcohols (non-polymeric) or by depositing BoramerTM.
• the carbon-rich polymer may be deposited by spin coating the substrate with a polymer film from a polymer-containing solution.
• suitable deposition methods include spray coating and electrochemical deposition.
• Suitable solvents for the spin-coating solution include toluene, hexane, xylene, pentane, cyclohexane, benzene, chloroform.
• the polymer concentration is generally between about 0.01 wt.% and about 1 wt.%, between about 0.05 wt.% and about 0.5 wt.%, such as about 0.1 wt.%.
• the carbon-rich polymer layer may be deposited to a thickness between about 1 nanometer and about 100 nanometers thick, such as between about 5 nanometer and about 100 nanometers thick, preferably between about 10 nanometers and about 50 nanometers thick. In some embodiments, the carbon-rich polymer layer may be deposited to a thickness between about 1 nanometer and about 10 nanometers.
• the multilayer structure comprises the semiconductor substrate, optional surface dielectric layer, a boron nitride layer, and the metal film comprising a metal that has high carbon solubility
• the multilayer structure undergoes a heating and cooling cycle to bring about carbon absorption via in-diffusion into the metal film during heating, followed by carbon segregation and precipitation as graphene during cooling.
• a layer or multi-layer of graphene is precipitated between the boron nitride layer and the back metal film surface.
• the temperature gradient profile is achieved by cooling the front and back surfaces of the multilayer substrate. Such cooling creates a temperature gradient in which the front metal film surface and the back metal film surface are less than the temperature near a central plane within the bulk metal region.
• the temperature during carbon in-diffusion may range from about 500°C to about 1000°C, such as from about 700°C to about 1000°C, such as from about 800°C for iron or about 1000°C for nickel.
• Cooling the multilayer structure lowers the solubility of carbon within the bulk region of the metal film, which forces the carbon to segregate from the metal film and precipitate graphene between the boron nitride layer and the back surface of the metal film.
• the cooling rate is preferably controlled to a rate of about 5°C/second to about 50°C/second, such as about 10°C/second to about 30°C/second, for example about 10°C/second or about 30°C/second.
• the pressure of the chamber may vary from about 0.1 Pascals (about 1 mTorr) to about 70 Pascals (about 500 mTorr).
• the atmosphere is preferably a reducing atmosphere, which may comprise between about 1% and about 99% hydrogen, such as between about 70% and about 99% hydrogen, preferably about 95% hydrogen, balance inert gas.
• the method of the present invention is useful for preparing a multilayer article comprising the semiconductor substrate, which is optionally modified with a dielectric layer on the front surface thereof, a layer of boron nitride in contact with the front surface of the semiconductor substrate, a layer of graphene in contact with the boron nitride layer, and a metal film in contact with the layer of graphene.
• the method of the present invention advantageously yields a monolayer of graphene.
• graphene formation depends upon solubilization of carbon into the metal film followed by segregation and precipitation of graphene (e.g., Nickel)
• the method of the present invention requires control of the amount of carbon absorbed and precipitated to control the number of graphene layers produced. In either embodiment, conditions can be controlled so that at least a layer of graphene precipitates between the front surface of the semiconductor substrate and the back surface of the metal film.
• the method of the present invention enables deposition of a single mono-atomic layer of graphene between the boron nitride layer on the front surface of the semiconductor substrate and the back surface of the metal film. In some embodiments, the method of the present invention enables deposition of multiple layers of mono-atomically thick graphene between the boron nitride layer on the front surface of the semiconductor substrate and the back surface of the metal film.
• the graphene layer may comprises between two and about 100 layers of mono-atomically thick graphene, such as between two and about 50 layers of mono-atomically thick graphene, or between three and about 50 layers of mono-atomically thick graphene.
• a second layer of graphene may precipitate at the front metal film surface. Current results to date have shown that nickel layers in particular are suitable for preparing multi-layer graphene films.
• this exterior layer or layers of graphene may be removed.
• the exterior graphene layer or layers may be removed by etching, for example, wet etching, plasma etching, or oxidation in ozone/UV light.
• the exterior layer or layers of graphene may be removed by oxygen plasma etching.
• the processes for forming a graphene layer and for forming a boron nitride layer may be reversed (i.e., to deposit graphene first directly on the front surface of the substrate, followed by boron nitride, which is deposited on the graphene layer) or may be repeated to thereby prepare multilayer comprising stacks of alternative graphene and boron nitride layers.
• the metal film is removed to thereby expose the graphene layer in contact with the boron nitride layer, which in turn is in contact with the front surface of the semiconductor substrate.
• the metal film is removed to thereby expose a boron nitride layer in contact with a graphene layer, which in turn is in contact with the front surface of the semiconductor substrate.
• the metal film may be removed by techniques known in the art adequate to dissolve the metal of the metal film, e.g., dissolution of nickel, copper, iron, or alloys thereof.
• the metal film is contacted with an aqueous metal etchant.
• Metal etchants useful for removing the metal film include ferric chloride, iron (III) nitrate, aqua-regia, and nitric acid.
• these metal etchants will not remove graphene.
• a multilayer substrate upon removal of the metal film, a multilayer substrate is produced comprising a semiconductor substrate (e.g., a silicon wafer comprising a silicon oxide layer and/or a silicon nitride layer), a layer of boron nitride, and a single layer of graphene of mono-atomic thickness.
• a semiconductor substrate e.g., a silicon wafer comprising a silicon oxide layer and/or a silicon nitride layer
• a single layer of graphene of mono-atomic thickness upon removal of the metal film.
• one or both of the graphene and boron nitride layers may comprise multilayers of each material, each layer having a mono-atomic thickness.
• the graphene layer may be characterized to confirm the number of layers by techniques known in the art, for example, Raman spectroscopy.
• a multilayer substrate is produced comprising a semiconductor substrate, a layer of boron nitride, and a bi-layer of graphene, each layer of the bi-layer of mono-atomic thickness.
• the graphene comprises three or more mono-atomic layers of graphene.
• graphene on an oxidized silicon wafer opens up many potential applications, including single molecule detection, ultrafast FETs, hydrogen visualization-template for TEM, and tunable spintronic devices. Furthermore, graphene exhibits high thermal conductivity (25 X silicon), high mechanical strength (strongest nanomaterial), high optical transparency (97%), carrier controlled interband/optical- transition and flexible structure. Graphene's high density of ⁇ -electrons from the sp 2 carbon atoms and carrier-confinement in an open crystallographic structure imparts it with the highest mobility measured to date.
• graphene exhibits several superior and atypical properties, including weakly-scattered (Scattering > 300 nm), ballistic transport of its charge carriers at room temperature; gate-tunable band gap in bilayers; quantum Hall effect at room temperature; quantum interference; magneto-sensitive-transport; tunable optical transitions; megahertz characteristic frequency; and a chemically and geometrically controllable band gap.
• Other applications include bio-electronic-devices, tunable spintronics, ultra-capacitors, and nano-mechanical devices. It is anticipated that the direct graphene formation on oxidized silicon will provide a unique graphene- structure on silicon-based platform for a wide variety of electronic and sensing applications.
• An approximately 5 centimeter (two inch) diameter silicon dioxide layer having a thickness of 90 nanometers was formed on an n-type (n ++ ) silicon substrate.
• the substrate was cleaned by using oxygen plasma (100 W, 600 mTorr, 2 min).
• a layer of PMMA was spin-coated (1% in acetone, 4000 rpm (as an example)) on the silica substrate to a thickness of about 10 nm.
• a 400 nm thick nickel layer was deposited on the PMMA layer in a metal evaporator system.
• the metal-on-PMMA-on-silica-on- silicon substrate was put inside a CVD chamber. The sample was baked at 1000°C for 5 min to anneal the film.
• the atmosphere comprised hydrogen gas at a pressure of 7 Torr.
• the sample was rapidly cooled at 10°C/second to room temperature. This produced graphene at the interface between metal and silica.
• the metal film was etched with iron (III) nitrate, rendering graphene on silica-on-silicon substrate.
• An approximately 5 centimeter (two inch) diameter silicon dioxide layer having a thickness of 90 nanometers was formed on an n-type (n ++ ) silicon substrate.
• the substrate was cleaned by using oxygen plasma (100 W, 600 mTorr, 2 min).
• a 400 nm thick nickel layer was deposited on the silicon dioxide layer in a metal evaporator system.
• the metal-on-silica-on-silicon substrate was put inside a CVD chamber.
• the sample was baked at 1000°C for 5 min to anneal the film.
• the atmosphere comprised methane and hydrogen gas in a molar ration of 1 : 10 methane:hydrogen at a pressure of 100 Torr.
• the sample was rapidly cooled at 10°C/second to room temperature. This produced graphene at the interface between metal and silica.
• the metal film was etched with iron (III) nitrate, rendering graphene on silica-on-silicon substrate.
• An approximately 5 centimeter (two inch) diameter silicon dioxide layer having a thickness of 300 nanometers was formed on an n-type (n ++ ) silicon substrate.
• the substrate was cleaned by using oxygen plasma (100 W, 600 mTorr, 2 min).
• Hexagonal boron nitride (hBN) flake/sheet were mechanically exfoliated and transferred onto 300 nm S1O2 substrate via Scotch tape's method and washed. Subsequently, the substrate was sputtered with thin film of copper (100 nm - 300 nm) using cold sputtering system. CVD growth was performed under atmosphere pressure in 4"quartz tube with the total gas flow of 100 seem of hydrogen gas (5-10 seem) and methane gas (95-90 seem) at 1000°C for 40 min. Finally, the top graphene film was O2 plasma-etched and copper is washed. Raman spectroscopy revealed the signature boron nitride and G-peak of graphene. Example 4. Direct growth of graphene on BN-SiO?-on-silicon
• This process will produce GBN on SiCVon-silicon substrate.
• a 100-400 nm nickel or copper film is deposited on a large-area S1O 2 substrate and placed in a CVD chamber.
• diborane (B 2 3 ⁇ 4) and ammonia (1 :2 molar ratio) is fluxed into the chamber, and the sample is heat treated at 1000°C.
• this will saturate the metal film with B and N atoms, and for thin-Cu, this will allow B and N atoms to diffuse through the grain boundaries to nucleate on the metal-substrate interface.
• the substrate has to be cooled fast to precipitate B and N atoms to form BN at the metal- Si0 2 -interface (and the top surface).
• the top BN layer is plasma- etched.
• graphene is grown at the metal-BN interface using CH 4 gas as the carbon-source and the top graphene layers is plasma etched. Finally, etching off the metal film gives GBN on the S1O 2 substrate.

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