WO2014124586A1 - 光刻并刻蚀引线孔的方法 - Google Patents

光刻并刻蚀引线孔的方法 Download PDF

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WO2014124586A1
WO2014124586A1 PCT/CN2013/091027 CN2013091027W WO2014124586A1 WO 2014124586 A1 WO2014124586 A1 WO 2014124586A1 CN 2013091027 W CN2013091027 W CN 2013091027W WO 2014124586 A1 WO2014124586 A1 WO 2014124586A1
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passivation
layer
etching
polyimide
aluminum
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PCT/CN2013/091027
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English (en)
French (fr)
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黄玮
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无锡华润上华科技有限公司
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Publication of WO2014124586A1 publication Critical patent/WO2014124586A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of photolithography and etching a lead hole. Background technique
  • the final lithography process in the semiconductor device manufacturing process is generally polyimide (PI) lithography, and the end result is that the device only has lead holes exposed for subsequent bonding of gold wires or silicon aluminum wires, other regions. Protected by passivated media and polyimide cover.
  • the lead hole is essentially the aluminum wiring on the top layer of the device, and the pure aluminum is exposed after passivation corrosion.
  • FIG. 1 A conventional process for photolithography and etching of lead holes is shown in Figure 1, in which the purpose of passivation dielectric lithography and passivation is to etch away the dielectric above the aluminum layer in the lead holes.
  • the semiconductor aluminum wiring is generally composed of a three-layer structure of titanium nitride + aluminum + titanium nitride, in order to ensure the bonding of the lead material (generally gold wire or silicon aluminum wire) and aluminum in the lead hole in the subsequent package bonding process.
  • the titanium nitride on the upper layer of the aluminum wiring needs to be etched away, that is, the aluminum is exposed after passivation etching.
  • the developer removes the polyimide together.
  • the developer is an alkaline solution
  • the aluminum at the lead holes easily reacts with the developer, causing the aluminum at the lead holes to become thin after the polyimide process is finished, in order to completely remove the polyimide during the development process. , a long-term development process will be used, so the thickness of the aluminum layer is lost, which affects the subsequent wire bonding.
  • the polyimide process may require rework due to equipment failure or online defects, etc., re-coating polyimide and photoresist after rework, and performing exposure development, so the aluminum at the lead holes will be The developer etches twice, causing a large portion of the aluminum layer to be etched away by the developer.
  • the traditional solution is to increase the thickness of the aluminum layer, but this will cause the quality of the corresponding photolithography process to decrease.
  • the other is to optimize the development process and reduce the development time, but the potential risk is the residual polyimide in the lead hole. Summary of the invention Based on this, in order to solve the problem that the aluminum layer is too thinly etched by the developing solution during the lithography of the lead hole, it is necessary to provide a method of photolithography and etching the lead holes.
  • a method of photolithography and etching a lead hole comprising the steps of: forming an aluminum wiring on a wafer, the aluminum wiring comprising an aluminum layer and a protective layer on an upper surface of the aluminum layer; Forming a passivation medium to form a passivation layer, and performing photolithography; performing passivation etching, and the protective layer at the lead hole partially or completely remains in the passivation corrosion; coating the surface of the wafer with polyacryl An amine; a photoresist is coated on the surface of the polyimide and exposed and developed; passivation etching is performed again until the protective layer is completely removed; and the polyimide is cured.
  • the passivation layer at the lead hole is completely etched, and the corrosion amount of the protective layer is 100 ⁇ .
  • the passivation layer in the step of performing passivation etching, still has
  • the passivation layer is made of silicon dioxide or silicon nitride.
  • the protective layer in the step of forming an aluminum wiring on the wafer, has a thickness of 350 ⁇ to 600 ⁇ .
  • a method of photolithography and etching a lead hole comprising the steps of: forming an aluminum wiring on a wafer, the aluminum wiring comprising an aluminum layer and a protective layer on an upper surface of the aluminum layer; Forming a passivation medium to form a passivation layer, and performing photolithography; performing passivation etching, and the protective layer at the lead hole partially or completely remains in the passivation corrosion; coating the surface of the wafer with polyacryl An amine; a photoresist is coated on the surface of the polyimide and exposed and developed; the polyimide is cured; passivation etching is performed again until the protective layer is completely removed.
  • the passivation layer at the lead hole is completely etched, and the corrosion amount of the protective layer is 100 ⁇ .
  • the passivation layer in the step of performing passivation etching, still has
  • the passivation layer is made of silicon dioxide or silicon nitride.
  • the protective layer in the step of forming an aluminum wiring on the wafer, has a thickness of 350 ⁇ to 600 ⁇ .
  • the protection thus effectively solves the problem that the aluminum layer is too thinly etched by the developing solution during the lithography process of the lead hole, and the online rework of the polyimide process can be realized.
  • the method has no special requirement for the polyimide developing process, and the increase of the developing time does not cause the problem of excessive corrosion of the aluminum layer of the lead hole. If the development time is too short, a small amount of polyimide remains in the lead hole, and the passivation can be passivated. Prior to etching, the polyimide residue is removed by dry etching and then passivated.
  • 1 is a flow chart of a conventional lithography and etch lead hole process
  • Embodiment 2 is a flow chart showing a method of photolithography and etching a lead hole in Embodiment 1;
  • FIG. 3 is a cross-sectional view of the device after photolithography is performed after depositing a passivation layer in an embodiment
  • FIG. 4 is an embodiment in which the passivation layer at the lead hole is only partially etched, passivation etching is completed and light is removed.
  • Figure 5 is a cross-sectional view showing the device after the passivation etching is completed and the photoresist is removed, in the embodiment where the passivation layer at the lead hole is completely etched;
  • Figure 6 is a flow chart showing a method of photolithography and etching of a lead hole in Embodiment 2. detailed description
  • Example 1 2 is a flow chart of a method of photolithography and etching a lead hole in Embodiment 1, and includes the following steps:
  • the aluminum wiring includes an aluminum layer and a protective layer on the upper surface of the aluminum layer.
  • the aluminum wiring is a three-layer structure of titanium nitride + aluminum + titanium nitride.
  • a passivation medium is deposited on the aluminum wiring to form a passivation layer, and photolithography is performed.
  • FIG 3 is a schematic cross-sectional view of the device after photolithography is performed to form a passivation layer 110, including an aluminum layer 130, a protective layer 120 on the surface of the aluminum layer 130, and a passivation layer 110 on the surface of the protective layer 120.
  • the passivation layer 110 is lithographically patterned after the deposition is completed. Note that the structures under the aluminum layer 130 in the figure are omitted.
  • the dielectric above the aluminum layer 130 at the lead holes is only partially etched, and the protective layer 120 at the lead holes remains partially or completely in the passivation corrosion.
  • only a portion of the passivation layer 110 is etched, and the remaining passivation layer 110 is retained (in this case, the protective layer 120 under the passivation layer 110 is completely retained).
  • the photoresist is removed after the etching.
  • Figure 4 is a cross-sectional view of the device after the etching is completed and the photoresist is removed, and Figure 4 shows an embodiment in which the passivation layer 110 at the via hole is only partially etched.
  • the passivation medium of the passivation layer 110 may be silicon dioxide or silicon nitride. In the present embodiment, the passivation passivation layer 110 after passivation remains 100-500A.
  • Polyimide is a synthetic polymer resin that is resistant to high temperatures, abrasion and corrosion. It is mainly used as a coating or coating for electronic components to improve product stability.
  • the photoresist and polyimide at the lead holes are removed by the developer.
  • passivation etching is performed again until the protective layer of the aluminum wiring is completely removed.
  • step S13 If a part of the passivation layer 110 is left in step S13, the passivation layer 110 and the protective layer 120 at the lead holes are completely etched away in this step; if only a part of the protective layer 120 is left, the lead holes are provided in this step.
  • the protective layer 120 is completely etched away.
  • step S15 It is possible to check whether or not the lithography of the polyimide is abnormal after the step S15, and if the abnormality is detected, the rework processing of the polyimide is performed, and if there is no abnormality, the step S16 is performed.
  • step S16 The passivation etching in step S16 is performed by using the developed photoresist in step S15 as a mask.
  • step S17 curing polyimide.
  • the photoresist is removed before curing.
  • the protective layer above the aluminum layer at the lead holes is left, so that the aluminum layer at the lead holes It will not be corroded by the developer in the polyimide lithography step, and if the polyimide lithography is completed and it is found that the rework of the polyimide is required, the remaining protective layer can also be used for the aluminum layer during rework. Protection is provided so that online rework of the polyimide process can be achieved.
  • the method has no special requirement for the polyimide developing process, and the increase of the developing time does not cause the problem of over-corrosion of the aluminum layer of the lead hole. If the development time is too short, a small amount of polyimide remains in the lead hole, then step S16 can be performed. Prior to passivation etching, the polyimide residue is removed by dry etching and then passivated.
  • Embodiment 6 is a flow chart of a method of photolithography and etching a lead hole in Embodiment 2, comprising the following steps:
  • the aluminum wiring includes an aluminum layer and a protective layer on the upper surface of the aluminum layer.
  • the aluminum wiring is a three-layer structure of titanium nitride + aluminum + titanium nitride.
  • FIG 3 is a schematic cross-sectional view of the device after photolithography is performed to form a passivation layer 110, including an aluminum layer 130, a protective layer 120 on the surface of the aluminum layer 130, and a passivation layer 110 on the surface of the protective layer 120.
  • the passivation layer 110 is lithographically patterned after the deposition is completed. Note that the structures under the aluminum layer 130 in the figure are omitted.
  • the dielectric above the aluminum layer 130 at the lead holes is only partially etched, and the protective layer 120 at the lead holes remains partially or completely in the passivation corrosion.
  • the passivation layer 110 at the lead holes is completely etched, but the protective layer 120 is only partially etched.
  • the photoresist is removed after the etching.
  • Figure 5 is a cross-sectional view of the device after the etching is completed and the photoresist is removed.
  • Figure 5 shows an embodiment in which the passivation layer 110 at the via hole is completely etched and the protective layer 120 is only partially etched.
  • the passivation medium of the passivation layer 110 may be silicon dioxide or silicon nitride.
  • the thickness of the protective layer 120 is 350 A - 600 A. Passivation etching completely etches away the passivation layer 110 at the lead holes, and etches the protective layer 120 (made of titanium nitride) by 100 angstroms. 524, coating polyimide on the surface of the wafer.
  • the photoresist and polyimide at the lead holes are removed by the developer.
  • the photoresist is removed before curing.
  • passivation etching is again performed until the protective layer of the aluminum wiring is completely removed.
  • step S23 If a part of the passivation layer 110 is left in step S23, the passivation layer 110 and the protective layer 120 at the lead holes are completely etched away in this step; if only a part of the protective layer 120 is left, the lead holes are provided in this step.
  • the protective layer 120 is completely etched away.
  • the second embodiment is applicable to a production line in which the polyimide curing process is not stable.
  • the cured polyimide can be inspected after the step S26 is completed, and the passivation corrosion of the step S27 is performed after the curing inspection is normal. With the cured polyimide as a mask, it is not necessary to apply a photoresist.

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Abstract

一种光刻并刻蚀引线孔的方法，包括：在晶圆上形成铝布线，铝布线包括铝层（130）和位于铝层上表面的保护层（120）；在铝布线上淀积钝化介质形成钝化层（110），并进行光刻；进行钝化腐蚀，在引线孔处的保护层于钝化腐蚀中部分或全部余留；在晶圆表面涂布聚酰亚胺；在聚酰亚胺表面涂布光刻胶并进行曝光、显影和光刻；再次进行钝化腐蚀，直至将保护层完全去除；固化聚酰亚胺。在第一次钝化腐蚀步骤中，保留了引线孔处的铝层上方的保护层，使得铝层不会在聚酰亚胺光刻步骤中被显影液所腐蚀，而且聚酰亚胺光刻后如果需要进行聚酰亚胺的返工，则余留的保护层也能在返工时对铝层进行保护，实现聚酰亚胺工艺的在线返工。

Description

光刻并刻蚀引线孔的方法 技术领域
本发明涉及半导体器件的制造方法， 特别是涉及一种光刻并刻蚀引线孔的 方法。 背景技术
半导体器件制造工艺中最后一步光刻工艺一般是聚酰亚胺（ Polyimide, PI ) 光刻， 其最终结果是器件只有引线孔露出， 以供后续进行金线或硅铝线的键合， 其它区域被钝化介质和聚酰亚胺覆盖保护。 引线孔实质就是器件顶层的铝布线， 在钝化腐蚀后纯铝棵露在外。
传统的一种光刻和刻蚀引线孔的工艺如图 1 所示， 其中钝化介质光刻和钝 化腐蚀的目的是将引线孔中铝层上方的介质腐蚀掉。 半导体铝布线一般是由氮 化钛+铝 +氮化钛的三层结构组成， 为保证后续封装键合工艺中， 引线材料（一 般为金线或硅铝线）和引线孔中铝的键合， 铝布线上层的氮化钛需要被腐蚀掉， 即在钝化腐蚀后将铝暴露出来。
非感光型的聚酰亚胺在光刻胶显影时， 显影液会将聚酰亚胺一并去除。 但 是由于显影液为碱性溶液， 因此引线孔处的铝极易和显影液反应， 导致引线孔 处的铝在聚酰亚胺工艺结束后变薄， 为了在显影过程中彻底去除聚酰亚胺， 会 采用长时间的显影工艺， 因此铝层损失的厚度较大， 影响后续的引线键合。
另外， 聚酰亚胺工艺由于设备故障或在线缺陷等， 可能会需要进行返工， 返工后重新进行聚酰亚胺和光刻胶的涂布， 并进行曝光显影， 因此引线孔处的 铝会被显影液腐蚀两次， 造成艮大一部分铝层被显影液腐蚀掉。
传统的解决方法， 一是增加铝层的厚度， 但这会造成相应光刻工艺的质量 下降； 另一种是优化显影程序， 减少显影时间， 但潜在风险是引线孔中聚酰亚 胺的残留。 发明内容 基于此， 为了解决引线孔光刻过程中铝层被显影液腐蚀得过薄的问题， 有 必要提供一种光刻并刻蚀引线孔的方法。
一种光刻并刻蚀引线孔的方法， 包括下列步骤： 在晶圓上形成铝布线， 所 述铝布线包括铝层和位于所述铝层上表面的保护层； 在所述铝布线上淀积钝化 介质形成钝化层， 并进行光刻； 进行钝化腐蚀， 在引线孔处的所述保护层于钝 化腐蚀中部分或全部余留； 在所述晶圓表面涂布聚酰亚胺； 在所述聚酰亚胺表 面涂布光刻胶并进行曝光和显影； 再次进行钝化腐蚀， 直至将所述保护层完全 去除； 固化所述聚酰亚胺。
在其中一个实施例中， 所述进行钝化腐蚀的步骤中， 在引线孔处的所述钝 化层被全部腐蚀， 所述保护层的腐蚀量为 100埃。
在其中一个实施例中， 所述进行钝化腐蚀的步骤中， 所述钝化层仍余留有
100至 500埃。
在其中一个实施例中， 所述在所述铝布线上淀积钝化介质形成钝化层的步 骤中， 所述钝化层的材质为二氧化硅或氮化硅。
在其中一个实施例中， 所述在晶圓上形成铝布线的步骤中， 所述保护层的 厚度为 350埃至 600埃。
还有必要提供一种适用于聚酰亚胺固化工艺尚不稳定的生产线的光刻并刻 蚀引线孔的方法。
一种光刻并刻蚀引线孔的方法， 包括下列步骤： 在晶圓上形成铝布线， 所 述铝布线包括铝层和位于所述铝层上表面的保护层； 在所述铝布线上淀积钝化 介质形成钝化层， 并进行光刻； 进行钝化腐蚀， 在引线孔处的所述保护层于钝 化腐蚀中部分或全部余留； 在所述晶圓表面涂布聚酰亚胺； 在所述聚酰亚胺表 面涂布光刻胶并进行曝光和显影； 固化所述聚酰亚胺； 再次进行钝化腐蚀， 直 至将所述保护层完全去除。
在其中一个实施例中， 所述进行钝化腐蚀的步骤中， 在引线孔处的所述钝 化层被全部腐蚀， 所述保护层的腐蚀量为 100埃。
在其中一个实施例中， 所述进行钝化腐蚀的步骤中， 所述钝化层仍余留有
100埃至 500埃。 在其中一个实施例中， 所述在所述铝布线上淀积钝化介质形成钝化层的步 骤中， 所述钝化层的材质为二氧化硅或氮化硅。
在其中一个实施例中， 所述在晶圓上形成铝布线的步骤中， 所述保护层的 厚度为 350埃至 600埃。
上述两种光刻并刻蚀引线孔的方法， 在淀积钝化介质后的第一次钝化腐蚀 步骤中， 保留了引线孔处铝层上方的保护层， 使得引线孔处的铝层不会在聚酰 亚胺光刻步骤中被显影液所腐蚀， 且若聚酰亚胺光刻完成后发现需要进行聚酰 亚胺的返工， 则保留的保护层也能在返工时对铝层进行保护， 因此有效解决了 引线孔光刻过程中铝层被显影液腐蚀得过薄的问题， 可以实现聚酰亚胺工艺的 在线返工。 且该方法对聚酰亚胺显影程序无特殊要求， 增加显影时间不会导致 引线孔铝层过腐蚀的问题， 显影时间如过短导致引线孔有少量聚酰亚胺残留， 则可以于钝化腐蚀之前， 先通过干法刻蚀去除该聚酰亚胺残留， 然后再进行钝 化腐蚀。 附图说明
图 1为一种传统的光刻和刻蚀引线孔工艺的流程图；
图 2为实施例 1中光刻并刻蚀引线孔的方法的流程图；
图 3是一实施例中淀积形成钝化层后， 进行光刻之前器件的剖面示意图； 图 4是引线孔处的钝化层仅被腐蚀一部分的实施例中， 钝化腐蚀完成并去 除光刻胶后器件的剖面示意图；
图 5是引线孔处的钝化层被全部腐蚀的实施例中， 钝化腐蚀完成并去除光 刻胶后器件的剖面示意图；
图 6为实施例 2中光刻并刻蚀引线孔的方法的流程图。 具体实施方式
为使本发明的目的、 特征和优点能够更为明显易懂， 下面结合附图对本发 明的具体实施方式做详细的说明。
实施例 1 : 图 2为实施例 1中光刻并刻蚀引线孔的方法的流程图， 包括下列步骤：
511 , 在晶圓上形成铝布线。
铝布线包括铝层和位于铝层上表面的保护层。 在本实施例中， 铝布线为氮 化钛 +铝 +氮化钛的三层结构。
512, 在铝布线上淀积钝化介质形成钝化层， 并进行光刻。
图 3是淀积形成钝化层 110后，进行光刻之前器件的剖面示意图， 包括铝层 130、铝层 130表面的保护层 120以及保护层 120表面的钝化层 110。钝化层 110 淀积完成后光刻出引线孔图形。 注意图中铝层 130下方的结构均被省略了。
513 , 进行钝化腐蚀。
通过控制腐蚀的程度， 使得引线孔处铝层 130上方的介质只是被部分腐蚀， 引线孔处的保护层 120在钝化腐蚀中部分或全部余留。 在本实施例中， 只腐蚀 一部分钝化层 110, 其余的钝化层 110被保留（这种情况钝化层 110下的保护层 120被全部保留）。 腐蚀完后去除光刻胶。 图 4是腐蚀完成并去除光刻胶后器件 的剖面示意图， 图 4所示为引线孔处的钝化层 110仅被腐蚀了一部分的实施例。
钝化层 110的钝化介质可以选用二氧化硅或氮化硅。在本实施例中，钝化腐 蚀后钝化层 110保留 100人 -500A。
514, 在晶圓表面涂布聚酰亚胺。
聚酰亚胺是一种耐高温、 抗磨损和抗腐蚀的合成聚合树脂， 主要用作电子 元器件的覆面或覆膜， 以提高产品的稳定性。
515 , 在聚酰亚胺表面涂布光刻胶并进行曝光和显影。
引线孔处的光刻胶和聚酰亚胺被显影液去除。
516, 再次进行钝化腐蚀， 直至将铝布线的保护层完全去除。
步骤 S13中如果保留了部分钝化层 110,则本步骤中将引线孔处的钝化层 110 和保护层 120全部腐蚀掉； 如果只保留了部分保护层 120, 则本步骤中将引线孔 处的保护层 120全部腐蚀掉。
可以于步骤 S15后检查聚酰亚胺的光刻是否有异常， 如果检测到异常则进 行聚酰亚胺的返工处理， 如无异常再执行步骤 S16。
步骤 S16中的钝化腐蚀是以步骤 S15中显影后的光刻胶为掩膜进行腐蚀。 S17, 固化聚酰亚胺。
固化之前要先去除光刻胶。
上述光刻并刻蚀引线孔的方法， 在淀积钝化介质后的第一次钝化腐蚀步骤 (S13)中， 保留了引线孔处铝层上方的保护层， 使得引线孔处的铝层不会在聚酰 亚胺光刻步骤中被显影液所腐蚀， 且若聚酰亚胺光刻完成后发现需要进行聚酰 亚胺的返工， 则保留的保护层也能在返工时对铝层进行保护， 因此可以实现聚 酰亚胺工艺的在线返工。 且该方法对聚酰亚胺显影程序无特殊要求， 增加显影 时间不会导致引线孔铝层过腐蚀的问题， 显影时间如过短导致引线孔有少量聚 酰亚胺残留， 则可以于步骤 S16 中的钝化腐蚀之前， 先通过干法刻蚀去除该聚 酰亚胺残留， 然后再进行钝化腐蚀。
实施例 2:
图 6为实施例 2中光刻并刻蚀引线孔的方法的流程图， 包括下列步骤：
521 , 在晶圓上形成铝布线。
铝布线包括铝层和位于铝层上表面的保护层。 在本实施例中， 铝布线为氮 化钛 +铝+氮化钛的三层结构。
522, 在铝布线上淀积钝化介质形成钝化层， 并进行光刻。
图 3是淀积形成钝化层 110后，进行光刻之前器件的剖面示意图， 包括铝层 130、铝层 130表面的保护层 120以及保护层 120表面的钝化层 110。钝化层 110 淀积完成后光刻出引线孔图形。 注意图中铝层 130下方的结构均被省略了。
S23 , 进行钝化腐蚀。
通过控制腐蚀的程度， 使得引线孔处铝层 130上方的介质只是被部分腐蚀， 引线孔处的保护层 120在钝化腐蚀中部分或全部余留。 在本实施例中， 引线孔 处的钝化层 110被全部腐蚀， 但保护层 120只腐蚀一部分。 腐蚀完后去除光刻 胶。 图 5是腐蚀完成并去除光刻胶后器件的剖面示意图， 图 5所示为引线孔处 的钝化层 110被全部腐蚀， 保护层 120仅被腐蚀了一部分的实施例。
钝化层 110的钝化介质可以选用二氧化硅或氮化硅。在本实施例中，保护层 120的厚度为 350 A -600A, 钝化腐蚀将引线孔处的钝化层 110全部腐蚀掉， 并 将保护层 120 (材质为氮化钛）腐蚀掉 100埃。 524, 在晶圓表面涂布聚酰亚胺。
525 , 在聚酰亚胺表面涂布光刻胶并进行曝光和显影。
引线孔处的光刻胶和聚酰亚胺被显影液去除。
526, 固化聚酰亚胺。
固化之前要先去除光刻胶。
527, 再次进行钝化腐蚀， 直至将铝布线的保护层完全去除。
步骤 S23中如果保留了部分钝化层 110,则本步骤中将引线孔处的钝化层 110 和保护层 120全部腐蚀掉； 如果只保留了部分保护层 120, 则本步骤中将引线孔 处的保护层 120全部腐蚀掉。
实施例 2适用于聚酰亚胺固化工艺尚不稳定的生产线， 可以于步骤 S26完 成后对固化的聚酰亚胺进行检查， 固化检查无异常后再进行步骤 S27的钝化腐 蚀， 钝化腐蚀以固化的聚酰亚胺为掩膜， 不需要涂布光刻胶。
但并不能因此而理解为对本发明专利范围的限制。 应当指出的是， 对于本领域 的普通技术人员来说， 在不脱离本发明构思的前提下， 还可以做出若干变形和 改进， 这些都属于本发明的保护范围。 因此， 本发明专利的保护范围应以所附 权利要求为准。

Claims

权利要求
1、 一种光刻并刻蚀引线孔的方法， 包括下列步骤：
在晶圓上形成铝布线， 所述铝布线包括铝层和位于所述铝层上表面的保护 层；
在所述铝布线上淀积钝化介质形成钝化层， 并进行光刻；
进行钝化腐蚀， 在引线孔处的所述保护层于钝化腐蚀中部分或全部余留； 在所述晶圓表面涂布聚酰亚胺；
在所述聚酰亚胺表面涂布光刻胶并进行曝光和显影；
再次进行钝化腐蚀， 直至将所述保护层完全去除；
固化所述聚酰亚胺。
2、 根据权利要求 1所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述进 行钝化腐蚀的步骤中， 在引线孔处的所述钝化层被全部腐蚀， 所述保护层的腐 蚀量为 100埃。
3、 根据权利要求 1所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述进 行钝化腐蚀的步骤中， 所述钝化层仍余留有 100埃至 500埃。
4、 根据权利要求 1所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述在 所述铝布线上淀积钝化介质形成钝化层的步骤中， 所述钝化层的材质为二氧化
5、 根据权利要求 1-4中任意一项所述的光刻并刻蚀引线孔的方法， 其特征 在于， 所述在晶圓上形成铝布线的步骤中， 所述保护层的厚度为 350埃至 600 埃。
6、 一种光刻并刻蚀引线孔的方法， 包括下列步骤：
在晶圓上形成铝布线， 所述铝布线包括铝层和位于所述铝层上表面的保护 层；
在所述铝布线上淀积钝化介质形成钝化层， 并进行光刻；
进行钝化腐蚀， 在引线孔处的所述保护层于钝化腐蚀中部分或全部余留； 在所述晶圓表面涂布聚酰亚胺；
在所述聚酰亚胺表面涂布光刻胶并进行曝光和显影；
固化所述聚酰亚胺；
再次进行钝化腐蚀， 直至将所述保护层完全去除。
7、 根据权利要求 6所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述进 行钝化腐蚀的步骤中， 在引线孔处的所述钝化层被全部腐蚀， 所述保护层的腐 蚀量为 100埃。
8、 根据权利要求 6所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述进 行钝化腐蚀的步骤中， 所述钝化层仍余留有 100埃至 500埃。
9、 根据权利要求 6所述的光刻并刻蚀引线孔的方法， 其特征在于， 所述在 所述铝布线上淀积钝化介质形成钝化层的步骤中， 所述钝化层的材质为二氧化
10、根据权利要求 6-9中任意一项所述的光刻并刻蚀引线孔的方法， 其特征 在于， 所述在晶圓上形成铝布线的步骤中， 所述保护层的厚度为 350埃至 600 埃。
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