WO2014065015A1 - 炭化珪素半導体装置 - Google Patents
炭化珪素半導体装置 Download PDFInfo
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- WO2014065015A1 WO2014065015A1 PCT/JP2013/073783 JP2013073783W WO2014065015A1 WO 2014065015 A1 WO2014065015 A1 WO 2014065015A1 JP 2013073783 W JP2013073783 W JP 2013073783W WO 2014065015 A1 WO2014065015 A1 WO 2014065015A1
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- region
- guard ring
- silicon carbide
- semiconductor device
- curvature
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 69
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 69
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 69
- 230000002093 peripheral effect Effects 0.000 claims abstract description 34
- 210000000746 body region Anatomy 0.000 claims description 42
- 230000015556 catabolic process Effects 0.000 abstract description 23
- 239000004020 conductor Substances 0.000 abstract description 5
- 230000009467 reduction Effects 0.000 abstract 1
- 239000012535 impurity Substances 0.000 description 37
- 239000000758 substrate Substances 0.000 description 30
- 230000005684 electric field Effects 0.000 description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 229910052782 aluminium Inorganic materials 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 230000007423 decrease Effects 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000005468 ion implantation Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 239000012141 concentrate Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000002050 diffraction method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
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- 239000001294 propane Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- SBEQWOXEGHQIMW-UHFFFAOYSA-N silicon Chemical compound [Si].[Si] SBEQWOXEGHQIMW-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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Definitions
- the present invention relates to a silicon carbide semiconductor device, and more particularly to a silicon carbide semiconductor device having a guard ring region.
- a guard ring region is formed so as to surround a region where the semiconductor element is provided in order to prevent the semiconductor element from being destroyed by electric field concentration.
- Patent Document 1 discloses a silicon (silicon) having an element region and a termination region formed so as to surround the elementary region, and a guard ring is formed in the termination region.
- the structure of the MOSFET is described.
- the guard ring layer and the embedded guard ring layer are formed with a curvature at the corner portion of the outermost base region so as to be concentric.
- the radius of curvature of the outermost base region is about 2 to 4 times the thickness of the drift layer.
- the radius of curvature of the outermost base region drifts.
- the MOSFET having a thickness of about 2 to 4 times the thickness of the layer is manufactured, there is a case where the MOSFET is broken due to concentration of an electric field at the corner portion of the guard ring.
- an object of the present invention is to provide a silicon carbide semiconductor device capable of improving the breakdown voltage while suppressing a decrease in on-current.
- Silicon has a cubic crystal structure, but silicon carbide can have a hexagonal crystal structure.
- Cubic silicon has no anisotropy in electric field strength, but hexagonal silicon carbide has anisotropy in electric field strength.
- the electric field strength in the direction parallel to the c-axis of hexagonal silicon carbide has a field strength that is about 1.6 times higher than the electric field strength in the direction perpendicular to the c-axis. Therefore, the ratio between the radius of curvature of the guard ring in silicon and the thickness of the drift layer cannot be simply applied to silicon carbide.
- the inventors have suppressed the decrease in the on-current of the silicon carbide semiconductor device by setting the value obtained by dividing the radius of curvature of the inner periphery of the curvature region by the thickness of the drift region to 5 or more and 10 or less.
- the inventors have found that the breakdown voltage can be improved while conceiving the present invention.
- the silicon carbide semiconductor device has an element region and a guard ring region.
- a semiconductor element is provided in the element region.
- the guard ring region surrounds the element region in a plan view and has the first conductivity type.
- the semiconductor element includes a drift region having a second conductivity type different from the first conductivity type.
- the guard ring region includes a straight region and a curvature region connected to the straight region. The value obtained by dividing the radius of curvature of the inner periphery of the curvature region by the thickness of the drift region is 5 or more and 10 or less.
- the value obtained by dividing the radius of curvature of the inner periphery of the curvature region by the thickness of the drift region is 5 or more and 10 or less.
- the withstand voltage can be improved while suppressing a decrease in on-current.
- the semiconductor element includes a body region in contact with the drift region and having the second conductivity type.
- the thickness of the body region is larger than the thickness of the guard ring region.
- the guard ring region includes a JTE region in contact with the body region and having the second conductivity type.
- the breakdown voltage can be improved by the JTE region in contact with the body region.
- the semiconductor element includes a source region in contact with the body region and having the first conductivity type, and a source electrode in contact with the source region.
- the JTE region is in contact with the source electrode.
- the guard ring region includes a guard ring that does not contact the element region.
- the breakdown voltage can be improved by the guard ring that does not contact the element region.
- a value obtained by dividing the radius of curvature of the inner peripheral portion of the curvature region of the innermost guard ring by the thickness of the drift region is 5 or more and 10 or less.
- the radius of curvature of the innermost guard ring is smaller than the radius of curvature of the other guard rings.
- the silicon carbide semiconductor device according to the above further includes a field stop region surrounding the guard ring region and having the first conductivity type in plan view.
- the breakdown voltage of the silicon carbide semiconductor device can be further improved.
- the distance between the outer peripheral portion of the guard ring region and the inner peripheral portion of the field stop region is the same at an arbitrary position of the outer peripheral portion of the guard ring region in plan view. Therefore, it can suppress that an electric field concentrates locally.
- FIG. 1 is a schematic cross sectional view showing a configuration of a silicon carbide semiconductor device according to an embodiment of the present invention.
- 1 is a schematic plan view showing a configuration of a silicon carbide semiconductor device according to one embodiment of the present invention.
- FIG. 6 is a schematic cross sectional view showing a configuration of a first modification of the silicon carbide semiconductor device according to one embodiment of the present invention. It is a schematic sectional drawing which shows the structure of the 2nd modification of the silicon carbide semiconductor device which concerns on one embodiment of this invention. It is a schematic sectional drawing which shows the structure of the 3rd modification of the silicon carbide semiconductor device which concerns on one embodiment of this invention.
- FIG. 11 is a schematic plan view showing a configuration of a third modification of the silicon carbide semiconductor device according to one embodiment of the present invention. It is a flowchart which shows schematically the manufacturing method of the silicon carbide semiconductor device which concerns on one embodiment of this invention. It is a schematic sectional drawing which shows the 1st process of the manufacturing method of the silicon carbide semiconductor device which concerns on one embodiment of this invention. It is a schematic sectional drawing which shows the 2nd process of the manufacturing method of the silicon carbide semiconductor device which concerns on one embodiment of this invention. It is a schematic sectional drawing which shows the 3rd process of the manufacturing method of the silicon carbide semiconductor device which concerns on one embodiment of this invention. It is a figure which shows the relationship between on-resistance and a proof pressure.
- MOSFET 1 has an element region IR (active region) and a termination region OR (invalid region) surrounding element region IR.
- Termination region OR includes guard ring region 5. That is, the element region IR is surrounded by the guard ring region 5.
- a semiconductor element 7 such as a transistor or a diode is provided in the element region IR.
- the semiconductor element 7 mainly includes a silicon carbide substrate 10 made of, for example, hexagonal silicon carbide, a gate insulating film 15, a gate electrode 17, a source electrode 16, and a drain electrode 20.
- Silicon carbide substrate 10 mainly includes an n + substrate 11, a drift region 12, a p body region 13, an n + source region 14, and a p + region 18.
- Silicon carbide substrate 10 is made of, for example, hexagonal silicon carbide.
- Main surface 10a of silicon carbide substrate 10 may be a surface that is off, for example, about 8 ° or less from the ⁇ 0001 ⁇ plane.
- n + substrate 11 is a substrate made of hexagonal silicon carbide and having an n-type conductivity (first conductivity type).
- N + substrate 11 contains an n-type impurity such as N (nitrogen) at a high concentration.
- concentration of impurities such as nitrogen contained in n + substrate 11 is, for example, about 1.0 ⁇ 10 18 cm ⁇ 3 .
- Drift region 12 is an epitaxial layer made of silicon carbide and having n type conductivity.
- the thickness T1 of the drift region 12 is about 15 ⁇ m, for example.
- the thickness T1 of the drift region 12 is not less than 14.5 ⁇ m and not more than 15.5 ⁇ m.
- the n-type impurity contained in the drift region 12 is, for example, nitrogen, and is contained at a lower impurity concentration than the n-type impurity contained in the n + substrate 11.
- the concentration of impurities such as nitrogen contained in drift region 12 is, for example, about 7.5 ⁇ 10 15 cm ⁇ 2 .
- P body region 13 has p type conductivity. P body region 13 is formed in drift region 12 including main surface 10 a of silicon carbide substrate 10.
- the p-type impurity contained in p body region 13 is, for example, Al (aluminum), B (boron), or the like.
- the impurity concentration of aluminum or the like contained in p body region 13 is, for example, about 1 ⁇ 10 17 cm ⁇ 2 .
- N + source region 14 has n type conductivity.
- N + source region 14 is formed inside p body region 13 so as to include main surface 10 a and be surrounded by p body region 13.
- the n + source region 14 contains an n-type impurity such as P (phosphorus) at a concentration higher than that of the n-type impurity contained in the drift region 12, for example, about 1 ⁇ 10 20 cm ⁇ 2 .
- the p + region 18 has p type conductivity.
- P + region 18 is formed so as to be in contact with main surface 10 a and p body region 13 and to penetrate near the center of n + source region 14.
- the p + region 18 contains a p-type impurity such as aluminum or boron at a concentration higher than that of the p-type impurity contained in the p body region 13, for example, about 1 ⁇ 10 20 cm ⁇ 2 .
- the gate insulating film 15 is formed in contact with the drift region 12 so as to extend from the upper surface of one n + source region 14 to the upper surface of the other n + source region 14.
- Gate insulating film 15 is made of, for example, silicon dioxide.
- the gate electrode 17 is disposed in contact with the gate insulating film 15 so as to extend from one n + source region 14 to the other n + source region 14.
- the gate electrode 17 is made of a conductor such as polysilicon or aluminum.
- Source electrode 16 is disposed in contact with the n + source region 14 and the p + region 18 on the main surface 10a.
- Source electrode 16 contains, for example, titanium (Ti) atoms, aluminum (Al) atoms, and silicon (Si). Since source electrode 16 is an ohmic contact electrode containing Ti, Al, and Si, contact resistance is low for both the p-type silicon carbide region and the n-type silicon carbide region.
- the drain electrode 20 is formed in contact with the main surface opposite to the main surface where the drift region 12 is formed in the n + substrate 11.
- the drain electrode 20 may have a configuration similar to that of the source electrode 16, for example, or may be made of another material capable of ohmic contact with the n + substrate 11 such as Ni. As a result, the drain electrode 20 is electrically connected to the n + substrate 11.
- the guard ring region 5 has a ring shape and is disposed in the termination region OR of the silicon carbide substrate 10 so as to surround the element region IR in which the semiconductor element 7 is provided.
- Guard ring region 5 has p-type (second conductivity type).
- the guard ring region 5 is a conductive region that acts as a guard ring.
- Guard ring region 5 includes, for example, JTE region 2 that contacts p body region 13 and a plurality of guard rings 3 that do not contact p body region 13.
- the thickness T1 of the p body region 13 of the semiconductor element 7 is larger than the thickness T2 of the guard ring region 5.
- the plurality of guard rings 3 in the guard ring region 5 contain impurities such as boron and aluminum.
- the impurity concentration in each of the plurality of guard rings 3 is lower than the impurity concentration in the p body region 13.
- the concentration of the impurity in each of the plurality of guard rings 3 is, for example, 1.3 ⁇ 10 13 cm ⁇ 2 , and preferably about 8 ⁇ 10 12 cm ⁇ 2 to 1.4 ⁇ 10 13 cm ⁇ 2 .
- the guard ring region 5 has a straight region B and a curvature region A connected to the straight region B. Specifically, the linear regions B and the curvature regions A are alternately arranged to form an annular guard ring region 5 that surrounds the element region IR.
- the inner peripheral part 2c of the curvature region A is formed along a circular arc of the center C.
- the curvature region A of the guard ring region 5 has a curvature radius R.
- the curvature radius R is, for example, not less than 50 ⁇ m and not more than 1260 ⁇ m.
- the value obtained by dividing the radius of curvature R of the inner peripheral portion 2c of the guard ring region 5 by the thickness T1 of the drift region 12 of the semiconductor element 7 is 5 or more and 10 or less.
- the thickness T1 of the drift region 12 is 15 ⁇ m
- the radius of curvature of the inner peripheral portion 2c of the guard ring region 5 is 125 ⁇ m.
- the value obtained by dividing the radius of curvature R of the inner peripheral portion 2c of the guard ring region 5 in the above case by the thickness T1 of the drift region 12 of the semiconductor element 7 is about 8.3.
- the inner peripheral portion 2 c of the guard ring region 5 is disposed within the guard ring 3 that is disposed closest to the semiconductor element 7 (in other words, the innermost periphery). It is the peripheral part 2c.
- each of the plurality of guard rings 3 is disposed with a gap therebetween.
- each of the plurality of guard rings 3 has a straight region B and a curvature region A.
- Each of the linear regions B of the plurality of guard rings 3 is arranged in parallel in a plan view.
- Each of the curvature regions A of the plurality of guard rings 3 is arranged along a concentric circular arc having a center C and different radii.
- the concentration of the p-type impurity contained in each of the plurality of guard rings 3 may be the same or different.
- the impurity concentration of the guard ring 3 on the outer peripheral side is lower than the impurity concentration of the guard ring 3 on the inner peripheral side.
- the guard ring region 5 may have, for example, a JTE (Junction Termination Extension) region 2 having a p-type in contact with the p body region 13 of the semiconductor element 7.
- the JTE region 2 may have the same impurity as the guard ring 3 described above at the same impurity concentration.
- the impurity concentration of JTE region 2 is lower than the impurity concentration of p body region 13.
- the thickness T1 of the p body region 13 of the semiconductor element 7 is larger than the thickness T2 of the JTE region 2.
- guard ring region 5 of MOSFET 1 may not have JTE region 2 in contact with p body region 13 but may have guard ring 3 not in contact with p body region 13. Impurities and impurity concentrations contained in the guard ring 3 are the same as those of the guard ring 3 described above.
- the guard ring 3 may be singular or plural. Preferably, a plurality of guard rings 3 are arranged with a gap therebetween.
- MOSFET 1 may have JTE region 2 in contact with p body region 13, and source electrode 16 a may be formed in contact with JTE region 2.
- the source electrode 16 a is electrically connected to the source electrode 16 formed in contact with the source region 14 surrounded by the p body region 13 and the p + region 18 surrounded by the source region 14.
- MOSFET 1 may further include a field stop region 4 having an n-type so as to surround a guard ring region 5 having a p-type.
- Field stop region 4 has the same conductivity type (n-type) as drift region 12.
- the impurity concentration of the field stop region 4 is higher than the impurity concentration of the drift region 12.
- the impurity concentration contained in the field stop region 4 is, for example, about 1.0 ⁇ 10 18 cm ⁇ 3 .
- the shortest distance D between the outer peripheral portion 3d of the guard ring region 5 and the inner peripheral portion 4c of the field stop region 4 is the same at an arbitrary position of the outer peripheral portion 3d of the guard ring region 5.
- the shortest distance D is the shortest distance between the outer peripheral portion 3 d of the outermost guard ring 3 and the inner peripheral portion 4 c of the field stop region 4.
- MOSFET 1 In a state where a voltage equal to or lower than the threshold value is applied to the gate electrode 17, that is, in an off state, the p body region 13 and the drift region 12 located immediately below the gate insulating film 15 are reversely biased and become nonconductive. On the other hand, when a positive voltage is applied to the gate electrode 17, an inversion layer is formed in the channel region in the vicinity of the p body region 13 in contact with the gate insulating film 15. As a result, n + source region 14 and drift region 12 are electrically connected, and a current flows between source electrode 22 and drain electrode 20.
- silicon carbide substrate 10 is first prepared by a substrate preparation step (S10: FIG. 7). Specifically, drift region 12 is formed by epitaxial growth on one main surface of n + substrate 11 made of hexagonal silicon carbide. Epitaxial growth can be carried out, for example, using a mixed gas of SiH 4 (silane) and C 3 H 8 (propane) as a raw material gas. At this time, for example, N (nitrogen) is introduced as an n-type impurity. Thereby, drift region 12 containing n-type impurities having a lower concentration than n-type impurities contained in n + substrate 11 is formed.
- SiH 4 silane
- C 3 H 8 propane
- an oxide film made of silicon dioxide is formed on main surface 10a of silicon carbide substrate 10 by, for example, CVD (Chemical Vapor Deposition). Then, after a resist is applied on the oxide film, exposure and development are performed, and a resist film having an opening in a region corresponding to the shape of the desired p body region 13 is formed. Then, using the resist film as a mask, the oxide film is partially removed by, for example, RIE (Reactive Ion Etching), thereby forming a mask made of an oxide film having an opening pattern on the drift region 12. A layer is formed.
- CVD Chemical Vapor Deposition
- an ion implantation step (S20: FIG. 7) is performed.
- ions are implanted into silicon carbide substrate 10 to form p body region 13, n + source region 14 and guard ring region 5.
- a p-type impurity such as Al is ion-implanted into the drift region 12 to thereby form the p body region 13 and the guard ring region. 5 is formed.
- a mask layer having an opening in a region corresponding to a desired shape of the n + source region 14 is formed.
- an n-type impurity such as P (phosphorus) is introduced into the drift region 12 by ion implantation, whereby the n + source region 14 is formed.
- a mask layer having an opening in a region corresponding to the shape of the desired p + region 18 is formed, and p-type impurities such as Al and B are ion-implanted into the drift region 12 using the mask layer as a mask.
- the p + region 18 is formed.
- the p body region 13 or the guard ring region 5 of the semiconductor element 7 may be formed first.
- the formation of the guard ring region 5 is specifically the formation of the JTE region 2 and the guard ring 3.
- the implantation depth of p body region 13 is preferably larger than the implantation depth of guard ring region 5.
- field stop region 4 may be formed so as to surround guard ring region 5 in plan view.
- silicon carbide substrate 10 on which ion implantation has been performed is heated to, for example, about 1700 ° C. in an Ar (argon) atmosphere and held for about 30 minutes.
- Ar argon
- a gate insulating film forming step (S30: FIG. 7) is performed. Specifically, first, silicon carbide substrate 10 on which a desired ion implantation region is formed by performing the above-described step (S20: FIG. 7) is thermally oxidized. Thermal oxidation can be carried out, for example, by heating to about 1300 ° C. in an oxygen atmosphere and holding for about 40 minutes. Thereby, gate insulating film 15 made of silicon dioxide is formed on main surface 10a of silicon carbide substrate 10.
- a gate electrode formation step (S40: FIG. 7) is performed.
- a gate electrode 17 made of polysilicon, aluminum, or the like, which is a conductor extends from one n + source region 14 to the other n + source region 14 and is formed on the gate insulating film 15. Formed to contact.
- the polysilicon can contain phosphorus at a high concentration exceeding 1 ⁇ 10 20 cm ⁇ 3 .
- an insulating film made of, for example, silicon dioxide is formed so as to cover gate electrode 17.
- an ohmic electrode formation step (S50: FIG. 7) is performed. Specifically, for example, a resist pattern is formed so that a part of p + region 18 and n + source region 14 is exposed, and a metal film containing, for example, Si atoms, Ti atoms, and Al atoms is formed on the entire surface of the substrate. For example, it is formed by sputtering. Thereafter, the resist pattern is lifted off, for example, to form metal film 50 in contact with gate insulating film 15 and in contact with p + region 18 and n + source region 14. Thereafter, the metal film is heated to, for example, about 1000 ° C., so that source electrode 16 in ohmic contact with silicon carbide substrate 10 is formed. Drain electrode 20 is formed in contact with n + substrate 11 of silicon carbide substrate 10. The MOSFET 1 shown in FIG. 1 is completed.
- a resist pattern is formed so that a part of p + region 18 and n + source region 14 is exposed, and a metal film containing, for
- a planar type MOSFET is described as an example of the silicon carbide semiconductor device, but the silicon carbide semiconductor device may be a trench type MOSFET. Further, the silicon carbide semiconductor device may be an IGBT (Insulated Gate Bipolar Transistor) or the like.
- IGBT Insulated Gate Bipolar Transistor
- the value obtained by dividing radius of curvature R of inner peripheral portion 2 c of curvature region A of guard ring region 5 by the thickness of drift region 12 is 5 or more and 10 or less.
- the value obtained by dividing the radius of curvature R of the inner peripheral portion 2c of the curvature region A of the guard ring region 5 by the thickness of the drift region 12 is 5 or more and 10 or less, thereby improving the breakdown voltage while suppressing a decrease in on-current. Can do.
- semiconductor element 7 includes body region 13 in contact with drift region 12 and having the second conductivity type.
- the thickness T2 of the body region 13 is larger than the thickness T3 of the guard ring region 5.
- guard ring region 5 includes JTE region 2 in contact with body region 13 and having the second conductivity type. Thereby, the breakdown voltage can be improved by the JTE region 2 in contact with the body region 13.
- semiconductor element 7 includes source region 14 in contact with body region 13 and having the first conductivity type, and source electrode 16 in contact with source region 14.
- JTE region 2 is in contact with source electrode 16.
- the source region 14 can extract electrons from the JTE region 2 at high speed, so that a depletion layer can be formed even at high frequency operation.
- guard ring region 5 includes guard ring 3 that does not contact element region IR.
- the breakdown voltage can be improved by the guard ring 3 that does not contact the element region IR.
- the value obtained by dividing the radius of curvature R of the inner peripheral portion 2c of the curvature region A of the innermost guard ring 3 by the thickness T1 of the drift region 12 is 5 or more and 10 or less.
- the radius of curvature R of the innermost guard ring 3 is smaller than the radius of curvature R of the other guard rings 3.
- the value obtained by dividing the radius of curvature R of the inner peripheral portion of the curvature region A of the innermost guard ring 3 by the thickness T1 of the drift region 12 is 5 or more and 10 or less. Can be improved.
- the MOSFET 1 according to the present embodiment further includes the field stop region 4 surrounding the guard ring region 5 and having the first conductivity type in plan view. Thereby, the breakdown voltage of the silicon carbide semiconductor device can be further improved.
- MOSFET 1 in an arbitrary position of outer peripheral portion 3d of guard ring region 5 between outer peripheral portion 3d of guard ring region 5 and inner peripheral portion 4c of field stop region 4 in plan view.
- the distance d is the same. Thereby, it can suppress that an electric field concentrates locally.
- the drift layer ratio the value obtained by dividing the radius of curvature R of the inner periphery of the guard ring 3 by the thickness T1 of the drift region 12 (hereinafter referred to as the drift layer ratio) is changed to investigate the relationship between the on-current and the breakdown voltage.
- the drift layer ratio the value obtained by dividing the radius of curvature R of the inner periphery of the guard ring 3 by the thickness T1 of the drift region 12 (hereinafter referred to as the drift layer ratio) is changed to investigate the relationship between the on-current and the breakdown voltage. did.
- three types of MOSFETs 1 made of silicon carbide and having a drift region 12 having a thickness T1 of 15 ⁇ m were prepared by the manufacturing method described in the embodiment.
- the n-type impurity concentration of the drift region 12 was set to 7.5 ⁇ 10 15 cm ⁇ 2 .
- the chip of the MOSFET 1 was a square with a side of 3 mm.
- a guard ring region 5 surrounding the element region IR is provided in the MOSFET 1.
- the impurity concentration in the guard ring region 5 was set to 1.3 ⁇ 10 13 cm ⁇ 2 .
- the curvature radii R of the inner peripheral portion 2c of the curvature region A of the guard ring region 5 of the MOSFET 1 were 50 ⁇ m, 125 ⁇ m, and 1260 ⁇ m, respectively. That is, three types of MOSFETs 1 having drift layer ratios of 3.3, 8.3, and 84.3 were prepared. On-state current and breakdown voltage were measured for each MOSFET 1.
- the shape of the element region IR of the MOSFET having a drift ratio of 84.3 is a circle in plan view.
- the breakdown voltage was measured by applying a reverse voltage to the MOSFET and measuring the reverse current.
- the voltage at which the reverse current suddenly increased when the reverse voltage was increased was defined as the withstand voltage.
- the destruction location was identified by an emission microscope. For example, when the MOSFET 1 having a drift layer ratio of 3.3 is observed with an emission microscope, strong light emission is observed in the curvature region A of the guard ring region 5 when the reverse voltage is 1200V. That is, it was confirmed that destruction occurred in the curvature region A of the guard ring region 5.
- the relationship between the on-current and the withstand voltage of MOSFET 1 will be described.
- the standard of the breakdown voltage specification in the MOSFET 1 is, for example, 1200V.
- the drift layer ratio is 3.3, the on-current is as high as 13.6 A, but the withstand voltage is about 1100 V, which is less than the specification.
- the drift layer ratio with a breakdown voltage of 1200 V or higher is considered to be 5 or higher.
- MOSFET 1 has a high breakdown voltage and a high on-resistance (that is, has a characteristic in the upper right direction in FIG. 11).
- the standard of the on-resistance spec in MOSFET 1 is 12A, for example.
- the drift layer ratio When the drift layer ratio is 84.3, the breakdown voltage is as high as 1900 V, but the breakdown voltage is about 10 A, which is less than the specification. When the drift layer ratio exceeds 8.3, the withstand voltage does not increase so much, but the on-current decreases rapidly.
- the drift layer ratio with a breakdown voltage of 12 A or more is considered to be 10 or less. That is, the drift layer ratio that satisfies both the on-current and breakdown voltage specifications is considered to be 5 or more and 10 or less.
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Abstract
Description
n+基板11は、たとえばN(窒素)などのn型不純物を高濃度で含んでいる。n+基板11に含まれる窒素などの不純物濃度はたとえば1.0×1018cm-3程度である。
図8を参照して、まず基板準備工程(S10:図7)によって炭化珪素基板10が準備される。具体的には、六方晶炭化珪素からなるn+基板11の一方の主面上にエピタキシャル成長によりドリフト領域12が形成される。エピタキシャル成長は、たとえば原料ガスとしてSiH4(シラン)とC3H8(プロパン)との混合ガスを採用して実施することができる。このとき、n型不純物として、たとえばN(窒素)が導入される。これにより、n+基板11に含まれるn型不純物よりも低い濃度のn型不純物を含むドリフト領域12が形成される。
本実施の形態に係るMOSFET1によれば、ガードリング領域5の曲率領域Aの内周部2cの曲率半径Rをドリフト領域12の厚みで除した値が5以上10以下である。ガードリング領域5の曲率領域Aの内周部2cの曲率半径Rをドリフト領域12の厚みで除した値が5以上10以下であることにより、オン電流の低下を抑制しつつ耐圧を向上させることができる。
Claims (8)
- 半導体素子が設けられた素子領域と、平面視において前記素子領域を取り囲みかつ第1導電型を有するガードリング領域とを備え、
前記半導体素子は第1導電型とは異なる第2導電型を有するドリフト領域を含み、
前記ガードリング領域は、直線領域と前記直線領域と連接する曲率領域とを含み、
前記曲率領域の内周部の曲率半径を前記ドリフト領域の厚みで除した値が5以上10以下である、炭化珪素半導体装置。 - 前記半導体素子は、前記ドリフト領域と接しかつ前記第2導電型を有するボディ領域を含み、
前記ボディ領域の厚みは、前記ガードリング領域の厚みよりも大きい、請求項1に記載の炭化珪素半導体装置。 - 前記ガードリング領域は、前記ボディ領域に接しかつ第2導電型を有するJTE領域を含む、請求項2に記載の炭化珪素半導体装置。
- 前記半導体素子は前記ボディ領域と接しかつ第1導電型を有するソース領域と、前記ソース領域に接するソース電極とを含み、
前記JTE領域は前記ソース電極と接している、請求項3に記載の炭化珪素半導体装置。 - 前記ガードリング領域は前記素子領域と接しないガードリングを含む、請求項1~4のいずれか1項に記載の炭化珪素半導体装置。
- 前記ガードリングは複数であり、
複数の前記ガードリングのうち、最内周の前記ガードリングの前記曲率領域の内周部の曲率半径を前記ドリフト領域の厚みで除した値が5以上10以下である、請求項5に記載の炭化珪素半導体装置。 - 平面視において、前記ガードリング領域を取り囲みかつ前記第1導電型を有するフィールドストップ領域をさらに備えた、請求項1~6のいずれか1項に記載の炭化珪素半導体装置。
- 平面視において、前記ガードリング領域の外周部の任意の位置において、前記ガードリング領域の前記外周部と前記フィールドストップ領域の内周部との距離が同じである、請求項7に記載の炭化珪素半導体装置。
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US20160190307A1 (en) * | 2013-08-01 | 2016-06-30 | Mitsubishi Electric Corporation | Silicon carbide semiconductor device and manufacturing method for same |
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US9224816B2 (en) * | 2014-05-21 | 2015-12-29 | Sumitomo Electric Industries, Ltd. | Silicon carbide semiconductor device |
JP5910801B1 (ja) | 2014-08-01 | 2016-04-27 | 住友電気工業株式会社 | エピタキシャルウエハおよびその製造方法 |
JP5910802B1 (ja) * | 2014-08-29 | 2016-04-27 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
CN107112353B (zh) * | 2014-12-23 | 2020-12-22 | Abb电网瑞士股份公司 | 反向传导半导体装置 |
JP6479615B2 (ja) | 2015-09-14 | 2019-03-06 | 株式会社東芝 | 半導体装置の製造方法 |
JP2017063079A (ja) | 2015-09-24 | 2017-03-30 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
US9991379B1 (en) * | 2016-11-17 | 2018-06-05 | Sanken Electric Co., Ltd. | Semiconductor device with a gate insulating film formed on an inner wall of a trench, and method of manufacturing the same |
JP2018186160A (ja) * | 2017-04-25 | 2018-11-22 | パナソニックIpマネジメント株式会社 | 半導体素子 |
US11189722B2 (en) | 2018-04-13 | 2021-11-30 | Sumitomo Electric Industries, Ltd. | Semiconductor device |
US10813607B2 (en) * | 2018-06-27 | 2020-10-27 | Prismatic Sensors Ab | X-ray sensor, method for constructing an x-ray sensor and an x-ray imaging system comprising such an x-ray sensor |
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