WO2014040230A1 - 电子器件及电子器件制造方法 - Google Patents

电子器件及电子器件制造方法 Download PDF

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Publication number
WO2014040230A1
WO2014040230A1 PCT/CN2012/081256 CN2012081256W WO2014040230A1 WO 2014040230 A1 WO2014040230 A1 WO 2014040230A1 CN 2012081256 W CN2012081256 W CN 2012081256W WO 2014040230 A1 WO2014040230 A1 WO 2014040230A1
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WO
WIPO (PCT)
Prior art keywords
electronic component
substrate
shielding wall
metal
electronic
Prior art date
Application number
PCT/CN2012/081256
Other languages
English (en)
French (fr)
Inventor
杨宇
占奇志
Original Assignee
华为终端有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为终端有限公司 filed Critical 华为终端有限公司
Priority to PCT/CN2012/081256 priority Critical patent/WO2014040230A1/zh
Priority to CN201280004617.XA priority patent/CN103493198B/zh
Publication of WO2014040230A1 publication Critical patent/WO2014040230A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Definitions

  • the present invention relates to an electromagnetic interference shielding technique, and more particularly to an electronic device and an electronic device manufacturing method. Background technique
  • the EMI shielding design can reduce the external radiated interference of electronic components and also reduce the interference of external radiation on electronic components.
  • Many electronic components require an electromagnetic interference shielding design.
  • the RF electronic component portion needs to be shielded from the surrounding electronic components.
  • the commonly used electronic component shielding method mainly achieves shielding of the electronic component through the metal shielding frame.
  • FIG. 1 is a schematic structural view of a metal shield frame of the prior art.
  • the metal shield frame 101 has a through hole 102.
  • the plastic sealant penetrates into the metal shield frame 101 through the through hole 102 in the metal shield frame 101.
  • the electronic component in the metal shield frame 101 is encapsulated by the plastic seal together with the metal shield frame 101 to form a complete molded body.
  • the metal shield frame 101 causes the overall height of the plastic package module to increase, and the plastic sealant can penetrate into the metal shield frame 101 through the through hole 102 in the metal shield frame 101, and the flowability of the plastic sealant is poor. Therefore, the shielding effect on electronic components is not good by the metal shield frame.
  • Embodiments of the present invention provide an electronic device and an electronic device manufacturing method to improve electromagnetic shielding effect on an electronic component.
  • an electronic device including:
  • a substrate wherein the substrate is provided with a ground layer
  • a metal shielding wall disposed between the first electronic component and the second electronic component; a molding compound covering the first electronic component, the second electronic component, and the metal shielding wall, the plastic sealing
  • the glue has an opening, and the metal surface of the top of the metal shielding wall is from the opening Exposed
  • the substrate ground layer is provided on a substrate surface layer or a substrate intermediate layer.
  • a height of the metal shield wall is not greater than a height of a highest one of the first electronic component and the second electronic component.
  • the metal shield wall comprises: a metal plate; a suction cup disposed at a top of the metal plate; and two support sheets disposed at a bottom of the metal plate.
  • an embodiment of the present invention provides a method of manufacturing an electronic device, including: disposing a first electronic component and a second electronic component on a substrate, the substrate being provided with a ground layer; and the first electronic component and the a metal screen is disposed on the substrate between the second electronic components;
  • the substrate provided with the first electronic component, the second electronic component and the metal shielding wall is placed in a mold cavity, and a plastic sealing glue is injected to form a plastic sealing body;
  • the metal shielding wall is disposed on the substrate between the first electronic component and the second electronic component, specifically: providing a suction cup at the top of the metal shielding wall; A support piece is disposed at a bottom of the metal shielding wall; and the metal shielding wall is fixed on the substrate by mounting.
  • a height of the metal shield wall is not greater than a height of a highest one of the first electronic component and the second electronic component.
  • injection molding compound is specifically: injecting the molding compound in a direction parallel to the metal shielding wall.
  • the electronic device manufacturing method as described above, wherein the method of depositing a conductive film on the metal surface of the metal shielded wall and the molding compound comprises: plating or sputtering.
  • a third electronic element is further disposed on the substrate And a fourth electronic component, wherein the third electronic component and the first electronic component are a first set of electronic components, and the fourth electronic component and the second electronic component are a second set of electronic components, wherein the first electronic component and
  • the metal shielding wall disposed on the substrate between the second electronic components is specifically: a metal shielding wall is disposed on the substrate between the first group of electronic components and the second group of electronic components.
  • the method further includes: cutting the molding body including the first group of electronic components and the second group of electronic components into the first sub-molding body and the second sub-molding body, wherein the first sub-molding body comprises the first electronic component and the first The two electronic components, the second sub-molding body comprises a third electronic component and a fourth electronic component.
  • the electronic device provided by the embodiment of the invention provides a metal shielding wall between the first electronic component and the second electronic component, and the metal shielding wall, the conductive film coated on the plastic sealing glue and the grounding layer of the substrate Inter-electrical connection, forming a complete shielding body, achieving sub-cavity shielding, improving the electromagnetic interference shielding effect of electronic components. Since only one metal shielding wall is disposed between the first electronic component and the second electronic component, and the height of the metal shielding wall does not increase the height of the electronic device itself, the electromagnetic interference shielding packaging cost of the electronic component is saved.
  • the electronic device manufacturing method provided by the embodiment of the invention provides a metal shield wall on the substrate, and the flow direction of the plastic sealant is parallel to the metal shield wall during the plastic sealing process, so that the plastic sealant can be more evenly and satisfactorily distributed in the electronic component. between.
  • the conductive film is coated with the metal surface of the plastic encapsulant and the metal shielding wall, and extends to electrically connect with the grounding layer of the substrate to form a complete shielding body, thereby realizing the sub-cavity shielding, thereby greatly improving the electromagnetic interference shielding effect of the electronic component. .
  • FIG. 2 is a schematic cross-sectional structural view of an embodiment of an electronic device of the present invention.
  • FIG. 3 is a schematic top plan view of the metal shielded wall of FIG. 2;
  • FIG. 4 is a flow chart of an embodiment of a method of manufacturing an electronic device according to the present invention.
  • FIG. 5 is a schematic structural view of an embodiment of a substrate on which an electronic component is mounted according to the present invention.
  • FIG. 6 is a flow chart of an embodiment of a method for installing a metal shielded wall according to the present invention.
  • FIG. 7 is a schematic structural view of an embodiment of a substrate on which two sets of electronic components are mounted according to the present invention.
  • the technical solutions in the present invention will be clearly and completely described in the following with reference to the drawings of the present invention. It is obvious that the described embodiments are part of the present invention. Embodiments, not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.
  • the electronic device includes a substrate 201, a first electronic component 202, a second electronic component 203, a metal shielding wall 204, a molding compound 205, and Conductive film 206.
  • a grounding layer is disposed in the substrate 201; the first electronic component 202 and the second electronic component 203 are disposed on the substrate 201; the metal shielding wall 204 is disposed between the first electronic component 202 and the second electronic component 203; The first electronic component 202, the second electronic component 203, and the metal shielding wall 204 have an opening on the molding compound 205, and a metal surface on the top of the metal shielding wall 204 is exposed from the opening; the conductive film 206 covers the top of the metal shielding wall 204.
  • the metal surface and the molding compound 205 are electrically connected to the ground layer of the substrate 201.
  • At least one grounding layer is disposed in the substrate 201, and a shielding wall space is reserved between the first electronic component 202 and the second electronic component 203, and the metal shielding wall 204 is fixed on the reserved shielding wall.
  • the molding compound 205 flows in a direction parallel to the metal shielding wall 204, and is uniformly filled and filled between the first electronic component 202, the second electronic component 203 and the metal shielding wall 204, to be molded.
  • the plastic seal 205 on the top of the metal shield wall 204 is removed, the metal surface on the top of the metal shield wall 204 is exposed, and then the conductive film 206 is sprayed on the surface of the plastic seal 205 of the electronic device to realize the conductive film 206 and the substrate 201.
  • At least one grounding layer is electrically connected. Since the metal surface on the top of the metal shielding wall 204 is exposed, the conductive film 206, the grounding layer of the substrate 201 and the gold shielding wall 204 are electrically connected to form a complete electromagnetic interference shielding package. Body, and achieve sub-cavity shielding.
  • the electronic device provided by the embodiment of the present invention utilizes the grounding layer of the substrate 201 itself, and the metal shielding wall 204 is formed by disposing the metal shielding wall 204 at the required sub-cavity of the substrate 201 and spraying the conductive film 206 on the surface of the molding body.
  • the grounding layer of the substrate 201 is electrically connected to form a complete shielding body between the metal shielding wall 204, the conductive film 206 and the ground layer of the substrate 201, thereby realizing the sub-cavity shielding, thereby greatly improving the electromagnetic interference shielding effect of the electronic component.
  • ground layer of the substrate 201 may be disposed on the substrate surface layer or the substrate intermediate layer.
  • the conductive film 206 deposited on the molding compound 205 extends to the substrate ground layer around the surface of the substrate 201 to achieve electrical connection with the ground layer of the substrate surface;
  • the conductive film 206 deposited on the molding compound 205 extends to the side of the substrate 201 to electrically connect at least one ground layer exposed on the side of the substrate 201.
  • the height of the metal shielding wall 204 is not greater than the height of the highest electronic component of the first electronic component 202 and the second electronic component 203 to ensure that the overall height of the electronic device is not due to the setting of the metal shielding wall. And increase.
  • the metal shielded wall 204 of FIG. 2 may further include a metal plate 301, a suction cup 302, and a support piece 303.
  • the thickness of the metal plate 301 may be specifically 1 mm to 2 mm; the suction cup 302 is disposed at the top of the metal plate 301 for positioning the metal shielding wall when the metal shielding wall is mounted on the substrate, the suction cup 302 and the metal plate
  • the highest point of 301 is kept at the same level so that the overall height of the electronic device is not increased by the arrangement of the metal shielding wall; the supporting piece 303 is disposed at the bottom of the metal plate 301, one at each end, and the orientation of the two supporting pieces 303 can be
  • the metal plate 301 is supported, and can also be used as a soldering pin when the metal shield wall is attached to the substrate.
  • the thickness of the metal plate 301 can be very small, the height of the metal shielding wall is not greater than the height of the highest electronic component in the electronic device, and the manufacturing process of the metal shielding wall is simple, thereby saving electrons to a large extent.
  • the electromagnetic interference of the component shields the packaging cost; the setting of the suction cup 302 enables the metal shielding wall to be accurately positioned on the reserved shielding wall of the substrate during mounting.
  • the two supporting pieces 303 enable the metal shielding wall to stand perpendicularly on the substrate, and can be used as a soldering pin at the time of mounting, and the metal shielding wall is firmly fixed on the substrate, the flow direction of the plastic sealing glue and the metal shielding
  • the walls are kept parallel, so the arrangement of the metal shielding wall does not hinder the flow of the molding compound, so that the plastic sealing glue can be more evenly and satisfactorily filled between the first electronic component, the second electronic component and the metal shielding wall, thereby realizing Good plastic sealing effect.
  • FIG. 4 is a flow chart of an embodiment of an electronic device manufacturing method according to the present invention. As shown in FIG. 4, the electronic device manufacturing method provided by this embodiment specifically includes the following steps:
  • Step 401 The first electronic component and the second electronic component are disposed on the substrate, and the substrate is provided with a ground layer;
  • FIG. 5 is a schematic structural diagram of an embodiment of a substrate for mounting an electronic component according to the present invention.
  • a first electronic component 501 and a second electronic component 502 are respectively disposed on two sides of the substrate 500, and may be in the first electronic component.
  • a shield wall space 503 is reserved between the 501 and the second electronic component 502.
  • the first electronic component 501 and the second electronic component 502 are electronic components that need to be shielded from each other, the first electronic component 501 may include a plurality of electronic components, and the second electronic component 502 may also include a plurality of electronic components, the first electronic component 501 and The second electronic component 502 can include different types and numbers of electronic components.
  • Step 402 A metal shielding wall is disposed on the substrate between the first electronic component and the second electronic component;
  • the height of the metal shield wall is not greater than the height of the highest of the first electronic component and the second electronic component to avoid increasing the overall height of the electronic device by introducing the metal shield wall.
  • Step 403 The substrate provided with the first electronic component, the second electronic component, and the metal shielding wall is placed in a mold cavity, and a plastic sealing glue is injected to form a plastic sealing body;
  • the mold cavity plays a role in shaping the plastic sealing body, and the fluidity of the plastic sealing glue is observed during the injection molding process, so that the plastic sealing glue is hooked and satisfactorily filled between the first electronic component, the second electronic component and the metal shielding wall, and The first electronic component, the second electronic component and the metal shielding wall are completely covered, and then the plastic sealing glue is hardened to cure the molding compound into a molding body, and the specified electrical properties and mechanical properties are achieved.
  • Step 404 removing the plastic seal on the top of the metal shielding wall to expose the metal surface on the top of the metal shielding wall;
  • the plastic sealing glue on the top of the metal shielding wall can be removed by physical grinding, or the metal surface of the top of the metal shielding wall can be exposed by using chemical solvent, laser or the like.
  • Step 405 depositing a conductive film on the metal surface of the top of the metal shielding wall and the molding compound, and electrically connecting the conductive film to the ground layer of the substrate.
  • a conductive film is added on the cured molding plastic, and the conductive film is electrically connected to the metal surface exposed at the top of the metal shielding wall and the ground layer exposed on the side of the substrate or the ground layer of the substrate surface to form a complete shielding. Body, achieve sub-cavity shielding.
  • the shielding wall space is reserved at the required sub-cavity of the substrate, and the metal shielding wall is disposed on the substrate, and the top metal surface of the metal shielding wall is electrically connected to the grounding layer of the substrate through the conductive film to form a complete
  • the shielding body realizes the sub-cavity shielding, thereby greatly improving the electromagnetic interference shielding effect of the electronic components. Since the metal shielded wall has a simple structure, occupies a small space of the substrate, and consumes less metal material, the electromagnetic interference of the electronic component can be largely shielded from the package cost.
  • FIG. 6 is a flow chart of a method for fabricating a metal shielding wall according to the present invention. As shown in FIG. 6, in this embodiment, the metal is disposed on a substrate between the first electronic component and the second electronic component.
  • the shielding wall may specifically include the following steps:
  • Step 601 Providing a suction cup on the top of the metal shielding wall
  • the suction cup is disposed on the top of the metal shielding wall for positioning the metal shielding wall when the metal shielding wall is fixed on the substrate, and the suction cup is kept at the same level as the highest position of the metal shielding wall, so that the overall height of the electronic device is not shielded by the metal.
  • the wall is set to increase.
  • Step 602 A support piece is disposed at a bottom of the metal shielding wall
  • the supporting piece is disposed at the bottom of the metal shielding wall, one at each end, the two supporting pieces may have opposite orientations, support the metal shielding wall, and may also be used as a welded tube when the metal shielding wall is fixed on the substrate. foot.
  • Step 603 Fix the metal shielding wall on the substrate in a mounting manner.
  • the metal shielding wall is positioned on the reserved shielding wall space of the substrate by using the suction cup at the top of the metal shielding wall, so that the metal shielding wall is erected on the substrate, and the supporting piece disposed at the bottom of the metal shielding wall is used as the welding pin.
  • the metal shield wall is fixed on the substrate.
  • the height of the metal shielding wall is not greater than the height of the highest electronic component of the first electronic component and the second electronic component to avoid introducing the metal Shield the wall to increase the overall height of the electronics.
  • the molding compound is injected in a direction parallel to the metal shielding wall.
  • the molding compound may be injected in a direction parallel to the metal shielding wall and the substrate, or the molding compound may be poured in a direction parallel to the metal shielding wall and perpendicular to the substrate. Therefore, compared with the prior art electromagnetic interference shielding packaging method, the technical solution provided by the embodiment provides the plastic encapsulant with better fluidity, and therefore, the plastic encapsulant can be more evenly and fully distributed in the first electronic component, A better plastic sealing effect is achieved between the second electronic component and the metal shielding wall.
  • a method of depositing a conductive film on the metal surface of the top of the metal shielding wall and the molding compound comprises: coating or sputtering.
  • a metal thin film is deposited on the surface of the plastic body by ion plating, sputtering, or the like to form a surface coating having good adhesion as a shielding layer.
  • FIG. 7 is a schematic structural view of an embodiment of a substrate on which two sets of electronic components are mounted.
  • a substrate 700 on which two sets of electronic components are mounted.
  • the substrate 700 not only the first electronic component 701, the second electronic component 702, but also a third device is disposed.
  • the metal shield wall is disposed on the substrate 700 between the first electronic component 701 and the second electronic component 702.
  • a metal shield wall 705 is disposed on the substrate 700 between the first set of electronic components and the second set of electronic components.
  • the metal shielding wall between the first electronic component 701 and the second electronic component 702 and the metal shielding wall between the third electronic component 703 and the fourth electronic component 704 can be disposed in a straight line, at the first A metal shield wall 705 is disposed between the set of electronic components and the second set of electronic components.
  • the first set of electronic components and the second set of electronic components may also include more electronic components.
  • the height of the metal shield wall 705 is no greater than the height of the tallest electronic component of the first set of electronic components and the second set of electronic components.
  • the electronic device manufacturing method as described above wherein the substrate 700 provided with the first group of electronic components, the second group of electronic components, and the metal shielded wall 705 is placed in a mold cavity, and the plastic sealant is injected to form a molded body, and then
  • the method includes: cutting a molding body including the first group of electronic components and the second group of electronic components into a first sub-molding body and a second sub-molding body, wherein the first sub-molding body A first electronic component 701 and a second electronic component 702 are included, and the second sub-molding body includes a third electronic component 703 and a fourth electronic component 704.
  • the plastic package containing the first group of electronic components and the second group of electronic components may be cut into the first layer before the conductive film is deposited on the metal surface of the metal shielding wall and the plastic sealing glue.
  • a sub-molding body and a second sub-molding body wherein the first sub-molding body comprises a first electronic component 701 and a second electronic component 702, and the second sub-molding body comprises a third electronic component 703 and a fourth electronic component 704.
  • a metal shielding wall is disposed between the first group of electronic components and the second group of electronic components, wherein the number of the electronic components included in the first group of electronic components and the second group of electronic components is not limited to two.
  • the metal shielding wall can be fixed on the substrate by surface mounting. During the molding process, the flow direction of the molding compound is kept parallel with the metal shielding wall to prevent the metal shielding wall from obstructing the flow of the molding compound.
  • the plastic seal on the top of the metal shield wall is then removed to expose the metal surface at the top of the metal shield wall.
  • the plastic seal on the top of the metal shield wall can be cleaned by chemical means, physical grinding and laser treatment.
  • the whole plate plastic body including the first group of electronic components and the second group of electronic components may be cut into a plurality of sub-molded bodies, and then the conductive film is coated on each sub-molding body, and The conductive film is electrically connected to the metal surface of the top of the metal shielding wall and the grounding layer of the substrate to form a complete shielding body, and the sub-chamber shielding is realized.
  • the electronic device manufacturing method provides a complete shielding by providing a metal shielding wall on the substrate and electrically connecting the top metal surface of the metal shielding wall to the grounding layer of the substrate through the conductive film.
  • Body can provide better shielding effect. Since the metal shielding wall is simple in manufacturing process, and the metal shielding walls can be shared between the two sets of electronic components, the substrate space occupied by the metal shielding wall is reduced, the metal material is consumed less, and the efficiency of the electromagnetic interference shielding package is improved. , to a large extent, the electromagnetic interference shielding package cost of electronic components is saved.
  • the electronic device electrically connects the metal surface of the metal shielding wall and the grounding layer of the substrate to the metal shielding wall, the conductive film coated on the plastic sealing glue and the ground layer of the substrate. Forming a complete shield and achieving sub-cavity shielding can provide good electromagnetic interference shielding.

Abstract

提供了一种电子器件及电子器件制造方法。一种电子器件包括基板（201），基板（201）中设置有接地层；第一电子元件（202）和第二电子元件（203），设置在基板（201）上；金属屏蔽墙（204），设置在第一电子元件（202）和第二电子元件（203）之间；塑封胶（205），包覆第一电子元件（202）、第二电子元件（203）和金属屏蔽墙（204），塑封胶（205）上具有开口，仅是屏蔽墙（204）顶部的金属面从开口中露出；导电薄膜（206），包覆金属屏蔽墙（204）顶部的金属面和塑封胶（205），且与基板（201）的接地层电性连接。该电子器件及电子器件制作制造方法可以提供更好的电磁干扰屏蔽效果，并节约电子元件的电磁干扰屏蔽的封装成本。

Description

电子器件及电子器件制造方法 技术领域 本发明实施例涉及电磁干扰屏蔽技术， 尤其涉及一种电子器件及电子 器件制造方法。 背景技术
电磁干扰屏蔽设计可以减少电子元件对外的辐射干扰， 同时也可以减 少外来辐射对电子元件的干扰。 很多电子元件需要电磁干扰屏蔽设计， 如 IC设计中需要将射频电子元件部分与周围电子元件分腔屏蔽。
现有技术中， 常用的电子元件屏蔽方式主要为通过金属屏蔽框实现对 电子元件的屏蔽。
图 1为现有技术的金属屏蔽框结构示意图， 如图 1所示， 金属屏蔽框 101上有通孔 102 , 在塑封制程， 塑封胶通过金属屏蔽框 101上的通孔 102 渗入金属屏蔽框 101内，使金属屏蔽框 101内的电子元件与金属屏蔽框 101 一起被塑封胶封装， 形成完整的塑封体。 但是， 金属屏蔽框 101致使塑封 体模块的整体高度增加， 塑封胶通过金属屏蔽框 101上的通孔 102才能渗 入到金属屏蔽框 101 内部， 塑封胶的流动性较差。 因此， 通过金属屏蔽框 实现对电子元件屏蔽的效果不佳。 发明内容 本发明实施例提供一种电子器件及电子器件制造方法， 以提高对电子 元件的电磁干扰屏蔽效果。
一方面， 本发明实施例提供一种电子器件， 包括：
基板， 所述基板中设置有接地层；
第一电子元件和第二电子元件， 设置在所述基板上；
金属屏蔽墙， 设置在所述第一电子元件和所述第二电子元件之间； 塑封胶， 包覆所述第一电子元件、 所述第二电子元件和所述金属屏蔽 墙， 所述塑封胶上具有开口， 所述金属屏蔽墙顶部的金属面从所述开口中 露出；
导电薄膜， 包覆所述金属屏蔽墙顶部的金属面和所述塑封胶， 且与所 述基板的接地层电性连接。
如上所述的电子器件， 其中， 所述基板接地层设置在基板表层或者基 板中间层。
如上所述的电子器件， 其中， 所述金属屏蔽墙的高度不大于所述第一 电子元件和所述第二电子元件中最高的电子元件的高度。
如上所述的电子器件， 其中， 所述金属屏蔽墙包括： 金属板； 吸盘， 设置在所述金属板的顶部； 两个支撑片， 设置在所述金属板的底部。
另一方面， 本发明实施例提供一种电子器件制造方法， 包括： 在基板上设置第 ―电子元件和第二电子元件， 所述基板设有接地层； 在所述第一电子元件和所述第二电子元件之间的基板上设置金属屏 败墙;
将设置有所述第一电子元件、 所述第二电子元件和所述金属屏蔽墙的 基板置于模具腔体内， 注入塑封胶， 形成塑封体；
将所述金属屏蔽墙顶部的塑封胶清除， 以露出所述金属屏蔽墙顶部的 金属面；
在所述金属屏蔽墙顶部的金属面和所述塑封胶上沉积导电薄膜， 并使 导电薄膜与所述基板的接地层电性连接。
如上所述的电子器件制造方法， 其中， 所述在所述第一电子元件和所 述第二电子元件之间的基板上设置金属屏蔽墙， 具体为： 在所述金属屏蔽 墙顶部设置吸盘； 在所述金属屏蔽墙底部设置支撑片； 以贴装方式将所述 金属屏蔽墙固定在所述基板上。
如上所述的电子器件制造方法， 其中， 所述金属屏蔽墙的高度不大于 所述第一电子元件和所述第二电子元件中最高的电子元件的高度。
如上所述的电子器件制造方法， 其中， 所述注入塑封胶， 具体为： 将 所述塑封胶沿着与所述金属屏蔽墙平行的方向注入。
如上所述的电子器件制造方法， 其中， 在所述金属屏蔽墙顶部的金属 面和所述塑封胶上沉积导电薄膜的方式包括： 镀膜或喷镀。
如上所述的电子器件制造方法， 其中， 在基板上还设置有第三电子元 件和第四电子元件,其中第三电子元件与第一电子元件为第一组电子元件, 第四电子元件和第二电子元件为第二组电子元件，所述在所述第一电子元 件和所述第二电子元件之间的基板上设置金属屏蔽墙具体为： 在第一组电 子元件和第二组电子元件之间的基板上设置一个金属屏蔽墙。
如上所述的电子器件制造方法， 其中， 在将设置有所述第一组电子元 件、 所述第二组电子元件和所述金属屏蔽墙的基板置于模具腔体内， 注入 塑封胶， 形成塑封体之后， 还包括： 将包含第一组电子元件和第二组电子 元件的塑封体切割成第一子塑封体和第二子塑封体， 其中， 第一子塑封体 包含第一电子元件和第二电子元件， 第二子塑封体包含第三电子元件和第 四电子元件。
本发明实施例提供的电子器件， 通过在第一电子元件和第二电子元件 之间设置金属屏蔽墙， 并使金属屏蔽墙、 包覆于塑封胶上的导电薄膜和基 板的接地层三者之间电性连接， 形成完整的屏蔽体， 实现分腔屏蔽， 提高 了电子元件的电磁干扰屏蔽效果。 由于只需在第一电子元件和第二电子元 件之间设置一面金属屏蔽墙， 且金属屏蔽墙的高度不增加电子器件本身的 高度， 从而节约了电子元件的电磁干扰屏蔽封装成本。
本发明实施例提供的电子器件制造方法， 通过在基板上设置金属屏蔽 墙， 且在塑封过程中塑封胶的流动方向与金属屏蔽墙平行， 使塑封胶能更 均匀、 饱满地分布在电子元件之间。 由于导电薄膜包覆塑封胶和金属屏蔽 墙顶部的金属面，且延伸至与基板的接地层电性连接，形成完整的屏蔽体， 实现分腔屏蔽， 从而大大提高了电子元件的电磁干扰屏蔽效果。 由于金属 屏蔽墙结构简单， 占用基板空间小， 耗费金属材料少， 且两组电子元件可 以共用金属屏蔽墙， 简化了电子元件的电磁干扰屏蔽封装工艺， 节约了电 子元件的电磁干扰屏蔽封装成本。 附图说明 为了更清楚地说明本发明实施例的技术方案， 下面将对实施例中所需 要使用的附图作简单地介绍， 显而易见地， 下面描述中的附图仅是本发明 的一些实施例， 对于本领域普通技术人员来讲， 在不付出创造性劳动的前 提下， 还可以根据这些附图获得其他的附图。 图 1为现有技术的金属屏蔽框结构示意图；
图 2为本发明电子器件实施例的剖面结构示意图；
图 3为图 2中金属屏蔽墙的俯视结构示意图；
图 4为本发明电子器件制造方法实施例流程图；
图 5为本发明贴装电子元件的基板实施例的结构示意图；
图 6为本发明设置金属屏蔽墙的方法实施例流程图；
图 7为本发明贴装两组电子元件的基板实施例的结构示意图。 具体实施方式 为使本发明的目的、 技术方案和优点更加清楚， 下面将结合本发明的 附图， 对本发明中的技术方案进行清楚、 完整地描述， 显然， 所描述的实 施例是本发明一部分实施例， 而不是全部的实施例。 基于本发明中的实施 例， 本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他 实施例， 都属于本发明保护的范围。
图 2为本发明实施例提供的电子器件的剖面结构示意图，如图 2所示， 该电子器件包括基板 201、 第一电子元件 202、 第二电子元件 203、 金属屏 蔽墙 204、 塑封胶 205和导电薄膜 206。
基板 201中设置有接地层； 第一电子元件 202和第二电子元件 203设 置在基板 201上； 金属屏蔽墙 204设置在第一电子元件 202和第二电子元 件 203之间； 塑封胶 205包覆第一电子元件 202、 第二电子元件 203和金 属屏蔽墙 204 , 塑封胶 205上具有开口， 金属屏蔽墙 204顶部的金属面从 所述开口中露出； 导电薄膜 206包覆金属屏蔽墙 204顶部的金属面和塑封 胶 205 , 且与基板 201的接地层电性连接。
具体地， 基板 201中设置有至少一层接地层， 在第一电子元件 202和 第二电子元件 203之间需要分腔处预留屏蔽墙空间， 将金属屏蔽墙 204固 定在预留的屏蔽墙空间处的基板 201上，塑封胶 205沿着与金属屏蔽墙 204 平行的方向流入， 均勾、 饱满地填充在第一电子元件 202、 第二电子元件 203和金属屏蔽墙 204之间， 待塑封胶 205固化后， 将金属屏蔽墙 204顶 部的塑封胶 205清除， 使金属屏蔽墙 204顶部的金属面露出， 然后在电子 器件的塑封胶 205表面喷镀导电薄膜 206, 实现导电薄膜 206与基板 201 的至少一层接地层电性连接， 由于金属屏蔽墙 204顶部的金属面已露出， 导电薄膜 206、 基板 201的接地层和金屏蔽墙 204三者实现电性连接， 形 成完整的电磁干扰屏蔽封装体， 并实现分腔屏蔽。
本发明实施例提供的上述电子器件， 利用基板 201本身的接地层， 并 通过在基板 201的需要分腔处设置金属屏蔽墙 204和在塑封体表面喷镀导 电薄膜 206, 实现金属屏蔽墙 204与基板 201的接地层电性连接， 使金属 屏蔽墙 204、 导电薄膜 206和基板 201的接地层三者之间形成完整的屏蔽 体， 实现分腔屏蔽， 大大提高了电子元件的电磁干扰屏蔽效果。
如上所述的电子器件， 其中， 基板 201的接地层可以设置在基板表层 或者基板中间层。
具体的， 当基板 201的接地层设置在基板表层时， 沉积在塑封胶 205 上的导电薄膜 206延伸至基板 201表面周围的基板接地层， 实现与基板表 面接地层的电性连接； 当基板 201的接地层为基板 201的中间层时， 沉积 在塑封胶 205上的导电薄膜 206延伸至基板 201的侧面， 实现与基板 201 侧面露出的至少一层接地层的电性连接。
在本实施例中， 优选地， 金属屏蔽墙 204的高度不大于第一电子元件 202和第二电子元件 203中最高的电子元件的高度， 以确保电子器件的整 体高度不因金属屏蔽墙的设置而增加。
图 3为图 2中金属屏蔽墙的俯视结构示意图， 如图 3所示， 图 2中的 金属屏蔽墙 204还可以包括金属板 301、 吸盘 302和支撑片 303。
在本实施例中， 金属板 301 的厚度具体可以为 1 毫米〜 2毫米； 吸盘 302设置在金属板 301的顶部， 用于将金属屏蔽墙贴装于基板时的位置定 位， 吸盘 302与金属板 301的最高处保持在同一水平面上， 使电子器件的 整体高度不因金属屏蔽墙的设置而增加； 支撑片 303设置在金属板 301的 底部， 两端各一个， 两个支撑片 303的朝向可以相反， 对金属板 301起支 撑作用， 还可以用作将金属屏蔽墙贴装于基板时的焊接管脚。
本实施例中， 由于金属板 301的厚度可以非常小， 金属屏蔽墙的高度 不大于电子器件中最高的电子元件的高度， 且金属屏蔽墙的制作工艺简 单， 因此， 可以较大程度的节约电子元件的电磁干扰屏蔽封装成本； 吸盘 302的设置， 使贴装时能够将金属屏蔽墙准确的定位在基板的预留屏蔽墙 空间上， 两个支撑片 303使金属屏蔽墙能够垂直立在基板上， 且可以用作 贴装时的焊接管脚， 将金属屏蔽墙牢固地固定在基板上， 塑封胶的流动方 向与金属屏蔽墙保持平行， 因此， 金属屏蔽墙的设置不会阻碍塑封胶的流 动， 使塑封胶能更均勾、 饱满地填充在第一电子元件、 第二电子元件和金 属屏蔽墙之间， 从而实现更好的塑封效果。
图 4为本发明电子器件制造方法实施例流程图， 如图 4所示， 本实施 例提供的电子器件制造方法具体包括如下步骤：
步骤 401、 在基板上设置第一电子元件和第二电子元件， 所述基板设 有接地层；
图 5为本发明贴装电子元件的基板实施例的结构示意图，如图 5所示， 在基板 500的两侧分别设置有第一电子元件 501和第二电子元件 502 , 可 以在第一电子元件 501和第二电子元件 502之间预留屏蔽墙空间 503。 第 一电子元件 501和第二电子元件 502是需要相互屏蔽的电子元件， 第一电 子元件 501可以包括多个电子元件， 第二电子元件 502也可以包括多个电 子元件， 第一电子元件 501和第二电子元件 502可以包括不同种类和数量 的电子元件。
步骤 402、 在所述第一电子元件和所述第二电子元件之间的基板上设 置金属屏蔽墙；
优选地， 金属屏蔽墙的高度不大于所述第一电子元件和所述第二电子 元件中最高的电子元件的高度， 以避免因引入所述金属屏蔽墙而增加电子 器件的整体高度。
步骤 403、 将设置有所述第一电子元件、 所述第二电子元件和所述金 属屏蔽墙的基板置于模具腔体内， 注入塑封胶， 形成塑封体；
具体地， 模具腔体对塑封体起定型作用， 注塑过程中观察塑封胶的流 动性， 使塑封胶均勾、 饱满地填充在第一电子元件、 第二电子元件和金属 屏蔽墙之间， 并将第一电子元件、 第二电子元件和金属屏蔽墙完全覆盖， 然后硬化塑封胶， 使塑封胶固化成为塑封体， 并达到规定的电性能和机械 性能。
步骤 404、 将所述金属屏蔽墙顶部的塑封胶清除， 以露出所述金属屏 蔽墙顶部的金属面； 具体地， 可以通过物理研磨的方式将金属屏蔽墙顶部的塑封胶清除， 也可以使用化学溶剂、镭射等技术手段，使金属屏蔽墙顶部的金属面露出。
步骤 405、 在所述金属屏蔽墙顶部的金属面和所述塑封胶上沉积导电 薄膜， 并使导电薄膜与所述基板的接地层电性连接。
具体地， 在固化成型的塑封胶上增加一层导电薄膜， 并使导电薄膜与 金属屏蔽墙顶部露出的金属面和基板侧面露出的接地层或者基板表面的 接地层电性连接， 形成完整的屏蔽体， 实现分腔屏蔽。
本实施例中， 在基板的需要分腔处预留屏蔽墙空间， 通过在基板上设 置金属屏蔽墙， 并将金属屏蔽墙的顶部金属面通过导电薄膜与基板的接地 层电性连接， 形成完整的屏蔽体， 实现分腔屏蔽， 从而大大提高了电子元 件的电磁干扰屏蔽效果。 由于金属屏蔽墙结构简单， 占用基板空间小， 耗 费金属材料少， 因而能够较大程度的节约电子元件的电磁干扰屏蔽封装成 本。
图 6为本发明设置金属屏蔽墙的方法实施例流程图， 如图 6所示， 本 实施例中， 所述在所述第一电子元件和所述第二电子元件之间的基板上设 置金属屏蔽墙， 具体可以包括如下步骤：
步骤 601、 在所述金属屏蔽墙顶部设置吸盘；
优选地， 吸盘设置在金属屏蔽墙的顶部， 用于将金属屏蔽墙固定于基 板时的位置定位， 吸盘与金属屏蔽墙的最高处保持在同一水平面上， 使电 子器件的整体高度不因金属屏蔽墙的设置而增加。
步骤 602、 在所述金属屏蔽墙底部设置支撑片；
优选地， 支撑片设置在金属屏蔽墙的底部， 两端各一个， 两个支撑片 的朝向可以相反， 对金属屏蔽墙起支撑作用， 还可以用作将金属屏蔽墙固 定于基板时的焊接管脚。
步骤 603、 以贴装方式将所述金属屏蔽墙固定在所述基板上。
具体地， 利用金属屏蔽墙顶部的吸盘将金属屏蔽墙定位于基板的预留 屏蔽墙空间处， 使金属屏蔽墙直立在基板上， 将设置在金属屏蔽墙底部的 支撑片作为焊接管脚， 将金属屏蔽墙固定在基板上。
本实施例中， 优选地， 所述金属屏蔽墙的高度不大于所述第一电子元 件和所述第二电子元件中最高的电子元件的高度， 以避免因引入所述金属 屏蔽墙而增加电子器件的整体高度。
本实施例中， 优选地， 将所述塑封胶沿着与所述金属屏蔽墙平行的方 向注入。
具体地， 可以将塑封胶沿与金属屏蔽墙和基板都平行的方向注入， 也 可以将塑封胶沿与金属屏蔽墙平行、 与基板垂直的方向灌入。 因此， 相较 于现有技术的电磁干扰屏蔽封装方法， 本实施例提供的技术方案使塑封胶 具有更好的流动性， 因此， 塑封胶能够更加均勾、 饱满的分布在第一电子 元件、 第二电子元件和金属屏蔽墙之间， 实现更好的塑封效果。
本实施例中， 优选地， 在所述金属屏蔽墙顶部的金属面和所述塑封胶 上沉积导电薄膜的方式包括： 镀膜或喷镀。
具体地， 通过离子镀、 溅射镀等方式， 在塑封体表面沉积一层金属薄 膜， 形成附着力好的表面镀层， 作为屏蔽层。
图 7为本发明贴装两组电子元件的基板实施例的结构示意图， 如图 Ί 所示， 在基板 700上， 不仅设置有第一电子元件 701、 第二电子元件 702 , 还设置有第三电子元件 703和第四电子元件 704,其中第三电子元件 703与 第一电子元件 701 为第一组电子元件,第四电子元件 704和第二电子元件 702为第二组电子元件,所述在第一电子元件 701和第二电子元件 702之间 的基板 700上设置金属屏蔽墙具体为： 在第一组电子元件和第二组电子元 件之间的基板 700上设置一个金属屏蔽墙 705。
具体的， 当第一电子元件 701和第二电子元件 702之间的金属屏蔽墙 与第三电子元件 703和第四电子元件 704之间的金属屏蔽墙可以设置在一 条直线上时， 在第一组电子元件和第二组电子元件之间设置一个金属屏蔽 墙 705。
第一组电子元件和第二组电子元件还可以包括更多的电子元件。 优选 地， 金属屏蔽墙 705的高度不大于第一组电子元件和第二组电子元件中最 高的电子元件的高度。
如上所述的电子器件制造方法， 其中， 在将设置有第一组电子元件、 第二组电子元件和金属屏蔽墙 705的基板 700置于模具腔体内， 注入塑封 胶， 形成塑封体之后， 还可以包括： 将包含第一组电子元件和第二组电子 元件的塑封体切割成第一子塑封体和第二子塑封体， 其中， 第一子塑封体 包含第一电子元件 701和第二电子元件 702 , 第二子塑封体包含第三电子 元件 703和第四电子元件 704。
具体的， 为了达到更好的电磁干扰屏蔽效果， 可以在金属屏蔽墙顶部 的金属面和塑封胶上沉积导电薄膜之前， 将包含第一组电子元件和第二组 电子元件的塑封体切割成第一子塑封体和第二子塑封体， 其中， 第一子塑 封体包含第一电子元件 701和第二电子元件 702 , 第二子塑封体包含第三 电子元件 703和第四电子元件 704。
本实施例中， 在第一组电子元件和第二组电子元件之间设置一个金属 屏蔽墙， 其中， 第一组电子元件和第二组电子元件包含的电子元件的个数 不限于两个， 金属屏蔽墙可以通过表面贴装的方式固定在基板上， 塑封过 程中， 使塑封胶的流动方向与金属屏蔽墙保持平行， 以避免金属屏蔽墙阻 碍塑封胶的流动。 然后将金属屏蔽墙顶部的塑封胶清除， 露出金属屏蔽墙 顶部的金属面。 金属屏蔽墙顶部塑封胶的清除， 可以利用化学方式、 物理 研磨及镭射等处理手段。 为达到更好的电磁干扰屏蔽效果， 可以将包含第 一组电子元件和第二组电子元件的整板塑封体切割成多个子塑封体， 然后 再在各子塑封体上包覆导电薄膜， 并使导电薄膜将金属屏蔽墙顶部的金属 面与基板的接地层电性连接， 形成完整的屏蔽体， 实现分腔屏蔽。
综上所述， 本发明实施例提供的电子器件制造方法， 通过在基板上设 置金属屏蔽墙， 并将金属屏蔽墙的顶部金属面通过导电薄膜与基板的接地 层电性连接， 形成完整的屏蔽体， 能够提供更好的屏蔽效果。 由于金属屏 蔽墙的制作工艺简单， 且两组电子元件之间可以共用金属屏蔽墙， 不但减 少了金属屏蔽墙所占用的基板空间， 耗费较少的金属材料， 而且提高了电 磁干扰屏蔽封装的效率， 较大程度上节约了电子元件的电磁干扰屏蔽封装 成本。 本发明实施例提供的电子器件， 通过将金属屏蔽墙顶部的金属面与 基板的接地层电性连接， 使金属屏蔽墙、 包覆于塑封胶上的导电薄膜和基 板的接地层三者之间形成完整的屏蔽体， 并实现分腔屏蔽， 能够提供良好 的电磁干扰屏蔽效果。
最后应说明的是： 以上各实施例仅用以说明本发明的技术方案， 而非 对其限制； 尽管参照前述各实施例对本发明进行了详细的说明， 本领域的 普通技术人员应当理解： 其依然可以对前述各实施例所记载的技术方案进 行修改， 或者对其中部分或者全部技术特征进行等同替换； 而这些修改或 者替换， 并不使相应技术方案的本质脱离本发明各实施例技术方案的范 围。

Claims

权 利 要 求 书
1、 一种电子器件， 其特征在于， 包括：
基板， 所述基板中设置有接地层；
第一电子元件和第二电子元件， 设置在所述基板上；
金属屏蔽墙， 设置在所述第一电子元件和所述第二电子元件之间； 塑封胶， 包覆所述第一电子元件、 所述第二电子元件和所述金属屏蔽 墙， 所述塑封胶上具有开口， 所述金属屏蔽墙顶部的金属面从所述开口中 露出；
导电薄膜， 包覆所述金属屏蔽墙顶部的金属面和所述塑封胶， 且与所 述基板的接地层电性连接。
2、 根据权利要求 1 所述的电子器件， 其特征在于， 所述基板接地层 设置在基板表层或者基板中间层。
3、 根据权利要求 1 所述的电子器件， 其特征在于， 所述金属屏蔽墙 的高度不大于所述第一电子元件和所述第二电子元件中最高的电子元件 的高度。
4、 根据权利要求 1〜3任一项所述的电子器件， 其特征在于， 所述金 属屏蔽墙包括：
金属板；
吸盘， 设置在所述金属板的顶部；
两个支撑片， 设置在所述金属板的底部。
5、 一种电子器件制造方法， 其特征在于， 包括：
在基板上设置第一电子元件和第二电子元件， 所述基板设有接地层； 在所述第一电子元件和所述第二电子元件之间的基板上设置金属屏 败墙;
将设置有所述第一电子元件、 所述第二电子元件和所述金属屏蔽墙的 基板置于模具腔体内， 注入塑封胶， 形成塑封体；
将所述金属屏蔽墙顶部的塑封胶清除， 以露出所述金属屏蔽墙顶部的 金属面；
在所述金属屏蔽墙顶部的金属面和所述塑封胶上沉积导电薄膜， 并使 导电薄膜与所述基板的接地层电性连接。
6、 根据权利要求 5 所述的电子器件制造方法， 其特征在于， 所述在 所述第一电子元件和所述第二电子元件之间的基板上设置金属屏蔽墙， 具 体为：
在所述金属屏蔽墙顶部设置吸盘；
在所述金属屏蔽墙底部设置支撑片；
以贴装方式将所述金属屏蔽墙固定在所述基板上。
7、 根据权利要求 6所述的电子器件制造方法， 其特征在于， 所述金 属屏蔽墙的高度不大于所述第一电子元件和所述第二电子元件中最高的 电子元件的高度。
8、 根据权利要求 5-7任一项所述的电子器件制造方法， 其特征在于， 所述注入塑封胶， 具体为：
将所述塑封胶沿着与所述金属屏蔽墙平行的方向注入。
9、 根据权利要求 5 所述的电子器件制造方法， 其特征在于， 在所述 金属屏蔽墙顶部的金属面和所述塑封胶上沉积导电薄膜的方式包括： 镀膜 或喷镀。
10、 根据权利要求 5所述的电子器件制造方法， 其特征在于， 在基板 上还设置有第三电子元件和第四电子元件，其中第三电子元件与第一电子 元件为第一组电子元件,第四电子元件和第二电子元件为第二组电子元件, 所述在所述第一电子元件和所述第二电子元件之间的基板上设置金属屏 蔽墙具体为： 在第一组电子元件和第二组电子元件之间的基板上设置一个 金属屏蔽墙。
1 1、 根据权利要求 10所述的电子器件制造方法， 其特征在于， 在将 设置有所述第一组电子元件、 所述第二组电子元件和所述金属屏蔽墙的基 板置于模具腔体内， 注入塑封胶， 形成塑封体之后， 还包括： 将包含第一 组电子元件和第二组电子元件的塑封体切割成第一子塑封体和第二子塑 封体， 其中， 第一子塑封体包含第一电子元件和第二电子元件， 第二子塑 封体包含第三电子元件和第四电子元件。
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