WO2013183472A1 - Élément à capacité variable, dispositif à haute fréquence, et dispositif de communication - Google Patents

Élément à capacité variable, dispositif à haute fréquence, et dispositif de communication Download PDF

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Publication number
WO2013183472A1
WO2013183472A1 PCT/JP2013/064578 JP2013064578W WO2013183472A1 WO 2013183472 A1 WO2013183472 A1 WO 2013183472A1 JP 2013064578 W JP2013064578 W JP 2013064578W WO 2013183472 A1 WO2013183472 A1 WO 2013183472A1
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Prior art keywords
resistance
capacitance element
variable capacitance
capacitor
film
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PCT/JP2013/064578
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English (en)
Japanese (ja)
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竹島裕
中磯俊幸
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株式会社村田製作所
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Priority to CN201390000526.9U priority Critical patent/CN204442303U/zh
Priority to JP2013557963A priority patent/JP5673865B2/ja
Publication of WO2013183472A1 publication Critical patent/WO2013183472A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
    • G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
    • G06K7/10237—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves the reader and the record carrier being capable of selectively switching between reader and record carrier appearance, e.g. in near field communication [NFC] devices where the NFC device may function as an RFID reader or as an RFID tag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • G06K19/0726—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs the arrangement including a circuit for tuning the resonance frequency of an antenna on the record carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07771—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card the record carrier comprising means for minimising adverse effects on the data communication capability of the record carrier, e.g. minimising Eddy currents induced in a proximate metal or otherwise electromagnetically interfering object
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G7/00—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture
    • H01G7/06—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/20—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by the transmission technique; characterised by the transmission medium
    • H04B5/24—Inductive coupling
    • H04B5/26—Inductive coupling using coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/45—Transponders
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
    • H04B5/77—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for interrogation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations

Definitions

  • the present invention relates to a variable capacitance element, a high-frequency device, and a communication apparatus used in an RFID (Radio Frequency Identification) system and a near field communication (NFC) system.
  • RFID Radio Frequency Identification
  • NFC near field communication
  • NFC is a short-range wireless communication standard using the 13 MHz band, and is expected to be installed in various terminals including mobile communication terminals.
  • an RF IC for NFC is built in the terminal body, and the RFIC for NFC is connected to an NFC antenna coil that is also built in the terminal body.
  • the antenna coil is connected to a capacitive element so as to resonate at a communication frequency, and the capacitive element and the antenna coil constitute an antenna circuit.
  • the antenna circuit, NFC RFIC, and the like constitute a wireless communication module (hereinafter referred to as “NFC module”).
  • the communication frequency of the NFC module is determined in advance, but the resonance frequency of the antenna circuit to be adjusted differs little by little depending on the use conditions and manufacturing variations.
  • the circuit configuration as the resonance circuit of the antenna circuit changes between the reader / writer mode and the card mode. Therefore, in order to maintain a predetermined resonance frequency in either mode, it is necessary to adjust the resonance circuit according to the mode.
  • the use conditions vary depending on the NFC module mounting environment.
  • the resonance frequency of the antenna circuit changes depending on whether or not metal is present near the NFC module.
  • Patent Document 1 As a method for adjusting the resonance frequency, it is known to configure a capacitor of an antenna circuit with a variable capacitance element that can change a capacitance value by an applied voltage (see Patent Document 1). Further, Patent Document 2 discloses a circuit in which the entire capacitance value is switched by selectively connecting a plurality of capacitors.
  • FIG. 12 shows an example of a communication circuit disclosed in Patent Document 2.
  • the non-contact IC unit 47 includes a non-contact IC chip, a capacitor Cin and parallel capacitors C101 to C103, an antenna parallel capacitor unit having switches SW1 to SW3, and an antenna L1.
  • the electric capacities of the capacitor Cin and the parallel capacitors C101 to C103 are fixed values.
  • SW1 to SW3 are circuits for switching ON / OFF of the connection of the parallel capacitors C101 to C103.
  • a resistance voltage dividing circuit is usually configured to generate the control voltage.
  • the resistance voltage dividing circuit is basically a circuit that allows a bleeder current to flow and extracts a voltage drop due to the resistance, power loss due to the bleeder current occurs.
  • the capacity is fixed to a predetermined value, power loss due to the bleeder current always occurs, which is a problem when applied to a low power consumption communication device using a battery as a power source.
  • the object of the present invention is to solve the problem of distortion due to active elements and the increase in size of the IC due to the complexity of the circuit configuration, to ensure reliability against impacts such as dropping, and to reduce power consumption.
  • An object of the present invention is to provide a variable capacitance element with a control voltage application circuit, a high-frequency device, and a communication apparatus.
  • variable capacitance element of the present invention is configured as follows.
  • a ferroelectric film having a ferroelectric film and a capacitor electrode sandwiching the ferroelectric film, the capacitance value of which varies according to a control voltage value applied between the capacitor electrodes;
  • a plurality of control terminals (for example, terminals to which external GPIO terminals are connected), each having a resistance voltage dividing circuit including a plurality of resistance elements each having a first end connected to a common connection point and a second end connected to the common connection;
  • a control voltage application circuit for applying a voltage at a point to the variable capacitance element,
  • the resistance voltage dividing circuit is composed of a plurality of sets of resistance voltage dividing circuits whose common connection points are independent from each other, and is non-conductive in a direct current state by the ferroelectric capacitor or another capacitor.
  • This configuration eliminates the problem of distortion because a switch that is an active element is not used, and the size of the IC is reduced with the simplification of the circuit configuration, and it is easy to ensure reliability against impacts such as dropping. Furthermore, since the bleeder current flowing in the resistance voltage dividing circuit can be suppressed or almost reduced to 0, the power consumption can be reduced.
  • the plurality of resistance elements are resistance patterns provided on a substrate, and the resistance pattern is a power of 2 on the basis of a resistance value of the plurality of resistance elements being the lowest of the resistance values. It is preferable to form so that it may become a ratio.
  • the value of the control data and the control voltage for the variable capacitance element can be in a linear relationship, and multi-stage setting can be easily performed with constant resolution.
  • variable capacitance element and the control voltage application circuit are formed on the substrate by a thin film process, and the plurality of resistance elements are formed on the same layer on the substrate by the same process. Preferably there is.
  • the number of parts is reduced, the routing of the data transmission line becomes very simple, and the communication circuit can be reduced in size and weight.
  • the ratio between the resistance elements is stabilized. Therefore, the voltage dividing ratio of the resistance voltage dividing circuit is constant, and a predetermined stable control voltage can always be applied to the variable capacitance element.
  • the variable capacitance element includes a plurality of RF resistance elements connected in parallel to both ends of the ferroelectric capacitor, and these RF resistance elements are provided in a layer different from the plurality of resistance elements. It is preferable.
  • the RF resistance element and the resistance-dividing resistance element can be independently set to optimum resistance values.
  • a high-frequency device includes a variable capacitance element according to any one of (1) to (4) and an RFIC connected to an external terminal of the variable capacitance element provided in one chip. It is. With this configuration, the number of components mounted on a circuit board and wiring space in an electronic device such as a communication device can be reduced, and the size can be reduced.
  • the communication device of the present invention is a communication device including an antenna coil, a variable capacitance element connected to the antenna coil, and an RFIC connected to the variable capacitance element,
  • the variable capacitance element is the variable capacitance element according to any one of (1) to (4),
  • the RFIC can take a state in which all of the external terminals connected to at least one of the plurality of resistance voltage dividing circuits are at a high potential or all at a low potential.
  • the active element switch is not used, so there is no problem of distortion, the IC size is reduced along with the simplification of the circuit configuration, and it is easy to ensure reliability against impacts such as dropping, Since the bleeder current flowing in the resistance voltage dividing circuit can be suppressed or almost reduced to 0, the power consumption can be reduced.
  • a ferroelectric capacitor in which a ferroelectric film is sandwiched between capacitor electrodes is used as a variable capacitance element for controlling the resonance frequency of the antenna coil, and a control voltage is applied to the ferroelectric capacitor.
  • a control voltage application circuit for applying a plurality of resistance elements having different resistance values are used. Therefore, although it is small in size, distortion is unlikely to occur and the frequency characteristics are stable and highly reliable control.
  • a variable capacitance element with a voltage application circuit and a high-frequency device can be realized.
  • variable capacitance element that requires mechanical control unlike a trimmer capacitor
  • a variable capacitance element with a control voltage application circuit that is highly reliable against an impact such as a drop despite being small, and A high-frequency device can be realized.
  • the bleeder current flowing in the resistance voltage dividing circuit can be suppressed or almost reduced to 0, the power consumption can be reduced.
  • FIG. 1 is an overall circuit diagram of the inside of the variable capacitor 101 according to the first embodiment.
  • FIG. 2 is a diagram illustrating a state where no bleeder current flows through the variable capacitance element 101 according to the first embodiment.
  • FIG. 3 is a diagram showing a relationship between an applied voltage step represented by a 5-bit binary signal inputted to the control terminals P21 to P25 and a capacitance variable ratio.
  • FIG. 4 is a cross-sectional view of the main part of the variable capacitance element 101.
  • FIG. 5 is a circuit diagram of the variable capacitance element 102 according to the second embodiment.
  • FIG. 6 is a circuit diagram of a communication apparatus 201 including a variable capacitance element with a control voltage application circuit and a high-frequency device according to the present invention.
  • FIG. 1 is an overall circuit diagram of the inside of the variable capacitor 101 according to the first embodiment.
  • FIG. 2 is a diagram illustrating a state where no bleeder current flows through the variable capacitance element 101 according
  • FIG. 7 is a three-side view of the RFIC 110 with a built-in variable capacitance element.
  • FIG. 8 is a cross-sectional view of the mounting rewiring board 20 with the variable capacitance element built-in RFIC 110 mounted thereon.
  • FIG. 9 is a circuit diagram of a communication apparatus according to the fourth embodiment.
  • FIG. 10 is a circuit diagram of a variable capacitor as a comparative example of the variable capacitor according to the first embodiment.
  • FIG. 11 is a diagram showing the potential of the control terminals P21 to P25 of the variable capacitance element shown in FIG. 10 and the bleeder current flowing through the resistance voltage dividing circuit.
  • FIG. 12 shows an example of a communication circuit disclosed in Patent Document 2.
  • FIG. 1 is an overall circuit diagram of the inside of the variable capacitor 101 according to the first embodiment.
  • the variable capacitance element 101 includes ferroelectric capacitors C1 to C6 and a control voltage application circuit that applies a control voltage to these ferroelectric capacitors C1 to C6.
  • the ferroelectric capacitors C1 to C6 constitute one series circuit, and the first end of the series circuit is connected to the port P11, and the second end is connected to the port P12.
  • the variable capacitance element 101 is an element in which the capacitance value between the port P11 and the port P12 changes.
  • the voltage applied between the common connection point CC1 and the ground terminal GND is a control voltage for the ferroelectric capacitors C1 to C4.
  • the voltage applied between the common connection point CC2 and the ground terminal GND is a control voltage for the ferroelectric capacitors C5 and C6.
  • RF resistance elements (hereinafter simply “resistances”) R0, R11 to R14, R21 to R23 and resistance voltage dividing resistance elements (hereinafter simply “resistances”) R31 to R35 constitute the control voltage application circuit.
  • a control voltage is applied to the ferroelectric capacitors C1 to C6 via resistors R11, R12, R13, R14 and resistors R21, R22, R23 in the control voltage application circuit.
  • the resistance values of the resistors R11 to R14 and R21 to R23 are equal.
  • resistors R0, R11 to R14, R21 to R23 apply a control voltage to the ferroelectric capacitors C1 to C6, and an RF signal applied between the ports P11 and P12 is connected to the common connection points CC1 and CC2 and the ground terminal. Suppresses leakage to GND.
  • the resistors R31, R32, and R33 constitute a first resistance voltage dividing circuit RDV1
  • the resistors R34 and R35 constitute a second resistance voltage dividing circuit RDV2.
  • the first ends of the resistors R31, R32, and R33 are connected to the control terminals P21, P22, and P23, respectively.
  • the second ends of these resistors R31, R32, R33 are connected to the common connection point CC1.
  • First ends of the resistors R34 and R35 are connected to control terminals P24 and P25, respectively.
  • the second ends of the resistors R34 and R35 are connected to the common connection point CC2.
  • the first resistance voltage dividing circuit RDV1 and the second resistance voltage dividing circuit RDV2 have the common connection points CC1 and CC2 independent of each other. That is, the first resistance voltage dividing circuit RDV1 and the second resistance voltage dividing circuit RDV2 are galvanically insulated by the ferroelectric capacitors C2 to C5 among the plurality of ferroelectric capacitors.
  • a high potential (hereinafter “H level”) or low potential (hereinafter “L level”) voltage (5-bit binary signal) is applied to the control terminals P21 to P25 from the outside.
  • H level high potential
  • L level low potential
  • a divided voltage by the first resistance voltage dividing circuit RDV1 is generated at the common connection point CC1.
  • a divided voltage by the second resistance voltage dividing circuit RDV2 is generated at the common connection point CC2 according to the voltage applied to the control terminals P24 and P25.
  • the first resistance voltage dividing circuit RDV1 and the ferroelectric capacitors C1, C2, C3, C4 belong to the first group G1.
  • the second resistance voltage dividing circuit RDV2 and the ferroelectric capacitors C5 and C6 belong to the second group G2.
  • the capacitance values of the ferroelectric capacitors C1 to C4 of the first group G1 are determined according to the applied voltages to the control terminals P21, P22, P23, and the second group G2 is determined according to the applied voltages to the control terminals P24, P25.
  • the capacitance values of the ferroelectric capacitors C4 and C5 are determined.
  • the capacitance value between the ports P11 and P12 is the value of the series combined capacitance of the ferroelectric capacitors C1 to C6.
  • FIG. 2 is a diagram illustrating a state where no bleeder current flows through the variable capacitance element 101 according to the first embodiment.
  • FIGS. 2A and 2C when the potentials of the control terminals P21, P22, and P23 are at the H level, no current flows in and out of the control terminals P21, P22, and P23.
  • FIGS. 2B and 2D even when the potentials of the control terminals P21, P22, and P23 are at the L level, no current flows in and out of the control terminals P21, P22, and P23.
  • FIGS. 2A and 2C when the potentials of the control terminals P21, P22, and P23 are at the H level, no current flows in and out of the control terminals P21, P22, and P23.
  • FIGS. 2B and 2D even when the potentials of the control terminals P21, P22, and P23 are at the L level, no current flows in and out of the control terminals P21, P22, and P23
  • the bleeder current does not flow if the binary signals for the first group G1 are all at H level or all at L level and the binary signals for the second group G2 are all at H level or all at L level.
  • FIG. 1 a circuit diagram of a variable capacitance element as a comparative example is shown in FIG.
  • one resistance voltage dividing circuit including resistors R31 to R35 is provided, and one ends of the resistors R21, R22, and R23 are connected to a common connection point CC of the resistance voltage dividing circuit via a resistor R4.
  • Others are the same as those of the variable capacitor 101 of the first embodiment.
  • FIG. 11 is a diagram showing the potential of the control terminals P21 to P25 of the variable capacitance element shown in FIG. 10 and the bleeder current flowing through the resistance voltage dividing circuit.
  • the control terminal P21 is at the H level and the control terminals P22 to P25 are at the L level, a parallel circuit of the resistors R32 to R35 and a series circuit of the resistor R31 are formed, and a bleeder current flows and flows to the common connection point CC. A divided voltage is generated.
  • FIG. 3 is a diagram showing a relationship between an applied voltage step represented by a 5-bit binary signal inputted to the control terminals P21 to P25 and a capacitance variable ratio.
  • the conditions (1), (2), (3), and (4) for the resistance value ratio and the capacitance ratio are as follows.
  • step 1 corresponds to when all of the control terminals P21 to P25 are at the L level
  • step 32 corresponds to when all of the control terminals P21 to P25 are at the H level.
  • the “capacity variable ratio” is a change rate based on the capacity at the time of step 1.
  • the resistance values of the resistors R31 to R35 are determined by a power of 2 or a ratio of almost a power of 2 with reference to the lowest one of the resistance values.
  • the ferroelectric capacitors C1 to C6 have nonlinearity in which the capacitance change ratio increases as the applied voltage increases. Therefore, in the case of a circuit configuration in which the magnitude of the control voltage can be switched linearly as in condition (4) IV, the capacitance-voltage characteristic of the ferroelectric capacitor itself appears as it is. That is, the capacitance variable width (sensitivity) for each step is different, so that it is difficult to finely adjust the capacitance value.
  • FIG. 4 is a cross-sectional view of the main part of the variable capacitance element 101.
  • the substrate SI is a Si substrate having a SiO 2 film formed on the surface.
  • a ferroelectric film and a Pt film are alternately formed in this order on the substrate SI in the order of the ferroelectric film FS1, the capacitor electrode PT1, the ferroelectric film FS2, the capacitor electrode PT2, and the ferroelectric film FS3 to form a capacitor portion. ing.
  • a moisture-resistant protective film PC1 is coated on the upper part of the laminated film of these ferroelectric films FS1, FS2, FS3 and capacitor electrodes PT1, PT2.
  • An organic protective film PC2 is further formed on the moisture-resistant protective film PC1.
  • a wiring film TI1 is formed on the organic protective film PC2. Further, the wiring film TI1 is connected to a predetermined portion of the capacitor electrodes PT1, PT2 through a contact hole. Further, the wiring film TI1 is formed so as to cover the periphery of the moisture-resistant protective film PC1 and the organic protective film PC2.
  • An interlayer insulating film SR1 is formed on the surface of the wiring film TI1.
  • a resistance film pattern RE1 is formed on the surface of the interlayer insulating film SR1.
  • the surface of the resistance film pattern RE1 is covered with an interlayer insulating film SR2, and the resistance film pattern RE2 is formed on the surface of the interlayer insulating film SR2.
  • the surface of the resistance film pattern RE2 is covered with an interlayer insulating film SR3.
  • the resistance films of these resistance film patterns RE1 and RE2 are formed by a thin film process (a process using photolithography and etching techniques) or a thick film process (a process using printing techniques such as screen printing).
  • the resistance value of each resistive element is determined by the width, length and thickness of the resistive film pattern.
  • a wiring film TI2 is formed on the surface of the interlayer insulating film SR3.
  • the wiring film TI2 is connected to the wiring film TI1 through a contact hole formed in the interlayer insulating films SR1, SR2, SR3.
  • the surface of the interlayer insulating film SR3 is covered with a solder resist film SR4.
  • An external connection electrode EE is formed in the opening of the solder resist film SR4 and on the surface of the wiring film TI2.
  • the ferroelectric film FS1 is an insulating film for adhesion and diffusion prevention with respect to the substrate SI and the moisture-resistant protective film PC1.
  • the ferroelectric film FS3 is an insulating film for adhesion to the moisture resistant protective film PC1.
  • a high melting point noble metal material having good conductivity and excellent oxidation resistance, for example, Pt and Au can be used.
  • a dielectric material having a high dielectric constant is used as the thin film material used for the ferroelectric films FS1, FS2, and FS3.
  • a dielectric material having a high dielectric constant is used as the thin film material used for the ferroelectric films FS1, FS2, and FS3.
  • perovskite compounds such as (Ba, Sr) TiO 3 (BST), SrTiO 3 , BaTiO 3 , Pb (Zr, Ti) O 3 , bismuth layered compounds such as SrBi 4 Ti 4 O 15 , etc. are used. be able to.
  • the wiring films TI1 and TI2 are composed of three layers of Ti / Cu / Ti, the Ti layer is formed to 100 nm, for example, and the Cu layer is formed to 1000 nm, for example.
  • the external connection electrode EE includes two layers of Au / Ni.
  • the first Ni layer is formed to 2000 nm, for example, and the second Au layer is formed to 200 nm, for example.
  • the moisture-resistant protective film PC1 prevents moisture released from the organic protective film PC2 from entering the capacitor portion.
  • This moisture-resistant protective film PC1 SiNx, SiO 2 , Al 2 O 3 , TiO 2 or the like can be used.
  • the organic protective film PC2 absorbs mechanical stress from the outside.
  • PBO polybenzoxazole
  • polyimide resin polyimide resin
  • epoxy resin or the like can be used.
  • the resistance material of the resistance film patterns RE1 and RE2 is, for example, nichrome.
  • the manufacturing method of the variable capacitance element 101 shown in FIG. 4 is as follows.
  • a thermal oxidation process is performed on the Si substrate to form an oxide layer made of SiO 2 having a thickness of 700 nm.
  • the thickness of the oxide layer is not particularly limited as long as a desired insulating property can be secured, but is preferably set within a range of 500 to 1000 nm.
  • a 50 nm-thickness ferroelectric film FS1 for adhesion and diffusion prevention is formed on the oxide layer by a chemical solution deposition (hereinafter referred to as “CSD”) method.
  • the film thickness of the ferroelectric film FS1 is not particularly limited as long as it can ensure desired adhesion and diffusion prevention properties, but is preferably set within a range of 10 to 100 nm.
  • ferroelectric film FS1 Some of the materials that can be used as the ferroelectric film FS1 are as described above, but the same material as that of the ferroelectric film FS2 for the capacitor is desirable.
  • the temperature of the hot plate is not particularly limited as long as desired drying characteristics can be obtained, but is preferably set within a range of 300 to 400 ° C.
  • the temperature of the heat treatment is not particularly limited as long as desired crystallization is performed, but is preferably set within a range of 600 to 700 ° C.
  • the heat treatment time is not particularly limited as long as desired crystallization is performed, but it is preferably set within a range of 10 to 60 minutes.
  • the capacitor electrode PT1, the ferroelectric film FS2, the capacitor electrode PT2, and the ferroelectric film FS3 are sequentially formed. Specifically, a capacitor electrode PT1 made of Pt or Au with a film thickness of 250 nm is formed by RF magnetron sputtering, then a ferroelectric film FS2 with a film thickness of 100 nm made of BST or the like is formed by CSD, and then A capacitor electrode PT2 made of Pt or Au with a film thickness of 250 nm is formed by RF magnetron sputtering. Further, a 100 nm-thick ferroelectric film FS3 made of BST or the like is formed by the CSD method.
  • the film thickness of the capacitor electrodes PT1 and PT2 is not particularly limited as long as a desired low resistance can be ensured, but is preferably set within a range of 100 to 500 nm. Further, the film thickness of the ferroelectric film FS2 is not particularly limited as long as it can secure a desired capacitance, but is preferably set within a range of 80 to 150 nm. Further, the film thickness of the ferroelectric film FS3 is not particularly limited as long as a desired adhesion can be secured, but is preferably set within a range of 80 to 150 nm.
  • each layer of the capacitor portion is patterned by a photolithography technique and a dry etching method (reactive ion etching (RIE) method). That is, after a photoresist is applied and prebaked, the photoresist is irradiated with ultraviolet light through a photomask, and exposure, development, and postbaking are performed to transfer the photomask pattern to the resist pattern. Next, the exposed portion is dry etched using Ar gas or CHF 3 gas.
  • RIE reactive ion etching
  • this capacitor part is heat-treated at a temperature of 800 ° C. for 30 minutes.
  • the temperature of this heat treatment is not particularly limited as long as desired heat treatment characteristics can be obtained, but it is preferably set within a temperature range of 800 to 900 ° C.
  • the heat treatment time is not particularly limited as long as desired heat treatment characteristics can be obtained, but is preferably set within a range of 10 to 60 minutes.
  • a moisture-resistant protective film PC1 made of an inorganic material having a film thickness of 600 nm is formed by a sputtering method so as to cover the upper surface and side surfaces of the capacitor portion and the side surface of the ferroelectric film FS1, and then photosensitive by a spin coating method.
  • a PBO (polybenzoxazole) film which is a resin material, is applied so as to cover the moisture-resistant protective film PC1, and then heated for 5 minutes at a temperature of 125 ° C., and subjected to exposure and development treatment. By heating for about an hour, the organic protective film PC2 having a predetermined pattern with a film thickness of 6000 nm is formed.
  • the film thickness of the moisture-resistant protective film PC1 is not particularly limited as long as a desired moisture-resistant protective property can be secured, but is preferably set within a range of 200 to 1000 nm. Further, the thickness of the organic protective film PC2 is not particularly limited as long as the desired mechanical stress absorbability can be secured, but is preferably set within a range of 2000 to 10000 nm.
  • the organic protective film PC2 As a mask and using CHF 3 gas, the organic protective film PC2, the moisture-resistant protective film PC1 and the ferroelectric film FS2 are subjected to dry etching to form a pattern, and contact holes (illustrated) reaching the capacitor electrode PT1.
  • the organic protective film PC2, the moisture-resistant protective film PC1 and the ferroelectric film FS3 are dry-etched to form a pattern, thereby forming a contact hole reaching the capacitor electrode PT2.
  • three metal layers to be the wiring film TI1 are formed by RF magnetron sputtering, and the wiring film TI1 is patterned by wet etching.
  • the interlayer insulating film SR1 is spin-coated to form a contact hole. Further, a resistance film to be the resistance element 14B of the variable capacitance element portion is formed by a thin film process such as sputtering or electron beam evaporation, and the resistance film is patterned by a lift-off method to form the resistance film pattern RE1. .
  • the interlayer insulating film SR2 is spin-coated, and a contact hole is formed at a position overlapping the contact hole of the interlayer insulating film SR1.
  • a resistance film to be the control voltage application circuit 14R is formed by a thin film process such as sputtering or electron beam evaporation, and the resistance film pattern RE2 is formed by patterning the resistance film by a lift-off method.
  • the interlayer insulating film SR3 is spin-coated, and a contact hole is formed at a position overlapping the contact hole of the interlayer insulating film SR2.
  • film formation and patterning are performed in the following steps.
  • the three metal layers to be the conductor inside the contact hole and the wiring film TI2 are formed by RF magnetron sputtering.
  • a metal layer to be the external connection electrode EE is formed by electrolytic plating.
  • the metal layer is patterned by a photolithography method and a wet etching method.
  • a solder resist film SR4 is formed by spin coating.
  • the solder resist film SR4 is patterned by a photolithography method and a wet etching method.
  • a variable capacitance element with a circuit can be configured.
  • the present invention is not limited to the above embodiment.
  • the film thickness, formation method, formation conditions, and the like of each layer shown in the above embodiment are merely examples, and it goes without saying that the thin film capacitor can be arbitrarily changed within a range that does not impair the intended function. Absent.
  • the capacitor portion has a single layer structure having one capacitance generation portion, but the same applies to the case of a multilayer structure having two or more capacitance generation portions. Needless to say.
  • variable capacitance element and the control voltage application circuit are formed on a semiconductor substrate by a thin film process. That is, the variable capacitance element part and the control voltage application circuit part are integrally formed on a common substrate.
  • the plurality of resistance elements constituting the control voltage application circuit are provided in the same layer and in the same process. Therefore, even if the resistance value of each resistance element deviates from a desired resistance value, variation in the ratio of each resistance value itself can be suppressed, and therefore the output voltage can be controlled with good reproducibility.
  • the variable capacitance element includes a plurality of RF resistance elements connected in parallel to both ends of each ferroelectric capacitor. These RF resistance elements are different from the resistance patterns constituting the control voltage application circuit. These RF resistance elements are also provided in the same layer in the same process.
  • the resistors R11 to R14 and R21 to R23 having the same resistance value are used. However, if the resistance value is sufficiently large with respect to the impedance of the ferroelectric capacitors C1 to C6, the resistors The values do not have to be particularly equal.
  • FIG. 5 is a circuit diagram of the variable capacitance element 102 according to the second embodiment.
  • the variable capacitance element 102 includes ferroelectric capacitors C1 to C6 and a control voltage application circuit that applies a control voltage to these ferroelectric capacitors C1 to C6.
  • a capacitor C0 is connected between a series circuit of ferroelectric capacitors C1 to C6 and a port P11, and a series circuit of ferroelectric capacitors C1 to C6 and a port P12 are connected.
  • a capacitor C7 is connected between the two.
  • the connection relationship of resistors R0, R11 to R13, R21 to R24 for applying a control voltage to the ferroelectric capacitors C1 to C6 is different from that in FIG.
  • the divided voltage by the resistance voltage dividing circuit RDV1 is applied to the ferroelectric capacitors C1 to C3, and the divided voltage by the resistance voltage dividing circuit RDV2 is applied to the ferroelectric capacitors C4 to C6.
  • Others are the same as in the first embodiment.
  • capacitors C0 and C7 act as direct current cut capacitors, and the influence on elements and circuits connected to ports P11 and P12 can be suppressed.
  • capacitors C0 and C7 act as direct current cut capacitors, and the influence on elements and circuits connected to ports P11 and P12 can be suppressed.
  • a series circuit of resistors R11 and R13 is not connected in parallel to the antenna coil. Therefore, the variable capacitance element 102 does not adversely affect the antenna characteristics.
  • an LC resonance circuit can be configured by the capacitance between the ports P11 and P12 and the antenna coil.
  • control terminals P21, P22, P23 are all at the H level or the L level and the control terminals P24, P25 are all at the H level or the L level, that is, when no bleeder current flows, the ports P11, P12 are connected.
  • the capacity of can be kept constant.
  • the capacitors C0 and C7 may also be ferroelectric capacitors. However, since the control voltage is not applied to the capacitors C0 and C7, the capacitance value is constant.
  • the resistance values of the resistors R11 to R13 and R21 to R24 in FIG. 5 are equal if the resistance values are sufficiently larger than the impedances of the ferroelectric capacitors C1 to C6. It does not have to be.
  • FIG. 6 is a circuit diagram of a communication apparatus 201 including a variable capacitance element with a control voltage application circuit and a high-frequency device according to the present invention.
  • the communication device 201 is an example of an NFC module.
  • the communication device 201 includes an RFIC 11, a control IC 12, an antenna coil 13, and a variable capacitance element 102.
  • the variable capacitance element 102 and the RFIC 11 constitute a variable capacitance element built-in RFIC 110.
  • the variable capacitor 102 is the variable capacitor shown in the second embodiment.
  • a circuit including the variable capacitance element built-in RFIC 110 and the antenna coil 13 corresponds to the “high frequency device” of the present invention.
  • the RFIC 11 includes a GPIO (General Purpose Input / Output) IO terminal 11P.
  • the control IC 12 includes a GPIO IO terminal 12P.
  • the RFIC 11 performs conversion between a baseband signal and a high-frequency signal.
  • the control IC 12 controls the RFIC 11 and inputs / outputs data including communication data.
  • variable capacitance element 102 The parallel circuit of the variable capacitance element 102 and the antenna coil 13 is connected to the two RX terminals (reception signal terminals) of the RFIC 11.
  • the variable capacitance element 102 is shown in FIG.
  • the IO terminal 11P of the RFIC 11 and the IO terminal 12P of the control IC 12 are connected by a signal line 15A, and the control terminals P21 to P25 of the variable capacitor 102 are connected to signal lines 15A and 15B.
  • the RFIC 11 and the control IC 12 input and output communication signals via the data transmission line 16.
  • the control IC 12 controls various settings of the RFIC 11 via the signal line 15A. Further, the RFIC 11 or the control IC 12 gives control data to the variable capacitance element 102 via the signal lines 15A and 15B.
  • the variable capacitance element 102 constitutes an antenna circuit which is an LC parallel resonance circuit together with the antenna coil 13, and sets the resonance frequency of the antenna circuit to a predetermined frequency.
  • the antenna coil 13 performs electromagnetic wave coupling with an antenna of a communication partner to perform transmission / reception for near field communication.
  • FIG. 7 is a three-sided view of the RFIC 110 with a built-in variable capacitance element.
  • This variable capacitance element built-in RFIC 110 is a bare chip separated from a wafer as shown in FIG. Solder balls SB are formed on the external connection electrodes (pads) EE of the IC.
  • FIG. 8 is a cross-sectional view of the mounting rewiring board 20 with the variable capacitance element built-in RFIC 110 mounted thereon.
  • a mounting terminal 22 is formed on the lower surface of the mounting rewiring board 20, and an electrode for mounting the variable capacitance element built-in RFIC 110 is formed on the upper surface.
  • a rewiring electrode 21 is formed inside the mounting rewiring substrate 20.
  • An antenna coil 13 (see FIG. 6) is formed on the substrate 20, and a high frequency device is configured by mounting the variable capacitance element built-in RFIC 110 on the substrate 20.
  • a module in which the variable capacitance element built-in RFIC 110 is mounted on the mounting rewiring board 20 may be mounted on the printed wiring board.
  • FIG. 9 is a circuit diagram of a communication apparatus according to the fourth embodiment.
  • a circuit connected to two TX terminals (transmission signal terminals) of the RFIC 11 is also shown.
  • the baseband circuit 18 communicates baseband signals with the RFIC 11.
  • the antenna coil 13 exchanges radio signals with the communication partner antenna by magnetic field coupling with the communication partner coil antenna.
  • the antenna coil 13 is formed by winding a loop electrode pattern a plurality of turns or a plurality of layers.
  • Capacitors C21 and C22 are elements for adjusting the degree of coupling between the RFIC 11 and the antenna coil 13.
  • the inductors L11 and L12 and the capacitors C11, C12, and C20 constitute a transmission filter.
  • the RFIC 11 when the communication circuit operates in the card mode, the RFIC 11 operates passively. Therefore, the power supply voltage is generated from the input signal to the RX terminal, the received signal is read, and a circuit (load) connected to the TX terminal is transmitted during transmission. Modulate the load. For example, when the communication circuit operates in the reader / writer mode, the RFIC 11 operates in an active manner.
  • the RX terminal is opened at the time of transmission to transmit a transmission signal from the TX terminal, and the TX terminal is opened at the time of reception to receive the RX terminal. Input the received signal.
  • the impedance of the communication circuit when the antenna coil 13 is viewed from the RFIC 11 changes according to the operation mode.
  • the variable capacitance element 102 is controlled so that the resonance frequency of the antenna circuit is optimized in accordance with this operation mode (so that the impedance when the antenna coil 13 is viewed from the RFIC 11 is matched).
  • ESD protection elements 17A and 17B are connected to both ends of the antenna coil 13 between the antenna coil 13 and the ground.
  • the baseband circuit 18 does not allow the bleeder current to flow through the resistance voltage dividing circuit in the variable capacitance element 102 during standby (in reception standby mode). That is, it waits at the frequency that is the condition. As a result, power consumption during standby can be reduced.
  • the number of resistance voltage dividing circuits whose common connection points are independent from each other is not limited to two, and may be three or more.
  • the common connection point of the plurality of resistance voltage dividing circuits only needs to be in a DC non-conductive state by a ferroelectric capacitor or another capacitor, and the ferroelectric capacitor and other capacitors are connected to the plurality of capacitors connected in series. May be mixed.
  • variable capacitance element may be independently connected in parallel to the antenna coil, but a capacitor may be inserted in series with the variable capacitance element. Moreover, you may connect in series with respect to the antenna coil.
  • the high-frequency device of the present invention is not limited to the RFID reader / writer, and may be configured as an RFID tag.
  • C1-C6 Ferroelectric capacitors C0, C7: Capacitors C11, C12, C20, C21, C22 ... Capacitors CC1, CC2 ... Common connection point EE ... External connection electrodes FS1, FS2, FS3 ... Ferroelectric film G1 ... First Group G2 ... Second group GND ... Ground terminals L11, L12 ... Inductors P11, P12 ... Ports P21-P25 ... Control terminals PC1 ... Moisture-resistant protective film PC2 ... Organic protective films PT1, PT2 ... Capacitor electrodes R0, R11-R14, R21- R24, R31 to R35... RF resistor element RDV1...
  • First resistor voltage divider circuit RDV2 Second resistor voltage divider circuit RE1, RE2... Resistive film pattern SB... Solder ball SI ... Substrate SR1, SR2, SR3. SR4 ... Solder resist film TI1, TI2 ... Wiring film 11 ... RFIC 11P ... IO terminal 12 ... Control IC 12P ... IO terminal 13 ... antenna coil 14B ... resistance element 14R of variable capacitance element section ... control voltage application circuit 15A, 15B ... signal line 16 ... data transmission line 17A, 17B ... ESD protection element 18 ... baseband circuit 20 ... for mounting Rewiring board 21 ... Rewiring electrode 22 ... Mounting terminals 101, 102 ... Variable capacitance element 110 ... RFIC with built-in variable capacitance element 201: Communication device

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Abstract

La présente invention comporte des condensateurs ferroélectriques (C1-C6) qui sont constitués sous la forme d'un circuit série. Une première extrémité du circuit série est connectée à un port (P11) et une seconde extrémité est connectée à un port (P12). Des résistances (R31, R32, R33) constituent un premier circuit diviseur de tension à résistance (RDV1), et des résistances (R34, R35) constituent un second circuit diviseur de tension à résistances (RDV2). Une tension entre une borne de masse (GND) et un point de connexion commun (CC1) des résistances (R31, R32, R33) est imposée comme tension de commande pour les condensateurs ferroélectriques (C1-C4). Une tension entre la borne de masse (GND) et un point de connexion commun (CC2) des résistances (R34, R35) est imposée comme tension de commande pour les condensateurs ferroélectriques (C5, C6).
PCT/JP2013/064578 2012-06-08 2013-05-27 Élément à capacité variable, dispositif à haute fréquence, et dispositif de communication WO2013183472A1 (fr)

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JP2014195012A (ja) * 2013-03-29 2014-10-09 Murata Mfg Co Ltd 可変容量モジュール
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WO2016129304A1 (fr) * 2015-02-12 2016-08-18 株式会社村田製作所 Dispositif à couches minces
WO2016136564A1 (fr) * 2015-02-27 2016-09-01 株式会社村田製作所 Condensateur
WO2016136771A1 (fr) * 2015-02-27 2016-09-01 株式会社村田製作所 Élément à capacité variable
WO2017159283A1 (fr) * 2016-03-18 2017-09-21 株式会社村田製作所 Élément capacitif
WO2018216528A1 (fr) * 2017-05-26 2018-11-29 株式会社村田製作所 Condensateur

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WO2017159283A1 (fr) * 2016-03-18 2017-09-21 株式会社村田製作所 Élément capacitif
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