WO2013159525A1 - 基于编码转换的数字扬声器驱动方法和装置 - Google Patents

基于编码转换的数字扬声器驱动方法和装置 Download PDF

Info

Publication number
WO2013159525A1
WO2013159525A1 PCT/CN2012/085704 CN2012085704W WO2013159525A1 WO 2013159525 A1 WO2013159525 A1 WO 2013159525A1 CN 2012085704 W CN2012085704 W CN 2012085704W WO 2013159525 A1 WO2013159525 A1 WO 2013159525A1
Authority
WO
WIPO (PCT)
Prior art keywords
digital
signal
bit
speaker
code conversion
Prior art date
Application number
PCT/CN2012/085704
Other languages
English (en)
French (fr)
Inventor
马登永
Original Assignee
苏州上声电子有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 苏州上声电子有限公司 filed Critical 苏州上声电子有限公司
Priority to EP12875082.5A priority Critical patent/EP2843841B1/en
Priority to US14/397,165 priority patent/US9300258B2/en
Publication of WO2013159525A1 publication Critical patent/WO2013159525A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181Low-frequency amplifiers, e.g. audio preamplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/50Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502Details of the final digital/analogue conversion following the digital delta-sigma modulation
    • H03M3/506Details of the final digital/analogue conversion following the digital delta-sigma modulation the final digital/analogue converter being constituted by a pulse width modulator
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers, loudspeakers or microphones

Definitions

  • the present invention relates to a digital speaker driving method and apparatus, and more particularly to a digital speaker driving method and apparatus based on code conversion.
  • U.S. Patent Patent No. US 20060049889A1, US 20090161880A1 discloses a digital speaker system implementation process based on PWM modulation technology, as shown in FIG.
  • a PCM coded signal with a length of M bits and a sampling rate of f s is converted into a PWM coded signal with a word length of 1 bit and a sampling rate of f o by pulse width modulation (PWM);
  • PWM pulse width modulation
  • the PWM signal is amplified by the digital power amplifier, it is converted into a power switch signal with a word length of 1 bit and a sampling rate of f o .
  • the power switch signal is processed by a low-pass filter and converted into an analog power signal to drive the speaker load to sound.
  • Digital speaker systems based on sigma-delta modulation technology are mainly divided into two categories: 1-bit sigma-delta modulation digital systems and multi-bit sigma-delta modulation digital systems.
  • the 1-bit ⁇ - ⁇ modulation digital system as shown in Figure 2, its circuit implementation is relatively simple, but the system itself has the following defects: It is sensitive to clock jitter and is easy to introduce nonlinear distortion due to clock jitter.
  • the allowable input signal has a small dynamic range; Needs a higher switching rate, while a power MOSFET (Metal Oxide Semiconductor Field Effect The Transistor) tube generates more nonlinear distortion components during the high-speed switching of the driver's load, and also causes increased heat generation, temperature rise, and efficiency reduction of the MOSFET.
  • MOSFET Metal Oxide Semiconductor Field Effect The Transistor
  • the multi-bit sigma-delta modulation technique overcomes the above-mentioned shortcomings of 1-bit sigma-delta modulation, and it also has a fatal flaw in itself - the inconsistency between its modulation structure and multiple speaker units (or voice coil units). It has high sensitivity and is easy to introduce large coding errors due to inconsistency of multiple units. For example, a 5th-order 3-bit sigma-delta modulator has an oversampling factor of 32.
  • Element Matching--DEM Element Matching--DEM
  • the sampling rate of this digital system is still very high, generally on the order of MHz, which is too high.
  • the sampling rate causes the switching frequency of the power MOSFET to be too high, which causes the square wave signal of the final output of the system to have many sharp burrs on the rising and falling edges. These sharp burrs will cause the system to restore the sound signal.
  • There is a large amount of noise in the middle and the high switching frequency of the latter MOSFET will also cause serious heat generation of the MOSFET, increase power consumption, and significantly reduce output efficiency.
  • the switching frequency of power MOSFETs is only a few hundred KHz, which cannot meet the switching rate requirements of digital systems based on multi-bit sigma-delta modulation, which makes the physical implementation of such digital systems still very difficult.
  • the conventional ⁇ - ⁇ modulation-based Class-D amplifier is a 1-bit or multi-bit directly switching the switching rate too high.
  • the ⁇ - ⁇ modulation converts the PWM modulation signal with a lower switching rate according to the PWM mode, and then is amplified by the power MOSFET of the digital power amplifier and converted into a power signal, and after low-pass filtering, the speaker is driven by the analog driving mode.
  • This sigma-delta modulation-based Class-D system which combines sigma-delta modulation and PWM modulation, preserves the harmonic rejection of sigma-delta modulation and reduces the switching rate of the power MOSFET.
  • This conventional ⁇ - ⁇ modulation-based Class-D system does not consider the digitization of multiple input channels involved in a speaker array or a multi-voice speaker composed of multiple speaker units or multiple voice coil windings, Uniform digital coding of multiple input channels is not considered, only staying in the digitization phase of a single input channel, and the multi-channel frequency offset correction function of the dynamic mismatch shaping algorithm is not introduced.
  • the switching rate is too high, and the digital coding problem for multiple input channels not involved in the traditional ⁇ - ⁇ modulation-based Class-D system is to be studied.
  • the object of the present invention is to overcome the defect of excessive switching rate existing in a multi-bit sigma-delta modulation digital system and to solve the problem of multi-channel unified integrated coding which is not involved in the conventional sigma-delta modulation-based Class-D system, and proposes A digital speaker driving method and apparatus based on code conversion.
  • an aspect of the present invention provides a digital speaker driving method based on code conversion, as shown in FIG. 5, comprising the following steps:
  • Thermometer code conversion converting a low-bit PCM coded signal with a bit width of M into a 1-bit coded signal corresponding to a digital power amplifier and a speaker load of 2 M channels, and allocating M-bit coded signals to 2 M by equal weight Digital channels, the digital signals on each channel have only two encoding states of '0' and '1';
  • Pulse width modulation coding conversion converting the coded signal of the PDM format on each transmission channel obtained by multi-bit sigma-delta modulation and dynamic mismatch shaping processing into a PWM coded signal
  • the input format conversion in the step (1) is divided into an analog signal and a digital signal.
  • an analog-to-digital conversion operation is required, and the digital signal is converted into a PCM-based digital signal, and then specified.
  • the parameters of the bit width and sampling rate are required to be transformed into PCM coded signals that meet the parameter requirements.
  • PCM encoded signal only the parameters of the specified bit width and sampling rate need to be transformed and converted to meet the parameter requirements.
  • the multi-bit sigma-delta modulation in step (2) is processed as follows: First, the equalization processed high-bit PCM coding is subjected to interpolation filtering processing according to a specified oversampling factor by an interpolation filter. Oversampling PCM coded signal; then, performing multi- ⁇ - ⁇ modulation processing to push the noise energy in the audio bandwidth range beyond the audio band, ensuring that the system has a sufficiently high signal-to-noise ratio in the audio band, After the multi- ⁇ - ⁇ modulation process, the original high-bit PCM code is converted into a low-bit PCM code, and the number of bits of the coding is reduced.
  • the multi-bit sigma-delta modulator structure employed in the multi-bit sigma-delta modulation in step (2) can be designed according to various existing multi-bit sigma-delta modulators - like high-order single-stage ( Higher-Order Single-Stage) Serial Modulation Method or Multi-Stage (Cascade, MASH) Parallel Modulation Method--Modulator structure and parameter design to achieve noise shaping processing on the oversampled signal outputted by the interpolation filter, pushing the noise energy out of the audio band, ensuring that the system has enough High in-band signal to noise ratio.
  • the dynamic mismatch shaping processing in the step (4) may adopt various existing dynamic mismatch shaping algorithms--like DWA (Data-Weighted Averaging).
  • VFMS Vector-Feedback mismatch-shaping
  • TSMS Trae-Structure mismatch shaping
  • the shaping process reduces the intensity of the in-band harmonic distortion component and pushes its power to the out-of-band high frequency band, thereby eliminating in-band harmonic distortion and improving the in-band signal-to-noise ratio intensity.
  • the pulse width modulation coding conversion in the step (5) is to convert 2 M channels obtained by the dynamic mismatch shaper and a 1-bit data stream with a switching rate f o according to the PWM coding mode to 2 M.
  • the PDM (Pulse Density Modulation-PDM) coded signal with an excessively high switching rate on each channel is converted into a PWM code with a lower switching rate.
  • the signal, this lower switching rate PWM coded signal, after amplification by the power MOSFET, retains the harmonic rejection and channel bias immunity of multi-bit sigma-delta modulation and dynamic mismatch shaping operations, while also reducing The number and amplitude of sharp burrs generated by the power MOSFET during the switching process are reduced, and the power loss during switching is reduced.
  • the pulse width modulation coding conversion in the step (5) is to convert the coded signal of the PDM format on each transmission channel obtained by processing the multi-bit sigma-delta modulator and the dynamic mismatch shaper into a PWM coded signal.
  • the specific conversion method is: the conversion of PDM encoding to PWM encoding is performed according to the principle that the length of the data frame is equal.
  • the PDM encoded signal contains a plurality of high levels, and when converted to PWM encoding, Retaining the same number of high levels, in the PWM coded signal, the pulse width of the high level is equal to the sum of the pulse widths of all the high levels in the PDM coded signal; during the conversion process from PDM code to PWM code, both Each data frame is aligned in time.
  • the switch state is switched in step (6),
  • the control process of the specific switching action is as follows: when the '0' and '1' binary state codes control the switching action of the full-bridge power amplifier circuit, the switching and current flow directions of the four MOSFET tubes are as shown in the two state input cases.
  • 'HA' and 'LA' be the labels of the A-side high-side and low-side MOSFETs, respectively.
  • 'HB' and 'LB' are the B-side high-side and low-side MOSFETs, respectively.
  • HA and LB are turned off at the same time, HB and LA are disconnected at the same time. At this time, the current will flow from the A terminal to the B terminal through the speaker unit.
  • the voltage on the speaker unit is '+Vcc'; at '0 'When the status is input, HB and LA are turned off at the same time, HA and LB are disconnected at the same time. At this time, the current will flow from the B end to the A end through the speaker unit. At this time, the voltage on the speaker unit is '- Vcc'.
  • the digitized speaker load in step (6) may be a digitized speaker array composed of a plurality of speaker units, or may be a speaker unit having a plurality of voice coil windings, or may be composed of a plurality of multi-voice coil speaker units. Digital speaker array.
  • a digital speaker driving device based on code conversion, which comprises: a sound source, an input format converter, a multi-bit sigma-delta modulator, a thermometer encoder, a dynamic mismatch shaper, a transcoder, and a plurality of Channel digital power amplifier, digital speaker load.
  • the sound source is information to be played by the system;
  • the input format converter is connected to the output end of the sound source for converting the input signal into a high bit PCM coded signal having a bit width of N and a sampling rate of f s ;
  • multi-bit ⁇ - ⁇ a modulator coupled to the output of the input format converter for converting the input N-bit PCM encoded signal into a low-bit PCM encoded signal having a bit width M and a sampling rate f o ;
  • a thermometer encoder and a multi-bit
  • the output of the sigma-delta modulator is connected to convert the M-bit PCM encoded signal into a binary state code vector corresponding to 2 M digital channels with a bit width of 1 and a sampling rate f o ; dynamic mismatch
  • the shaper is connected to the output end of the thermometer encoder, and is used for eliminating the nonlinear harmonic distortion component of the spatial synthesis signal introduced by the difference of the frequency response between the array channels of the digit
  • the switching rate of the power MOSFET is reduced, the nonlinear distortion introduced during the switching process of the power MOSFET is reduced, the number and amplitude of the sharp burrs generated by the power switching signal at the transition edge are reduced, and the power MOSFET is reduced.
  • Power consumption and heating issues multi-channel digital power amplifier connected to the output of the transcoder for power amplification of the encoded signals of 2 M digital channels for driving The post-stage digital load is turned on and off; the digitized speaker load is connected to the output of the multi-channel digital power amplifier for completing the electro-acoustic conversion operation, and converting the digitized switch electrical signal into an analog format air vibration signal.
  • the sound source is an analog signal or a digital coded signal
  • the analog signal is derived from an analog sound source signal generated by various analog devices
  • the digital coded signal is a digital coded signal generated by various digital devices.
  • the input format converter includes a digital interface circuit such as an analog-to-digital converter, a USB, a LAN, a COM, and an interface protocol program, and is compatible with an existing digital interface format through which the number is
  • the speaker driver can flexibly and conveniently exchange and transmit information with other device devices.
  • the original input analog or digital source signal is converted into a bit width of N and a sampling rate of f s . High bit PCM encoded signal.
  • the signal processing process of the multi-bit sigma-delta modulator is as follows: First, interpolation processing is performed on the PCM code having the original bit width N and the sampling rate f s oversampled by the oversampling factor m o to obtain a bit. a PCM coded signal having a width N and a sampling rate f o ; and then converting the oversampled PCM coded signal having a bit width of N into a low bit PCM coded signal having a bit width of M according to a multi-bit sigma-delta modulation mode, thereby reducing The bit width of the PCM encoded signal, M ⁇ N.
  • multi-bit sigma-delta modulators according to existing signal processing structures of various sigma-delta modulators, such as high-order single-stage serial modulator structures or multi-stage parallel modulator structures, interpolate filters
  • the output oversampled signal is subjected to noise shaping processing to push the noise energy out of the audio band, ensuring that the system has a sufficiently high in-band signal-to-noise ratio.
  • thermometer encoder is configured to convert a low-bit PCM encoded signal having a bit width M into a 1-bit encoded signal corresponding to 2 M digital channels, thereby converting the single-channel M-bit encoded signal into equal-bit weights to A single-bit signal of 2 M channels, which also introduces the speaker unit into the encoding process, forming the digitization of the speaker unit.
  • the dynamic mismatch shaper is in accordance with various existing dynamic mismatch shaping algorithms such as DWA (Data-Weighted Averaging), VFMS (Vector-Feedback mismatch-shaping), and TSMS (Tree-Structure mismatch shaping).
  • DWA Data-Weighted Averaging
  • VFMS Vector-Feedback mismatch-shaping
  • TSMS Trae-Structure mismatch shaping
  • the algorithm designs a dynamic mismatch shaper based on the '0' and '1' binary state codes, and shapes the 1-bit coded signal vector of 2 M digital channels to eliminate the frequency difference difference between multiple array elements.
  • the nonlinear harmonic distortion spectral component simultaneously suppresses the noise power level within the bass band.
  • the transcoder converts the high-speed switching signals on the 2 M digital transmission channels with a sampling rate f o , divides the data frames according to the low-speed switching rate of f M , and then divides each PDM on each channel.
  • the encoded data frame determines the pulse width of the converted PWM code according to the number of high levels (state '1') contained therein, thereby converting each PDM encoded data frame into a PWM encoded data frame.
  • the multi-channel digital power amplifier has a channel number of 2 M
  • the digital power amplifier on each channel is a full-bridge power amplifying circuit composed of two half-bridge power amplifying circuits, one on each half bridge
  • the high-side MOSFET and a low-side MOSFET can switch between two different states by controlling the turn-on or turn-off operations of the four MOSFETs.
  • each digital channel of the digitized speaker load may be composed of a single or multiple speaker units; it may also be composed of a single or multiple voice coils; it may also be composed of a plurality of voice coils and a plurality of speaker units.
  • the array shape of the digitized speaker load is arranged according to the number of speaker units and actual application requirements to form various array shapes suitable for practical application requirements.
  • the multi-bit sigma-delta modulation technique adopted by the present invention pushes the noise power in the audio band to the out-of-band high-frequency region by the noise shaping method, thereby ensuring high signal-to-noise ratio requirements in the audio band.
  • the hardware implementation circuit of this modulation technology is simple and inexpensive, and has good immunity to parameter deviations generated during circuit device fabrication.
  • the dynamic mismatch shaping algorithm adopted by the invention can effectively reduce the nonlinear harmonic distortion intensity introduced by the frequency response difference between the digital channels, and improve the sound quality level of the multi-channel composite signal, so the driving device is more The frequency response deviation between digital channels is very immune.
  • the transcoder used in the present invention converts an excessively high switching rate PDM encoded signal on a plurality of digital transmission channels obtained by multi-bit sigma-delta modulation and dynamic mismatch shaping processing into a lower switching rate.
  • the PWM encodes the signal, thereby avoiding a large number of large-scale and large-scale sharp burrs generated by the output signal transition path generated by the high-speed switching rate of the latter stage power MOSFET, which reduces the digital system restoration signal.
  • the level of nonlinear distortion also reduces the power loss and heat generated by the power MOSFET during switching, which improves the electro-acoustic conversion efficiency of the system.
  • the code converter used in the present invention after being encoded and converted, generates the PWM coded signal and retains the harmonic suppression and anti-noise capability of the multi-bit sigma-delta modulator, while retaining the dynamic mismatch.
  • the multi-channel frequency response deviation correction capability of the shaper ensures the dynamic unified coding of multiple digital channels while reducing the switching rate of each channel through the coding conversion operation.
  • the transcoder used in the invention can completely complete the transplantation and modification operation of the transcoder by code copying and editing in the digital signal processing device such as DSP and FPGA, and the implementation is simple and the cost is low.
  • the digital driving device used in the invention has strong anti-interference ability and can ensure stable and reliable operation in a complicated electromagnetic interference environment.
  • the driving method of the alternating switch operation adopted by the invention effectively avoids the nonlinear distortion phenomenon caused by the overload of each speaker unit (or each voice coil unit), thereby prolonging the speaker units (or the voice coils).
  • the service life ensures the sound quality level of the radiated sound field.
  • the power amplifier circuit and the digital load adopt the switch working mode, and the electro-acoustic conversion efficiency is higher, and the transducer has less heat.
  • the driving mode used in the invention directly sends the amplified switching signal to the speaker end to control the opening and closing operation of the speaker, and does not need to add a large volume and expensive inductor and capacitor to simulate low in the digital power amplifier stage.
  • the volume and cost of the driving device are reduced, and the integration degree of the device is improved.
  • the sound power is output, and when a digital signal is applied to the transducer end, the impedance matching effect is superior to the conventional impedance matching effect of applying an analog signal at the transducer end.
  • the multi-bit sigma-delta modulator and the dynamic mismatch shaper used in the present invention are capable of shaping high-order harmonics and dispersing these harmonic powers over the entire frequency band, thereby reducing high-order harmonic radiation.
  • the electromagnetic interference caused by this ensures the normal operation of other devices around the digital speaker system.
  • the invention can perform unified and integrated digital coding operation on a plurality of transmission channels.
  • the digital coded signals of each channel include the original source signal while the digital coded signal sequence of the channel thereof
  • the repetitiveness is reduced, thereby reducing the correlation between the coded signal sequences of each channel, improving the uniformity of the sound field of the spatial radiated signal of the multi-channel system, and uniformly spreading the radiated noise power of the system into the entire radiation space. It avoids the problem of local area sound quality degradation caused by local accumulation of noise in traditional multi-channel systems.
  • FIG. 1 is a schematic diagram showing the components of a conventional PWM-based digital speaker system
  • FIG. 2 is a schematic diagram showing the components of a conventional digital speaker system based on 1-bit sigma-delta modulation
  • FIG. 3 is a schematic diagram showing the components of a conventional digital speaker system based on multi-bit sigma-delta modulation
  • FIG. 4 is a schematic diagram showing the components of a conventional ⁇ - ⁇ modulation based Class-D system
  • Figure 5 is a schematic diagram showing the components of a digital speaker driving device based on code conversion
  • Figure 6 is a diagram showing the flow of implementation of the transcoder of the present invention.
  • Figure 7 is a diagram showing a conversion process from PDM encoding to PWM encoding in the transcoder of the present invention.
  • Figure 8 is a diagram showing all transitions of a PDM encoded data frame containing 9 digital chips to a PWM code conversion process in the transcoder of the present invention
  • Figure 9a is a schematic diagram showing the switching process of the full bridge driving network of the present invention when the '1' state is input;
  • Figure 9b is a schematic diagram showing the switching process of the full bridge driving network of the present invention when the '0' state is input;
  • Figure 10 is a flow chart showing the signal processing of the fifth-order CIFB modulation structure employed by the sigma-delta modulator in the embodiment of the present invention.
  • thermometer code vector 11 is a schematic diagram showing switch control of a thermometer code vector in an embodiment of the present invention.
  • FIG. 12 is a flowchart showing signal processing of a VFMS mismatch shaping algorithm used by the dynamic mismatch shaper in the embodiment of the present invention.
  • Figure 13 is a table showing the parameter setting table of the fifth-order CIFB structure employed by the 3-bit sigma-delta modulator in the embodiment of the present invention.
  • Class-D power amplifier based on multi-bit sigma-delta modulation has been widely promoted and applied, but this digital power amplifier only performs PWM-based digital coding for a single transmission channel, but does not consider multiple transmission channels.
  • the unified and integrated coding problem in the working situation does not consider the frequency response deviation correction and decorrelation problems in the case of multiple transmission channels working together and the uniformity of the radiated sound field in the signal and noise space.
  • the PDM code generated by the traditional sigma-delta modulation is completed by the analog circuit in the process of converting to the PWM code.
  • the physical implementation is complicated, and the system portability and editability are poor.
  • the digital speaker driving method and device based on code conversion proposed by the invention completes the conversion process of PDM encoding to PWM encoding by digital signal processing algorithm, and can completely copy code through digital signal processor such as DSP and FPGA. And editing to complete the porting and modification of the transcoder.
  • the digital speaker driving method and device proposed by the invention comprises a thermometer encoder and a dynamic mismatch shaping device, which can perform unified and integrated digital encoding on multiple transmission channels, and can simultaneously frequency between multiple channels. The deviation is corrected, and the output signals of each channel are de-correlated in the case of multi-channel joint operation. At the same time, the signal radiated from the system space and the noise field are homogenized to ensure the uniformity of the spatial distribution of the signal and noise fields. The problem of sound quality degradation caused by the accumulation of signals and noise in local areas of space is avoided.
  • a digital speaker driving device based on code conversion according to the present invention is manufactured, which is mainly composed of a sound source 1, an input format converter 2, a multi-bit sigma-delta modulator 3, a thermometer encoder 4, and a dynamic
  • the mismatch shaper 5, the transcoder 6, the multi-channel digital power amplifier 7, the digitized speaker load 8, and the like are composed.
  • Sound source 1 you can use the MP3 format audio file stored in the PC hard disk, which can be output in digital format through the USB port; you can also use the audio source file stored in the MP3 player to output in analog format; you can also use the signal source to generate Test signals within the audio range are also output in analog format.
  • the input format converter 2 is connected to the output end of the sound source 1, and includes two input interfaces of a digital input format and an analog input format.
  • a USB interface chip of the PCM2706 model of the Ti company can be used for the digital input format.
  • the MP3 type file stored in the PC is 16 bits wide, 44.1 via the USB port.
  • the KHz sampling rate is read in real time into the FPGA chip of the Cyclone III EP3C80F484C8 through the I2S interface protocol; for the analog input format, Analog is used.
  • Analog Devices' AD1877 analog-to-digital conversion chip converts analog source signals to 16-bit, 44.1
  • the KHz PCM coded signal is also read into the FPGA chip in real time through the I2S interface protocol.
  • a multi-bit sigma-delta modulator 3 connected to the output of the input format converter 2, first, an interpolation filter operation of oversampling inside the FPGA chip, 44.1 KHz, 16-bit PCM coded signal, over-sampling interpolation filtering processing in five stages, the first-stage interpolation factor is 5, the sampling rate is increased to 220.5 KHz; the second-stage interpolation factor is 3, and the sampling rate is raised to 661.5. KHz; the third-order interpolation factor is 3, the sampling rate is increased to 1.9845 MHz; the fourth-order interpolation factor is 2, the sampling rate is 3.969 MHz; the fifth-order interpolation factor is 2, and the sampling rate is increased to 7.938. MHz.
  • the 3-bit sigma-delta modulator uses a 5th-order CIFB (Cascaded Integrators with Distributed The topology of the feedback, whose output corresponds to a 9-level quantization level state, wherein the parameters used by the modulator are shown in Table 1.
  • CIFB Cascaded Integrators with Distributed The topology of the feedback, whose output corresponds to a 9-level quantization level state, wherein the parameters used by the modulator are shown in Table 1.
  • shift addition is usually used instead of constant multiplication, and the parameters used by the sigma-delta modulator are represented by CSD code.
  • thermometer encoder 4 connected to the output of the multi-bit sigma-delta modulator 3, which will have 7.938
  • the MHz and 3-bit PCM modulated signals are converted to 7.938 corresponding to 8 digital channels according to the thermometer encoding method.
  • MHz 1-bit binary state code vector.
  • the converted thermometer code is '00000001', which indicates that there is only one digital channel on the 8 digital channels with output status '1', and the remaining 7 digital channels.
  • the dynamic mismatch shaper 5 is connected to the output of the thermometer encoder 4 for eliminating nonlinear harmonic distortion components caused by the difference in frequency response between the digital channels.
  • the dynamic mismatch shaper 5 sorts the 8-bit thermometer codes according to the optimization criterion of the least harmonic distortion component, thereby determining the code distribution mode for the eight digital channels. As shown in Figure 11, when the thermometer is coded as '00001111' and sorted by the dynamic mismatch shaper, it will determine the allocation code '1' on channels 1, 4, 5, and 7, and allocate on channels 2, 3, 6, and 8.
  • the code '0' is encoded to ensure that the synthesized signals formed by the eight digital channels contain the least harmonic distortion components.
  • the dynamic mismatch shaper adopts a VFMS (Vector-Feedback mismatch-shaping) algorithm, and its signal processing flow is shown in FIG. 12, wherein the MTF-1 module is a designed shaping filter, which is responsible for vector quantization.
  • the error signal generated by the device is shaped and the harmonic component is pushed to the out-of-band high frequency band, wherein the MTF adopts a second-order filter structure, and the z-domain expression is (1-z -1 ) 2 .
  • -min() is responsible for taking the minimum value in the vector and negating it.
  • the harmonic components existing in the original ⁇ - ⁇ coded signal are pushed to the out-of-band high frequency band, thereby improving the sound quality level of the in-band sound source signal.
  • the transcoder 6 is connected to the output of the dynamic mismatch shaper 5. As shown in Figure 6, the transcoder converts the switching rate on the eight transmission channels to 7.938. MHz 1-bit PDM encoded signal stream, according to 793.8 KHz switching rate is divided into data frames, and then each data frame of each channel is determined according to the high level (state '1') contained therein to determine the pulse width of the PWM encoded signal, thereby generating Switching frequency is 793.8 KHz 1-bit PWM encoded signal.
  • a multi-channel digital power amplifier 7 is connected to the output of the transcoder 6.
  • the digital power amplifier chip selects a digital power amplifier chip of the Ti company model TAS5121, and the response time of the chip is 100. Ns magnitude, capable of distortion-free response 793.8 KHz PWM coded control signal.
  • the power amplifier chip has two half-bridge channels inside, and one speaker unit can be driven by two half-bridge channels to form a full-bridge power amplifier network.
  • the PWM code generated by the transcoder is sent to the input of one half-bridge channel, and the other is inverted, and the output is sent to the input of the other half-bridge channel, and the differential PWM control signal is used to realize the full
  • the four MOSFETs of the bridge network are switched on and off to form a current path of two switching states of '+1' and '-1'.
  • the digitized speaker load 8 is connected to the output of the multi-channel digital power amplifier 7.
  • the digital speaker load is a multi-speaker speaker unit with 8 voice coil windings, and the DC resistance of each voice coil winding is 4 ⁇ , rated power is 10 W, the speaker unit has a diameter of 6.5 inches.
  • the power supply voltage of the multi-channel digital power amplifier is 12 V, using LeCroy model number 100 for WaveJet 314 without applying a sound source input signal
  • the MHz oscilloscope measures the electrical noise signal on the speaker leads with a spectral amplitude of approximately 10 dBm over the entire frequency band.
  • the maximum output power of the entire system is 11.5 at 12 V supply voltage and 4 ⁇ speaker load.
  • W, the THD+N of the system output signal is about 0.05% in the frequency range of 20 Hz to 20 KHz, and the electroacoustic conversion efficiency of the system is 80%.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Power Engineering (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Amplifiers (AREA)
  • Circuit For Audible Band Transducer (AREA)

Abstract

本发明公开了一种基于编码转换的数字扬声器驱动方法和装置,该方法包括:(1)输入格式转换;(2)多比特∑-Δ调制;(3)温度计编码转换;(4)动态失配整形处理;(5)脉冲宽度调制编码转换;(6)控制全桥功放网络的MOSFET管进行开关状态切换,驱动数字化扬声器负载发声。该装置包括:音源、输入格式转换器、多比特∑-Δ调制器、温度计编码器、动态失配整形器、编码转换器、多通道数字功放器、数字化扬声器负载;各单元依次顺序连接。本发明降低了功率管的开关切换速率和切换过程中其产生的功耗和发热,提高了电声还原的声质量和效率,减少了系统体积重量和实现成本,降低了电磁辐射水平,对多数字通道的频响偏差具有较好的免疫力。

Description

基于编码转换的数字扬声器驱动方法和装置
技术领域
本发明涉及一种数字扬声器驱动方法和装置,特别涉及一种基于编码转换的数字扬声器驱动方法和装置。
背景技术
随着大规模集成电路和数字化技术的蓬勃发展,传统的模拟扬声器系统在功耗、体积、重量和信号传输、存储、处理等方面的固有缺陷越来越明显,为了克服这些缺陷,扬声器系统的研发逐渐向低功耗、小外形、数字化与集成化的方向发展,形成了以扬声器负载的数字化为研究核心的全新研究领域。
目前,美国专利(专利号为US 20060049889A1、US 20090161880A1)公开了基于PWM调制技术的数字化扬声器系统实现过程,如图1所示。首先字长为M比特、采样率为fs的PCM编码信号,经过脉冲宽度调制(Pulse Width Modulation -- PWM)方式,转换为字长为1比特、采样率为fo的PWM编码信号;然后PWM信号经过数字功放放大后,转换为字长为1比特、采样率为fo的功率开关信号;最后这种功率开关信号经过低通滤波器处理后,转换为模拟的功率信号驱动扬声器负载发声。这种基于 PWM 调制技术的数字扬声器系统所存在的缺点是其调制结构本身具有非线性缺陷,这会造成系统还原信号的总谐波失真水平较高,如果进一步采用线性化手段进行改善的话,其调制方式的实现难度和复杂度将会大幅度提高。另外,系统所使用的调制载波会对周围环境产生较高的电磁辐射干扰,影响其他设备的运行。
为了克服PWM调制技术存在的非线性失真和电磁干扰缺陷,许多学者致力于研究基于∑-Δ调制技术的数字化扬声器系统实现方法,以提高调制技术自身的线性度,消除调制环节引入的非线性失真成份。基于∑-Δ调制技术的数字化扬声器系统主要分为两类:1比特∑-Δ调制的数字化系统和多比特∑-Δ调制的数字化系统。1比特∑-Δ调制的数字化系统,如图2所示,其电路实现较为简单,但是该系统本身存在着以下几个缺陷:① 对时钟抖动较为敏感,容易因时钟抖动引入非线性失真; ② 为了保持调制结构的稳定性,允许的输入信号动态范围较小;③ 需要较高的开关速率,而功率型MOSFET(Metal Oxide Semiconductor Field Effect Transistor)管在驱动扬声器负载进行高速开关切换的过程中会产生较多的非线性失真成份,同时也会引起MOSFET管发热增加、温度升高和效率降低。
为了解决1比特∑-Δ调制的数字化系统存在的缺陷,许多学者又转向研究基于多比特∑-Δ调制的数字化系统,如图3所示。多比特∑-Δ调制技术在克服上述1比特∑-Δ调制缺点的同时,自身也存在着一个较为致命的缺陷--其调制结构对多个扬声器单元(或者音圈单元)之间的不一致性具有较高的敏感度,容易因多个单元的不一致性而引入较大的编码误差。例如一个5阶3比特的∑-Δ调制器,其过采样因子为32,当数模转换单元之间有1%的误差时,理论上其信噪比会下降40 dB,同时还会引入较多的谐波失真分量。针对多比特∑-Δ调制的数字化扬声器系统,需要引入动态失配整形算法(Mismatch-Shaping Dynamic Element Matching--DEM)用于消除扬声器单元(或音圈单元)频响差异影响,通过环路整形滤波操作,消除了各扬声器单元(或各音圈单元)的频响差异所造成的信噪比降低和谐波失真增加。
基于多比特∑-Δ调制的数字化系统,虽然通过引入失配整形算法解决了通道频响偏差的影响,但是这一数字系统的采样速率仍然很高,一般在MHz的量级,这一过高的采样速率造成了后级功率MOSFET管的开关频率过高,从而造成系统最终输出的方波信号在上升沿和下降沿处出现很多幅度较高的尖毛刺,这些尖毛刺会造成系统还原声音信号中存在较大量级的噪声,同时后级MOSFET管过高的开关频率,也会造成MOSFET管的发热严重,功耗增大,输出效率明显降低。目前功率MOSFET管的开关频率仅有几百KHz,无法满足基于多比特∑-Δ调制的数字化系统的开关速率要求,从而造成了这种数字系统的物理实现仍然十分困难。
为了解决∑-Δ调制方式所具有的开关速率过高的缺陷,如图4所示,传统的基于∑-Δ调制的Class-D放大器,都是直接将开关速率过高的1比特或者多比特∑-Δ调制按照PWM方式,转换开关速率较低的PWM调制信号,从而经过数字功放的功率MOSFET管放大后转换为功率信号并经过低通滤波后,以模拟驱动方式驱动扬声器发声。这种将∑-Δ调制和PWM调制结合形成的基于∑-Δ调制的Class-D系统,保留了∑-Δ调制所具有的谐波抑制能力,同时也降低了功率MOSFET管的开关速率,减少了开关切换过程中的尖毛刺数量和幅度,降低了功率MOSFET管的开关损耗。这种传统的基于∑-Δ调制的Class-D系统并没有考虑由多个扬声器单元或者多个音圈绕组所分别组成的扬声器阵列或多音圈扬声器所涉及的多个输入通道的数字化问题,没有考虑对多个输入通道进行统一的数字编码,仅停留在单个输入通道的数字化阶段,没有引入动态失配整形算法所具有的多通道频响偏差校正功能。
针对多比特∑-Δ调制的数字化系统所存在的开关速率过高缺陷,同时针对传统的基于∑-Δ调制的Class-D系统所未涉及的多个输入通道统一进行数字化编码问题,有待于研究降低数字化系统开关速率的方法,以保留多比特∑-Δ调制和动态失配整形算法所具有的谐波抑制和通道频响偏差校正功能,同时提高系统的还原声音质量,减少系统功耗和发热。
发明内容
本发明的目的是克服多比特∑-Δ调制的数字化系统所存在的开关速率过高的缺陷并解决传统的基于∑-Δ调制的Class-D系统所未涉及的多通道统一综合编码问题,提出了一种基于编码转换的数字扬声器驱动方法和装置。
为了达到上述目的,本发明一方面提供一种基于编码转换的数字扬声器驱动方法,如图5所示,包括如下步骤:
(1)输入格式转换,用于将输入信号转换为满足参数要求的PCM编码信号;
(2)多比特∑-Δ调制,将音频带宽范围内的噪声能量推挤到音频带之外;
(3)温度计编码转换,将位宽为M的低比特PCM编码信号转换为对应于2M个通道的数字功放和扬声器负载的1比特编码信号,将M比特编码信号按照同等权重分配给2M个数字通道,各通道上的数字信号仅有'0'和'1'两种编码状态;
(4)动态失配整形处理,将温度计编码转换后获得的2M个通道的二元状态码矢量,进行基于0和1二元状态码的动态失配整形处理,消除2M个通道后级数模转换负载(扬声器单元或者音圈单元)之间频响差异所造成的谐波失真分量,降低噪声幅度;
(5)脉冲宽度调制编码转换,将多比特∑-Δ调制和动态失配整形处理后所获得的每个传输通道上PDM格式的编码信号转换为PWM编码信号;
(6)控制全桥功放网络的MOSFET管进行开关状态切换,驱动数字化扬声器负载发声,开关状态切换是指每个数据传输通道通过转换后的PWM编码信号以及与其反相信号组成差分PWM的控制信号,去控制全桥功放电路进行开关动作。
进一步地,步骤(1)中所述输入格式转换分为模拟信号和数字信号两种情况,针对模拟输入信号情况,首先需要经过模数转换操作,转换为基于PCM编码的数字信号,然后按照指定的位宽和采样率的参数要求进行变换,转换为满足参数要求的PCM编码信号;针对数字输入信号情况,仅需要按照指定的位宽和采样率的参数要求进行变换,转换为满足参数要求的PCM编码信号。
进一步地,步骤(2)中所述多比特∑-Δ调制,其处理过程如下:首先,通过插值滤波器,将均衡处理后的高比特PCM编码按照指定的过采样因数进行插值滤波处理,获得过采样的PCM编码信号;然后,进行多∑-Δ调制处理,将音频带宽范围内的噪声能量推挤到音频带之外,保证了系统在音频带内具有足够高的信噪比,同时经多∑-Δ调制处理后,原来高比特PCM码变换为低比特PCM码,编码比特位数得到了缩减。
进一步地,步骤(2)中的多比特∑-Δ调制所采用的多比特∑-Δ调制器结构可以按照现有各种多比特∑-Δ调制器的设计方法--像高阶单级(Higher-Order Single-Stage)串行调制方法或者多级(Multi-Stage (Cascade、MASH)并行调制方法--进行调制器结构和参数设计,以实现对插值滤波器输出的过采样信号进行噪声整形处理,将噪声能量推挤到音频带之外,保证了系统具有足够高的带内信噪比。
进一步地,步骤(4)中所述动态失配整形处理,可以采用现有各种动态失配整形算法--像DWA(Data-Weighted Averaging) 、VFMS(Vector-Feedback mismatch-shaping) 和TSMS(Tree-Structure mismatch shaping) 算法--进行动态失配整形器的结构和参数设计,将由多个数字通道频响差异引入的非线性谐波失真频谱进行白化 和 整形处理,压低带内谐波失真成份的强度,将其功率推挤到带外高频段,从而消除带内谐波失真同时提升带内信噪比强度。
进一步地,步骤(5)中所述脉冲宽度调制编码转换,是将动态失配整形器获得的2M个通道、开关速率为fo的1比特数据流,按照PWM的编码方式转换为2M个通道、开关速率为fM的1比特数据流,经编码转换操作后,每个通道上原来开关速率过高的PDM(Pulse Density Modulation--PDM)编码信号转换为开关速率较低的PWM编码信号,这种较低开关速率的PWM编码信号,经功率MOSFET管放大后,仍能保留多比特∑-Δ调制 和动态失配整形操作所具有的谐波抑制和通道偏差免疫能力,同时也减少了功率MOSFET管在开关过程中所产生的尖毛刺数量和幅度,并且降低了开关过程中的功率损耗 。
进一步地,步骤(5)中的脉冲宽度调制编码转换,就是将多比特∑-Δ调制器和动态失配整形器处理后所获得的每个传输通道上PDM格式的编码信号转换为PWM编码信号,具体转换方式为:PDM编码向PWM编码的转换,是按照数据帧长度相等的原则进行的,在一个数据帧长度内,PDM编码信号包含多个高电平,在转换为PWM编码时,仍然保留相同数量的高电平,在PWM编码信号中,高电平的脉冲宽度等于PDM编码信号中所有高电平的脉冲宽度之和;在进行PDM编码到PWM编码的转换过程中,两者之间的每个数据帧在时间上对齐。
进一步地,步骤(6)中所述开关状态切换, 其具体开关动作的控制过程为:在'0'和'1'二元状态码控制全桥功放电路开关动作时,其两种状态输入情况下,四个MOSFET管的开关和电流流动方向如图9所示,设'HA'和'LA'分别为A侧高边和低边MOSFET管的标号,'HB'和'LB'分别为B侧高边和低边MOSFET管的标号,在'1'状态输入时,HA和LB同时关闭,HB和LA同时断开,这时电流会从A端经扬声器单元流到B端,此时扬声器单元上承受的电压为'+Vcc';在'0'状态输入时,HB和LA同时关闭,HA和LB同时断开,这时电流会从B端经扬声器单元流到A端,此时扬声器单元上承受的电压为'- Vcc'。
更进一步地,步骤(6)中的数字化扬声器负载可以为多个扬声器单元组成的数字化扬声器阵列,也可以为具有多个音圈绕组的扬声器单元,还可以为多个多音圈扬声器单元组成的数字扬声器阵列。
本发明另一方面提供一种基于编码转换的数字扬声器驱动装置,它包括:音源、输入格式转换器、多比特∑-Δ调制器、温度计编码器、动态失配整形器、编码转换器、多通道数字功放器、数字化扬声器负载。音源是系统待播放的信息;输入格式转换器,与音源的输出端相连接,用于将输入信号转换为位宽为N、采样率为fs的高比特PCM编码信号;多比特∑-Δ调制器,与输入格式转换器的输出端相连接,用于将输入的N比特PCM编码信号转换为位宽为M、采样率为fo的低比特PCM编码信号;温度计编码器,与多比特∑-Δ调制器的输出端相连接,用于将M比特的PCM编码信号转换为对应于2M个数字通道的位宽为1、采样率为fo的二元状态码矢量;动态失配整形器,与温度计编码器的输出端相连接,用于消除数字化扬声器负载各阵元通道之间由频响差异引入的空域合成信号的非线性谐波失真分量,压低音频带内谐波失真成份的强度,将这些谐频成份的功率推挤到带外高频段,从而降低了带内的谐波失真强度,提高了多比特∑-Δ编码信号的音质水平;编码转换器,与动态失配整形器的输出端相连接,用于将2M个数字通道、采样率为fo的过高开关速率的二元状态码数据流,按照较低的开关速率fM对其数据流进行数据帧分割,每个传输通道上的每个PDM编码的数据帧,按照含有高电平(状态'1')的数量,转换为相应的PWM编码信号的数据帧,经编码转换器处理后,原来开关速率过高的PDM编码信号转换成了开关速率较低的PWM编码信号,从而在保留多比特∑-Δ调制器和动态失配整形器所具有的谐波抑制和通道频响偏差校正能力的同时,降低了后级功率MOSFET管的开关切换速率,降低了功率MOSFET管切换过程中所引入的非线性失真,减少了功率开关信号在过渡沿产生的尖毛刺数量和幅度,降低了功率MOSFET管的的功耗和发热问题;多通道数字功放器,与编码转换器的输出端相连接,用于对2M个数字通道的编码信号进行功率放大,用于驱动后级数字化负载进行开通和关断操作;数字化扬声器负载,与多通道数字功放器的输出端相连接,用于完成电声转换操作,将数字化的开关电信号转换为模拟格式的空气振动信号。
进一步地,音源为模拟信号或者数字编码信号,模拟信号来自于各种模拟装置所产生的模拟音源信号,数字编码信号是各种数字装置所产生的数字编码信号。
进一步地,输入格式转换器,包含模数转换器、USB、LAN、COM等数字接口电路和接口协议程序,能够与现有的数字接口格式相兼容,通过这些接口电路和协议程序,所述数字扬声器驱动装置能够灵活方便的与其他装置设备进行信息的交互与传递;同时,经过输入格式转换器处理后,原来的输入的模拟或者数字音源信号转换为位宽为N、采样率为fs的高比特PCM编码信号。
进一步地,多比特∑-Δ调制器,其信号处理过程如下:首先,将原来位宽为N、采样率为fs的PCM编码按过采样因子mo进行过采样的插值滤波处理,获得位宽为N、采样率为fo的PCM编码信号;然后按照多比特∑-Δ调制方式,将位宽为N的过采样PCM编码信号转换成位宽为M的低比特PCM编码信号,从而缩减了PCM编码信号的位宽,M<N。
更进一步地,多比特∑-Δ调制器,按照现有各种∑-Δ调制器的信号处理结构--像高阶单级串行调制器结构或者多级并行的调制器结构,对插值滤波输出的过采样信号进行噪声整形处理,将噪声能量推挤到音频带之外,保证了系统具有足够高的带内信噪比。
进一步地,温度计编码器,用于将位宽为M的低比特PCM编码信号转换为对应于2M个数字通道的1比特编码信号,从而将单通道的M比特编码信号按照同等位权转换为2M个通道的单比特信号,从而将扬声器单元也引入到编码流程中,形成扬声器单元的数字化。
进一步地,动态失配整形器,按照现有的各种动态失配整形算法--像DWA(Data-Weighted Averaging)、VFMS(Vector-Feedback mismatch-shaping ) 和TSMS(Tree-Structure mismatch shaping) 等算法设计基于'0'和'1'二元状态码的动态失配整形器,对2M个数字通道的1比特编码信号矢量进行整形处理,消除由多个阵元通道之间频响差异引入的非线性谐波失真频谱分量,同时压低音频带内噪声功率水平。
进一步地,编码转换器,将2M个数字传输通道上、采样率为fo的高速开关信号,按照fM的低速开关速率进行数据帧的分割划分,然后将每个通道上的每个PDM编码的数据帧按照其内部所包含高电平(状态'1')的数量,来确定出转换后的PWM编码的脉冲宽度,从而将每个PDM编码数据帧转换为PWM编码的数据帧。
进一步地,多通道数字功放器,其通道数为2M,每个通道上的数字功放器都是由两个半桥功率放大电路组成的全桥功率放大电路,每个半桥上都有一个高边MOSFET和一个低边MOSFET,通过控制这四个MOSFET管的开通或关断操作,可以实现两种不同状态的切换操作。
进一步地,数字化扬声器负载的每个数字通道可以由单个或者多个扬声器单元组成;也可以由单个或者多个音圈组成;还可以由多个音圈和多个扬声器单元组合而成。
更进一步地,数字化扬声器负载的阵列形状,根据扬声器单元数量和实际应用需求进行排列,组成适合于实际应用需求的各种阵列形状。
与现有技术相比,本发明的优点在于:
1 、本发明所采用的多比特∑-Δ调制技术--通过噪声整形方法,将音频带内的噪声功率推挤到带外高频区域,从而保证了音频带内的高信噪比要求。这种调制技术的硬件实现电路简单廉价,同时对电路器件制作过程中所产生的参数偏差具有很好的免疫力。
2 、本发明所采用的动态失配整形算法,能够有效地消减各数字通道之间因频响差异引入的非线性谐波失真强度,提高了多通道的合成信号音质水平,因此该驱动装置对于多数字通道之间的频响偏差具有很好的免疫力。
3 、本发明所采用的编码转换器,将经多比特∑-Δ调制和动态失配整形器处理后获得的多个数字传输通道上的过高开关速率的PDM编码信号转换成为较低开关速率的PWM编码信号,从而避免了由高速开关速率所引起的后级功率MOSFET管在开关切换过程中所产生的输出信号过渡沿出现较多数量和较大幅度的尖毛刺,降低了数字系统还原信号的非线性失真水平,也降低了功率MOSFET管在开关切换过程中所产生的功率损耗和发热,提升了系统的电声转换效率。
4 、本发明所采用的编码转换器,在经过编码转换后,其生成的PWM编码信号仍保留了多比特∑-Δ调制器所具有的谐波抑制和抗噪声能力,同时也保留了动态失配整形器所具有的多通道频响偏差校正能力,通过编码转换操作,在降低各通道开关切换速率的同时也保证了多个数字通道进行动态统一编码的特征。
5 、本发明所采用的编码转换器,完全可以在DSP和FPGA等数字信号处理器件中通过代码复制和编辑来完成编码转换器的移植和修改操作,实现简单,成本低廉。
6 、本发明所采用的数字化驱动装置,其抗干扰能力强,在复杂的电磁干扰环境中能够保证稳定可靠的工作。
7 、本发明所采用的交替开关工作的驱动方式,有效地避免了各扬声器单元(或者各音圈单元)出现因过载造成的非线性失真现象,从而延长了各扬声器单元(或者各音圈)的使用寿命,同时保证了辐射声场的音质水平;另外,功放电路和数字化负载采用开关工作方式,其电声转换效率更高,换能器的发热更少。
8 、本发明所采用的直接将放大后的开关信号送到扬声器端,控制扬声器进行开通与关断操作的驱动方式,不需要在数字功放后级加入体积较大、价格昂贵的电感电容进行模拟低通处理,缩减了驱动装置的体积与成本,提高了装置的集成度;同时,对于呈容性特性的压电换能器负载来讲,通常需要加电感进行阻抗匹配,以增加压电扬声器的输出声功率,而在换能器端施加数字信号时,其阻抗匹配效果要优于传统的在换能器端施加模拟信号的阻抗匹配效果。
9 、本发明所使用的多比特∑-Δ调制器和动态失配整形器,能够对高次谐波进行整形处理,将这些谐波功率分散到整个频带范围内,从而降低了高次谐波辐射所引起的电磁干扰,保证了数字扬声器系统之外周围其他设备的正常工作。
10 、本发明能够对多个传输通道进行统一和综合的数字化编码操作,通过温度计编码和动态失配整形操作,各通道的数字编码信号在包含有原始音源信号的同时其通道的数字编码信号序列之间的重复性得到了降低,从而减少了各通道编码信号序列之间的相关程度,提高了多通道系统空间辐射信号声场的均匀性,同时也将系统辐射噪声功率均匀的扩散到整个辐射空间中,避免了传统多通道系统所存在的噪声局部集聚所引起的局部区域音质降低问题。
附图说明
图1表示传统的基于PWM调制的数字扬声器系统的各组成模块示意图;
图2表示传统的基于1比特∑-Δ调制的数字扬声器系统的各组成模块示意图;
图3表示传统的基于多比特∑-Δ调制的数字扬声器系统的各组成模块示意图;
图4表示传统的基于∑-Δ调制的Class-D系统各组成模块的示意图;
图5表示一种基于编码转换的数字扬声器驱动装置的各组成模块示意图;
图6表示本发明的编码转换器实现流程的示意图;
图7表示本发明的编码转换器中由PDM编码到PWM编码的转换过程示意图;
图8表示本发明的编码转换器中一个包含9个数字码片的PDM编码数据帧向PWM编码转换过程中所有转换情况的示意图;
图9a表示本发明的全桥驱动网络在'1'状态输入时的开关切换过程示意图;
图9b表示本发明的全桥驱动网络在'0'状态输入时的开关切换过程示意图;
图10表示本发明实施例中的∑-Δ调制器所采用的5阶CIFB调制结构的信号处理流程图;
图11表示本发明实施例中的温度计编码矢量的开关控制示意图;
图12表示本发明实施例中的动态失配整形器所采用的VFMS失配整形算法的信号处理流程图;
图13表示本发明的实施例中3比特∑-Δ调制器采用的5阶CIFB结构的参数设置表。
其中图中标号为:
1 、音源;2、输入格式转换器;3、多比特∑-Δ调制器;4、温度计编码器;5、动态失配整形器;6、编码转换器;7、多通道数字功放器;8、数字化扬声器负载 。
具体实施方式
下面结合附图对本发明的较佳实施例进行详细阐述,以使本发明的优点和特征能更易于被本领域技术人员理解,从而对本发明的保护范围做出更为清楚明确的界定。
目前,基于多比特∑-Δ调制的Class-D功放已经得到了广泛的推广和应用,但是这种数字功放仅针对单个传输通道进行了基于PWM的数字化编码,但是并没有考虑多个传输通道共同工作情况下的统一和综合编码问题,也没有考虑多个传输通道共同工作情况下的频响偏差校正和去相关问题以及信号和噪声空间辐射声场的均匀性问题。传统的∑-Δ调制所生成PDM编码在向PWM编码转换的过程中,都是采用模拟电路的方法来完成,其物理实现复杂,系统可移植性和可编辑性较差。本发明所提出的基于编码转换的数字扬声器驱动方法和装置,是通过数字信号处理算法来完成PDM编码向PWM编码的转换过程,其完全可以在DSP和FPGA等数字信号处理器内部通过代码的复制和编辑来完成编码转换器的移植和修改。本发明所提出的数字扬声器驱动方法和装置,其系统内部包含了温度计编码器和动态失配整形器,能够对多个传输通道进行统一和综合的数字化编码,同时能够对多通道之间的频响偏差进行校正,对多通道联合工作情况下各通道输出信号进行了去相关处理,同时对系统空间所辐射的信号和噪声声场进行了均匀化处理,保证信号和噪声场空间分布的均匀化特征,避免了信号和噪声在空间局部区域集聚所引起的声质量下降问题。
如图5所示,制作一个依据本发明的一种基于编码转换的数字扬声器驱动装置,其主体由音源1、输入格式转换器2、多比特∑-Δ调制器3、温度计编码器4、动态失配整形器5、编码转换器6、多通道数字功放器7、数字化扬声器负载8等组成。
音源1,可以选用在PC机硬盘内存储的MP3格式的音源文件,可以通过USB端口按数字格式输出;也可以选用MP3播放器内存储的音源文件,通过模拟格式输出;还可以利用信号源产生音频范围内的测试信号,也通过模拟格式输出。
输入格式转换器2,与所述音源1的输出端连接,包含数字输入格式和模拟输入格式两种输入接口,针对数字输入格式,采用Ti公司的一款型号为PCM2706的USB接口芯片,能够将PC机内存储的MP3类型文件经由USB端口按照16比特位宽、44.1 KHz采样率通过I2S接口协议实时读入到型号为Cyclone III EP3C80F484C8的FPGA芯片内;针对模拟输入格式,采用Analog Devices公司的一款型号为AD1877的模数转换芯片,将模拟音源信号转换为16比特、44.1 KHz的PCM编码信号,也通过I2S接口协议实时读入到FPGA芯片内。
多比特∑-Δ调制器3,与所述输入格式转换器2的输出端相连接,首先,在FPGA芯片内部,进行过采样的插值滤波操作,将44.1 KHz、16比特的PCM编码信号,按五级进行过采样插值滤波处理,第一级插值因子为5,采样率升为220.5 KHz;第二级插值因子为3,采样率升为661.5 KHz;第三级插值因子为3,采样率升为1.9845 MHz;第四级插值因子为2,采样率升为3.969 MHz;第五级插值因子为2,采样率升为7.938 MHz。在经过180倍插值滤波处理后,原44.1 KHz、16 比特的PCM信号转换为7.938 MHz、16 比特的过采样PCM信号;然后按照3比特的∑-Δ调制方式,将过采样的7.938 MHz、16 比特的PCM编码信号转换成为7.938 MHz、3比特的PCM编码信号。在本实施例中,如图10所示,3比特∑-Δ调制器采用5阶CIFB(Cascaded Integrators with Distributed Feedback)的拓扑结构,其输出对应于9级量化电平状态,其中调制器所采用的参数如表1示。为了节约硬件资源,降低其实现代价,在FPGA芯片内部,通常会采用移位加法运算来代替常数乘法运算,并将∑-Δ调制器所使用的参数用CSD编码表示。
温度计编码器4,与所述多比特∑-Δ调制器3的输出端相连接,将7.938 MHz、3比特的PCM调制信号按照温度计编码方式转换为对应8个数字通道的7.938 MHz、1比特二元状态码矢量。如图11,当3比特PCM编码为'001',其转换的温度计编码为'00000001',这表明8个数字通道上仅有1个数字通道上输出状态'1',其余7个数字通道上输出状态'0';当3比特PCM编码为'100'时,其转换的温度计编码为'00001111' ,这表明8个数字通道上有4个数字通道上输出状态'1',其余4个数字通道上输出状态'0';当3比特PCM编码为'111',其转换的温度计编码为'01111111',这表明8个数字通道上仅有1个数字通道上输出状态'0',其余7个数字通道上输出状态'1'。
动态失配整形器5,与温度计编码器4的输出端相连接,用于消除因各数字通道之间频响差异所引起的非线性谐波失真分量。动态失配整形器5按照非线性谐波失真分量最少的优化准则,对8位温度计编码进行排序,从而决定出给8个数字通道的编码分配方式。如图11,当温度计编码为'00001111',通过动态失配整形器进行次序排列后,将决定通道1、4、5、7上分配编码'1',通道2、3、6、8上分配编码'0',从而保证这8个数字通道所形成的合成信号中包含最少的谐波失真分量。在本实施例中,动态失配整形器采用了VFMS (Vector-Feedback mismatch-shaping)算法,其信号处理流程如图12示,其中MTF-1模块为所设计的整形滤波器,负责对矢量量化器产生的误差信号进行整形处理,将谐波分量推挤到带外高频段,其中MTF采用二阶滤波器结构,其z域表达式为(1-z-12。-min()负责取出矢量中的最小值,并对其进行取反。在FPGA芯片内部,通过动态失配整形器处理后,原∑-Δ编码信号中存在的谐波分量被推挤到带外高频段,从而提高了带内音源信号的音质水平。
编码转换器6与动态失配整形器5的输出端相连接。如图6所示,编码转换器将8个传输通道上失配整形后的开关速率为7.938 MHz的1比特PDM编码信号流,按照793.8 KHz的开关切换速率进行数据帧的分割划分,然后对每个通道的每个数据帧按照其内部所包含的高电平(状态'1')的数量来确定PWM编码信号的脉冲宽度,从而产生开关频率为793.8 KHz的1比特PWM编码信号。
多通道数字功放器7,与编码转换器6的输出端相连接。本实施例中,数字功放芯片选用Ti公司的一款型号为TAS5121的数字功放芯片,该芯片的响应时间在100 ns量级,能够无失真响应793.8 KHz的PWM编码控制信号。该功放芯片内部具有两个半桥通道,可以用两个半桥通道驱动一个扬声器单元,形成全桥功放网络。将编码转换器生成的PWM编码,一路直接输出送至一个半桥通道的输入端,另一路经反相后输出送至另一个半桥通道的输入端,利用这组差分PWM控制信号实现对全桥网络的四个MOSFET管进行通断控制,形成'+1'和'-1'两个切换状态的电流路径。
数字化扬声器负载8,与多通道数字功放7的输出端相连接。本实施例中,数字扬声器负载为8个音圈绕组的多音圈扬声器单元,每个音圈绕组的直流电阻为4 Ω、额定功率为10 W,该扬声器单元的口径为6.5英寸。
在本实施例中,多通道数字功放的电源供电电压为12 V,在未施加音源输入信号的情况下,利用LeCroy公司型号为WaveJet 314的100 MHz示波器测量扬声器引线上的电噪声信号在整个频带内的频谱幅度约为10 dBm。整个系统在12 V供电电压、4 Ω扬声器负载情况下最大输出功率为11.5 W,在20Hz到20 KHz的频带范围内系统输出信号的THD+N约为0.05%,系统的电声转换效率为80%。
上述实施例只为说明本发明的技术构思及特点,其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施,并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰,都应涵盖在本发明的保护范围之内。

Claims (18)

1. 一种基于编码转换的数字扬声器驱动方法,包括如下步骤:
(1)输入格式转换, 用于将输入信号转换为满足参数要求的PCM编码信号;
(2)多比特∑-Δ调制,将音频带宽范围内的噪声能量推挤到音频带之外;
(3)温度计编码转换,将位宽为M的低比特PCM编码信号转换为对应于2M个通道的数字功放和扬声器负载的1比特编码信号,将M比特编码信号按照同等权重分配给2M个数字通道,各通道上的数字信号仅有'0'和'1'两种编码状态;
(4)动态失配整形处理,将温度计编码转换后获得的2M个通道的二元状态码矢量,进行基于0和1二元状态码的动态失配整形处理,消除2M个通道后级数模转换负载之间频响差异所造成的谐波失真分量,降低噪声幅度;
(5)脉冲宽度调制编码转换,将多比特∑-Δ调制和动态失配整形处理后所获得的每个传输通道上PDM格式的编码信号转换为PWM编码信号;
(6)控制全桥功放网络的MOSFET管进行开关状态切换,驱动数字化扬声器负载发声,开关状态切换是指每个数据传输通道通过转换后的PWM编码信号以及与其反相信号组成差分PWM的控制信号,去控制全桥功放电路进行开关动作。
2. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(1)中所述输入格式转换分为模拟信号和数字信号两种情况,针对模拟信号情况,首先需要经过模数转换操作,转换为基于PCM编码的数字信号,然后按照指定位宽和采样率的参数要求进行变换,转换为满足参数要求的PCM编码信号;针对数字信号情况,仅需要按照指定位宽和采样率的参数要求进行变换,转换为满足参数要求的PCM编码信号。
3. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(2)中所述多比特∑-Δ调制,其处理过程如下:首先,通过插值滤波器,将均衡处理后的高比特PCM编码信号按照指定的过采样因数进行插值滤波处理,获得过采样的PCM编码信号;然后,进行多∑-Δ调制处理,将音频带宽范围内的噪声能量推挤到音频带之外。
4. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(2)中所述多比特∑-Δ调制所采用的多比特∑-Δ调制器结构按照高阶单级串行调制方法或者多级并行调制方法进行调制器结构和参数设计,用于对插值滤波器输出的过采样信号进行噪声整形处理,将噪声能量推挤到音频带之外。
5. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(4)中所述动态失配整形处理,采用DWA 、VFMS和TSMS算法之一进行动态失配整形器的结构和参数设计,将由多个数字通道频响差异引入的非线性谐波失真频谱进行白化 和 整形处理,压低带内谐波失真成份的强度,将其功率推挤到带外高频段,消除带内谐波失真同时提升带内信噪比强度。
6. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(5)中所述的脉冲宽度调制编码转换,将动态失配整形器获得的2M个通道、开关速率为fo的1比特数据流,按照PWM的编码方式转换为2M个通道、开关速率为fM的1比特数据流,将每个通道上原来开关速率过高的PDM编码信号转换为开关速率较低的PWM编码信号。
7. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(5)中所述的脉冲宽度调制编码转换,其将PDM格式的编码信号转换为PWM编码信号的转换方式为:PDM格式编码向PWM格式编码的转换,是按照数据帧长度相等的原则进行的,在一个数据帧长度内,PDM编码信号包含多个高电平,在转换为PWM编码时,仍然保留相同数量的高电平,在PWM编码信号中,高电平的脉冲宽度等于PDM编码信号中所有高电平的脉冲宽度之和;在进行PDM编码到PWM编码的转换过程中,两者之间的每个数据帧在时间上对齐。
8. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:在'0'和'1'二元状态码控制全桥功放电路开关动作时,设'HA'和'LA'分别为A侧高边和低边MOSFET管的标号,'HB'和'LB'分别为B侧高边和低边MOSFET管的标号,在'1'状态输入时,HA和LB同时关闭,HB和LA同时断开,电流从A端经扬声器单元流到B端,扬声器单元上承受的电压为'+Vcc';在'0'状态输入时,HB和LA同时关闭,HA和LB同时断开,电流从B端经扬声器单元流到A端,扬声器单元上承受的电压为'- Vcc'。
9. 根据权利要求1所述基于编码转换的数字扬声器驱动方法,其特征在于:步骤(6)中所述数字化扬声器负载为多个扬声器单元组成的数字化扬声器阵列、具有多个音圈绕组的扬声器单元、多个多音圈扬声器单元组成的数字扬声器阵列之一。
10. 一种基于编码转换的数字扬声器驱动装置,其特征在于:它包括音源(1)、 与所述音源(1)的输出端相连接用于将输入信号转换为位宽为N、采样率为fs的高比特PCM编码信号的输入格式转换器(2)、与所述输入格式转换器(2)的输出端相连接用于将输入的N比特PCM编码信号转换为位宽为M、采样率为fo的低比特PCM编码信号的多比特∑-Δ调制器(3)、
与所述多比特∑-Δ调制器(3)的输出端相连接用于将M比特的PCM编码信号转换为对应于2M个数字通道的位宽为1、采样率为fo的二元状态码矢量的温度计编码器(4)、与所述温度计编码器(4)的输出端相连接用于消除数字化扬声器负载各阵元通道之间由频响差异引入的空域合成信号的非线性谐波失真分量和压低音频带内谐波失真成份的强度并将这些谐频成份的功率推挤到带外高频段的动态失配整形器(5)、与所述动态失配整形器(5)的输出端相连接用于将2M个数字通道、采样率为fo的过高开关速率的二元状态码数据流按照较低的开关速率fM对其数据流进行数据帧分割使每个传输通道上的每个PDM编码的数据帧按照含有高电平的数量转换为相应的PWM编码信号的数据帧的编码转换器(6)、与所述编码转换器(6)的输出端相连接用于对2M个数字通道的编码信号进行功率放大并驱动后级数字化负载进行开通和关断操作多通道数字功放器(7)、与所述多通道数字功放器(7)的输出端相连接用于完成电声转换操作将数字化的开关电信号转换为模拟格式的空气振动信号的数字化扬声器负载(8)。
11. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:音源(1)为系统待播放的信息,其为模拟信号或数字编码信号。
12. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:输入格式转换器(2)包含能够与现有的数字接口格式相兼容的数字接口电路和接口协议程序。
13. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:多比特∑-Δ调制器(3)的信号处理过程如下:首先,将原来位宽为N、采样率为fs的PCM编码按过采样因子m0进行过采样的插值滤波处理,获得位宽为N、采样率为fo的PCM编码信号;然后按照多比特∑-Δ调制方式,将位宽为N的过采样PCM编码信号转换成位宽为M的低比特PCM编码信号,M<N。
14. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:多比特∑-Δ调制器(3),按照高阶单级串行调制器结构或多级并行的调制器结构,对插值滤波输出的过采样信号进行噪声整形处理,将噪声能量推挤到音频带之外。
15. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:动态失配整形器(5)为按照DWA、VFMS和TSMS中之一算法设计基于'0'和'1'二元状态码的动态失配整形器,用于对2M个数字通道的1比特编码信号矢量进行整形处理,消除由多个阵元通道之间频响差异引入的非线性谐波失真频谱分量,压低音频带内噪声功率水平。
16. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:多通道数字功放器(7)的通道数为2M,每个通道上的数字功放器都是由两个半桥功率放大电路组成的全桥功率放大电路,每个半桥上都有一高边MOSFET和一低边MOSFET。
17. 根据权利要求10所述基于编码转换的数字扬声器驱动装置,其特征在于:数字化扬声器负载(8)的每个数字通道为单个扬声器单元、多个扬声器单元、单个音圈、多个音圈中之一或几者的组合。
18. 根据权利要求10或17所述基于编码转换的数字扬声器驱动装置,其特征在于:数字化扬声器负载(8)的阵列形状,根据扬声器单元数量和实际应用需求进行排列。
PCT/CN2012/085704 2012-04-27 2012-11-30 基于编码转换的数字扬声器驱动方法和装置 WO2013159525A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP12875082.5A EP2843841B1 (en) 2012-04-27 2012-11-30 Method and device for driving digital speaker based on code conversion
US14/397,165 US9300258B2 (en) 2012-04-27 2012-12-03 Method and device for driving digital speaker based on code conversion

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201210128712.2 2012-04-27
CN201210128712.2A CN102684701B (zh) 2012-04-27 2012-04-27 基于编码转换的数字扬声器驱动方法和装置

Publications (1)

Publication Number Publication Date
WO2013159525A1 true WO2013159525A1 (zh) 2013-10-31

Family

ID=46816147

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/085704 WO2013159525A1 (zh) 2012-04-27 2012-11-30 基于编码转换的数字扬声器驱动方法和装置

Country Status (4)

Country Link
US (1) US9300258B2 (zh)
EP (1) EP2843841B1 (zh)
CN (1) CN102684701B (zh)
WO (1) WO2013159525A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112345028A (zh) * 2020-10-30 2021-02-09 中国航空工业集团公司西安航空计算技术研究所 一种多通道电容式液位传感器信号处理系统及方法

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102684701B (zh) * 2012-04-27 2014-07-09 苏州上声电子有限公司 基于编码转换的数字扬声器驱动方法和装置
CN103701465B (zh) 2013-12-02 2016-09-21 苏州上声电子有限公司 一种基于多比特△—σ调制的数字扬声器系统实现方法和装置
CN104022782B (zh) * 2014-06-13 2017-04-12 哈尔滨工程大学 一种数字式多通道模拟信号发生方法
CN104967948B (zh) * 2015-06-16 2019-03-26 苏州茹声电子有限公司 基于调幅和调相的数字扬声器驱动方法和装置
CN106899304B (zh) * 2017-01-19 2020-02-18 电子科技大学 一种基于数据权重平均化方法的多比特sigma-delta调制器及调制方法
US10418044B2 (en) * 2017-01-30 2019-09-17 Cirrus Logic, Inc. Converting a single-bit audio stream to a single-bit audio stream with a constant edge rate
US10509624B2 (en) 2017-01-30 2019-12-17 Cirrus Logic, Inc. Single-bit volume control
WO2018161024A1 (en) * 2017-03-03 2018-09-07 Cirrus Logic International Semiconductor Ltd. Digital pwm modulator
CN110463034B (zh) * 2017-03-27 2021-02-09 华为技术有限公司 数字功率放大器
US11437032B2 (en) 2017-09-29 2022-09-06 Shanghai Cambricon Information Technology Co., Ltd Image processing apparatus and method
EP3651074B1 (en) 2018-02-13 2021-10-27 Shanghai Cambricon Information Technology Co., Ltd Computation device and method
US11507370B2 (en) 2018-02-13 2022-11-22 Cambricon (Xi'an) Semiconductor Co., Ltd. Method and device for dynamically adjusting decimal point positions in neural network computations
US11630666B2 (en) 2018-02-13 2023-04-18 Shanghai Cambricon Information Technology Co., Ltd Computing device and method
CN110162162B (zh) 2018-02-14 2023-08-18 上海寒武纪信息科技有限公司 处理器的控制装置、方法及设备
WO2019218896A1 (zh) 2018-05-18 2019-11-21 上海寒武纪信息科技有限公司 计算方法以及相关产品
CN110624807A (zh) * 2018-06-21 2019-12-31 刘云轩 一种全数字式电磁振动台系统及其工作方法
KR102519467B1 (ko) 2018-08-28 2023-04-06 캠브리콘 테크놀로지스 코퍼레이션 리미티드 데이터 전처리 방법, 장치, 컴퓨터 설비 및 저장 매체
EP3859488A4 (en) 2018-09-28 2022-06-29 Shanghai Cambricon Information Technology Co., Ltd Signal processing device, signal processing method and related product
CN113170205B (zh) * 2018-12-03 2023-11-10 杜比实验室特许公司 整形函数生成方法及装置以及图像解码方法及装置
CN111385462A (zh) 2018-12-28 2020-07-07 上海寒武纪信息科技有限公司 信号处理装置、信号处理方法及相关产品
US10681488B1 (en) * 2019-03-03 2020-06-09 xMEMS Labs, Inc. Sound producing apparatus and sound producing system
US20200334522A1 (en) 2019-04-18 2020-10-22 Cambricon Technologies Corporation Limited Data processing method and related products
CN111832738B (zh) 2019-04-18 2024-01-09 中科寒武纪科技股份有限公司 一种数据处理方法及相关产品
EP3772022A1 (en) 2019-06-12 2021-02-03 Shanghai Cambricon Information Technology Co., Ltd Method for determining quantization parameters in neural network and related products
US11676028B2 (en) 2019-06-12 2023-06-13 Shanghai Cambricon Information Technology Co., Ltd Neural network quantization parameter determination method and related products
CN113408716A (zh) * 2020-03-17 2021-09-17 安徽寒武纪信息科技有限公司 计算装置、方法、板卡和计算机可读存储介质
CN114390400A (zh) * 2020-10-19 2022-04-22 深圳市欧思数码科技有限公司 一种应用于Soc芯片中全数字信号耳机放大器
CN113078802A (zh) * 2021-04-01 2021-07-06 浙江大学 一种基于数字编码的pwm调制方法
CN114125598B (zh) * 2021-11-08 2023-04-28 中国联合网络通信集团有限公司 一种信号传输方法、装置及存储介质

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050180499A1 (en) * 2004-02-17 2005-08-18 Ham-Huah Hsu [circuit and method for pulse width modulation ]
US20060049889A1 (en) 1995-03-31 2006-03-09 1...Limited Digital pulse-width-modulation generator
CN1929778A (zh) * 2004-02-25 2007-03-14 内尔科尔普里坦贝内特公司 具有σ-δ调制的多位adc
US20090161880A1 (en) 2001-03-27 2009-06-25 Cambridge Mechatronics Limited Method and apparatus to create a sound field
CN102404672A (zh) * 2011-10-27 2012-04-04 苏州上声电子有限公司 数字化扬声器阵列系统的通道均衡与波束控制方法和装置
CN102684701A (zh) * 2012-04-27 2012-09-19 苏州上声电子有限公司 基于编码转换的数字扬声器驱动方法和装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL1011002C2 (nl) * 1999-01-12 2000-07-20 Univ Eindhoven Tech Versterkerschakeling.
CN1115770C (zh) * 1999-05-08 2003-07-23 阎文革 1比特全数字高效率功率放大器
US7058463B1 (en) * 2000-12-29 2006-06-06 Nokia Corporation Method and apparatus for implementing a class D driver and speaker system
JP2003051724A (ja) * 2001-08-08 2003-02-21 Sony Corp デジタルパワーアンプ及びデジタルアナログ変換器
US6605991B2 (en) * 2001-08-30 2003-08-12 Motorola, Inc. Circuitry for creating a spectral null in a differential output switching amplifier and method therefor
US6885330B2 (en) * 2003-09-05 2005-04-26 Cirrus Logic, Inc. Data converters with ternary pulse width modulation output stages and methods and systems using the same
JP4154601B2 (ja) * 2003-10-23 2008-09-24 ソニー株式会社 信号変換装置、出力アンプ装置、オーディオ装置および送受信システム
US7692488B2 (en) * 2008-02-28 2010-04-06 Panasonic Corporation Output DC offset protection for class D amplifiers
CN101986721B (zh) * 2010-10-22 2014-07-09 苏州上声电子有限公司 全数字式扬声器装置
CN102404673B (zh) * 2011-11-24 2013-12-18 苏州上声电子有限公司 数字化扬声器系统通道均衡与声场控制方法和装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060049889A1 (en) 1995-03-31 2006-03-09 1...Limited Digital pulse-width-modulation generator
US20090161880A1 (en) 2001-03-27 2009-06-25 Cambridge Mechatronics Limited Method and apparatus to create a sound field
US20050180499A1 (en) * 2004-02-17 2005-08-18 Ham-Huah Hsu [circuit and method for pulse width modulation ]
CN1929778A (zh) * 2004-02-25 2007-03-14 内尔科尔普里坦贝内特公司 具有σ-δ调制的多位adc
CN102404672A (zh) * 2011-10-27 2012-04-04 苏州上声电子有限公司 数字化扬声器阵列系统的通道均衡与波束控制方法和装置
CN102684701A (zh) * 2012-04-27 2012-09-19 苏州上声电子有限公司 基于编码转换的数字扬声器驱动方法和装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2843841A4

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112345028A (zh) * 2020-10-30 2021-02-09 中国航空工业集团公司西安航空计算技术研究所 一种多通道电容式液位传感器信号处理系统及方法
CN112345028B (zh) * 2020-10-30 2024-05-14 中国航空工业集团公司西安航空计算技术研究所 一种多通道电容式液位传感器信号处理系统及方法

Also Published As

Publication number Publication date
CN102684701B (zh) 2014-07-09
EP2843841A1 (en) 2015-03-04
CN102684701A (zh) 2012-09-19
EP2843841B1 (en) 2019-09-18
EP2843841A4 (en) 2016-03-16
US9300258B2 (en) 2016-03-29
US20150110299A1 (en) 2015-04-23

Similar Documents

Publication Publication Date Title
WO2013159525A1 (zh) 基于编码转换的数字扬声器驱动方法和装置
US9942682B2 (en) Implementation method and device of multi-bit modulation-based digital speaker system
US7081793B2 (en) High-efficiency amplifier, converter and methods
JP4116005B2 (ja) デルタシグマ変調器およびそれを用いたスイッチング増幅回路
CN116488594B (zh) 音频放大器系统
EP0906659A4 (en) CIRCUIT FOR PROCESSING SIGNALS OF THE MIXED TYPE WITH SWIMMING OVERSAMPLE AND NOISE SHAPING
US8362832B2 (en) Half-bridge three-level PWM amplifier and audio processing apparatus including the same
US8228222B2 (en) D-class digital amplifier configured for shaping non-idealities of an output signal
TW200908541A (en) Power amplifier and method for reducing common noise of power amplifier
CN1625055A (zh) 字长减少电路
US7782238B2 (en) Asymmetric PWM signal generator, method thereof, and data processing apparatus including the same
US8410963B2 (en) Data converter circuit and method
JP4353598B2 (ja) デルタシグマd/a変換器
KR20220066220A (ko) Sdm 인코더 및 관련 신호 처리 시스템
CN106664065A (zh) 脉冲宽度调制发生器
CN113659939B (zh) 一种基于闭环负反馈的upwm失真校正方法及该方法构建的数字upwm调制器
Furuya et al. Speaker system with 100-W high output power and 0.17% THD using 9-V power supply with digitally direct-driven technique
CN1223031A (zh) 过采样,噪声整形,混合信号处理器
Kulka Application of pulse modulation techniques for class-D audio power amplifiers
CN108011638B (zh) 一种数字射频脉冲调制方法和调制器
Pracný et al. System-level power optimization for a ΣΔ D/A converter for hearing-aid application
Adrian et al. A review of design methods for digital modulators
Yoneya Spread spectrum PWM signal generator for fully digital audio amplifier
TWI311400B (en) Sigma-delta power amplifier and modulation method thereof
JP6129858B2 (ja) オーディオ信号出力オーディオ信号処理装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12875082

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2012875082

Country of ref document: EP