WO2013141339A1 - Carte de câblage multicouche et son procédé de fabrication - Google Patents

Carte de câblage multicouche et son procédé de fabrication Download PDF

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Publication number
WO2013141339A1
WO2013141339A1 PCT/JP2013/058229 JP2013058229W WO2013141339A1 WO 2013141339 A1 WO2013141339 A1 WO 2013141339A1 JP 2013058229 W JP2013058229 W JP 2013058229W WO 2013141339 A1 WO2013141339 A1 WO 2013141339A1
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WO
WIPO (PCT)
Prior art keywords
interlayer connection
wiring board
connection conductor
multilayer wiring
cross
Prior art date
Application number
PCT/JP2013/058229
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English (en)
Japanese (ja)
Inventor
喜人 大坪
Original Assignee
株式会社村田製作所
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Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2013141339A1 publication Critical patent/WO2013141339A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709—Staggered pads, lands or terminals; Parallel conductors in different planes

Definitions

  • the present invention relates to a multilayer wiring board provided with an interlayer connection conductor and a method for manufacturing the multilayer wiring board.
  • Patent Document 1 proposes a technique for reducing the size of a module by multilayering a wiring board constituting the module to change the wiring structure formed in the module circuit to a three-dimensional wiring structure.
  • the multilayer wiring board 200 is composed of a stacked body of a plurality of insulating layers 201.
  • an in-plane electrode 202 is formed on the front surface or the back surface, and in-plane formed on each insulating layer 201.
  • An interlayer connection conductor 203 that connects the electrodes 202 is formed.
  • the density of the in-plane electrodes 202 formed on each insulating layer 201 of the multilayer wiring board 200 has been increasing.
  • the area where the interlayer connection conductor 203 for connecting the in-plane electrodes 202 can be arranged is small. If the interlayer connection conductor 203 is to be arranged in this limited area, the interlayer connection conductor 203 must be formed small. I must.
  • the interlayer connection conductor 203 is made small, for example, the cross-sectional area thereof is reduced, the connection area between the interlayer connection conductor 203 and the in-plane electrode 202 is reduced, so that the connection reliability is reduced, and the in-plane of the connection target Even when the electrodes 202 are connected by the plurality of interlayer connection conductors 203 formed across the plurality of insulating layers 201, the connection reliability between the interlayer connection conductors 203 is lowered. Furthermore, when this multilayer wiring board 200 is used in a high frequency module, the surface area of the interlayer connection conductor 203 decreases as the interlayer connection conductor 203 becomes smaller, so that the high frequency characteristics deteriorate due to the skin effect. Problems arise. Therefore, in order to solve these problems, a technique for forming the interlayer connection conductor 203 having the largest possible cross-sectional area within a limited region is required.
  • the interlayer connection conductor 203 is usually formed in a circular or rectangular cross section by laser or punching.
  • the limited area described above has a circular or rectangular shape in plan view and an irregular shape.
  • the interlayer connection conductor 203 cannot be formed with a cross section adapted to a limited region. Therefore, conventionally, the interlayer connection conductor 203 is formed by forming a single through hole in each insulating layer 201 having a maximum cross-sectional area (circular or rectangular) in a range that does not protrude from the limited region.
  • a method of forming the interlayer connection conductor 203 cannot be said to make effective use of a limited area.
  • the present invention has been made in view of the above-described problems, and an object thereof is to provide a multilayer wiring board having an interlayer connection conductor having a larger cross-sectional area and surface area, and a method for manufacturing the same.
  • a multilayer wiring board according to the present invention is different from the in-plane electrodes formed on at least two insulating layers in a multilayer wiring board formed by laminating a plurality of insulating layers.
  • An interlayer connection conductor that connects the in-plane electrodes that are formed in an insulating layer and at least a portion of which overlaps in plan view, and the interlayer connection conductor is a portion in which the double-sided electrodes to be connected overlap in plan view
  • a conductive region is provided in an interlayer connection hole formed by connecting a plurality of through-holes having a predetermined cross-sectional shape formed in the connection region.
  • Each of the through-holes is formed so that the cross-section of the through-hole is partially overlapped with the cross-section of the other through-holes adjacent to each other.
  • the interlayer connection conductor is formed by forming the interlayer connection hole formed by coupling a plurality of through holes to the connection region set in the insulating layer, it is protruded from the connection region as in the past.
  • the interlayer has a large cross-sectional area and surface area.
  • a multilayer wiring board provided with a connection conductor can be provided.
  • connection area between the in-plane electrode and the interlayer connection conductor can be increased by forming the cross-sectional area of the interlayer connection conductor large, the connection strength and connection reliability of both can be improved. Moreover, even if the laminated positions of the insulating layers are shifted, the in-plane electrodes that are the connection targets can be reliably connected to each other.
  • the surface area of the interlayer connection conductor increases as the cross-sectional area of the interlayer connection conductor increases, for example, when this multilayer wiring board is used in a high-frequency module, the resistance value decreases due to the skin effect. Thus, it is possible to suppress the deterioration of the high frequency characteristics due to the formation of the interlayer connection conductor on the multilayer wiring board.
  • the interlayer connection conductor having a larger cross-sectional area and surface area than the conventional one can be formed in a limited region where the interlayer connection conductor can be disposed, the above-described decrease in connection strength and connection reliability, etc.
  • the interlayer connection hole may be formed by combining the through holes including the through holes having different cross-sectional areas.
  • the part where the cross-sectional area of the through-hole can be increased in the connection region forms a through-hole with a large cross-sectional area, and the part that cannot be formed large forms a through-hole with a small cross-sectional area.
  • Interlayer connection holes can be formed, so the total number of through holes can be reduced compared to a configuration in which an interlayer connection hole is formed by combining multiple through holes with a small cross-sectional area in the connection region. Hole machining costs can be reduced.
  • the interlayer connection conductor may be formed across a plurality of the insulating layers disposed between the electrodes in both sides. In this case, since the cross-sectional area of each interlayer connection conductor formed in each insulating layer is large, the connection area between the interlayer connection conductors is increased, and the connection strength and connection reliability of both can be improved.
  • the surface area of the interlayer connection conductor is large, when the interlayer connection conductor is used as a heat dissipation conductor, the heat dissipation can be improved.
  • the method for manufacturing a multilayer wiring board is a method for manufacturing a multilayer wiring board in which in-plane electrodes formed on different insulating layers are connected by an interlayer connection conductor, and at least one of the in-plane electrode and the interlayer connection conductor.
  • a connection region is set in the insulating sheet between the electrodes in both surfaces where the electrodes in the both surfaces overlap in plan view, and a plurality of adjacent cross-sections of the through holes overlap in the connection region in plan view. After the through holes are formed, a conductive material is provided in each through hole to form the interlayer connection conductor.
  • each through hole may be formed by laser processing. Since laser processing can perform fine drilling at high speed, the processing time of the interlayer connection hole can be shortened.
  • the insulating sheet may be a ceramic green sheet or a resin sheet.
  • the insulating layer is formed of a ceramic green sheet or a resin sheet, a multilayer wiring board having an interlayer connection conductor having a large cross-sectional area can be manufactured.
  • an interlayer connection conductor is formed by forming an interlayer connection hole in which a plurality of through holes are coupled to a connection region set in an insulating layer.
  • an interlayer connection conductor is formed by forming a single through hole in each insulating layer having a maximum cross section (circular or rectangular shape) in a range that does not protrude, the cross-sectional area and surface area are reduced.
  • a multilayer wiring board provided with a large interlayer connection conductor can be provided.
  • a multilayer wiring board according to an embodiment of the present invention will be described with reference to FIGS.
  • the module 1 using the multilayer wiring board 5 includes a multilayer wiring board 5 in which in-plane electrodes 3 and interlayer connection conductors 4 are formed on each insulating layer 2, and an electronic device mounted on the multilayer wiring board 5.
  • Examples of such a module include a Bluetooth (registered trademark) module, a wireless LAN module, and an antenna switch module disposed immediately below an antenna of a mobile phone.
  • the multilayer wiring board 5 is a laminate of a plurality of insulating layers 2 in which each insulating layer 2 is formed of glass epoxy resin, low temperature co-fired ceramic (LTCC) or the like. An electrode 3 is formed, and an interlayer connection conductor 4 that connects the in-plane electrodes 3 formed on each insulating layer 2 in the stacking direction is formed inside. In addition, the manufacturing method of this multilayer wiring board 2 is demonstrated below.
  • the electronic component 6 is composed of a semiconductor element in which various circuits are formed on an active surface, a passive component such as a chip capacitor, a chip inductor, and a chip resistor.
  • the electronic component 6 is formed on the multilayer wiring board 5 using a known surface mounting technique. Implemented.
  • FIG. 2A is a plan view of a region A in FIG. 1, and FIG. 2B is a cross-sectional view of the interlayer connection conductor 4.
  • FIG. 2 (a) and 2 (b) indicate the connection region 8 set in the insulating layer 2
  • the broken line in FIG. 2 (b) indicates the insulating layer 2 in the process of forming the interlayer connection conductor 4.
  • the part which overlapped with the adjacent through-hole 7 among the outer periphery of the cross section of the several through-hole 7 formed is shown.
  • the interlayer connection conductor 4 is formed in different insulating layers 2 and connects the in-plane electrodes 3 at least partially overlapping in a plan view in the stacking direction.
  • the in-plane electrodes 3 to be connected are planar.
  • a conductive material such as Cu is formed in the interlayer connection hole 9 formed by joining a plurality of through holes 7 formed in the connection region 8 set in the insulating layer 2 between the inner electrodes 3 on both sides. Is formed.
  • the connection region 8 set in the insulating layer 2 is a portion where the double-sided inner electrodes 3a and 3b to be connected to the interlayer connection conductor 4 overlap in plan view.
  • connection region 8 is a portion where the double-sided inner electrodes 3 overlap in plan view, and other regions formed on the insulating layer 2 between the double-sided inner electrodes 3.
  • the region is set so as not to overlap with the in-plane electrode 3 in plan view.
  • a rectangular connection area is set in the insulating layer 2 in a plan view, and the cross section has a predetermined shape (this area) In the embodiment, a circular shape), and two through holes 7 having the same cross-sectional area are formed.
  • each of the through holes 7 is formed such that the cross section thereof partially overlaps the cross section of the other through hole 7, so that both the through holes 7 are coupled to form one interlayer connection hole 9. Is done.
  • a conductive material is provided in the interlayer connection hole 9 to form the interlayer connection conductor 4.
  • the cross section of each through-hole 7 is formed with the maximum area that can be formed in the connection region.
  • the interlayer connection conductor 4 was formed with only one through-hole 7, and thus formed by a conventional method.
  • the cross-sectional area of the interlayer connection conductor is smaller than the cross-sectional area of the interlayer connection conductor 4 of this embodiment.
  • FIG. 3 (a) to 3 (c) are process diagrams showing a process of forming the interlayer connection conductor 4 and the in-plane electrode 3 connected to the interlayer connection conductor 4, and a cross section of the ceramic green sheet 2a is shown. Partially shown. Moreover, the dashed-dotted line of FIG. 3A shows each through-hole 7 formed in the insulating layer 2.
  • a ceramic green sheet 2a for forming each insulating layer 2 is produced.
  • a ceramic material for example, a mixture of barium oxide, silicon oxide, alumina, calcium oxide and boron oxide, a ceramic that becomes a filler such as alumina, and a glass such as borosilicate glass and silicon oxide is prepared. To do. Then, a solvent is added to and mixed with these ceramic materials, and a resin binder and a plasticizer are further added to produce a ceramic slurry. The ceramic slurry is molded to produce a ceramic green sheet 2a having a thickness of about 20 to 200 ⁇ m. .
  • each ceramic green sheet 2a is irradiated with a laser beam a plurality of times so as to be connected to different positions on the set connection region 8, whereby each through-hole 7 (this In the embodiment, two) each is formed so that the cross-section thereof partially overlaps the cross-section of the other through-hole 7 adjacent to each other, whereby one through-hole connection hole formed by coupling the respective through-holes 7 9 is formed.
  • the interlayer connection conductor 4 is formed by filling the interlayer connection hole 9 with a conductive paste (for example, a mixture of a binder resin composed of Cu powder and ethyl cellulose and a solvent).
  • a conductive paste for example, a mixture of a binder resin composed of Cu powder and ethyl cellulose and a solvent.
  • an in-plane electrode 3 having a predetermined shape is formed on the ceramic green sheet 2a using a conductive paste by a printing technique or the like.
  • the process from the production of the ceramic green sheet 2a to the formation of the in-plane electrode 3 corresponds to a preparation process in the present invention.
  • the ceramic green sheets 2a are laminated in a predetermined order, and are bonded by, for example, a hydrostatic pressure method to form a ceramic laminated body (forming process).
  • the ceramic laminate is fired to manufacture the multilayer wiring board 5.
  • the step of filling the interlayer connection hole 9 with the conductive paste and the step of forming the in-plane electrode 3 may be performed simultaneously.
  • FIG. 4A to 4E are process diagrams showing a process of forming the interlayer connection conductor 4 and the in-plane electrode 3 connected to the interlayer connection conductor 4, and a cross section of the resin sheet 2b is partially shown. Show. Moreover, the dashed-dotted line of FIG.4 (b) to (d) has shown each through-hole 7 formed in the resin sheet 2b.
  • a resin sheet 2b made of a thermoplastic resin such as liquid crystal polymer (LCP) or polyether ether ketone (PEEK) is prepared, and Cu foil or the like is formed on the main surface of the resin sheet 2b.
  • the metal foil 10 is pasted.
  • interlayer connection holes 9 are formed in the resin sheet 2b in the same manner as in the case where the insulating layer 2 is the ceramic green sheet 2a. At this time, the laser beam is irradiated from the surface of the resin sheet 2b where the metal foil 10 is not formed.
  • a resist pattern 11 is formed on the metal foil 10 using a printing technique or the like as a mask when the in-plane electrode 3 is formed by etching.
  • the in-plane electrode 3 is formed by removing the excess metal foil 10 by etching. At this time, either a positive type or a negative type may be adopted as an etching method.
  • the in-plane electrode 3 may be formed by pasting a previously patterned metal foil 10 on a predetermined position of the resin sheet 2b. In this manufacturing method, the interlayer connection hole 9 is formed before the in-plane electrode 3 is formed, but the order may be reversed.
  • the interlayer connection conductor 4 is formed by filling the interlayer connection hole 9 of each resin sheet 2b with a conductive paste containing Cu, Ag, or the like. At this time, the conductive paste is filled using a printing technique or the like.
  • the process from the production of the resin sheet 2b to the formation of the interlayer connection conductor 4 corresponds to the preparation process in the present invention.
  • the resin sheets 2b are laminated in a predetermined order to form a resin sheet 2b laminate, and the laminate is pressure-bonded by applying a vacuum press to manufacture the multilayer wiring board 5 (forming process).
  • the pressure bonding temperature is preferably about 250 ° C. to 350 ° C., for example. Note that the resin sheet 2b does not need to be pressure-bonded in a lump, and may be pressure-bonded for each sheet 2b or each time a plurality of sheets 2b are stacked.
  • the interlayer connection conductor 4 is formed by forming the interlayer connection hole 9 formed by combining the plurality of through holes 7 in the connection region 8 set in the insulating layer 2.
  • the interlayer connection conductor 4 is formed by forming the interlayer connection hole 9 formed by combining the plurality of through holes 7 in the connection region 8 set in the insulating layer 2.
  • connection area between the in-plane electrode 3 and the interlayer connection conductor 4 can be increased by forming the cross-sectional area of the interlayer connection conductor 4 large, the connection strength and connection reliability of both can be improved. Moreover, even if the laminated positions of the insulating layers 2 are shifted, the in-plane electrodes 3 that are the connection targets can be reliably connected to each other.
  • the surface area of the interlayer connection conductor 4 increases as the cross-sectional area of the interlayer connection conductor 4 increases, for example, when the multilayer wiring board 5 is used in a high frequency module, the resistance due to the skin effect is increased. The value becomes low, and deterioration of the high frequency characteristics due to the formation of the interlayer connection conductor 4 on the multilayer wiring board 5 can be suppressed.
  • the interlayer connection conductor 4 having a larger cross-sectional area and surface area than the conventional one can be formed in a limited region where the interlayer connection conductor 4 can be disposed, the above-described connection strength and connection reliability are lowered.
  • the surface area of the interlayer connection conductor 4 is large, when the interlayer connection conductor 4 is used as a heat dissipation conductor, the heat dissipation can be improved.
  • each insulating layer 2 is irradiated with laser light a plurality of times so as to be connected to different positions, whereby each through-hole 7 is respectively connected to the other through-hole 7 whose cross section is adjacent.
  • the interlayer connection conductor 4 is formed by forming one interlayer connection hole 9 formed by coupling the through holes 7 to form a part of the interlayer having a large cross-sectional area.
  • the multilayer wiring board 5 provided with the connection conductor 4 can be manufactured.
  • This manufacturing method can also be applied to the case where the insulating layer 2 is formed of the ceramic green sheet 2a or the resin sheet 2b. Therefore, the insulating layer 2 is formed of the ceramic green sheet 2a or the resin sheet 2b.
  • the multilayer wiring board 5 including the interlayer connection conductor 4 having a large cross-sectional area can be manufactured.
  • each through hole 7 is formed by laser processing capable of performing fine drilling at high speed, the processing time of the interlayer connection hole 9 can be shortened.
  • FIGS. 5A to 5E are modifications of the interlayer connection conductor 4 in the case where the interlayer connection hole 9 is formed by a plurality of through holes 7 having the same cross-sectional area.
  • FIGS. (C) is a modification of the interlayer connection conductor 4 when the interlayer connection hole 9 is formed by a plurality of through holes 7 including the through holes 7 having different cross-sectional areas. 2 that are the same as those in FIG. 2 are the same as or equivalent to those in FIG.
  • connection region 8 has the same rectangular shape as in FIG. 2, and a plurality of through-holes 7 having a cross-sectional area smaller than the cross-sectional area of each through-hole 7 shown in FIG.
  • the interlayer connection conductor 4 is formed by forming the interlayer connection hole 9
  • the interlayer connection conductor 4 having a larger cross-sectional area and surface area than the interlayer connection conductor 4 shown in FIG. 2 can be formed.
  • connection region 8 is a square
  • connection region 8 is a square
  • An interlayer connection conductor having a large area can be formed.
  • FIG. 5B by combining a plurality of through holes 7 having a smaller cross sectional area than this through hole, an interlayer having a larger cross sectional area and surface area can be formed.
  • the connection conductor 4 can be formed.
  • connection region 8 has a convex shape (FIG. 5C), an L shape (FIG. 5D), or an irregular shape (FIG. 5E), a plurality of connection regions 8 are shown as shown in each figure.
  • the interlayer connection conductor 4 having a larger cross-sectional area and surface area can be formed as compared with the conventional case.
  • connection region 8 has the same rectangular shape as that of FIG. 2 and FIG. 5 (a), and the through-hole has a maximum cross section in a range not protruding from the connection region 8.
  • the interlayer connection conductor 4 is formed by combining the through hole 7 having a smaller cross-sectional area with the cross-sectional area 7, the interlayer connection conductor 4 having a larger cross-sectional area and surface area than the interlayer connection conductor 4 shown in FIG. be able to.
  • the total number of through holes 7 can be reduced as compared with the interlayer connection conductor 4 shown in FIG. 5A, the processing time and processing cost of the interlayer connection hole 9 can be reduced, and the interlayer connection conductor having a large cross-sectional area and large surface area. Since 4 can be formed efficiently, it is practical.
  • connection region 8 has an irregular shape (FIG. 6A) and a triangular shape (FIG. 6B)
  • a plurality of different cross-sectional areas are provided.
  • the interlayer connection conductor 4 By forming the interlayer connection conductor 4 by combining the through holes 7, the interlayer connection conductor 4 having a larger cross-sectional area and surface area than the interlayer connection conductor formed by the conventional method can be formed.
  • the interlayer connection conductor 4 may be formed across a plurality of insulating layers 2 arranged between the in-plane electrodes 3 to be connected.
  • an interlayer connection conductor 4 is formed by each of the plurality of insulating layers 2 arranged between the in-plane electrodes 3, and the in-plane electrodes 3 are connected via the plurality of interlayer connection conductors 4.
  • the cross section of the through hole 7 is not limited to a circular shape, and may be formed in a rectangular shape, for example.
  • the through hole 7 can be formed by punching or the like.
  • the interlayer connection conductor 4 is formed on only a part of the plurality of interlayer connection conductors 4 formed on the multilayer wiring board 5, and the remainder is formed by a single through-hole 7 in the conventional method. It does not matter even if it is the composition to do. In this way, the total number of through holes 7 formed in the multilayer wiring board 5 can be reduced by forming the interlayer connection conductors 4 that do not need to have a large cross-sectional area by the conventional method. The manufacturing time of the substrate 5 can be shortened and the manufacturing cost can be reduced. Further, a part of the interlayer connection conductor 4 may be arranged so as to protrude from the in-plane electrode 3 as shown in FIG.
  • the present invention can be applied to various multilayer wiring boards provided with interlayer connection conductors.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Le but de la présente invention est d'obtenir une carte de câblage multicouche qui a un conducteur de connexion intercouche ayant une aire de section transversale latérale et une aire de surface plus grandes. Une carte de câblage multicouche formée par empilement d'une pluralité de couches isolantes (2), dans laquelle la carte de câblage multicouche est pourvue d'électrodes dans le plan (3a, 3b) formées dans au moins deux couches isolantes (2), et un conducteur de connexion intercouche (4) pour relier ensemble les électrodes dans le plan (3a, 3b) qui sont formées dans différentes couches isolantes (2) et qui se chevauchent au moins partiellement en vue de plan. Le conducteur de connexion intercouche (4) est formé de telle sorte qu'une zone de connexion (8) est établie dans les couches isolantes (2) entre les électrodes dans le plan (3a, 3b) devant être connectées, dans la partie où les électrodes dans le plan (3a, 3b) devant être connectées se chevauchent en vue de plan, et de telle sorte qu'un matériau électro conducteur est prévu dans un trou de connexion intercouche (9) formé dans la région de connexion (8) et obtenu par l'assemblage d'une pluralité de trous traversants (7) ayant une forme prédéterminée en section transversale latérale. Chacun des trous traversants (7) est formé de sorte que sa section transversale latérale chevauche partiellement la section transversale latérale d'un trou traversant adjacent (7).
PCT/JP2013/058229 2012-03-23 2013-03-22 Carte de câblage multicouche et son procédé de fabrication WO2013141339A1 (fr)

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JP2012067413 2012-03-23
JP2012-067413 2012-03-23

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WO2013141339A1 true WO2013141339A1 (fr) 2013-09-26

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN104853518A (zh) * 2014-02-17 2015-08-19 Lg伊诺特有限公司 印刷电路板及其制造方法
CN109119400A (zh) * 2018-09-25 2019-01-01 中国电子科技集团公司第四十三研究所 高载流能力多层陶瓷基板及其制作方法
EP4106499A1 (fr) * 2021-06-18 2022-12-21 Rohde & Schwarz GmbH & Co. KG Procédé de fabrication d'un matériau porteur et matériau porteur ayant des propriétés de refroidissement
CN115884509A (zh) * 2021-09-27 2023-03-31 荣耀终端有限公司 柔性电路板、电路板组件以及电子设备

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JPH0779079A (ja) * 1993-09-09 1995-03-20 Nec Corp セラミック多層配線基板
JPH11135948A (ja) * 1997-10-30 1999-05-21 Kyocera Corp 多層回路基板
JP2003086948A (ja) * 2000-12-14 2003-03-20 Denso Corp 多層基板の製造方法およびその製造方法によって形成される多層基板
JP2004134378A (ja) * 2002-07-17 2004-04-30 Ngk Spark Plug Co Ltd 銅ペーストとそれを用いた配線基板
JP2010199318A (ja) * 2009-02-25 2010-09-09 Kyocera Corp 配線基板及びそれを備えた実装構造体

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Publication number Priority date Publication date Assignee Title
JPH0779079A (ja) * 1993-09-09 1995-03-20 Nec Corp セラミック多層配線基板
JPH11135948A (ja) * 1997-10-30 1999-05-21 Kyocera Corp 多層回路基板
JP2003086948A (ja) * 2000-12-14 2003-03-20 Denso Corp 多層基板の製造方法およびその製造方法によって形成される多層基板
JP2004134378A (ja) * 2002-07-17 2004-04-30 Ngk Spark Plug Co Ltd 銅ペーストとそれを用いた配線基板
JP2010199318A (ja) * 2009-02-25 2010-09-09 Kyocera Corp 配線基板及びそれを備えた実装構造体

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104853518A (zh) * 2014-02-17 2015-08-19 Lg伊诺特有限公司 印刷电路板及其制造方法
EP2911485A1 (fr) * 2014-02-17 2015-08-26 LG Innotek Co., Ltd. Carte à circuit imprimé et procédé de fabrication correspondant
US9801275B2 (en) 2014-02-17 2017-10-24 Lg Innotek Co., Ltd. Printed circuit board and method of manufacturing the same
CN109119400A (zh) * 2018-09-25 2019-01-01 中国电子科技集团公司第四十三研究所 高载流能力多层陶瓷基板及其制作方法
CN109119400B (zh) * 2018-09-25 2024-04-09 中国电子科技集团公司第四十三研究所 高载流能力多层陶瓷基板及其制作方法
EP4106499A1 (fr) * 2021-06-18 2022-12-21 Rohde & Schwarz GmbH & Co. KG Procédé de fabrication d'un matériau porteur et matériau porteur ayant des propriétés de refroidissement
CN115884509A (zh) * 2021-09-27 2023-03-31 荣耀终端有限公司 柔性电路板、电路板组件以及电子设备

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