WO2013097126A1 - 电路基板及其制作方法 - Google Patents

电路基板及其制作方法 Download PDF

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Publication number
WO2013097126A1
WO2013097126A1 PCT/CN2011/084870 CN2011084870W WO2013097126A1 WO 2013097126 A1 WO2013097126 A1 WO 2013097126A1 CN 2011084870 W CN2011084870 W CN 2011084870W WO 2013097126 A1 WO2013097126 A1 WO 2013097126A1
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WO
WIPO (PCT)
Prior art keywords
glass film
resin
glass
circuit board
circuit substrate
Prior art date
Application number
PCT/CN2011/084870
Other languages
English (en)
French (fr)
Inventor
苏民社
刘潜发
Original Assignee
广东生益科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 广东生益科技股份有限公司 filed Critical 广东生益科技股份有限公司
Priority to US14/368,437 priority Critical patent/US20140377534A1/en
Priority to PCT/CN2011/084870 priority patent/WO2013097126A1/zh
Publication of WO2013097126A1 publication Critical patent/WO2013097126A1/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/18—Layered products comprising a layer of synthetic resin characterised by the use of special additives
    • B32B27/20—Layered products comprising a layer of synthetic resin characterised by the use of special additives using fillers, pigments, thixotroping agents
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/28—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42
    • B32B27/281—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42 comprising polyimides
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/28—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42
    • B32B27/283—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42 comprising polysiloxanes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/28—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42
    • B32B27/285—Layered products comprising a layer of synthetic resin comprising synthetic resins not wholly covered by any one of the sub-groups B32B27/30 - B32B27/42 comprising polyethers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/30—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers
    • B32B27/302—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers comprising aromatic vinyl (co)polymers, e.g. styrenic (co)polymers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/32—Layered products comprising a layer of synthetic resin comprising polyolefins
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/32—Layered products comprising a layer of synthetic resin comprising polyolefins
    • B32B27/322—Layered products comprising a layer of synthetic resin comprising polyolefins comprising halogenated polyolefins, e.g. PTFE
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/36—Layered products comprising a layer of synthetic resin comprising polyesters
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/38—Layered products comprising a layer of synthetic resin comprising epoxy resins
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/42—Layered products comprising a layer of synthetic resin comprising condensation resins of aldehydes, e.g. with phenols, ureas or melamines
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar form; Layered products having particular features of form
    • B32B3/10—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar form; Layered products having particular features of form characterised by a discontinuous layer, i.e. formed of separate pieces of material
    • B32B3/18—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar form; Layered products having particular features of form characterised by a discontinuous layer, i.e. formed of separate pieces of material characterised by an internal layer formed of separate pieces of material which are juxtaposed side-by-side
    • B32B3/20—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar form; Layered products having particular features of form characterised by a discontinuous layer, i.e. formed of separate pieces of material characterised by an internal layer formed of separate pieces of material which are juxtaposed side-by-side of hollow pieces, e.g. tubes; of pieces with channels or cavities
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/02—Synthetic macromolecular particles
    • B32B2264/0214—Particles made of materials belonging to B32B27/00
    • B32B2264/0257—Polyolefin particles, e.g. polyethylene or polypropylene homopolymers or ethylene-propylene copolymers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/102—Oxide or hydroxide
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/104—Oxysalt, e.g. carbonate, sulfate, phosphate or nitrate particles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/105—Metal
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/107—Ceramic
    • B32B2264/108—Carbon, e.g. graphite particles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/70—Other properties
    • B32B2307/704—Crystalline
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/70—Other properties
    • B32B2307/732—Dimensional properties
    • B32B2307/734—Dimensional stability
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1056—Perforating lamina
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249982—With component specified as adhesive or bonding agent
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249982—With component specified as adhesive or bonding agent
    • Y10T428/249985—Composition of adhesive or bonding component specified

Definitions

  • the present invention relates to a circuit board for a printed circuit and a method of fabricating the same. Background technique
  • the dimensional stability of the circuit substrate is required to be higher and higher, in order to reduce the thermal stress generated during the thermal shock process of the circuit substrate, and to satisfy the components in the installation and assembly process.
  • the hole alignment is accurate, and the substrate is required to be in the direction of ⁇ , ⁇ , ⁇
  • the X, ⁇ , and ⁇ directions are the length, width, and thickness direction of the board, respectively).
  • the copper clad laminate is generally made of glass fiber cloth as a reinforcing material, and the glass fiber cloth is limited by the manufacturing process, and the void ratio of the woven material is large, and the ratio of the glass fiber cloth to the resin in the coated copper plate material is affected (
  • the glass accounts for less than 45% by volume of the total volume of the glass fiber cloth and the resin, and the CTE of the copper-clad board X and the ⁇ direction is about 16-18 ppm/°C.
  • U.S. Patent Application No. 20040037950A1 uses a thin glass film instead of a glass fiber cloth for the production of a copper clad laminate.
  • This patent application discloses that the structure of a multilayered board is composed of a glass film, a resin layer and a copper foil layer, but this patent application does not disclose how to obtain a good bonding force between the glass film surface and the resin layer. Since the surface of the glass film is smooth, the resin layer cannot form a good bonding force with the resin layer, so that the circuit copper wire attached to the resin layer is easily peeled off from the glass film along with the resin layer, thereby causing this manner. The reliability of the fabricated CCL in PCB fabrication, assembly of PCB components, and the use of electronic products is not high, resulting in the retirement of electronic products. Summary of the invention
  • Another object of the present invention is to provide a circuit substrate produced by using the above porous glass film, and controlling the number of pores in the glass film so that the volume percentage of the glass (relative to the whole glass film) is 45% or more, so that the circuit substrate The CTE in the X and Y directions is reduced compared to the original.
  • a further object of the present invention is to provide a method for fabricating a circuit substrate, which uses a porous glass film as a carrier material, has good formability, and has a process operation cylinder.
  • the present invention provides a circuit substrate comprising a porous glass film having a volume percentage of 45% or more of glass, a resin bonding layer respectively located on both sides of the glass film, and a resin bonding layer located at the resin
  • the metal foil on the outer side of the bonding layer, the glass film, the resin bonding layer, and the metal foil are bonded together by pressing, and the resin of the resin bonding layer is filled in the pores of the glass film.
  • the glass film in the glass film occupies a volume percentage of between 45% and 90%.
  • the glass film has a volume percentage of between 65% and 80%.
  • the glass component of the glass film is an aluminosilicate glass having an alkali metal oxide of less than 0.3% by weight or a borosilicate glass having an alkali metal oxide of less than 0.3% by weight.
  • the thickness of the glass film is selected to be between 20 ⁇ m and 1.1 mm.
  • the pores in the glass film are uniformly distributed, and the pore diameter is from 20 ⁇ m to 300 ⁇ m.
  • the surface of the glass film is subjected to roughening treatment.
  • the resin in the resin bonding layer is selected from the group consisting of epoxy resins, cyanate resins, phenol resins, polyphenylene ether resins, polybutadiene resins, polybutadiene and styrene copolymer resins, and polytetrafluoroethylene trees.
  • PCT polybenzoxazine resin, polyimide, silicone-containing resin, bismaleimide triazine resin,
  • One or more of LCP resin and bismaleimide resin are One or more of LCP resin and bismaleimide resin.
  • the resin bonding layer contains a powder filler selected from the group consisting of crystalline silica, molten silica, spherical silica, barium titanate, barium titanate, barium titanate. , boron nitride, aluminum nitride, silicon carbide, aluminum oxide, titanium dioxide, glass powder, glass chopped fibers, talc, mica powder, carbon black, carbon nanotubes, metal powder, polyphenylene sulfide and PTFE powder
  • a powder filler selected from the group consisting of crystalline silica, molten silica, spherical silica, barium titanate, barium titanate. , boron nitride, aluminum nitride, silicon carbide, aluminum oxide, titanium dioxide, glass powder, glass chopped fibers, talc, mica powder, carbon black, carbon nanotubes, metal powder, polyphenylene sulfide and PTFE powder
  • One or more of the powder fillers have a median particle diameter of
  • the present invention also provides a method for fabricating the above circuit substrate, comprising the following steps: Step 1: providing a porous glass film having a volume fraction of 45% or more of glass; Step 2: superposing on both sides of the glass film One or several prepregs;
  • Step 3 Laminating a metal foil on each side of the prepreg that is not in contact with the glass film;
  • Step 4 placing the laminated laminate into a press for hot pressing to obtain the circuit substrate, and curing temperature is 100° C ⁇ 400 ° C, curing pressure is 10Kg / cm 2 ⁇ 65Kg / cm 2 .
  • the pores in the glass film are uniformly distributed, and the pore diameter is from 20 ⁇ m to 300 ⁇ m, and is processed by laser, mechanical or chemical selective etching.
  • the present invention also provides another manufacturing method of the above circuit substrate, comprising the following steps: Step 1: providing a porous glass film having a volume fraction of 45% or more of glass; Step 2: respectively on both sides of the glass film Laminating a resin coated metal foil;
  • Step 3 The laminated laminate is placed in a press for hot pressing to obtain the circuit substrate, the curing temperature is 100 ° C to 400 ° C, and the curing pressure is 10 Kg / cm 2 ⁇ 65 Kg / cm 2 .
  • the pores in the glass film are uniformly distributed, and the pore diameter is from 20 ⁇ m to 300 ⁇ m, and is processed by laser, mechanical or chemical selective etching.
  • a porous glass film is used as a carrier material because the resin can enter the pores of the glass film to function as a pin, so that the resin bonding layer has a good bonding force with the glass;
  • the amount of pores in the glass film is controlled so that the volume fraction of the glass (relative to the whole glass film) is more than 45%, so that the CTE of the X, ⁇ , and ⁇ directions of the circuit substrate and the original glass fiber cloth are used as the reinforcing material.
  • the copper clad laminate Compared with the copper clad laminate;
  • FIG. 1 is a schematic structural view of a circuit substrate of the present invention. detailed description
  • the circuit substrate of the present invention comprises a glass film 10 having a porosity percentage of 45% or more (relative to a monolithic glass film) occupied by glass, and resins respectively located on both sides of the glass film 10.
  • the adhesive layer 20 and the metal foil 30 located outside the resin adhesive layer 20, the glass film 10, the resin adhesive layer 20, and the metal foil 30 are bonded together by pressing, and the resin of the resin adhesive layer 20 It is filled in the pores 11 of the glass film 10.
  • volume percentage occupied by glass refers to the glass of porous 11 The ratio of the volume of the glass in the glass film 10 to the sum of the volumes of the glass and the pores 11 in the glass film 10.
  • the glass in the glass film 10 occupies a volume percentage of between 45% and 90%.
  • the volume fraction of the glass is more than 90%, the resin filled in the pores 11 of the glass film 10 is too small, and as a result of the good peel strength being improved, when the volume fraction of the glass is less than 45%, the glass film 10 is The pores 11 are filled with too much resin, and the effect of improving the C, X, Y, and C directions is not obtained.
  • the resin in the resin bonding layer 20 is selected from the group consisting of an epoxy resin, a cyanate resin, a phenolic resin, a polyphenylene ether resin, a polybutadiene resin, a polybutadiene and a styrene copolymer resin, and a polytetraethylene resin.
  • the glass component of the glass film 10 is preferably an aluminosilicate glass having an alkali metal oxide of less than 0.3% by weight or a borosilicate glass having an alkali metal oxide of less than 0.3% by weight.
  • the thickness of the glass film 10 may be selected from the range of 20 ⁇ m to 1.1 mm.
  • the pores 11 in the glass film 10 are uniformly distributed, and have a pore diameter of 20 ⁇ m to 300 ⁇ m, which is processed by laser, mechanical or chemical selective etching.
  • the surface of the glass film 10 may also be roughened by one or more of brushing, chemical etching, frosting, sol-gel method, and mechanical polishing. Increasing the contact area allows the glass film 10 to achieve a better bond with the resin.
  • the above-mentioned resin bonding layer 20 may further contain a powder filler, and the powder filler serves the purpose of improving dimensional stability and lowering CTE.
  • the above-mentioned resin adhesive layer 20 may further contain a fluoropolymer having a low dielectric loss in an amount of from 0 to 70% by volume based on the total amount of the fluoropolymer and the powder filler.
  • the powder filler is selected from the group consisting of crystalline silica, molten silica, spherical silica, barium titanate, barium titanate, barium titanate, boron nitride, aluminum nitride, silicon carbide, aluminum oxide.
  • the preferred powder filler is molten Silica or titanium dioxide.
  • the median diameter of the powder filler is 0.01 to 15 ⁇ m, and the median diameter of the powder filler is preferably 0.5 to 10 ⁇ m.
  • the surface of the powder filler can be treated, such as with a coupling agent.
  • the resin bonding layer 20 further includes a reinforcing agent, and the auxiliary agent includes an emulsifier, a dispersing agent, and the like.
  • the material of the metal foil 30 is copper, aluminum, nickel, or an alloy of these metals.
  • the above circuit substrate can be fabricated by various methods.
  • One of the above-mentioned circuit substrates The law consists of the following steps:
  • Step 1 providing a porous glass film having a volume percentage of 45% or more of glass; Step 2: laminating one or several prepregs on both sides of the glass film;
  • Step 3 Laminating a metal foil on each side of the prepreg that is not in contact with the glass film;
  • Step 4 placing the laminated laminate into a press for hot pressing to obtain the circuit substrate, and curing temperature is 100° C ⁇ 400 ° C, curing pressure is 10Kg / cm 2 ⁇ 65Kg / cm 2 . Wherein, the prepreg is pressed to form the resin bonding layer.
  • the volume fraction of glass is preferably between 45% and 90%.
  • the pores in the glass film are uniformly distributed, and the pore diameter is 20 ⁇ to 300 ⁇ , which is processed by laser, mechanical or chemical selective etching.
  • the surface of the glass film is further roughened.
  • the prepreg is made of a resin-impregnated glass fiber cloth, and the resin is selected from the group consisting of an epoxy resin, a cyanate resin, a phenol resin, a polyphenylene ether resin, a polybutadiene resin, and a polybutylene. Diene and styrene copolymer resin, polytetrafluoroethylene resin, polybenzoxazine resin, polyimide, silicone resin, bismaleimide triazine resin ( ⁇ resin), LCP (Liquid Crystal Polymer) One or more of a resin and a bismaleimide resin.
  • Another manufacturing method of the above circuit substrate includes the following steps:
  • Step 1 Provide a porous glass film with a volume percentage of glass (relative to the whole glass film) of more than 45%;
  • Step 2 laminating a resin coated metal foil on both sides of the glass film
  • Step 3 The laminated laminate is placed in a press for hot pressing to obtain the circuit substrate, the curing temperature is 100 ° C to 400 ° C, and the curing pressure is 10 Kg / cm 2 ⁇ 65 Kg / cm 2 . Wherein, the resin on the resin-coated metal foil is pressed to form the resin bonding layer.
  • the volume fraction of glass is preferably between 45% and 90%.
  • the pores in the glass film are uniformly distributed, and the pore diameter is 20 ⁇ m to
  • the surface of the glass film is further roughened.
  • the resin-coated metal foil is produced by coating a resin on a metal foil selected from the group consisting of epoxy resins, cyanate resins, phenol resins, polyphenylene ether resins, polybutadiene resins, and the like.
  • a resin on a metal foil selected from the group consisting of epoxy resins, cyanate resins, phenol resins, polyphenylene ether resins, polybutadiene resins, and the like.
  • Example 1 For the circuit substrate produced as described above, further detailed description and description are given as in the following embodiments.
  • Example 1 For the circuit substrate produced as described above, further detailed description and description are given as in the following embodiments.
  • FR-4 prepreg ie, prepreg for S1141 CCL product of Guangdong Shengyi Technology
  • FR-4 prepreg is made by impregnating epoxy resin (dicyanamide curing agent) with 0.1mm glass fiber cloth (2116 glass fiber cloth). , to superimpose; then put a piece of copper foil up and down, and then fold.
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 15 kg/cm 2 .
  • the circuit substrate-clad laminate was hot pressed, and the obtained circuit substrate was tested.
  • the peel strength of the copper foil and the prepreg was 1.7 N/mm, and the peel strength of the prepreg and the glass film was 1.2 N/mm.
  • the CTE in the X and Y directions before the glass transition temperature was 8.2 ppm/. C, 7.8ppm/. C.
  • the FR-4 prepreg (that is, the prepreg for the S1141 CCL product of Guangdong Shengyi Technology) is made by impregnating the epoxy resin with a glass fiber cloth (1080 glass fiber cloth) with a thickness of 0.06 mm, and then superimposed; Then put a piece of copper foil on each and then stack it.
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 15 kg/cm 2 .
  • the circuit substrate-clad laminate was hot pressed, and the obtained circuit substrate was tested.
  • the peel strength of the copper foil and the prepreg was 1.7 N/mm, and the peel strength of the prepreg and the glass film was 0.8 N/mm.
  • the CTE in the X and Y directions before the glass transition temperature was 7.1 ppm/. C, 6.8ppm/. C.
  • the FR-4 prepreg (that is, the prepreg for the S1141 CCL product of Guangdong Shengyi Technology) is made by impregnating the epoxy resin with a glass fiber cloth (1080 glass fiber cloth) with a thickness of 0.06 mm, and then superimposed; Then put a piece of copper foil on each and then stack it.
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 25 kg/cm 2 .
  • the circuit substrate-clad laminate was hot pressed, and the obtained circuit substrate was tested.
  • the peel strength of the copper foil and the prepreg was 1.75 N/mm, and the peel strength of the prepreg and the glass film was 0.9 N/mm.
  • the CTE in the X and Y directions before the glass transition temperature were 12.6 ppm/° C. and 12.3 ppm/° C., respectively. Comparative Example 1:
  • FR-4 prepreg made of five sheets of 0.1mm glass fiber cloth (2116 glass fiber cloth) impregnated with epoxy resin (dicyandiamide curing agent) (ie, S1141 copper clad laminate product of Guangdong Shengyi Technology) Prepreg), stack, then place a piece of copper foil up and down, and then fold.
  • epoxy resin dicyandiamide curing agent
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 25 kg/cm 2 .
  • the circuit substrate, the copper clad laminate, was hot pressed, and the obtained circuit substrate was tested.
  • the peel strength of the copper foil was 1.75 N/mm; the CTE in the X and Y directions before the glass transition temperature was 17.6 ppm/°, respectively. C, 17.3 ppm / ° C.
  • FR- 4 Prepreg ie, prepreg for S1141 CCL products from Guangdong Shengyi Technology: Folding; then placing a piece of copper foil on top and bottom, then laminating.
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 15 kg/cm 2 .
  • the circuit substrate-clad laminate was hot pressed, and the obtained circuit substrate was tested.
  • the copper foil was adhered to the prepreg and directly peeled off from the glass film to show a peeling strength of 0.1 N/mm;
  • the CTEs in the X and Y directions before the temperature were 6.8 ppm/°C and 7.3 ppm/°C, respectively.
  • the circuit substrate made of the porous glass film not only lowers the CTE in the X and Y directions of the circuit board, but also has good peel strength.
  • the examples reveal that when the volume fraction of glass in the porous glass film is 45% to 90%, the pore diameter is 20 ⁇ m to 300 ⁇ m, and good peel strength and CTE in the X and ⁇ directions can be simultaneously obtained.
  • the above laminated laminate was placed in a press under a vacuum at a curing temperature of 180 ° C and a curing pressure of 15 kg/cm 2 .
  • the circuit substrate-clad laminate was subjected to hot pressing, and the obtained circuit substrate was tested.
  • the peel strength of the resin layer and the glass film was 1.3 N/mm; the CTE in the X and Y directions before the glass transition temperature was 6.6 ppm. /°C.
  • NMP N-mercaptopyrrolidone
  • the polyimide precursor solution is a thermoplastic polyimide precursor solution.
  • thermoplastic polyimide precursor solution is coated on the rough surface of copper and foil, and the coating thickness is
  • the obtained circuit substrate was tested, and the peeling strength of the resin layer and the glass film was 1.3 N/mm; and the CTE in the X and Y directions before the glass transition temperature was 6.8 ppm/°C.
  • Example 4 a circuit board was produced by using a resin-coated copper foil in combination with a porous glass film, and good peel strength and low X and Y direction CTE were obtained.
  • Example 5 a resin-coated copper foil to which a powder filler was added in a resin layer and a porous glass film were used to produce a circuit board, and the CTE in the X and Y directions was further reduced as compared with Example 4.
  • Example 6 a resin-coated copper foil using polyimide was used to form a circuit board in combination with a porous glass film, and good peel strength and low X, Y-direction CTE were also obtained.
  • the circuit board produced by the above embodiment can be used not only as a circuit board substrate but also as an optical waveguide.

Abstract

一种电路基板，包括玻璃占有的体积百分率为45%以上的多空隙的玻璃膜、分别位于所述玻璃膜两侧的树脂粘接层、以及位于所述树脂粘接层外侧的金属箔，所述玻璃膜、树脂粘接层及金属箔通过压制结合在一起，所述树脂粘接层的树脂填充于玻璃膜的空隙中。该电路基板采用多空隙的玻璃膜为载体材料，使得树脂粘接层与玻璃膜表面具有良好的结合力，并使电路基板的X、Y方向的CTE与原来相比得到了降低，以及具有良好的成型性，工艺操作简便。此外，还提供一种制作所述电路基板的制作方法。

Description

电路基板及其制作方法 技术领域
本发明涉及一种印制电路用的电路基板及其制作方法。 背景技术
近年来， 随着电子产品向多功能、 小型化的方向发展， 使用的电路板 朝着多层化、 布线高密度化、 高模量以及信号传输高速化的方向发展， 对 电路基板一一覆金属箔层压板， 如覆铜板的综合性能提出了更高的要求。
例如， 随着电子产品电路互联密度的提高， 要求电路基板的尺寸稳定 性越来越高， 为了减少电路基板在制作的热沖击过程中产生的热应力， 满 足元器件在安装及组装过程的孔对位精确， 要求基板在 χ、 γ、 ζ 方向
(其中， X、 Υ、 Ζ方向分别为电路板的长度、 宽度、 厚度方向） 的热膨胀 系数（Coefficient of Thermal Expansion, CTE )越小越好。 特别是用于 IC 封装的电路基板， 对于 X、 Y 方向的 CTE 要越接近于硅芯片的 CTE ( 3ppm/°C )越好， 因为如果基板的 CTE和封装在基板上的芯片的 CTE相 差太大， 会使得芯片在环境冷热沖击过程中产生^艮大的应力应变而损坏。
目前所用覆铜板（FR-4 )—般都以玻璃纤维布作为增强材料， 玻璃纤 维布受制造工艺的限制， 编织材料的空隙率很多， 受覆铜板板材中玻璃纤 维布与树脂比例的影响 （玻璃占玻璃纤维布与树脂体积总和的体积百分率 小于 45% ) , 覆铜板 X、 Υ方向的 CTE在 16~18ppm/°C左右。
为了改进以上性能， 美国专利申请 US20040037950A1 使用薄型的玻 璃膜来替代玻璃纤维布进行覆铜板的制作。 该专利申请揭示了一种多层板 材的结构由玻璃膜、 树脂层以及铜箔层构成， 但是该专利申请并没有揭示 如何在玻璃膜表面和树脂层之间获得良好的结合力。 因玻璃膜的表面是光 滑的， 这样树脂层无法和其形成良好的结合力， 使得附着在树脂层上的电 路铜导线随着树脂层一起容易从玻璃膜上剥落下来， 进而会造成这种方式 制作的覆铜板在 PCB 制作、 PCB 元器件组装过程中及电子产品使用过程 的可靠度不高， 会产生电子产品的报废。 发明内容
本发明的目的在于提供一种电路基板， 采用多孔隙的玻璃膜为载体材 料， 使得树脂粘接层与玻璃膜表面具有良好的结合力。 本发明的另一目的在于提供使用上述多孔隙的玻璃膜制作的电路基 板， 控制玻璃膜中孔隙的数量， 使玻璃占有的体积百分率 （相对于整块玻 璃膜）在 45%以上， 使电路基板的 X、 Y方向的 CTE与原来相比得到了 降低。
本发明的再一目的在于提供一种电路基板的制作方法， 采用多孔隙的 玻璃膜为载体材料， 具有良好的成型性， 工艺操作筒便。
为实现上述目的， 本发明提供一种电路基板， 包括玻璃占有的体积百 分率为 45%以上的多孔隙的玻璃膜、 分别位于所述玻璃膜两侧的树脂粘接 层、 以及位于所述树脂粘接层外侧的金属箔， 所述玻璃膜、 树脂粘接层及 金属箔通过压制结合在一起， 所述树脂粘接层的树脂填充于玻璃膜的孔隙 中。
所述玻璃膜中玻璃占有的体积百分率为 45%到 90%之间。
优选地， 所述玻璃膜中玻璃占有的体积百分率为 65%到 80%之间。 所述玻璃膜的玻璃成分为碱金属氧化物小于 0.3% (重量） 的铝硅酸盐 玻璃或碱金属氧化物小于 0.3% (重量） 的硼硅酸盐玻璃。
所述玻璃膜的厚度选择在 20μηι到 1.1mm之间。
所述玻璃膜中的孔隙均勾分布， 孔径为 20μηι到 300μηι。
所述玻璃膜的表面进行过粗糙化处理。
所述树脂粘接层中的树脂选自环氧树脂、 氰酸酯树脂、 酚醛树脂、 聚 苯醚树脂、 聚丁二烯树脂、 聚丁二烯与苯乙烯共聚物树脂、 聚四氟乙烯树 月旨、 聚苯并恶嗪树脂、 聚酰亚胺、 含硅树脂、 双马来酰亚胺三嗪树脂、
LCP树脂和双马来酰亚胺树脂中的的一种或多种。
所述树脂粘接层中包含有粉末填料， 所述粉末填料选自有结晶型二氧 化硅、 熔融型的二氧化硅、 球型二氧化硅、 钛酸锶、 钛酸钡、 钛酸锶钡、 氮化硼、 氮化铝、 碳化硅、 氧化铝、 二氧化钛、 玻璃粉、 玻璃短切纤维、 滑石粉、 云母粉、 碳黑、 碳纳米管、 金属粉、 聚苯硫醚和 PTFE粉中的一 种或多种， 所述粉末填料的粒径中度值为 0.01~15μηι。 优选地， 所述粉末 填料的粒径中度值为 0.5~10μηι。
本发明还提供一种上述电路基板的制作方法， 包括如下步骤： 步骤 1 : 提供玻璃占有的体积百分率为 45%以上的多孔隙的玻璃膜； 步骤 2: 在所述玻璃膜的两面分别叠合一张或数张预浸料；
步骤 3 : 在预浸料未与玻璃膜接触的一面分别叠合一张金属箔； 步骤 4: 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。 上述制作方法中， 所述玻璃膜中的孔隙均勾分布， 孔径为 20μηι 到 300μηι, 通过激光、 机械或化学选择蚀刻方式加工而成。
本发明还提供一种上述电路基板的另一制作方法， 包括如下步骤： 步骤 1 : 提供玻璃占有的体积百分率为 45%以上的多孔隙的玻璃膜； 步骤 2: 在所述玻璃膜的两面分别叠合一张涂树脂金属箔；
步骤 3: 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。
上述制作方法中， 所述玻璃膜中的孔隙均勾分布， 孔径为 20μηι 到 300μηι, 通过激光、 机械或化学选择蚀刻方式加工而成。
本发明的有益效果： 首先， 采用多孔隙的玻璃膜为载体材料， 因为树 脂可以进入玻璃膜的孔隙中， 起到销釘的作用， 使得树脂粘接层与玻璃具 有良好的结合力；
其次， 控制玻璃膜中孔隙的数量， 使玻璃占有的体积百分率 （相对于 整块玻璃膜）在 45%以上， 使电路基板的 X、 Υ、 Ζ方向的 CTE与原来使 用玻璃纤维布作增强材料的覆铜板相比得到了降低；
再次,、 本发明的,电路基板制作工艺筒便， ^量生产容易。 、 、 参阅以下有关本发明的详细说明与附图， 相信本发明的目的、 特征与特 点， 应当可由此得到深入且具体的了解， 然而附图仅提供参考与说明用， 并非用来对本发明加以限制。 附图说明
下面结合附图， 通过对本发明的具体实施方式详细描述， 将使本发明 的技术方案及其他有益效果显而易见。
附图中，
图 1为本发明电路基板的结构示意图。 具体实施方式
如图 1 所示， 本发明的电路基板， 包括玻璃占有的体积百分率（相对 于整块玻璃膜） 为 45%以上的多孔隙 11 的玻璃膜 10、 分别位于所述玻璃 膜 10 两侧的树脂粘接层 20、 以及位于所述树脂粘接层 20外侧的金属箔 30, 所述玻璃膜 10、 树脂粘接层 20及金属箔 30通过压制结合在一起， 所 述树脂粘接层 20的树脂填充于玻璃膜 10的孔隙 11中。
本文中所用的术语 "玻璃占有的体积百分率" 是指， 多孔隙 11 的玻 璃膜 10 中玻璃的体积与该玻璃膜 10 中玻璃和孔隙 11 的体积总和的比 值。
优选地， 玻璃膜 10 中玻璃占有的体积百分率在 45%到 90%之间。 当 玻璃占有的体积百分率大于 90%时， 玻璃膜 10的孔隙 11 中填充的树脂太 少， 达不到良好的改善剥离强度的结果， 当玻璃占有的体积百分率小于 45%时， 玻璃膜 10的孔隙 11 中填充的树脂过多， 又达不到改善 X、 Y、 Ζ 方向 CTE的效果。
所述树脂粘接层 20 中的树脂选自环氧树脂、 氰酸酯树脂、 酚醛树 月旨、 聚苯醚树脂、 聚丁二烯树脂、 聚丁二烯与苯乙烯共聚物树脂、 聚四氟 乙烯树脂、 聚苯并恶嗪树脂、 聚酰亚胺、 含硅树脂、 双马来酰亚胺三嗪树 月旨 （ΒΤ树月旨） 、 LCP ( Liquid Crystal Polymer )树脂和双马来酰亚胺树脂 中的的一种或多种。
所述玻璃膜 10的玻璃成分优选为碱金属氧化物小于 0.3% (重量） 的 铝硅酸盐玻璃或碱金属氧化物小于 0.3% (重量） 的硼硅酸盐玻璃。
所述玻璃膜 10的厚度可以选自 20μηι到 1.1mm之间。
所述玻璃膜 10中的孔隙 11均匀分布， 孔径为 20μηι到 300μηι, 通过 激光、 机械、 化学选择蚀刻等方式加工而成。
为了获得更好的玻璃膜 10和树脂的结合力， 玻璃膜 10的表面也可以 通过拉毛、 化学蚀刻、 蒙砂、 溶胶 -凝胶法和机械打磨中的一种或多种进行 粗糙化处理， 增大接触面积， 使玻璃膜 10与树脂达到更好的结合。
上述的树脂粘接层 20 中还可包含粉末填料， 粉末填料起着改善尺寸 稳定性、 降低 CTE等目的。 上述的树脂粘接层 20中还可包含具有低介电 损耗的氟聚合物， 所述粉末填料的含量占氟聚合物和粉末填料总量的 0-70% (体积百分比） 。 粉末填料选自有结晶型二氧化硅、 熔融型的二氧 化硅、 球型二氧化硅、 钛酸锶、 钛酸钡、 钛酸锶钡、 氮化硼、 氮化铝、 碳 化硅、 氧化铝、 二氧化钛、 玻璃粉、 玻璃短切纤维、 滑石粉、 云母粉、 碳 黑、 碳纳米管、 金属粉、 聚^ 醚和 PTFE粉中的一种或多种， 其中， 优 选的粉末填料是熔融型的二氧化硅或二氧化钛。 为方便粉末填料可以进入 到玻璃膜 10的孔隙 11 中， 粉末填料的粒径中度值为 0.01~15μηι, 优选粉 末填料的粒径中度值为 0.5~10μηι。 为达到更好的性能， 粉末填料的表面可 以经过处理， 如使用偶联剂进行处理等。 所述树脂粘接层 20 中还包括助 剂， 助剂包括有乳化剂及分散剂等。
所述金属箔 30的材料为铜、 铝、 镍、 或这些金属的合金。
上述电路基板可通过多种方法制作而成。 上述电路基板的一种制作方 法为， 包括如下步骤：
步骤 1 : 提供玻璃占有的体积百分率为 45%以上的多孔隙的玻璃膜； 步骤 2: 在所述玻璃膜的两面分别叠合一张或数张预浸料；
步骤 3: 在预浸料未与玻璃膜接触的一面分别叠合一张金属箔； 步骤 4: 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。 其中， 预浸料经 过压制后形成所述树脂粘接层。
该制作方法中， 玻璃占有的体积百分率优选为 45%到 90%之间。
该制作方法中， 所述玻璃膜中的孔隙均勾分布， 孔径为 20μηι 到 300μηι, 通过激光、 机械或化学选择蚀刻方式加工而成。
该制作方法的步骤 1中， 还包括对玻璃膜的表面进行粗糙化处理。 该制作方法中， 所述预浸料由树脂浸渍玻璃纤维布制作而成， 所述树 脂选自环氧树脂、 氰酸酯树脂、 酚醛树脂、 聚苯醚树脂、 聚丁二烯树脂、 聚丁二烯与苯乙烯共聚物树脂、 聚四氟乙烯树脂、 聚苯并恶嗪树脂、 聚酰 亚胺、 含硅树脂、 双马来酰亚胺三嗪树脂 （ΒΤ 树脂） 、 LCP ( Liquid Crystal Polymer )树脂和双马来酰亚胺树脂中的的一种或多种。
上述电路基板的另一种制作方法为， 包括如下步骤：
步骤 1 : 提供玻璃占有的体积百分率（相对于整块玻璃膜） 为 45%以 上的多孔隙的玻璃膜；
步骤 2: 在所述玻璃膜的两面分别叠合一张涂树脂金属箔；
步骤 3 : 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。 其中， 涂树脂金 属箔上的树脂经压制后形成所述树脂粘接层。
该制作方法中， 玻璃占有的体积百分率优选为 45%到 90%之间。
该制作方法中， 所述玻璃膜中的孔隙均勾分布， 孔径为 20μηι 到
300μηι, 通过激光、 机械或化学选择蚀刻方式加工而成。
该制作方法的步骤 1中， 还包括对玻璃膜的表面进行粗糙化处理。 该制作方法中， 该涂树脂金属箔通过在金属箔上涂覆树脂制作而成， 所述树脂选自环氧树脂、 氰酸酯树脂、 酚醛树脂、 聚苯醚树脂、 聚丁二烯 树脂、 聚丁二烯与苯乙烯共聚物树脂、 聚四氟乙烯树脂、 聚苯并恶嗪树 脂、 聚酰亚胺、 含硅树脂、 双马来酰亚胺三嗪树脂 （ΒΤ 树脂） 、 LCP ( Liquid Crystal Polymer )树脂和双马来酰亚胺树脂中的的一种或多种。
针对上述制成的电路基板， 如下述实施例进一步给予详加说明与描 实施例 1 :
取一张厚度为 200μηι、 孔径为 100μηι、 玻璃占有的体积百分率为 65% 的多孔隙的玻璃膜（该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃 膜上下两面各放一张用厚度为 0.1mm玻璃纤维布 （2116 玻璃纤维布）浸 渍环氧树脂胶系 （双氰胺固化剂 ) 制成 FR-4 预浸料 (即广东生益科技的 S1141 覆铜板产品用的半固化片）， 进行叠合； 然后上下再各放上一张铜 箔， 再进行叠合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 15Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 铜箔与预浸料的剥离强度为 1.7N/mm, 预浸料和玻璃膜的剥离 强度为 1.2N/mm; 玻璃化转变温度前的 X、 Y方向的 CTE分别为 8.2ppm/ 。C、 7.8ppm/。C。
实施例 2:
取一张厚度为 50μηι、 孔径为 20μηι、 玻璃占有的体积百分率为 80%的 多孔隙的玻璃膜（该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃膜 上下两面各放一张用厚度为 0.06mm玻璃纤维布（ 1080玻璃纤维布）浸渍 环氧树脂胶系制成 FR-4预浸料 (即广东生益科技的 S1141覆铜板产品用的 半固化片）， 进行叠合； 然后上下再各放上一张铜箔， 再进行叠合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 15Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 铜箔与预浸料的剥离强度为 1.7N/mm, 预浸料和玻璃膜的剥离 强度为 0.8N/mm; 玻璃化转变温度前的 X、 Y方向的 CTE分别为 7.1ppm/ 。C、 6.8ppm/。C。
实施例 3:
取一张厚度为 lmm、 孔径为 200μηι、 玻璃占有的体积百分率为 50% 的多孔隙的玻璃膜（该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃 膜上下两面各放三张用厚度为 0.06mm玻璃纤维布（ 1080玻璃纤维布）浸 渍环氧树脂胶系制成 FR-4预浸料 (即广东生益科技的 S1141覆铜板产品用 的半固化片）， 进行叠合； 然后上下再各放上一张铜箔， 再进行叠合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 25Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 铜箔与预浸料的剥离强度为 1.75N/mm, 预浸料和玻璃膜的剥 离强度为 0.9N/mm ; 玻璃化转变温度前的 X、 Y方向的 CTE分别为 12.6ppm/°C、 12.3ppm/°C。 比较例 1 :
用五张厚度为 0.1mm玻璃纤维布 （2116 玻璃纤维布）浸渍环氧树脂 胶系 （双氰胺固化剂）制成 FR-4预浸料 (即广东生益科技的 S1141覆铜板 产品用的半固化片）， 进行叠合， 然后上下再各放上一张铜箔， 再进行叠 合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 25Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 铜箔的剥离强度为 1.75N/mm; 玻璃化转变温度前的 X、 Y方向 的 CTE分别为 17.6ppm/°C、 17.3ppm/°C。
比较例 2:
取一张厚度为 60μηι 的无孔玻璃膜， 在玻璃膜上下两面各放一张用 0.1mm玻璃纤维布 （2116 玻璃纤维布） 浸渍环氧树脂胶系 （双氰胺固化 剂）制成 FR-4预浸料 (即广东生益科技的 S1141 覆铜板产品用的半固化 片：)， 进行叠合； 然后上下再各放上一张铜箔， 再进行叠合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 15Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 铜箔粘附预浸料上， 直接从玻璃膜上剥落下来， 显示剥离强度 为 0.1N/mm; 玻璃化转变温度前的 X、 Y方向的 CTE分别为 6.8ppm/ °C、 7.3ppm/°C。
从以上实施例 1、 2、 3 可以看出， 以多孔隙的玻璃膜制作的电路基板 不光降低了电路基板的 X、 Y方向的 CTE, 而且具有良好的剥离强度。 同 时实施例揭示出当多孔隙的玻璃膜中玻璃占有的的体积百分率为 45%~90%时， 孔径为 20μηι 到 300μηι, 可以同时获得良好的剥离强度和 X、 Υ方向的 CTE。
比较例 1 中所示的传统 FR-4覆铜板， 因使用玻璃纤维布作为增强材 料， 没有使用可以提高覆铜板中玻璃成分比例的玻璃膜， 其 X、 Y方向的 CTE明显高于实施例 1、 2、 3中使用了玻璃膜的 X、 Y方向的 CTE。
比较例 2 中所示的覆铜板， 因使用没有多孔隙的玻璃膜， 制作的覆铜 板^艮容易分层剥落， 实用性不强。
实施例 4:
取一张厚度为 200μηι、 孔径为 100μηι、 玻璃占有的体积百分率为 65% 的多孔隙的玻璃膜（该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃 膜上下两面各放一张涂覆了厚度为 50μηι 环氧树脂的涂树脂铜箔 ( RCC ) , 进行叠合。 将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 15Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 树脂层和玻璃膜的剥离强度为 1.8N/mm; 玻璃化转变温度前的 X、 Y方向的 CTE为 8.6ppm/°C。
实施例 5:
取一张厚度为 200μηι、 孔径为 100μηι、 玻璃占有的体积百分率为 65% 的多孔隙的玻璃膜（该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃 膜上下两面各放一张涂覆了厚度为 50μηι环氧树脂胶系 （其中树脂层中含 有 20%体积百分率的硅微粉） 的涂树脂铜箔， 进行叠合。
将上述叠合好的叠层放进压机， 在真空下， 固化温度为 180 °C , 固化 压力为 15Kg/cm2。 进行热压制得所述电路基板——覆铜板， 测试该制得的 电路基板， 树脂层和玻璃膜的剥离强度为 1.3N/mm; 玻璃化转变温度前的 X、 Y方向的 CTE为 6.6ppm/°C。
实施例 6:
在 1L 的三口烧瓶中加入溶剂 N-曱基吡咯烷酮 （NMP ) 750g, 加入
82.1g 的 2,2'-双 [4-(4-氨基苯氧基)苯基]丙烷， 然后将该溶液置于水浴中冷 却， 通氮气保护， 30 分钟后加入 59.43g 的联苯四曱酸二酐， 持续高速搅 拌 3 小时， 进行聚合反应， 制得粘度为 600mPa.s 的聚酰亚胺前体溶液。 该聚酰亚胺前体溶液为热塑性聚酰亚胺前体溶液。
将所得的热塑性聚酰亚胺前体溶液涂覆在铜、箔的毛面上， 涂覆厚度为
14μηι, 然后在温度为 220 °C烘烤 5分钟制作成涂树脂铜箔。 取一张厚度为
50μηι、 孔径为 20μηι、 玻璃占有的体积百分率为 65%的多孔隙的玻璃膜 (该玻璃膜预先经过烘干并进行偶联剂处理） ， 在玻璃膜上下两面各放一 张涂树脂铜箔， 进行叠合， 放入间歇性高温热压机中。 压合程序为： 1 小 时升温到 250°C , 在 250°C保持 30分钟， 然后 1小时升温到 350°C , 保持
30分钟， 2 小时后降温至室温， 打开压机取出覆铜板。 压合程序开始即开 始抽真空， 压合程序开始即加面压 5Mpa。
测试该制得的电路基板， 树脂层和玻璃膜的剥离强度为 1.3N/mm; 玻 璃化转变温度前的 X、 Y方向的 CTE为 6.8ppm/°C。
以上实施例 4 中， 采用了涂树脂铜箔与多孔隙的玻璃膜配合制作电路 基板， 获得了良好的剥离强度和低 X、 Y方向 CTE。
实施例 5 中， 采用了树脂层中添加了粉末填料的涂树脂铜箔与多孔隙 的玻璃膜配合制作电路基板， 与实施例 4相比， 进一步降低了 X、 Y方向 的 CTE。 实施例 6采用聚酰亚胺的涂树脂铜箔与多孔隙的玻璃膜配合制作电路 基板， 也获得了良好的剥离强度和低 X、 Y方向 CTE。
以上实施方式制作的电路基板， 不仅可以用做电路板基材， 还可以用 做光波导通路使用。
以上所述， 对于本领域的普通技术人员来说， 可以根据本发明的技术 方案和技术构思作出其他各种相应的改变和变形， 而所有这些改变和变形 都应属于本发明后附的权利要求的保护范围。

Claims

权 利 要 求
1、 一种电路基板， 其特征在于， 包括玻璃占有的体积百分率为 45% 以上的多孔隙的玻璃膜、 分别位于所述玻璃膜两侧的树脂粘接层、 以及位 于所述树脂粘接层外侧的金属箔， 所述玻璃膜、 树脂粘接层及金属箔通过 压制结合在一起， 所述树脂粘接层的树脂填充于玻璃膜的孔隙中。
2、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜中玻璃 占有的体积百分率为 45%到 90%之间。
3、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜中玻璃 占有的体积百分率为 65%到 80%之间。
4、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜的玻璃 成分为碱金属氧化物小于 0.3% (重量） 的铝硅酸盐玻璃或碱金属氧化物小 于 0.3% (重量） 的硼硅酸盐玻璃。
5、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜的厚度 选择在 20μηι到 1.1 mm之间。
6、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜中的孔 隙均匀分布， 孔径为 20μηι到 300μηι。
7、 如权利要求 1 所述的电路基板， 其特征在于， 所述玻璃膜的表面 进行过粗糙化处理。
8、 如权利要求 1 所述的电路基板， 其特征在于， 所述树脂粘接层中 的树脂选自环氧树脂、 氰酸酯树脂、 酚醛树脂、 聚苯醚树脂、 聚丁二烯树 月旨、 聚丁二烯与苯乙烯共聚物树脂、 聚四氟乙烯树脂、 聚苯并恶嗪树脂、 聚酰亚胺、 含硅树脂、 双马来酰亚胺三嗪树脂、 LCP树脂和双马来酰亚胺 树脂中的的一种或多种。
9、 如权利要求 1 所述的电路基板， 其特征在于， 所述树脂粘接层中 包含有粉末填料， 所述粉末填料选自有结晶型二氧化硅、 熔融型的二氧化 硅、 球型二氧化硅、 钛酸锶、 钛酸钡、 钛酸锶钡、 氮化硼、 氮化铝、 碳化 硅、 氧化铝、 二氧化钛、 玻璃粉、 玻璃短切纤维、 滑石粉、 云母粉、 碳 黑、 碳纳米管、 金属粉、 聚苯硫醚和 PTFE粉中的一种或多种， 所述粉末 填料的粒径中度值为 0.01~15μηι。
10、 一种制作如权利要求 1 所述的电路基板的制作方法， 其特征在 于， 包括如下步骤：
步骤 1 : 提供玻璃占有的体积百分率为 45%以上的多孔隙的玻璃膜； 步骤 2: 在所述玻璃膜的两面分别叠合一张或数张预浸料；
步骤 3: 在预浸料未与玻璃膜接触的一面分别叠合一张金属箔； 步骤 4: 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。
11、 一种制作如权利要求 1 所述的电路基板的制作方法， 其特征在 于， 包括如下步骤：
步骤 1 : 提供玻璃占有的体积百分率为 45%以上的多孔隙的玻璃膜； 步骤 2: 在所述玻璃膜的两面分别叠合一张涂树脂金属箔；
步骤 3: 将叠合好的叠层放进压机进行热压制得所述电路基板， 固化 温度为 100°C~400°C , 固化压力为 10Kg/cm2~65Kg/cm2。
12、 如权利要求 10或 11所述的电路基板的制作方法， 其特征在于， 所述玻璃膜中的孔隙均匀分布， 孔径为 20μηι到 3 ΟΟμηι , 通过激光、 机械 或化学选择蚀刻方式加工而成。
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JPWO2015022956A1 (ja) * 2013-08-14 2017-03-02 デンカ株式会社 窒化ホウ素−樹脂複合体回路基板、窒化ホウ素−樹脂複合体放熱板一体型回路基板

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JPH0590720A (ja) * 1991-09-27 1993-04-09 Ibiden Co Ltd 複合プリント配線板
JPH05175625A (ja) * 1991-12-25 1993-07-13 Ibiden Co Ltd 複合プリント配線板とその製造方法
JPH0818178A (ja) * 1994-07-04 1996-01-19 Hitachi Chem Co Ltd 高周波回路用基板の製造方法
CN1413427A (zh) * 1999-12-21 2003-04-23 弗劳恩霍弗应用技术研究院 多层印刷电路板
CN1532926A (zh) * 2003-03-25 2004-09-29 ��ʽ���綫֥ 布线部件及其制造方法

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JPH0590720A (ja) * 1991-09-27 1993-04-09 Ibiden Co Ltd 複合プリント配線板
JPH05175625A (ja) * 1991-12-25 1993-07-13 Ibiden Co Ltd 複合プリント配線板とその製造方法
JPH0818178A (ja) * 1994-07-04 1996-01-19 Hitachi Chem Co Ltd 高周波回路用基板の製造方法
CN1413427A (zh) * 1999-12-21 2003-04-23 弗劳恩霍弗应用技术研究院 多层印刷电路板
CN1532926A (zh) * 2003-03-25 2004-09-29 ��ʽ���綫֥ 布线部件及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2015022956A1 (ja) * 2013-08-14 2017-03-02 デンカ株式会社 窒化ホウ素−樹脂複合体回路基板、窒化ホウ素−樹脂複合体放熱板一体型回路基板

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