WO2013056460A1 - 液晶显示面板及形成液晶显示面板的方法 - Google Patents

液晶显示面板及形成液晶显示面板的方法 Download PDF

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WO2013056460A1
WO2013056460A1 PCT/CN2011/081093 CN2011081093W WO2013056460A1 WO 2013056460 A1 WO2013056460 A1 WO 2013056460A1 CN 2011081093 W CN2011081093 W CN 2011081093W WO 2013056460 A1 WO2013056460 A1 WO 2013056460A1
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Prior art keywords
common electrode
pixel
liquid crystal
display panel
crystal display
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PCT/CN2011/081093
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English (en)
French (fr)
Inventor
施明宏
何海英
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深圳市华星光电技术有限公司
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Priority to US13/376,589 priority Critical patent/US20130100005A1/en
Publication of WO2013056460A1 publication Critical patent/WO2013056460A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136218—Shield electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the present invention relates to a liquid crystal display panel, and more particularly to a liquid crystal display panel having a tri-gate pixel structure having a high aperture ratio.
  • Today's consumer electronics products generally use thin and light flat panel displays, of which liquid crystal displays have been widely used by various electronic devices such as televisions, mobile phones, personal digital assistants, digital cameras, computer screens or notebook computers.
  • Thin film transistor Thin Film Transistor
  • the driving mode of the pixel structure of the TFT liquid crystal display can be mainly classified into two types: a single-gate pixel structure and a tri-gate pixel structure.
  • the liquid crystal display of the three-gate pixel structure has a number of scanning lines and source lines of 3 m and n, respectively, and the scanning line and the source line of the liquid crystal display of the single-gate type pixel structure.
  • the number is m and 3n. In other words, at the same resolution, the number of scanning lines of the display panel having the three-gate type pixel structure is increased by three times and the number of data lines is reduced to three, compared to the display panel having the single-gate type pixel structure.
  • a display panel having a three-gate pixel structure uses more gate drive chips and fewer source drive chips. Since the cost and power consumption of the gate driving chip are lower than that of the source driving chip, the use of a three-gate pixel structure design can reduce cost and power consumption.
  • FIG. 1 is a top view of a sub-pixel of a prior art three-gate pixel liquid crystal display panel.
  • the liquid crystal display panel has a plurality of pixels, and each pixel is composed of at least three sub-pixels 100 (a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively).
  • the sub-pixel 100 includes a thin film transistor 102 and a pixel electrode 112.
  • the gate of the thin film transistor 102 is electrically connected to the scan line (Scan Line) 104, the source is electrically connected to the data line (Date Line) 106, the drain is electrically connected to the pixel electrode 112.
  • the pixel electrode 112 actually covers the common electrode line 108 and the shielding metal (shielding)
  • the metal region 110 is above, but for convenience of explanation, in FIG. 1, only the relative positions of the pixel electrodes 112 are depicted.
  • the common electrode line 108 is used to provide a common voltage, and a common storage electrode line 108 overlaps with the pixel electrode 112 to form a storage capacitor.
  • the scan signal is input through the scan line 104 such that the thin film transistor 102 is turned on, the data signal is transferred to the pixel electrode 112 via the open thin film transistor 102 via the data line 106 to be charged to the desired voltage.
  • the liquid crystal molecules located under the pixel electrode 112 control the direction of rotation according to the data signal applied to the pixel electrode 112 and the voltage difference of the common voltage, so that the sub-pixel 100 exhibits different brightness.
  • the scan line 104 does not receive the scan signal, the liquid crystal molecules still maintain their rotational direction because the storage capacitor stores the voltage difference between the common voltage and the data signal until the thin film transistor 102 receives the next scan signal.
  • a shield metal region 110 is disposed on both sides of the scan line 104.
  • the shield metal region 110 and the common electrode line 108 are electrically connected through the opening 114 such that the shield metal region 110 and the common electrode line 108 are maintained at the same potential to prevent the data signal applied to the pixel electrode 112 from being affected by the parasitic capacitance.
  • the gate of the thin film transistor 102, the shield metal region 110 and the scan line 104 are composed of a first metal layer
  • the source and drain of the thin film transistor 102, the data line 106 and the common electrode line 108 are Two metal layers are formed.
  • a metal layer such as the thin film transistor 102, the shield metal region 110, the scan line 104, the data line 106, and the common electrode line 108 is defined as an opaque portion of the sub-pixel 100.
  • the aperture ratio of the sub-pixel 100 directly affects the utilization of the backlight and the brightness of the display panel.
  • the larger the aperture ratio the greater the brightness of the liquid crystal display and the better the contrast.
  • the line width W1 of the scan line 104 is generally larger than the line width W2 of the data line 106, and a fixed distance d1 must be maintained between the shield metal region 110 made of the same metal layer and the scan line 104. . These factors all reduce the pixel aperture ratio.
  • a liquid crystal display panel using a three-gate type pixel structure has an advantage of low cost and low power consumption, the problem of a reduction in pixel aperture ratio is still to be further improved.
  • a liquid crystal display panel includes a plurality of pixels, a plurality of rows of scanning lines parallel to each other and extending in a first direction, and a plurality of columns of data parallel to each other and extending in a second direction. line.
  • the second direction is perpendicular to the first direction.
  • the plurality of rows of scan lines are made of a first metal layer for transmitting scan signals.
  • the multi-column data line is made of a second metal layer for transmitting data signals.
  • Each pixel contains a plurality of sub-pixels.
  • Each sub-pixel includes: a pixel electrode formed of a transparent conductive layer; a thin film transistor, the thin film transistor is one-to-one connected to the pixel electrode, the scan line and the data line; and a common electrode a wire comprising a main branch region, a first shield metal region and a second shield metal region, the first shield metal region and the second shield metal region being parallel to the plurality of rows of scan lines and connected to the
  • the main branch line is formed, and the common electrode line is composed of the second metal layer.
  • An insulating layer is disposed between the first metal layer and the second metal layer.
  • the liquid crystal display panel further includes two openings penetrating through the insulating layer, and the transparent conductive layer is disposed on the two openings and the first metal layer, so that the two common electrode lines pass through the transparent conductive layer and the The first metal layer is electrically connected.
  • the main branch regions of the two common electrode lines are electrically connected through the transparent conductive layer and the first metal layer.
  • the present invention further discloses a liquid crystal display panel comprising a plurality of pixels, a plurality of rows of scanning lines parallel to each other and extending in a first direction, and a plurality of columns extending parallel to each other and extending in a second direction.
  • the second direction is perpendicular to the first direction.
  • the plurality of rows of scan lines are made of a first metal layer for transmitting scan signals.
  • the multi-column data line is made of a second metal layer for transmitting data signals.
  • Each pixel contains a plurality of sub-pixels.
  • Each sub-pixel includes: a pixel electrode formed of a transparent conductive layer; a thin film transistor, the thin film transistor is one-to-one connected to the pixel electrode, the scan line and the data line; and a common electrode a wire comprising a main branch region, a first shield metal region and a second shield metal region, the first shield metal region and the second shield metal region being parallel to the plurality of rows of scan lines and connected to the The main branch line is formed, and the common electrode line is composed of the second metal layer.
  • the main branching zone of the common electrode line is in a cross shape.
  • an insulating layer is disposed between the first metal layer and the second metal layer.
  • two common electrode lines corresponding to two pixels located on one of the data lines and connected to one of the scan lines are electrically connected.
  • the liquid crystal display panel further includes two openings penetrating through the insulating layer, and the transparent conductive layer is disposed on the two openings and the first metal layer such that the two common electrode lines The electrically conductive layer and the first metal layer are electrically connected.
  • the first shielding metal region of the two common electrode lines or the second shielding metal region of the two common electrode lines passes through the transparent conductive layer and the first metal layer Electrical connection.
  • each pixel comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel.
  • the material of the transparent conductive layer is indium tin oxide.
  • the present invention further provides a method of forming a liquid crystal display panel, comprising:
  • the common electrode line includes a main branch area a first shield metal region and a second shield metal region, the first shield metal region and the second shield metal region being parallel to the scan line and connected to the main branch region.
  • the method further comprises:
  • the method further comprises:
  • the present invention provides a liquid crystal display panel and a method of forming the liquid crystal display panel.
  • the scanning line of the liquid crystal display panel is made of a first metal layer
  • the data line and the common electrode line are made of a second metal layer. Since the scan lines and the common electrode lines are formed by different metal layers in different etching processes, not only the distance between the scan lines and the common electrode lines can be shortened, but also the width of a part of the common electrode lines as the shield metal regions can be appropriately reduced. Small, so the pixel aperture ratio can be increased.
  • FIG. 1 is a top plan view of a sub-pixel of a prior art three-gate pixel liquid crystal display panel.
  • FIG. 2 is a schematic diagram of a liquid crystal display having a three-gate pixel structure according to a preferred embodiment of the present invention.
  • FIG. 3 is a circuit diagram of a tri-gate type pixel of the present invention.
  • FIG. 4 is a top view of a sub-pixel of a display panel according to a first embodiment of the present invention.
  • Figure 5 is a schematic illustration of a pixel of a display panel in accordance with a second embodiment of the present invention.
  • Figure 6 is a cross-sectional view taken along line C-C' of Figure 5.
  • 6 to 10 are schematic views showing respective processes for forming the liquid crystal display panel of the present invention.
  • FIG. 2 is a schematic diagram of a liquid crystal display 10 having a three-gate pixel structure in accordance with a preferred embodiment of the present invention.
  • the liquid crystal display 10 has a gate driving module 12, a source driving module 14, and a liquid crystal display panel 30.
  • the display panel 30 having a three-gate pixel structure has n ⁇ m pixels 20, m ⁇ 3 scanning lines G1, G2, . . . , G3m, and n data lines D1.
  • Each pixel 20 includes three sub-pixels R, G, B.
  • FIG. 3 is a circuit diagram of a tri-gate pixel of the present invention.
  • the three-gate type pixel 20 includes three sub-pixels (the red sub-pixel 20R, the green sub-pixel 20G, and the blue sub-pixel 20B, respectively), and the three thin-film transistors T1, T2, and T3 are respectively disposed on the red sub-pixel 20R.
  • the green sub-pixel 20G and the blue sub-pixel 20B and the three-pixel electrodes 22A, 22B, and 22C are respectively disposed in the red sub-pixel 20R, the green sub-pixel 20G, and the blue sub-pixel 20B.
  • the gates of the thin film transistors T1, T2, and T3 are electrically connected to the corresponding scan lines G1, G2, and G3, respectively, and the sources of the thin film transistors T1, T2, and T3 are electrically connected to the data line D1, and the thin film transistors T1 are respectively connected.
  • the drains of T2 and T3 are electrically connected to the pixel electrodes 22A, 22B, and 22C, respectively.
  • the transmitted signal signals display different gray levels in the red sub-pixel 20R, the green sub-pixel 20G, and the blue sub-pixel 20B, respectively.
  • the scanning lines G1, G2, and G3 are arranged in the first direction
  • the data lines are arranged in the second direction
  • the first direction is perpendicular to the second direction.
  • the common electrode line C1 partially overlaps the scanning lines G1, G2, and G3 and partially overlaps the scanning lines G1, G2, and G3, and the common electrode line C1 partially overlaps the pixel electrodes 22A, 22B, and 22C to form a three storage capacitor.
  • FIG. 4 is a top view of a sub-pixel of the display panel according to the first embodiment of the present invention.
  • the present invention is described by taking the liquid crystal display panel 30 having a three-gate pixel structure as an example.
  • the pixel 20 of the display panel 30 of the present invention is not limited thereto.
  • the liquid crystal display panel 30 of the present embodiment includes a glass substrate (also referred to as a thin film transistor substrate) 32 and a plurality of pixels 20 disposed on the glass substrate 32.
  • Each pixel 20 includes three sub-pixels 20S, such as a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • FIG. 1 is a top view of a sub-pixel of the display panel according to the first embodiment of the present invention.
  • the present invention is described by taking the liquid crystal display panel 30 having a three-gate pixel structure as an example.
  • the pixel 20 of the display panel 30 of the present invention is not limited thereto.
  • the liquid crystal display panel 30 of the present embodiment
  • the sub-pixel 20S is a rectangular area, and the long axis of the rectangular area is disposed along the first direction X, and the short axis direction is disposed along the second direction Y, wherein the first direction X and the second direction Y are substantially perpendicular to each other.
  • the scanning lines 40 are disposed on the glass substrate 32 and arranged in the first direction X, and the data lines 42 are disposed on the glass substrate 32 and arranged in the second direction Y.
  • the scan line 40 is made of a first metal layer.
  • the thin film transistors 44 are respectively disposed in the respective sub-pixels 20S, and each of the thin film transistors 44 includes a gate 44G, a source 44S and a drain 44D, and each gate 44G is electrically connected to the corresponding scan line 40, and each source 44S Each of the drains 44D is electrically connected to the pixel electrode 58 disposed in each of the sub-pixels 20S.
  • the common electrode line 48 is provided on the glass substrate 32 and passes over the scanning line 40 and partially overlaps the scanning line 40, whereby the common electrode line 48 overlaps the pixel electrode to constitute a storage capacitor.
  • the common electrode line 48 and the scan line 40 are composed of two different metal layers, and an insulating layer (not shown) is disposed between the two metal layers to avoid direct electrical connection between the two metal layers. Therefore, the common electrode line 48 can be arranged in different directions from the scan line 40 and across the scan line 40, for example, the scan line 40 extends along the long axis direction (first direction) of the sub-pixel 20S, and the common electrode line 48 is formed by the sub-pixel 20S.
  • the short-axis direction (the second direction) penetrates the sub-pixel 20S, so that the proportion of the area occupied by the common electrode line 48 in the display area can be reduced, thereby reducing the light-shielding area to increase the aperture ratio.
  • the common electrode line 48 may be formed of the same layer of conductive pattern as the data line 42 , such as a second metal layer. However, the common electrode line 48 may also be formed by another conductive layer. .
  • the common electrode line 48 includes a main stem region 480, a first shield metal region 481, and a second shield metal region 482.
  • the first shield metal region 481 and the second shield metal region 482 are parallel to the plurality of rows of scan lines 40 and are connected to the main stem region 480, and the plurality of columns of data lines 42 and the common electrode lines 48 are both formed of a second metal layer.
  • the main branching area 480 of the common electrode line 48 is of a cross type and can be divided into a first extending portion 4801 and a second extending portion 4802 which are perpendicular to each other.
  • the second extension portion 4802 intersects the first shield metal region 481 or the second shield metal region 482 perpendicularly.
  • the second extension portion 4802 of the common electrode line 48 is disposed along the second direction and penetrates each of the sub-pixels 20S such that the common electrode lines 48 of the sub-pixels 20S of the same column are electrically connected to each other.
  • FIG. 5 is a schematic diagram of a pixel of a display panel according to a second embodiment of the present invention
  • FIG. 9 is a B-B' of FIG. A cross-sectional view of the line segment and the C-C' line segment.
  • an opening (Via) 49 is formed at an insulating layer (not shown) at the end of the first extension portion 4801 of the common electrode line 48, and a conductive layer (for example, indium tin oxide is formed on the opening 49).
  • the common electrode line 48 is electrically connected to the connection region 57, wherein the connection region 57 is also composed of the first metal layer.
  • the two common electrode lines 48 corresponding to the two pixels 20S connected to the scan line 40 on both sides of the same data line 42 are electrically connected.
  • the first shielding metal region 481 of the two common electrode lines 48 of the same row of sub-pixels 20 or the insulating layer at the end of the second shielding metal region 482 may also form an opening, and then form a conductive. The layer is on the opening.
  • the two common electrode lines 48 of the sub-pixels 20 of the same row are electrically connected to the conductive layer through the connection region 57 under the opening.
  • the scanning line 40 of the liquid crystal display panel of the present invention is made of a first metal layer
  • the data line 42 and the common electrode line 48 are made of a second metal layer.
  • the scan line 40 and the common electrode line 48 are formed by different metal layers in different etching processes, not only the distance d2 between the scan line 40 and the common electrode line 48 can be shortened, but also a part
  • the width W3 of the common electrode line 48 as the shield metal regions 481, 482 can also be appropriately reduced, so that the pixel aperture ratio can be improved.
  • FIG. 6 to FIG. 10 are schematic views of processes for forming the liquid crystal display panel of the present invention.
  • Fig. 10 is also a cross-sectional view corresponding to the line B-B' of Fig. 5 and the line C-C'.
  • a glass substrate 32 is first provided, followed by a metal film deposition process to form a first metal layer (not shown) on the surface of the glass substrate 32, and a first mask is used to perform the first lithography. Etching is performed to etch the gate 44G of the thin film transistor 44 and the connection region 57.
  • an insulating layer 52 made of silicon nitride (SiNx) is deposited to cover the gate 44G and the connection region 57. Continuous deposition of amorphous silicon on the insulating layer 52 (a-Si, Amorphous) Si) layer and a high electron doping concentration of N+ Amorphous silicon layer. The second lithography etching is performed using the second mask to constitute the semiconductor layer 44s.
  • the semiconductor layer 44s includes an amorphous silicon layer 44a as a channel of the thin film transistor 44 and an ohmic contact layer for reducing impedance (Ohmic) Contact layer) 44b.
  • a second metal layer (not shown) is formed on the insulating layer 52, and a third mask is used to perform a third lithography etching to define the thin film transistor 44, respectively.
  • Data line 42 is directly connected to source 44S.
  • an opening 49 is also formed in the insulating layer 52 during the third lithography etching.
  • a protective layer of silicon nitride passivation
  • the surface is such that a via hole (Via) 56 is formed over the drain electrode 44D.
  • Indium tin is formed on the protective layer 54 Oxide, ITO) is a transparent conductive layer of the material, and then the transparent conductive layer is etched using a fifth mask to form the pixel electrode 58.
  • the pixel electrode 58 is electrically connected to the drain 44D of the thin film transistor 44 through a connection hole 56 formed in advance.
  • the pixel electrode 58 is formed on the opening 49 such that the common electrode line 48 is electrically connected to the connection region 57.

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Abstract

一种液晶显示面板（30）以及其形成方法。该液晶显示面板（30）包含多个像素（20）、多行扫描线（G1、G2、...、G3m）以及多列数据线（D1、D2、...、Dn)，所述多行扫描线是以第一金属层制成，每一像素包含多个子像素（20R、20G、20B），每一子像素包含像素电极（22A、22B、22C）、薄膜晶体管（T1、Τ2、Τ3）和共通电极线（C1、48）。该共通电极线（C1、48）包含主支干区（480）、第一屏蔽金属区（481）和第二屏蔽金属区（482），所述第一屏蔽金属区（481）和所述第二屏蔽金属区（482）平行于所述多行扫描线（40）且连接于所述主支干区（480），且所述多列数据线（42）和所述共通电极线（48）皆由所述第二金属层构成。因为扫描线（40）和共通电极线（48）是由不同金属层在不同蚀刻制程所形成，不仅扫描线（40）和共通电极线（48）之间的距离可以缩短，一部分做为屏蔽金属区的共通电极线（48）的宽度也可以适当地减小，因此可以提高像素开口率。

Description

液晶显示面板及形成液晶显示面板的方法 技术领域
本发明涉及一种液晶显示面板，尤指一种具有高开口率的三栅型(tri-gate)像素结构的液晶显示面板。
 背景技术
现今消费电子产品普遍采用轻薄的平板显示器，其中液晶显示器已经逐渐被各种电子设备如电视、移动电话、个人数字助理、数码相机、计算机屏幕或笔记本电脑等所广泛使用。
薄膜晶体管(Thin Film Transistor, TFT)液晶显示器的像素结构的驱动模式主要可分为单栅型(single-gate)像素结构与三栅型(tri-gate)像素结构两种。在分辨率n×m下，三栅型像素结构的液晶显示器具有的扫描线与源极线的数目分别为3m条与n条，而单栅型像素结构的液晶显示器之扫描线与源极线数目为m条与3n条。换句话说，在相同的分辨率下，相较于具有单栅型像素结构的显示面板，具有三栅型像素结构的显示面板的扫描线数目增加为三倍，而数据线数目则缩减为三分之一，因此具有三栅型像素结构的显示面板使用较多的栅极驱动芯片与较少的源极驱动芯片。由于栅极驱动芯片之成本与耗电量均较源极驱动芯片低，因此采用三栅型像素结构设计将可降低成本及耗电量。
请参阅图1，图1是现有技术的三栅型像素液晶显示面板的子像素的俯视图。液晶显示面板具有多个像素，每一像素至少由三个子像素100(分别是红色子像素、绿色子像素和蓝色子像素)组成。子像素100包括薄膜晶体管102以及像素电极112。薄膜晶体管102的栅极电性连接到扫描线（Scan line）104，源极电性连接到数据线（Date line）106，漏极电性连接到像素电极112。像素电极112实际上覆盖于共通电极线108以及屏蔽金属(shielding metal)区110之上，但为便于说明，在图1中，仅绘出像素电极112的相对位置。共通电极线108用来提供一公共电压，且共通电极线108与像素电极112重叠之处形成一存储电容。当扫描信号通过扫描线104输入，使得薄膜晶体管102开启时，数据信号藉由数据线106经由开启的薄膜晶体管102传递至像素电极112，使其充电到所需的电压。位于像素电极112底下的液晶分子会根据施加于像素电极112的该数据信号以及该公共电压的电压差控制其转动方向，使得子像素100显示出不同的亮度。当扫描线104没有接收扫描信号时，液晶分子仍然会因为该存储电容存储该公共电压与该数据信号的电压差而维持其转动方向，直到薄膜晶体管102收到下一次的扫描信号为止。为了增加存储电容的电容值，并减少寄生电容效应，在扫描线104两边会设置屏蔽金属区110。屏蔽金属区110与共通电极线108通过开口114电性连接，使得屏蔽金属区110与共通电极线108保持在同一电位，以避免施加于像素电极112的数据信号受到寄生电容的影响。
在现有技术中，薄膜晶体管102的栅极、屏蔽金属区110与扫描线104是由第一金属层构成，薄膜晶体管102的源极和漏极、数据线106与共通电极线108是由第二金属层构成。薄膜晶体管102、屏蔽金属区110、扫描线104、数据线106与共通电极线108等金属层定义为子像素100的不透光部分。而子像素100的开口率（aperture ratio）定义为可透光部分的面积与子像素100总面积（包括不透光部分的面积）的比值。子像素100的开口率直接影响背光源的利用和显示面板的亮度。开口率越大，液晶显示器的亮度越大，对比度越好。为了提高开口率，必须尽可能减少不透光部分的面积，同时还需最小化像素总体面积。因此，薄膜晶体管102越小或是扫描线104和数据线106的线宽越细，开口率越高。
然而，受限于制程，扫描线104的线宽W1一般较数据线106的线宽W2大，而且由同一层金属层制成的屏蔽金属区110与扫描线104之间必须保留固定的距离d1。这些因素都会使得像素开口率降低。
所以虽然使用三栅型像素结构的液晶显示面板具有低成本与低耗电的优点，但是像素开口率降低的问题仍待进一步的改善。
 技术问题
本发明的目的是提供一种具有提高像素开口率的液晶显示面板，以解决现有技术的问题。
 技术解决方案
为了达成本发明的目的，本发明揭示一种液晶显示面板，其包含多个像素、多行彼此相互平行并朝一第一方向延伸的扫描线以及多列彼此相互平行并朝一第二方向延伸的数据线。所述第二方向垂直于所述第一方向。所述多行扫描线是以一第一金属层制成，用来传输扫描信号。所述多列数据线是以一第二金属层制成，用来传输数据信号。每一像素包含多个子像素。每一子像素包含：一像素电极，由一透明导电层形成；一薄膜晶体管，所述薄膜晶体管是一对一与所述像素电极、所述扫描线和所述数据线连接；以及一共通电极线，包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述多行扫描线且连接于所述主支干区，且所述共通电极线由所述第二金属层构成。一绝缘层设置于所述第一金属层和所述第二金属层之间。位于其中一数据线两边且连接于其中一扫描线的两像素所对应的两共通电极线是电性连接。所述液晶显示面板另包含二贯穿所述绝缘层的开口，所述透明导电层设置于所述二开口以及所述第一金属层上，使得所述两共通电极线通过所透明导电层以及所述第一金属层电性连接。所述两共通电极线的所述主支干区通过所透明导电层以及所述第一金属层电性连接。
为了达成本发明的目的，本发明另揭示一种液晶显示面板，其包含多个像素、多行彼此相互平行并朝一第一方向延伸的扫描线以及多列彼此相互平行并朝一第二方向延伸的数据线。所述第二方向垂直于所述第一方向。所述多行扫描线是以一第一金属层制成，用来传输扫描信号。所述多列数据线是以一第二金属层制成，用来传输数据信号。每一像素包含多个子像素。每一子像素包含：一像素电极，由一透明导电层形成；一薄膜晶体管，所述薄膜晶体管是一对一与所述像素电极、所述扫描线和所述数据线连接；以及一共通电极线，包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述多行扫描线且连接于所述主支干区，且所述共通电极线由所述第二金属层构成。
根据本发明的实施例，所述共通电极线的主支干区是呈十字型。
根据本发明的实施例，一绝缘层设置于所述第一金属层和所述第二金属层之间。
根据本发明的实施例，位于其中一数据线两边且连接于其中一扫描线的两像素所对应的两共通电极线是电性连接。
根据本发明的实施例，所述液晶显示面板另包含二贯穿所述绝缘层的开口，所述透明导电层设置于所述二开口以及所述第一金属层上，使得所述两共通电极线通过所透明导电层以及所述第一金属层电性连接。
根据本发明的实施例，所述两共通电极线的所述第一屏蔽金属区或是所述两共通电极线的所述第二屏蔽金属区是通过所透明导电层以及所述第一金属层电性连接。
根据本发明的实施例，每一像素包含红色子像素、绿色子像素与蓝色子像素。
根据本发明的实施例，所述透明导电层的材质是氧化铟锡物。
为了达成本发明的目的，本发明另提供一种形成液晶显示面板的方法，其包含：
提供一玻璃基板；
形成一第一金属层于所述玻璃基板上；
蚀刻所述第一金属层，以形成一薄膜晶体管的栅极以及一扫描线；
在所述薄膜晶体管的栅极以及所述扫描线上形成一绝缘层；
形成所述薄膜晶体管的通道区域于该绝缘层上；以及
形成一第二金属层，并蚀刻所述第二金属层，以形成所述薄膜晶体管的源极和漏极、一共通电极线以及一数据线，其中所述共通电极线包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述扫描线且连接于所述主支干区。
根据本发明的实施例，所述方法另包含：
在所述数据线、所述共通电极线、所述薄膜晶体管的源极和漏极上形成一保护层；
于所述共通电极线下方的所述保护层蚀刻一开口；以及
形成一透明导电层于所述开口以及所述第一金属层上，使得所述共通电极线通过所述透明导电层电性连接所述第一金属层。
根据本发明的实施例，所述方法另包含：
于所述共通电极线下方的所述保护层蚀刻所述开口的同时，并于所述漏极的上方蚀刻所述保护层以形成一连接孔；及
形成一透明导电层于所述开口以及所述第一金属层上的同时，并于所述连接孔的上方形成所述透明导电层以产生一像素电极。
 有益效果
相较于现有技术，本发明提供一种液晶显示面板以及形成该液晶显示面板的方法。该液晶显示面板的扫描线是由第一金属层制成，数据线和共通电极线则由第二金属层制成。因为扫描线和共通电极线是由不同金属层在不同蚀刻制程所形成，不仅扫描线和共通电极线之间的距离可以缩短，一部分做为屏蔽金属区的共通电极线的宽度也可以适当地减小，因此可以提高像素开口率。
 附图说明
图1是现有技术的三栅型像素液晶显示面板的子像素的俯视图。
图2为本发明一较佳实施例具有三栅型像素结构的液晶显示器的示意图。
图3绘示了本发明的三栅型像素的电路图。
图4为本发明第一实施例的显示面板的子像素的上视图。
图5是本发明第二实施例的显示面板的像素的示意图。
图6是图5的C-C’线段的截面图。
图6至图10是形成本发明液晶显示面板的各制程的示意图。
 本发明的最佳实施方式
在说明书及权利要求书中使用了某些词汇来指称特定的组件。所属领域中具有通常知识者应可理解，制造商可能会用不同的名词来称呼同样的组件。本说明书及权利要求并不以名称的差异来作为区别组件的方式，而是以组件在功能上的差异来作为区别的基准。在通篇说明书及权利要求当中所提及的“包含”为一开放式的用语，故应解释成“包含但不限定于”。此外，“电性连接”一词在此是包含任何直接及间接的电气连接手段。因此，若文中描述一第一装置电性连接于一第二装置，则代表该第一装置可直接连接于该第二装置，或透过其他装置或连接手段间接地连接至该第二装置。
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语，例如“上”、“下”、“前”、“后”、“左”、“右”、“顶”、“底”、“水平”、“垂直”等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参考图2。图2为本发明一较佳实施例具有三栅型像素结构的液晶显示器10的示意图。液晶显示器10具有栅极驱动模块12、源极驱动模块14与液晶显示面板30。以分辨率n×m为例，具有三栅型像素结构的显示面板30具有n×m个像素20、m×3条扫描线G1、G2、...、G3m，以及n条数据线D1、D2、...、Dn，且扫描线与数据线定义出3×m×n个子像素R、G、B，其中扫描线G1、G2、...、G3m是电性连接至栅极驱动模块12，而数据线D1、D2、...、Dn是电性连接至源极驱动模块14。每一像素20包括三个子像素R、G、B。
请参考图3，图3绘示了本发明的三栅型像素的电路图。如图3所示，三栅型像素20包括三子像素(分别为红色子像素20R、绿色子像素20G与蓝色子像素20B)、三薄膜晶体管T1、T2、T3分别设置于红色子像素20R、绿色子像素20G与蓝色子像素20B内，以及三像素电极22A、22B、22C分别设置于红色子像素20R、绿色子像素20G与蓝色子像素20B内。薄膜晶体管T1、T2、T3的栅极分别与对应的扫描线G1、G2、G3电性连接，薄膜晶体管T1、T2、T3的源极则均与数据线D1电性连接，而各薄膜晶体管T1、T2、T3的漏极则分别与像素电极22A、22B、22C电性连接。藉由上述配置，三栅型像素结构20之红色子像素20R、绿色子像素20G与蓝色子像素20B是分别受扫描线G1、G2、G3的控制，而接收同一数据线D1于不同时间点所传送的信号信号以分别于红色子像素20R、绿色子像素20G与蓝色子像素20B显示不同灰阶。另外，扫描线G1、G2、G3是沿第一方向排列，数据线是沿第二方向排列，第一方向是垂直于第二方向。共通电极线C1则越过扫描线G1、G2、G3并与扫描线G1、G2、G3部分重叠，且共通电极线C1分别与像素电极22A、22B、22C部分重叠构成三储存电容。
请参考图4，图4为本发明第一实施例的显示面板的子像素的上视图。在以下各实施例中，是以具有三栅型像素结构的液晶显示面板30为例说明本发明，但本发明的显示面板30的像素20并不以此为限。如图4所示，本实施例的液晶显示面板30包括玻璃基板(亦称为薄膜晶体管基板)32与多个设置于玻璃基板32上的像素20。每一像素20包括三子像素20S，例如红色子像素、绿色子像素与蓝色子像素。为便于说明，图4仅绘示像素电极的相对位置。子像素20S是为一长方形区域，且长方形区域之长轴是沿第一方向X设置，而短轴方向则沿第二方向Y设置，其中第一方向X与第二方向Y大致上互相垂直。扫描线40是设置于玻璃基板32上并沿第一方向X排列，数据线42则是设置于玻璃基板32上并沿第二方向Y排列。扫描线40是由第一金属层制成。薄膜晶体管44是分别设置于各子像素20S内，且各薄膜晶体管44包括栅极44G、源极44S与漏极44D，各栅极44G是与对应之扫描线40电性连接，各源极44S均是与数据线42电性连接，而各漏极44D则分别与设置于各子像素20S内的像素电极58电性连接。
共通电极线48是设置于玻璃基板32上并越过扫描线40且与扫描线40部分重叠，藉此共通电极线48分别与像素电极重叠之处而构成储存电容。共通电极线48与扫描线40是由两个不同金属层所构成，且该两金属层之间设有一绝缘层(未图示)，用来避免两金属层直接电性连接。因此共通电极线48可与扫描线40沿不同方向排列并跨越扫描线40，例如扫描线40是沿子像素20S的长轴方向(第一方向)延伸，而共通电极线48是由子像素20S的短轴方向(第二方向)贯穿子像素20S，如此一来可缩减共通电极线48在显示区所占的面积比例，藉以减少遮光面积以提升开口率。在本实施例中，共通电极线48可与数据线42由同一层导电图案，如第二层金属层所构成，但不以此为限，共通电极线48亦可由另一层导电层所构成。
共通电极线48包含主支干区480、一第一屏蔽金属区481和一第二屏蔽金属区482。第一屏蔽金属区481和第二屏蔽金属区482平行于多行扫描线40且连接于主支干区480，且多列数据线42和共通电极线48皆由第二金属层构成。共通电极线48的主支干区480是呈十字型，可分为相互垂直的第一延伸部4801和第二延伸部4802。第二延伸部4802与第一屏蔽金属区481或第二屏蔽金属区482垂直相交。共通电极线48的第二延伸部4802沿第二方向设置并贯穿各子像素20S，使得同一列的子像素20S的共通电极线48皆相互电性连接。
请参阅图5和图9，图5是本发明第二实施例的显示面板的像素的示意图，图9是图5的B-B’ 线段和C-C’线段的截面图。在本实施例中，共通电极线48的第一延伸部4801的末端的绝缘层(未图示)之处形成一开口(Via)49，并在开口49上形成一导电层(例如氧化铟锡物)，使得共通电极线48与连接区57电性连接，其中连接区57也是由第一金属层构成。因此位于同一数据线42两边且连接于扫描线40的两像素20S所对应的两共通电极线48是电性连接。在另一实施例中，同一行的子像素20的两共通电极线48的第一屏蔽金属区481或是第二屏蔽金属区482的末端的绝缘层之处也可以形成开口，之后再形成导电层于该开口上。同一行的子像素20的两共通电极线48通过该开口下方的连接区57和该导电层电性连接。
综上所述，本发明的液晶显示面板的扫描线40是由第一金属层制成，数据线42和共通电极线48则由第二金属层制成。特别是对于三栅型像素结构而言，因为扫描线40和共通电极线48是由不同金属层在不同蚀刻制程所形成，不仅扫描线40和共通电极线48之间的距离d2可以缩短，一部分做为屏蔽金属区481、482的共通电极线48的宽度W3也可以适当地减小，因此可以提高像素开口率。
在此请参阅图6至图10，图6至图10是形成本发明液晶显示面板的各制程的示意图。图10也是对应于图5的B-B’线段以及C-C’线段的截面图。
请参阅图6，首先提供一个玻璃基板32，接着进行一金属薄膜沉积制程，以于玻璃基板32表面形成一第一金属层（未显示），并利用一第一掩膜来进行第一微影蚀刻，以蚀刻得到薄膜晶体管44的栅极44G以及连接区57。
接着请参阅图7，接着沉积以氮化硅(SiNx)为材质的绝缘层52而覆盖栅极44G以及连接区57。于绝缘层52上连续沉积非晶硅(a－Si，Amorphous Si)层以及一高电子掺杂浓度的N+ 非晶硅层。利用第二掩膜来进行第二微影蚀刻以构成半导体层44s。半导体层44s包含作为薄膜晶体管44通道的非晶硅层44a以及用来降低阻抗的欧姆接触层(Ohmic contact layer)44b。
请参阅图8，接着在绝缘层52上形成一全面覆盖的第二金属层(未绘示于图中)，并利用第三掩膜来进行第三微影蚀刻以分别定义出薄膜晶体管44的源极44S及漏极44D、共通电极线48以及数据线42。数据线42是直接连接到源极44S。同时，在第三微影蚀刻时也会在绝缘层52上形成开口49。
请参阅图9，接着沉积以氮化硅为材质的保护层(passivation layer)54，并覆盖源极44S、及漏极44D和数据线42，再利用第四掩膜来进行第四微影蚀刻用以去除漏极44D上方的部份保护层54，直至漏极44D表面，以于漏极44D上方形成连接孔(Via)56。
请参阅图10。在保护层54上形成以氧化铟锡物(Indium tin oxide，ITO)为材质的透明导电层，接着利用一第五掩膜蚀刻该透明导电层以形成像素电极58。像素电极58透过预先形成的连接孔56与薄膜晶体管44的漏极44D电性连接。同时像素电极58会形成于开口49之上，使得共通电极线48与连接区57电性连接。
综上所述，虽然本发明已以较佳实施例揭露如上，但该较佳实施例并非用以限制本发明，该领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
 本发明的实施方式
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Claims (14)

  1. 一种液晶显示面板，其包含多个像素、多行彼此相互平行并朝一第一方向延伸的扫描线以及多列彼此相互平行并朝一第二方向延伸的数据线，所述第二方向垂直于所述第一方向，所述多行扫描线是以一第一金属层制成，用来传输扫描信号，所述多列数据线是以一第二金属层制成，用来传输数据信号，每一像素包含多个子像素，其特征在于，每一子像素包含：
    一像素电极，由一透明导电层形成；
    一绝缘层，设置于所述第一金属层和所述第二金属层之间；
    一薄膜晶体管，所述薄膜晶体管是一对一与所述像素电极、所述扫描线和所述数据线连接；以及
    一共通电极线，包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述多行扫描线且连接于所述主支干区，且所述共通电极线由所述第二金属层构成；
    其中，所述绝缘层设有二贯穿所述绝缘层的开口，所述透明导电层设置于所述二开口以及所述第一金属层上，使得位于其中一数据线两边且连接于其中一扫描线的两子像素所对应的两共通电极线的所述主支干区通过所透明导电层以及所述第一金属层电性连接。
  2. 根据权利要求1所述的液晶显示面板，其特征在于，每一像素包含红色子像素、绿色子像素与蓝色子像素。
  3. 根据权利要求1所述的液晶显示面板，其特征在于，所述透明导电层的材质是氧化铟锡物。
  4. 一种液晶显示面板，其包含多个像素、多行彼此相互平行并朝一第一方向延伸的扫描线以及多列彼此相互平行并朝一第二方向延伸的数据线，所述第二方向垂直于所述第一方向，所述多行扫描线是以一第一金属层制成，用来传输扫描信号，所述多列数据线是以一第二金属层制成，用来传输数据信号，每一像素包含多个子像素，其特征在于，每一子像素包含：
    一像素电极，由一透明导电层形成；
    一薄膜晶体管，所述薄膜晶体管是一对一与所述像素电极、所述扫描线和所述数据线连接；以及
    一共通电极线，包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述多行扫描线且连接于所述主支干区，且所述共通电极线由所述第二金属层构成。
  5. 根据权利要求4所述的液晶显示面板，其特征在于，所述共通电极线的主支干区是呈十字型。
  6. 根据权利要求4所述的液晶显示面板，其特征在于，另包含一绝缘层，设置于所述第一金属层和所述第二金属层之间。
  7. 根据权利要求6所述的液晶显示面板，其特征在于，位于其中一数据线两边且连接于其中一扫描线的两子像素所对应的两共通电极线是电性连接。
  8. 根据权利要求7所述的液晶显示面板，其特征在于，另包含二贯穿所述绝缘层的开口，所述透明导电层设置于所述二开口以及所述第一金属层上，使得所述两共通电极线通过所透明导电层以及所述第一金属层电性连接。
  9. 根据权利要求8所述的液晶显示面板，其特征在于，所述两共通电极线的所述第一屏蔽金属区或是所述两共通电极线的所述第二屏蔽金属区是通过所透明导电层以及所述第一金属层电性连接。
  10. 根据权利要求4所述的液晶显示面板，其特征在于，每一像素包含红色子像素、绿色子像素与蓝色子像素。
  11. 根据权利要求4所述的液晶显示面板，其特征在于，所述透明导电层的材质是氧化铟锡物。
  12. 一种形成液晶显示面板的方法，其包含：
    提供一玻璃基板；
    形成一第一金属层于所述玻璃基板上；
    蚀刻所述第一金属层，以形成一薄膜晶体管的栅极以及一扫描线；
    在所述薄膜晶体管的栅极以及所述扫描线上形成一绝缘层；
    形成所述薄膜晶体管的通道区域于该绝缘层上；以及
    形成一第二金属层，并蚀刻所述第二金属层，以形成所述薄膜晶体管的源极和漏极、一共通电极线以及一数据线，其中所述共通电极线包含一主支干区、一第一屏蔽金属区和一第二屏蔽金属区，所述第一屏蔽金属区和所述第二屏蔽金属区平行于所述扫描线且连接于所述主支干区。
  13. 根据权利要求12所述形成液晶显示面板的方法，其特征在于，所述方法另包含：
    在所述数据线、所述共通电极线、所述薄膜晶体管的源极和漏极上形成一保护层；
    于所述共通电极线下方的所述保护层蚀刻一开口；以及
    形成一透明导电层于所述开口以及所述第一金属层上，使得所述共通电极线通过所述透明导电层电性连接所述第一金属层。
  14. 根据权利要求12所述形成液晶显示面板的方法，其特征在于，所述方法另包含：
    于所述共通电极线下方的所述保护层蚀刻所述开口的同时，并于所述漏极的上方蚀刻所述保护层以形成一连接孔；及
    形成所述透明导电层于所述开口以及所述第一金属层上的同时，并于所述连接孔的上方形成所述透明导电层以产生一像素电极。
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