WO2013054553A1 - 歪み補償回路および歪み補償回路と高周波電力増幅器を用いた送信装置 - Google Patents

歪み補償回路および歪み補償回路と高周波電力増幅器を用いた送信装置 Download PDF

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Publication number
WO2013054553A1
WO2013054553A1 PCT/JP2012/056284 JP2012056284W WO2013054553A1 WO 2013054553 A1 WO2013054553 A1 WO 2013054553A1 JP 2012056284 W JP2012056284 W JP 2012056284W WO 2013054553 A1 WO2013054553 A1 WO 2013054553A1
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Prior art keywords
signal
distortion compensation
distortion
input signal
symmetric
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Ceased
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PCT/JP2012/056284
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English (en)
French (fr)
Japanese (ja)
Inventor
廣瀬　伸郎
坂田　誠志
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Kokusai Denki Electric Inc
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Hitachi Kokusai Electric Inc
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Priority to US14/003,137 priority Critical patent/US8938027B2/en
Publication of WO2013054553A1 publication Critical patent/WO2013054553A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C1/00—Amplitude modulation
    • H03C1/02—Details
    • H03C1/06—Modifications of modulator to reduce distortion, e.g. by feedback, and clearly applicable to more than one type of modulator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3258—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits based on polynomial terms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H04L27/366—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
    • H04L27/367—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion
    • H04L27/368—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion adaptive predistortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/336—A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion

Definitions

  • the present invention relates to distortion compensation for reducing distortion components output from a transmission apparatus that performs wireless radio wave power amplification by a high-frequency power amplifier.
  • OFDM Orthogonal Frequency Division Multiplexing
  • QAM Quadrature Amplitude Modulation method
  • Patent Document 1 An example of a conventional non-linear distortion pre-compensation technique, particularly an odd-order distortion independent compensation technique, is disclosed in Patent Document 1.
  • High-frequency power amplifiers generally have a so-called memory effect in which distortion increases due to the influence of past signals as the signal bandwidth increases, and hysteresis characteristics and even symmetrical distortion increase. And the circuit scale of predistortion compensation becomes large. Therefore, Non-Patent Document 1 proposes a method for reducing the circuit scale of predistortion compensation by the memory effect of the high frequency power amplifier.
  • Patent Document 2 discloses a distortion pre-compensation technique using an even-order time difference.
  • Patent Document 3 discloses a distortion pre-compensation technique using amplitude differentiation and phase differentiation. *
  • Patent Document 2 and Patent Document 3 have a drawback that it takes time to converge the pre-compensation that reduces the memory effect.
  • An object of the present invention is to shorten the convergence time for compensating for distortion generated in a high-frequency power amplifier.
  • the present invention provides a distortion compensation that independently generates an odd-symmetric distortion compensation signal of each order of an input signal frequency-converted to a high frequency band or a high frequency power amplifier that amplifies the power of the high frequency band input signal.
  • a signal generation circuit and a distortion compensation signal superimposition that superimposes (multiplies or adds) the generated odd-symmetric distortion compensation signal of each order on an input signal before frequency conversion to the high frequency band or an input signal in the high frequency band (hereinafter referred to as the input signal).
  • a distortion compensation circuit having a (multiplication or addition) circuit a plurality of even-symmetric distortion compensation signals are generated independently from the difference (differentiation) from the delay of the input signal, and independently from the odd-symmetric distortion compensation signal,
  • An even symmetric distortion compensation signal generation circuit that linearly combines the plurality of generated even symmetric distortion compensation signals, and even symmetric distortion that superimposes (multiplies or adds) the linearly coupled even symmetric distortion compensation signals on the input signal.
  • a ⁇ No. superimposed (multiplication or addition) circuit a distortion compensation circuit, characterized in that to compensate for the odd-symmetric distortion and even symmetric distortion independently.
  • a distortion compensation signal generation circuit that independently generates coefficients of odd-order distortion compensation signals of each order of an input signal frequency-converted to a high frequency band or a high frequency power amplifier that amplifies power of a high frequency band input signal, and each generated order
  • a distortion compensation signal superimposing (multiplying or adding) circuit for superimposing (multiplying or adding) the input signal before frequency conversion of the odd-symmetric distortion compensation signal to the high frequency band or the input signal of the high frequency band (hereinafter referred to as the input signal).
  • the second signal And generating the pure even symmetric distortion by adding the first signal and the second signal, and adding the real component of the coefficient detected by the even symmetric distortion compensation signal generation circuit to the even symmetric distortion.
  • the distortion compensation signal having an even symmetric amplitude and the distortion compensation signal having an even symmetric phase are independently and oddly symmetric.
  • An even symmetric distortion compensation signal generation circuit that is generated independently of the compensation signal; and an even symmetric distortion compensation signal superimposition (multiplication or addition) circuit that superimposes (multiplies or adds) the generated even symmetric distortion compensation signal on the input signal.
  • the transmitter uses the above distortion compensation circuit and a high-frequency power amplifier.
  • the present invention it is possible to shorten the convergence time for compensating the distortion generated in the power amplifier by independently compensating the odd symmetric distortion and the even symmetric distortion.
  • 1 is a block diagram showing a transmitter according to an embodiment of the present invention (with built-in OFDM modulator).
  • 1 is a block diagram showing a transmitter according to an embodiment of the present invention (an external OFDM modulator)
  • 1 is a block diagram showing a transmitter according to an embodiment of the present invention (one distortion signal generation circuit)
  • the block diagram (amplitude differentiation and phase differentiation) which shows the even symmetrical distortion signal generation circuit of one Example of this invention 1 is a block diagram (automatic coefficient calculation) showing an even symmetric distortion signal generation circuit according to one embodiment of the present invention.
  • 1 is a block diagram showing an even symmetric distortion signal generation circuit according to an embodiment of the present invention (addition of a square).
  • Equation 3.1 The signal amplified by the power amplifier is expressed as Equation 3.1 as a function of amplitude and phase.
  • rms root mean square: abbreviated as rms
  • rms 1 of the signal dA (t) obtained by differentiating A (t)
  • the amplitude probability density of A (t) ⁇ exp (j ⁇ ⁇ (t)) in Equation 3.1 has a Rayleigh distribution in the OFDM signal.
  • the result of calculating the differentiated signal magnitude ⁇ 21 included in Equation 3.2 by simulation according to Equation 3.3 was approximately 0.6378.
  • Equation 3.4 is obtained from Equation 3.2 and Equation 3.3.
  • the magnitudes of the odd symmetric distortion and the even symmetric distortion generated in the power amplifier are respectively represented by the third-order amplitude distortion a3, the third-order phase distortion b3, the fifth-order amplitude distortion a5, the fifth-order phase distortion, and the 25th-order amplitude distortion a25.
  • 25th-order phase distortion b25, amplitude even symmetric distortion a2, and phase even symmetric distortion b2 the output signal pa_out of the power amplifier can be written as Equation 4.1
  • IMeven is assumed to be the equation shown in Equation 3.2 in order to simplify the calculation.
  • Equation 4.2 When a signal without distortion is subtracted from the output signal of the power amplifier, the error signal err is expressed by Equation 4.2. Multiply Equation 4.2 by the conjugate complex number of IMeven and average it to obtain Equation 4.3
  • FIG. 4 showing the amplitude establishment density of the differential value dA (t) of A (t) in the Rayleigh distribution is a Gaussian distribution.
  • FIG. 1A is a block diagram showing a transmitter according to one embodiment of the present invention (incorporating an OFDM modulator), and FIG. 1B is a block diagram showing a transmitter according to one embodiment of the present invention (external to an OFDM modulator).
  • FIG. 2A is a block diagram (amplitude differentiation and phase differentiation) showing an odd symmetric distortion signal generating circuit of one embodiment of the present invention
  • FIG. 2A is a block diagram (automatic) showing an odd symmetric distortion signal generating circuit of one embodiment of the present invention.
  • FIG. * The configuration and operation of one embodiment of the present invention will be described with reference to FIG. *
  • the even symmetric distortion signal is multiplied by the real component of the coefficient detected by the even symmetric distortion compensation signal generation circuit to generate an even symmetric amplitude distortion signal, and the imag component is multiplied to generate an even symmetric phase distortion signal. .
  • the inverse characteristics of the memory effect are approximated by linearly combining them. *
  • the digital input signal output from the OFDM modulator 1 incorporated in the modulator built-in distortion compensation circuit 38 of the present invention is input to the multiplier 2 and the variable delay unit 18.
  • the input signal that has been subjected to appropriate delay adjustment by the variable delay unit 18 is input to the distortion compensation signal generation circuit 39.
  • the output signal of the multiplier 2 is input to the adder 3, and the output signal of the adder 3 is modulated by the quadrature modulator (orthogonal modulation) 4, converted into an analog signal by the DAC 5, and then output from the distortion compensation circuit 38.
  • the frequency is converted by the mixer 40 and the oscillator 13, unnecessary waves are removed by the BPF 6, and power is amplified to a specified level by the high-frequency power amplifier (power amplifier) 7.
  • the output signal output from the power amplifier 7 is transmitted as a radio wave from the antenna 10 via the directional coupler 8 and the BPF 9. *
  • the signal distributed by the directional coupler 8 is frequency-converted by the mixer 11 and the oscillator 13, and unnecessary waves are removed by the BPF 12, and then input to the modulator built-in distortion compensation circuit 38.
  • the input signal is converted into a digital signal by an A / D converter (ADC) 14.
  • ADC A / D converter
  • the converted signal is gain-adjusted to an appropriate level signal by a variable amplifier (AGC) 15 and demodulated by an orthogonal demodulator (orthogonal demodulation) 16. Thereafter, the phase is adjusted to an appropriate phase characteristic by the phase shifter 17 and input to the distortion compensation signal generation circuit 39.
  • ADC A / D converter
  • the delay time of the two signals input to the distortion compensation signal generation circuit 39 by the variable delay device 18 is adjusted to be the same, and the phase shifter 17 inputs to the distortion compensation signal generation circuit 39 2.
  • the two signals are adjusted to have the same phase.
  • the distortion compensation signal generation circuit 39 By the two input signals, the distortion compensation signal generation circuit 39 generates an odd symmetric third-order distortion (A3) to seventh-order distortion (A7), and a symmetrical phase third-order distortion (P3) to seventh-order distortion (P7). ), Coefficient (magnitude) of even symmetric amplitude 2 distortion order distortion (A2) and even symmetric phase 2 distortion (P2) is detected independently, and odd symmetric distortion superposition (multiplication) circuit based on the coefficient 36 and the even symmetrical distortion superimposing (adding) circuit 37 add distortion compensation signals. Since the odd symmetric distortion coefficient detection and the odd symmetric distortion addition are the same as in Patent Document 1, a detailed description thereof will be omitted, and a brief description will be given, with an explanation centering on even symmetric distortion coefficient detection and even symmetric distortion addition. *
  • the output signal of the variable delay unit 18 is converted by the squaring circuit 28 into a real signal which is a square signal of the absolute value of the complex signal.
  • An odd symmetric distortion signal is generated from the real signal by the odd symmetric distortion signal generation circuit 29.
  • the signal of the output signal of the variable delay unit 18 is converted into a conjugate complex signal by a conjugater (CONjugation: CONJ) 26, and the distortion (difference between input and feedback) signal of the adder 25 and the multiplier 27 are converted.
  • Multiplied by The output signal of the multiplier 27 and the output signal of the odd symmetric distortion signal generation circuit 29 are multiplied by the multiplier 30, averaged by the averaging circuit 31, and the third-order to the output distortion (difference between input and feedback) signals.
  • the signals of the 7th order odd symmetric amplitude distortion coefficients A3 to A7 (real component) and the 3rd order to 7th order odd symmetric phase distortion coefficients (imag component) P3 to P7 are output. *
  • the odd symmetric distortion addition in the odd symmetric distortion superimposing circuit 36 will be described.
  • the digital input signal is converted by the square circuit 19 into a real signal which is a square signal of the absolute value of the complex signal.
  • An odd symmetric distortion signal is generated from the real signal by the odd symmetric distortion signal generation circuit 20.
  • the multiplier 21 multiplies the distortion signal (difference between input and feedback) signal coefficients A3 to A7 and P3 to P7 signals of the averaging circuit 31 output.
  • the output signal of the multiplier 21 which is a complex signal is subtracted from 1 by the adder 22 and converted to an inverse characteristic with respect to the characteristic of the power amplifier.
  • the signal is multiplied by a digital input signal that is an OFDM signal in the multiplier 2, and a signal on which odd-symmetrical inverse distortion is superimposed is output from the multiplier 2.
  • the output signal of the variable delay unit 18 generates even symmetric second-order distortion by the even symmetric distortion signal generation circuit 32, converts it to a conjugate complex number signal by the CONJ 33, and outputs distortion (addition between input and feedback) of the adder 25.
  • the difference signal is multiplied by the multiplier 34 and averaged by the averaging circuit 35, and an even-symmetric amplitude second-order distortion coefficient A2 and even-symmetric phase second-order distortion coefficient P2 are output.
  • the even symmetric distortion signal generation circuit 23 calculates the even symmetric secondary distortion of the digital input signal. Then, the multiplier 24 multiplies the signal A2 and the signal P2 of the distortion (difference between input and feedback) signal of the averaging circuit 35 output, and the amplitude secondary distortion signal and the phase secondary distortion signal based on the distortion coefficient are obtained. Generated. The output signal of the multiplier 24 is added to a signal on which an odd symmetric inverse distortion, which is an OFDM signal, is superimposed by an adder 3, and a signal to which an even symmetric inverse distortion is added is output from the adder 3. *
  • the even symmetric distortion signal generation circuit 32 may be replaced with a variable delay device having a certain amount of delay, and the output of the even symmetric distortion signal generation circuit 23 may be delayed and input to a conjugator (CONjugation: CONJ) 33.
  • the square circuit 28 and the odd symmetric distortion signal generation circuit 29 may be replaced with a variable delay device having a certain value, and the output of the odd symmetric distortion signal generation circuit 20 may be delayed and input to the multiplier 30.
  • FIG. 2A is a block diagram showing an even symmetric distortion generating circuit according to an embodiment of the present invention.
  • the input signal is converted into an absolute value real signal of a complex signal by the absolute value conversion circuit 51.
  • the converted real signal is output by the delay unit (D) 52 and the adder 54 as a difference (approximate derivative) from the previous sample.
  • the converted real signal is calculated by the effective value reciprocal calculation circuit 62 to calculate the reciprocal of the effective value, and the multiplier 56 multiplies the difference output of the adder 54 by the multiplier 56. Further, a multiplier 58 multiplies the output of the multiplier 56 and the input signal.
  • the input signal takes the difference (approximate derivative) output from the previous sample by the delay unit (D) 53 and the adder 55. Further, the inverse of the effective value is calculated by the effective value reciprocal calculation circuit 63, the input signal is multiplied by the difference output of the adder 55 by the multiplier 57, and a coefficient of 0.6378 (input included in the signal of the multiplier 58 output) is multiplied by the multiplier 59. Signal magnitude).
  • the multiplier 58 output and the multiplier 59 output are added by the adder 60, and an even symmetric distortion signal of the memory effect is output. *
  • FIG. 1B of a block diagram (external to an OFDM modulator) showing a transmitter according to an embodiment of the present invention has an OFDM modulator (OFDM-MOD analog output) 44 externally attached to the distortion compensation circuit 45 and an A / A D converter (ADC) 41, a variable amplifier (AGC) 42, and a quadrature demodulator (orthogonal demodulation) 43 are added. Since other configurations and operations are the same as those in FIG. explain. *
  • the analog input signal output from the OFDM modulator (OFDM-MOD analog output) 44 is input to the distortion compensation circuit 48 of the present invention.
  • the input signal is converted into a signal by the ADC 41.
  • the converted digital signal is gain-adjusted to an appropriate level signal by the AGC 42 and further demodulated into a baseband signal by an orthogonal demodulator (orthogonal demodulation) 43.
  • FIG. 3 of a block diagram (addition of a square) showing an odd-symmetric distortion signal generation circuit according to one embodiment of the present invention.
  • a description of the same configuration and operation as in the first embodiment will be omitted, and only the differences will be described.
  • the distortion is less when the higher order even symmetric distortion is detected and compensated as in the second embodiment.
  • FIG. 3 is a block diagram showing an odd symmetric distortion signal generating circuit according to one embodiment of the present invention (addition of a square), and FIG. 3 is a block diagram showing an odd symmetric distortion signal generating circuit according to one embodiment of the present invention (amplitude differentiation and phase). 2) of the circuit of FIG. 2A and 70 of the square circuit, not only the amplitude differentiation and phase differentiation of the square signal but also detecting the even symmetric distortion of the amplitude differentiation and phase differentiation of the square signal. , Have compensated. *
  • the present invention is not limited to the first embodiment and the second embodiment, and the coefficients of the odd-symmetric distortion compensation signal of each order of the input signal frequency-converted to the high frequency band or the high frequency power amplifier that amplifies the power of the high frequency band input signal are independently determined.
  • the coefficients of the input signal before frequency conversion to the high frequency band or the differential even symmetric distortion compensation signal of the high frequency band input signal are independent of each other and independent of the odd symmetric distortion compensation signal. It can be widely applied to distortion precompensation circuits generated in
  • OFDM modulator OFDM-MOD digital output
  • 44 OFDM modulator (OFDM-MOD analog output)
  • 4 Orthogonal modulator (orthogonal modulation)
  • 5 D / A converter (DAC)
  • 16, 43 Orthogonal demodulator (orthogonal demodulation)
  • 11, 40 mixer, 6, 9, 12: BPF, 13: oscillator, 14, 41: A / D converter (ADC), 15, 42: variable amplifier (AGC), 7: high frequency power amplifier (power amplifier), 8: directional coupler
  • 10 antenna, 2, 21, 24, 34, 36, 37, 56, 57, 58, 61, 69, 76, 77, 78, 81 : Multiplier, 3, 22, 25, 54, 55, 60, 74, 75, 80, 82: adder, 20, 29: odd symmetric distortion signal generation circuit, 23, 32: even symmetric distortion signal generation circuit, 36 : Odd symmetric distortion superposition (multiplication) circuit, 37: even symmetric distortion superposition (addition) circuit, 38: Distor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
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PCT/JP2012/056284 2011-10-13 2012-03-12 歪み補償回路および歪み補償回路と高周波電力増幅器を用いた送信装置 Ceased WO2013054553A1 (ja)

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Application Number Priority Date Filing Date Title
US14/003,137 US8938027B2 (en) 2011-10-13 2012-03-12 Distortion compensation circuit, and transmission device using distortion compensation circuit and high-frequency power amplifier

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JP2011225717A JP6037493B2 (ja) 2011-10-13 2011-10-13 歪み補償回路および歪み補償回路と高周波電力増幅器を用いた送信装置
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JP2018164185A (ja) * 2017-03-24 2018-10-18 富士通株式会社 歪補償装置、及び歪補償方法

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WO2014050218A1 (ja) * 2012-09-25 2014-04-03 株式会社日立国際電気 歪み補償回路および歪み補償回路と高周波電力増幅器を用いた送信装置
KR20160091607A (ko) * 2015-01-26 2016-08-03 삼성전자주식회사 영상처리장치, 초음파 장치 및 그 제어방법

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JP2010068142A (ja) * 2008-09-09 2010-03-25 Hitachi Kokusai Electric Inc 歪補償増幅装置

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US7180368B2 (en) 2002-11-14 2007-02-20 Hitachi Kokusai Electric Inc. Distortion compensation circuit, distortion compensation signal generating method, and power amplifier
SE525221C2 (sv) * 2003-03-25 2004-12-28 Ericsson Telefon Ab L M Förförvrängare för effektförstärkare
JP4394409B2 (ja) 2003-09-25 2010-01-06 株式会社日立国際電気 プリディストーション方式歪補償機能付き増幅器
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JP2008294518A (ja) 2007-05-22 2008-12-04 Hitachi Kokusai Electric Inc 送信装置
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JP2005333353A (ja) * 2004-05-19 2005-12-02 Hitachi Kokusai Electric Inc プリディストータ
JP2010068142A (ja) * 2008-09-09 2010-03-25 Hitachi Kokusai Electric Inc 歪補償増幅装置
JP2009219167A (ja) * 2009-07-02 2009-09-24 Hitachi Kokusai Electric Inc プリディストーション方式歪補償機能付き増幅器

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018164185A (ja) * 2017-03-24 2018-10-18 富士通株式会社 歪補償装置、及び歪補償方法

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BR102012005528A2 (pt) 2014-06-03
US20130343484A1 (en) 2013-12-26
US8938027B2 (en) 2015-01-20
JP2013089993A (ja) 2013-05-13
JP6037493B2 (ja) 2016-12-07

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