WO2013001743A1 - Dispositif de réception à semi-conducteurs - Google Patents

Dispositif de réception à semi-conducteurs Download PDF

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Publication number
WO2013001743A1
WO2013001743A1 PCT/JP2012/003966 JP2012003966W WO2013001743A1 WO 2013001743 A1 WO2013001743 A1 WO 2013001743A1 JP 2012003966 W JP2012003966 W JP 2012003966W WO 2013001743 A1 WO2013001743 A1 WO 2013001743A1
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WIPO (PCT)
Prior art keywords
transmission line
terminal
transistors
mixer
line
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PCT/JP2012/003966
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English (en)
Japanese (ja)
Inventor
信二 宇治田
健志 福田
酒井　啓之
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パナソニック株式会社
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Publication of WO2013001743A1 publication Critical patent/WO2013001743A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/08—Coupling devices of the waveguide type for linking dissimilar lines or devices
    • H01P5/10—Coupling devices of the waveguide type for linking dissimilar lines or devices for coupling balanced lines or devices with unbalanced lines or devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/03—Details of HF subsystems specially adapted therefor, e.g. common to transmitter and receiver
    • G01S7/032—Constructional details for solid-state radar subsystems
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1441—Balanced arrangements with transistors using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
    • H03D7/165—Multiple-frequency-changing at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0023—Balun circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0041—Functional aspects of demodulators
    • H03D2200/0082—Quadrature arrangements

Definitions

  • the present invention relates to a semiconductor receiving device mounted on an MMIC (Monolithic Integrated Circuit) chip in a high-frequency semiconductor device such as various communication devices or radars.
  • MMIC Compolithic Integrated Circuit
  • CMOS Complementary Metal Oxide Semiconductor
  • an ultra-wide band called UWB Ultra Wide Band
  • quasi-millimeter waves and millimeter waves are also expected for large-capacity communication and ultrahigh-speed communication applications.
  • quasi-millimeter waves and millimeter waves are greatly expected to be used for sensing because they are less attenuated by obstacles such as rain and clouds than visible light and infrared light and have higher resolution than microwaves. Yes.
  • a modulator and a quadrature demodulator are indispensable for a semiconductor receiver for these applications.
  • a radar apparatus using a spread spectrum method will be described as an example.
  • a transmission radio wave is modulated using a pseudo noise code (PN) used for spreading.
  • PN pseudo noise code
  • the receiver despreads the reflected wave reflected from the object using the same code as the PN code used for modulating the transmission radio wave. For this reason, radio waves modulated with different codes and radio waves radiated from other types of radar devices that do not use code modulation are suppressed in the receiver.
  • the transmission radio wave is frequency spread by the PN code, the power per unit frequency can be reduced. Thereby, the influence which transmission radio waves have on other wireless systems can be reduced. Furthermore, the relationship between the distance resolution and the maximum detection distance can be freely set by adjusting the chip rate and code cycle of the PN code. In addition, since the radio wave can be transmitted continuously, the peak power does not increase. Further, by using the quadrature demodulator, a stable radar reception spectrum can be obtained without being influenced by the phase of the reception signal.
  • a spread spectrum radar apparatus always requires a semiconductor receiver including a spread modulator and a quadrature demodulator.
  • demodulation is first performed by a modulator and then frequency down-converted by an orthogonal demodulator in a path through which a received signal propagates. If the received signal is first frequency down-converted by the quadrature demodulator, an element or a circuit through which an ultra-wideband baseband signal propagates is required, which makes it difficult to design.
  • FIG. 13 is a diagram illustrating a configuration of the quadrature demodulator 112 described in Patent Document 1.
  • FIG. 13 is a diagram illustrating a configuration of the quadrature demodulator 112 described in Patent Document 1.
  • Transistors Tr107, Tr108, Tr109, Tr110, Tr111 and Tr112 are bipolar transistors, and these transistors form a Gilbert cell mixer. Further, the transistors Tr113, Tr114, Tr115, Tr116, Tr117, and Tr118 are bipolar transistors, and these transistors form a Gilbert cell mixer. These two Gilbert cell mixers constitute a quadrature demodulator 112.
  • the Gilbert cell mixer constituting the quadrature demodulator includes a constant current source.
  • a transistor having a current mirror configuration is used for the constant current source.
  • silicon ICs with good high frequency characteristics are low breakdown voltage devices that can only apply a small voltage. Furthermore, low power consumption is required for mobile applications and the like from an application viewpoint, and it is difficult to apply a large voltage to the device.
  • the transistor amplification stage and the modulation stage are vertically stacked. Furthermore, the conventional circuit is three-stage stacked when including a transistor constituting a constant current source. Therefore, considering the voltage drop of the load resistance, the voltage applied between the drain and source (assuming a CMOS device) for one stage of the transistor is very small. This makes it difficult to operate the transistor with a high mutual conductance (gm) and good high frequency characteristics.
  • an object of the present invention is to provide a semiconductor receiver that improves high-frequency characteristics.
  • a semiconductor receiver includes a first mixer that converts an input signal into first and second modulated signals having a phase difference of 180 ° from each other, and Second and third mixers for converting the first and second modulation signals into first to fourth output signals having phase differences of 0 °, 90 °, 180 ° and 270 °;
  • Each of the first, second, and third mixers includes a first to third terminals, a modulation stage having a Gilbert cell mixer configuration that includes first to fourth transistors, A constant current source including fifth and sixth transistors; an unbalanced transmission line having one line end connected to the first terminal; first and second balanced transmission lines; And an unbalanced balanced converter comprising two grounded capacitors, the first balanced transmission.
  • One line end of the line is connected to the first ground capacitor and the drain terminal of the fifth transistor, and the other line end is connected to the source terminal of the first and second transistors.
  • One line end of the second balanced transmission line is connected to the second grounded capacitor and the drain terminal of the sixth transistor, and the other line end is connected to the third and fourth transistors.
  • a drain terminal of the first and third transistors is connected to the second terminal, and a drain terminal of the second and fourth transistors is connected to the third terminal.
  • the input signal is input to the first terminal of the first mixer, and the first and second modulation signals are input to the second and third terminals of the first mixer.
  • the first terminal of the second mixer is connected to the second terminal of the first mixer via the first transmission line, and the second terminal of the second mixer is connected to the second terminal of the second mixer.
  • the first and third output signals are output to the second and third terminals, and the first terminal of the third mixer is connected to the first mixer via the second transmission line.
  • the second and fourth output signals are output to the second and third terminals of the third mixer.
  • the semiconductor receiver according to an aspect of the present invention can reduce the number of transistors stacked in the first to third mixers. Thereby, the high frequency characteristic of each mixer can be improved. Therefore, the semiconductor receiving device can improve high frequency characteristics. Further, by distributing the first and second modulated signals by the unbalanced and balanced converter, it is possible to realize the distribution of the differential signal to the second and third mixers.
  • the other line end of the unbalanced transmission line included in the second mixer and the other line end of the unbalanced transmission line included in the third mixer are connected, and the other of the two other The line end may be grounded via a power source at a point equidistant from the two other line ends.
  • each of the second and third mixers the gate terminals of the first and fourth transistors are connected to each other, and the gate terminals of the second and third transistors are connected to each other,
  • Each of the second and third mixers is further connected to a first resistance element connected to the drain terminals of the first and third transistors and to the drain terminals of the second and fourth transistors. And a second resistance element that is provided.
  • the unbalanced balanced converter further includes a capacitor connected between the other line end of the first balanced transmission line and the other line end of the second balanced transmission line. You may prepare.
  • This configuration can reduce the size of the unbalanced / balanced converter.
  • first balanced transmission line, the second balanced transmission line, and the unbalanced transmission line may be arranged on the same plane.
  • first balanced transmission line and the second balanced transmission line are arranged on the same plane, and the unbalanced transmission line is in a different layer from the first and second balanced transmission lines. It may be arranged.
  • the present invention can be realized not only as such a semiconductor receiver but also as a semiconductor integrated circuit (LSI) that realizes part or all of the functions of such a semiconductor receiver.
  • LSI semiconductor integrated circuit
  • the present invention can provide a semiconductor receiver capable of improving high-frequency characteristics.
  • FIG. 1 is a circuit diagram of a semiconductor receiver according to a comparative example of the present invention.
  • FIG. 2 is a block diagram of a semiconductor receiver according to a comparative example of the present invention.
  • FIG. 3 is a block diagram of the semiconductor receiver according to the embodiment of the present invention.
  • FIG. 4 is a circuit diagram of the semiconductor receiver according to the embodiment of the present invention.
  • FIG. 5 is a circuit diagram of the modulator according to the embodiment of the present invention.
  • FIG. 6 is a circuit diagram of the quadrature demodulator according to the embodiment of the present invention.
  • FIG. 7 is a diagram showing the configuration of the merchant balun according to the embodiment of the present invention.
  • FIG. 8 is a diagram showing a configuration of a modified example of the merchant balun according to the embodiment of the present invention.
  • FIG. 9A is a perspective view showing a structure of a merchant balun according to the embodiment of the present invention.
  • FIG. 9B is a perspective view showing the structure of the merchant balun according to the embodiment of the present invention.
  • FIG. 10A is a perspective view showing a structure of a modified example of the merchant balun according to the embodiment of the present invention.
  • FIG. 10B is a perspective view showing a structure of a modified example of the merchant balun according to the embodiment of the present invention.
  • FIG. 11A is a perspective view showing a structure of a modified example of the merchant balun according to the embodiment of the present invention.
  • FIG. 11B is a perspective view showing a structure of a modified example of the merchant balun according to the embodiment of the present invention.
  • FIG. 12 is a graph showing the local signal power dependence of the conversion gain of the semiconductor receiver according to the embodiment of the present invention.
  • FIG. 13 is a circuit diagram of a conventional quadrature demodulator.
  • FIG. 1 is a diagram showing a configuration of a semiconductor receiver according to a comparative example of the present invention.
  • This semiconductor receiver includes a quadrature demodulator 112 shown in FIG. Further, the semiconductor receiving device includes a modulator 105. Note that a description overlapping the description of FIG. 13 described above is omitted.
  • Transistors Tr101, Tr102, Tr103, Tr104, Tr105, and Tr106 are bipolar transistors (may be field effect transistors), and these transistors form a Gilbert cell mixer and constitute the modulator 105.
  • the modulator 105 has differential input terminals 101 and 102 and differential output terminals 103 and 104.
  • the quadrature demodulator 112 has differential input terminals 106 and 107 and output terminals 108, 109, 110 and 111.
  • the output terminal 108 is a 0 ° output terminal
  • the output terminal 109 is a 180 ° output terminal
  • the output terminal 110 is a 90 ° output terminal
  • the output terminal 111 is a 270 ° output terminal.
  • the signals output from these output terminals are subjected to signal processing by a digital IC.
  • the output terminal 103 of the modulator 105 and the input terminal 106 of the quadrature demodulator 112 are connected via an impedance matching circuit 113.
  • the output terminal 104 of the modulator 105 and the input terminal 107 of the quadrature demodulator 112 are connected via an impedance matching circuit 114.
  • the impedance matching circuits 113 and 114 are preferably composed only of transmission lines, but a stub (open or short) or a spiral inductor that can be handled as a lumped element may be used as necessary.
  • the Gilbert cell mixer constituting the modulator 105 and the quadrature demodulator 112 includes a constant current source.
  • a transistor having a current mirror configuration is used for the constant current source.
  • circuit configuration of FIG. 1 can be represented by a simple block as shown in FIG.
  • the transistor amplification stage and the modulation stage are vertically stacked.
  • the Gilbert cell mixer configuration is three-stage stacked when including the transistors constituting the constant current source. Therefore, in consideration of the voltage drop of the load resistance, the voltage applied between the collector and the emitter for one stage of the transistor (between the drain and the source in the case of a field effect transistor) becomes very small. This makes it difficult to operate the transistor with a high mutual conductance (gm) and good high frequency characteristics.
  • connection wiring from the modulator 105 of FIG. 1 to the two quadrature demodulator 112 becomes a problem.
  • the impedance matching circuits 113 and 114 can match the output impedance of the modulator 105 and the input impedance of the quadrature demodulator 112.
  • the differential of 180 ° phase difference between Tr107 and Tr108 due to the wiring distributed from the input terminal 106 of the quadrature demodulator 112 to Tr107 and Tr114 and the wiring distributed from the input terminal 107 to Tr108 and Tr113.
  • a differential signal having a phase difference of 180 ° can be input to Tr113 and Tr114.
  • the phase is likely to be shifted depending on the length of the transmission line such as the wiring. It is done.
  • the amplification stage of the Gilbert cell mixer included in the modulator and the quadrature demodulator is replaced with a merchant balun (unbalanced balanced converter) configured by a coupled line. Further, the output terminal of the modulator is connected to the input end of the unbalanced transmission line of the merchant balun.
  • the semiconductor receiving device can improve high-frequency characteristics and realize differential distribution to the quadrature demodulator.
  • FIG. 3 is a block diagram of the semiconductor receiver 50 according to the embodiment of the present invention.
  • FIG. 4 is a circuit diagram of the semiconductor receiver 50.
  • the semiconductor receiver 50 includes an input terminal 1, a modulator 6, a quadrature demodulator 15, output terminals 11, 12, 13 and 14, and matched transmission lines 16 and 17.
  • the semiconductor receiver 50 has a role of processing an input signal received by an antenna and input through a low noise amplifier (LNA: Low Noise Amp) or the like.
  • LNA Low Noise Amp
  • the antenna has a differential wiring configuration, there are problems such as an increase in size and a loss due to a complicated configuration. Therefore, it is preferable that the antenna has a single-ended configuration.
  • FIG. 5 is a circuit diagram of the modulator 6.
  • the modulator 6 includes an input terminal 1, a merchant balun 2 (hereinafter also referred to as balun 2), a modulation stage 3 having a Gilbert cell mixer configuration (hereinafter also referred to as modulation stage 3), output terminals 4 and 5, A current source 31.
  • the modulator 6 converts the input signal input to the input terminal 1 into first and second modulation signals having a phase difference of 180 ° from each other, and outputs the converted first and second modulation signals to the output terminal 4. And 5 are output.
  • the modulator 6 corresponds to the first mixer of the present invention, and the input terminal 1 and the output terminals 4 and 5 correspond to the first to third terminals of the present invention.
  • the input signal propagated through the antenna and the LNA is input to the input terminal 1.
  • the balun 2 is composed of a coupled line and has an unbalanced transmission line.
  • the balun 2 converts a single signal input to the input terminal 1 into a differential signal having a phase difference of 180 °.
  • the converted differential signal is input to the modulation stage 3.
  • the modulation stage 3 includes field effect transistors Tr1, Tr2, Tr3 and Tr4.
  • the modulation stage 3 modulates the differential signal converted by the balun 2 and propagates the modulated differential signals (first and second modulation signals) to the output terminals 4 and 5, respectively.
  • the field effect transistors Tr1 to Tr4 correspond to the first to fourth transistors of the present invention.
  • the drain terminals of the transistors Tr1 and Tr3 are connected to the output terminal 4.
  • the drain terminals of the transistors Tr2 and Tr4 are connected to the output terminal 5.
  • the current source 31 supplies a constant current to the field effect transistor constituting the modulation stage 3 through the balanced transmission line of the balun 2.
  • the current source 31 includes field effect transistors Tr5 and Tr6.
  • the transistors Tr5 and Tr6 constitute a current mirror circuit.
  • the field effect transistors Tr5 and Tr6 correspond to the fifth and sixth transistors of the present invention.
  • FIG. 6 is a circuit diagram of the quadrature demodulator 15.
  • the orthogonal demodulator 15 includes input terminals 7 and 8, output terminals 11 to 14, and down-conversion mixers 33a and 33b (hereinafter also referred to as mixers 33a and 33b).
  • the signal output from the modulator 6 is input to the input terminals 7 and 8.
  • the quadrature demodulator 15 converts the first and second modulated signals generated by the modulator 6 into first to fourth output signals having phase differences of 0 °, 90 °, 180 °, and 270 °.
  • the converted first to fourth output signals are output to the output terminals 11 to 14, respectively.
  • the mixer 33a includes an input terminal 7, output terminals 11 and 12, a merchant balun 9a (hereinafter also referred to as balun 9a), a modulation stage 10a (hereinafter also referred to as modulation stage 10a) having a Gilbert cell mixer configuration, a current source 32a.
  • the mixer 33b includes an input terminal 8, output terminals 13 and 14, a merchant balun 9b (hereinafter also referred to as a balun 9b), a modulation stage 10b having a Gilbert cell mixer configuration (hereinafter also referred to as a modulation stage 10b), a current source 32b.
  • the mixers 33a and 33b correspond to the second and third mixers of the present invention.
  • the input terminal 7 and the output terminals 11 and 12 correspond to the first to third terminals of the present invention.
  • the input terminal 8 and the output terminals 13 and 14 correspond to the first to third terminals of the present invention.
  • the balun 9a is composed of a coupled line and has an unbalanced transmission line. This balun 9a corresponds to the unbalanced balanced converter of the present invention.
  • the balun 9a converts the single signal input to the input terminal 7 (8) into a differential signal.
  • the converted differential signal is input to the modulation stage 10a (10b).
  • the modulation stage 10a includes field effect transistors Tr7, Tr8, Tr9 and Tr10, load resistors R1 and R2, and output terminals 11 and 12 (13 and 14).
  • the field effect transistors Tr7, Tr8, Tr9 and Tr10 correspond to the first to fourth transistors of the present invention.
  • the load resistors R1 and R2 correspond to the first and second resistance elements of the present invention.
  • the load resistor R1 is inserted between the drain terminals of the transistors Tr7 and Tr9 and the power supply.
  • the output terminal 11 (13) is connected to a node between the connection point between the drain terminal of the transistor Tr7 and the drain terminal of the transistor Tr9 and the load resistor R1.
  • the load resistor R2 is inserted between the drain terminals of the transistors Tr8 and Tr10 and the power supply.
  • the output terminal 12 (14) is connected to a node between the connection point between the drain terminal of the transistor Tr8 and the drain terminal of the transistor Tr10 and the load resistor R2.
  • the current source 32a (32b) supplies a constant current to the field effect transistors constituting the modulation stage 10a (10b) via the balanced transmission line of the balun 9a (9b).
  • the current source 32a includes field effect transistors Tr11 and Tr12.
  • the transistors Tr11 and Tr12 constitute a current mirror circuit.
  • the field effect transistors Tr11 and Tr12 correspond to the fifth and sixth transistors of the present invention.
  • the local differential signal input to the modulation stage 10a of the mixer 33a and the local differential signal input to the modulation stage 10b of the mixer 33b are set to have a 90 ° phase difference.
  • the quadrature demodulator 15 converts the differential signal from the local oscillator into four signals having a phase difference of 0 °, 90 °, 180 °, and 270 ° using a 90 ° phase shifter.
  • the differential signal of 180 ° is input to the local signal input terminal of the modulation stage 10a
  • the differential signal of 90 ° and 270 ° is input to the local signal input terminal of the modulation stage 10b.
  • the 90 ° phase shifter a polyphase filter using a resistor and a capacitor, or a branch line phase shifter constituted by a ⁇ / 4 transmission line is generally used.
  • a branch line phase shifter in an ultrahigh frequency region such as a quasi-millimeter wave and a millimeter wave band, it is preferable to use a branch line phase shifter because loss due to resistance or the like in the polyphase filter is large.
  • the phase of the signal output from the output terminal 11 is 0 °
  • the signal phase of the output terminal 12 is 180 °
  • the signal phase of the output terminal 13 is 90 °
  • the signal phase of the output terminal 14 is 270 °.
  • a constant radar spectrum can be obtained regardless of the phase of the received signal.
  • the line end 35a on the side different from the input terminal 7 of the unbalanced transmission line of the balun 9a and the line end 35b on the side different from the input terminal 8 of the unbalanced transmission line of the balun 9b are connected. Further, the line ends 35a and 35b are grounded via the power source 34 from a point equidistant from the line end 35a and the line end 35b.
  • the power source 34 is connected to the drain terminals of the field effect transistor group included in the modulation stage 3 of the modulator 6 via the unbalanced transmission lines of the baluns 9a and 9b and the matched transmission lines 16 and 17.
  • the phase and further the intensity of the differential signals input to the modulation stages 10a and 10b can be set equal.
  • the unbalanced transmission line 21 has one line end connected to the single input terminal 18.
  • One line end 42 of the balanced transmission line 22 is connected to the drain terminal of the first ground capacitor 24b and the fifth transistor (Tr5 or Tr11), and the other line end is connected to the differential output terminal 19. Has been.
  • the differential output terminal 19 is connected to the source terminals of the first and second transistors (Tr1 and Tr2 or Tr7 and Tr8).
  • One line end 43 of the balanced transmission line 23 is connected to the second ground capacitor 24c and the drain terminal of the sixth transistor (Tr6 or Tr11), and the other line end is connected to the differential output terminal 20. Has been.
  • the differential output terminal 20 is connected to the source terminals of the third and fourth transistors (Tr3 and Tr4 or Tr9 and Tr10).
  • the unbalanced transmission line 21A and the balanced transmission line 22 have the same length, and are arranged in parallel via a dielectric layer. The same applies to the unbalanced transmission line 21B and the balanced transmission line 23.
  • the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 are each 1 ⁇ 4 the wavelength ⁇ of the used frequency band.
  • the wavelength In the ultra-high frequency band such as quasi-millimeter wave and millimeter wave, the wavelength is short, so the size of the merchant balun can be reduced.
  • the size of the merchant balun becomes significantly large, and it becomes difficult to configure the merchant balun in the chip.
  • FIG. 8 is a view showing a modification of the merchant baluns 2, 9a and 9b.
  • the merchant balun shown in FIG. 8 further includes a capacitor 25 in addition to the configuration shown in FIG.
  • the capacitor 25 is connected between the differential output terminals 19 and 20.
  • the length of the balanced transmission lines 22 and 23 can be set to 1 ⁇ 4 or less of the wavelength ⁇ of the used frequency band. Thereby, the size of the merchant balun can be further reduced.
  • FIG. 9B is a diagram showing a modification of the structure of the merchant balun shown in FIG. 9A.
  • the unbalanced transmission line 21 and the balanced transmission lines 22 and 23 are formed of different wiring layers. That is, the balanced transmission lines 22 and 23 are arranged on the same plane, and the unbalanced transmission line 21 and the balanced transmission lines 22 and 23 are arranged in different layers.
  • either the unbalanced transmission line 21 or the balanced transmission lines 22 and 23 may be formed of an upper wiring layer. Further, a wiring layer different from the wiring layer formed between the unbalanced transmission line 21 and the balanced transmission lines 22 and 23 may exist. The number of different wiring layers may be one or more. However, the different wiring layers existing between the unbalanced transmission line 21 and the balanced transmission lines 22 and 23 are within a region that affects electromagnetic coupling between the unbalanced transmission line 21 and the balanced transmission lines 22 and 23. In addition, a passive element such as a transmission line is not formed.
  • a capacitor may be inserted between the output terminals 19 and 20 of the merchant balun shown in FIGS. 9A and 9B.
  • FIG. 10A is a diagram showing a modification of the structure of the merchant balun shown in FIG. 9A.
  • the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 are each composed of two transmission lines.
  • the two transmission lines constituting the unbalanced transmission line 21A and the two transmission lines constituting the balanced transmission line 22 are alternately arranged. Further, the two transmission lines constituting the unbalanced transmission line 21B and the two transmission lines constituting the balanced transmission line 23 are alternately arranged.
  • the two transmission lines constituting the unbalanced transmission line 21A are connected on the input terminal 18 side, and the two transmission lines constituting the unbalanced transmission line 21B are grounded via the capacitor 24a. Connected with. Two line ends different from the input terminals 18 of the two transmission lines constituting the unbalanced transmission line 21A and two line ends different from the line ends 41 of the two transmission lines constituting the unbalanced transmission line 21B In total, the four line ends are connected to each other.
  • the two transmission lines constituting the balanced transmission line 22 are connected on the line end 42 side that is grounded via the capacitor 24b.
  • the two transmission lines constituting the balanced transmission line 23 are connected on the line end 43 side that is grounded via the capacitor 24c.
  • the line ends different from the line ends 42 of the two transmission lines constituting the balanced transmission line 22 are connected to each other and to the output terminal 19.
  • the line ends different from the line ends 43 of the two transmission lines constituting the balanced transmission line 23 are connected to each other and to the output terminal 20.
  • the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 are formed on the same plane. Since it is difficult to form the wiring connected to the output terminals 19 and 20 and the wiring connecting the unbalanced transmission lines 21A and 21B on the same plane, a bridge wiring may be used as necessary. Absent.
  • FIG. 10B is a diagram showing a modification of the structure of the merchant balun shown in FIG. 10A. This structure is the same as the structure shown in FIG. 10A in that the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 are each composed of two transmission lines.
  • the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 are formed of different wiring layers. Note that whichever of the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 may be formed of an upper wiring layer. Further, a wiring layer different from the wiring layer formed between the unbalanced transmission lines 21A and 21B and the balanced transmission lines 22 and 23 may exist. Further, the number of different wiring layers may be one or more. However, the different wiring layers existing between the unbalanced transmission line 21 and the balanced transmission lines 22 and 23 are within a region that affects electromagnetic coupling between the unbalanced transmission line 21 and the balanced transmission lines 22 and 23. In addition, a passive element such as a transmission line is not formed.
  • a capacitor may be inserted between the output terminals 19 and 20 of the merchant balun shown in FIGS. 10A and 10B.
  • FIG. 11A is a diagram showing a modification of the structure of the merchant balun in FIG. 9A.
  • the unbalanced transmission line 26 is connected to the input terminal 18, and the line end on the side different from the input terminal 18 of the unbalanced transmission line 26 is grounded via the capacitor 24d.
  • the line end may be grounded via the power source 34 instead of the capacitor 24d.
  • the unbalanced transmission line 26 has the same length as the unbalanced transmission line 21 of the merchant balun shown in FIG. 9A.
  • a balanced transmission line 27 is connected to the differential output terminals 19 and 20.
  • the balanced transmission line 27 has a configuration in which the balanced transmission lines 22 and 23 of the merchant balun shown in FIG. 9A are formed in a circular shape.
  • the balanced transmission line 27 is configured by connecting line ends 42 and 43 on the side different from the output terminals 19 and 20 of the balanced transmission lines 22 and 23, respectively.
  • the balanced transmission line 27 is grounded through the capacitor 24e from the middle point of the balanced transmission line 27.
  • the middle point of the balanced transmission line 27 may be grounded via the power source 34 instead of the capacitor 24e. I do not care.
  • the length of the balanced transmission line 27 is the same as the total length of the balanced transmission lines 22 and 23 of the merchant balun shown in FIG. 9A.
  • the size of the merchant balun can be reduced. Further, the unbalanced transmission line 26 and the balanced transmission line 27 of the merchant balun shown in FIG. 11A are formed on the same plane.
  • FIG. 11B is a diagram showing a modification of the structure of the merchant balun in FIG. 11A.
  • the unbalanced transmission line 26 and the balanced transmission line 27 are formed of different wiring layers.
  • either the unbalanced transmission line 26 or the balanced transmission line 27 may be formed of an upper wiring layer.
  • a wiring layer different from the wiring layer formed between the unbalanced transmission line 26 and the balanced transmission line 27 may exist.
  • the number of different wiring layers may be one or more.
  • the different wiring layers existing between the unbalanced transmission line 26 and the balanced transmission line 27 are provided in the transmission line within a region that affects electromagnetic coupling between the unbalanced transmission line 26 and the balanced transmission line 27. Do not form passive elements such as.
  • a capacitor may be inserted between the output terminals 19 and 20 of the merchant balun in FIGS. 11A and 11B.
  • a signal is propagated from the primary wiring to the secondary wiring by magnetic coupling using the circular primary wiring and the secondary wiring, instead of using the circular shaped merchant balun. You may use a transformer.
  • FIG. 12 is a graph showing a simulation result of the dependence of the conversion gain on the local signal power in the semiconductor receiver 50.
  • FIG. 12 shows the conversion gain 28 of the semiconductor receiver 50 according to the present embodiment shown in FIG. 4 and the conversion gain 29 of the semiconductor receiver according to the comparative example shown in FIG.
  • FIG. 1 shows a bipolar transistor
  • the simulation result shown in FIG. 12 shows that the conversion gain 29 is obtained when a field effect transistor is used as in the semiconductor receiver 50 according to the present embodiment shown in FIG. It is.
  • the local signal refers to a signal input to the gate terminal of the field effect transistor that constitutes the modulation stage of the Gilbert cell mixer configuration of the quadrature demodulator included in the semiconductor receiver.
  • the conversion gains 28 and 29 of both semiconductor receivers each exhibit saturation characteristics, in the saturated state, the conversion gain 28 of the semiconductor receiver 50 according to the present embodiment is compared with the conversion gain 29 of the semiconductor receiver according to the comparative example. About 8 dB higher.
  • the reason why the gain is improved is that the modulator 6 and the quadrature demodulator 15 are matched and connected by the merchant baluns 9a and 9b. Further, in this embodiment, the transistor amplification stage forming the Gilbert cell mixer of the modulator 6 and the quadrature demodulator 15 is removed, and the transistor amplification stage is replaced with a merchant balun that is a passive element. Thereby, the drain-source voltage of each transistor included in the modulation stage 3 of the modulator 6 and the modulation stages 10a and 10b of the quadrature demodulator 15 can be increased. Therefore, the fact that the transistors can be operated under a bias condition in which the gm of these transistors is large is also cited as a factor for improving the gain.
  • the transistors constituting the semiconductor receiver 50 may be other transistors such as bipolar transistors instead of field effect transistors.
  • the semiconductor substrate constituting the IC including the semiconductor receiver 50 may be a Si-based semiconductor or a compound semiconductor such as GaAs.
  • a thick film rewiring structure in which a thick dielectric layer and a wiring layer are added on the Si process.
  • a thick dielectric layer By adding a thick dielectric layer, the influence of the conductive Si substrate can be suppressed.
  • the thick film rewiring structure is taken as an example.
  • the thick film is being increased in the Si process.
  • the merchant balun included in the semiconductor receiver 50 of this embodiment may be formed by an upper wiring layer that is distant from the Si substrate in the Si process.
  • the material of the thick film dielectric is preferably a material having a low relative dielectric constant and dielectric loss.
  • BCB benzocyclobutene
  • polyimide, tetrafluoroethylene, polyphenylene oxide, or the like may be used.
  • the semiconductor receiver concerning the present invention was explained based on the embodiment, the present invention is not limited to these embodiments. Unless it deviates from the meaning of this invention, the form which made
  • the semiconductor receiver according to the above embodiment is typically realized as an LSI that is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them.
  • division of functional blocks in the block diagram is an example, and a plurality of functional blocks can be realized as one functional block, a single functional block can be divided into a plurality of functions, or some functions can be transferred to other functional blocks. May be.
  • the circuit configuration shown in the circuit diagram is an example, and the present invention is not limited to the circuit configuration. That is, like the above circuit configuration, a circuit that can realize a characteristic function of the present invention is also included in the present invention.
  • the present invention includes a device in which a device such as a switching device (transistor), a resistor, or a capacitor is connected in series or in parallel to a certain device within a range in which a function similar to the above circuit configuration can be realized. It is.
  • “connected” in the above-described embodiment is not limited to the case where two terminals (nodes) are directly connected, and the two terminals (nodes) can be realized within a range in which a similar function can be realized. ) Is connected via an element.
  • the present invention can be applied to a semiconductor receiver.
  • the present invention can be routinely used for various communication devices or high-frequency semiconductor devices such as radar.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un dispositif de réception à semi-conducteurs (50) qui comporte : un modulateur (6) destiné à convertir un signal d'entrée en des premier et second signaux de modulation ayant un déphasage de 180° l'un par rapport à l'autre ; et des mélangeurs (33a et 33b) destinés à convertir les premier et second signaux de modulation en des premier à quatrième signaux de sortie ayant un déphasage de 0º, 90º, 180º et 270º. Chacun du modulateur (6) et des mélangeurs (33a et 33b) comporte un étage de modulation (3, 10a et 10b) ayant une configuration de mélangeur à cellule de Gilbert, et un balun de Marchand (2, 9a et 9b). Les baluns de Marchand (2, 9a et 9b) comportent une ligne de transmission non équilibrée (21) et des première et seconde lignes de transmission équilibrées (22 et 23), une extrémité de la ligne de transmission non équilibrée étant connectée à une borne d'entrée (18).
PCT/JP2012/003966 2011-06-29 2012-06-18 Dispositif de réception à semi-conducteurs WO2013001743A1 (fr)

Applications Claiming Priority (2)

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JP2011-144996 2011-06-29
JP2011144996 2011-06-29

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104242827A (zh) * 2014-10-09 2014-12-24 江苏大学 一种方向回溯天线的相位共轭电路设计方法
JP2015100078A (ja) * 2013-11-20 2015-05-28 三菱電機株式会社 周波数変換器
CN105099369A (zh) * 2014-05-23 2015-11-25 凌力尔特有限公司 具有集成平衡-不平衡转换器的宽带集成rf/微波/毫米波混频器
CN106301236A (zh) * 2015-06-26 2017-01-04 艾壳 用于差分功率放大器的多模式操作

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936769A (ja) * 1995-07-25 1997-02-07 Hitachi Ltd チューナ回路及びチューナシステム
JPH09148882A (ja) * 1995-11-21 1997-06-06 Nec Corp π／２移相器
JP2000174557A (ja) * 1998-12-08 2000-06-23 Hitachi Ltd ミクサ回路
JP2001036350A (ja) * 1999-07-16 2001-02-09 Nec Corp ミキサ及び直交ミキサ
JP2005244848A (ja) * 2004-02-27 2005-09-08 Sony Corp バランフィルタ
JP2007201666A (ja) * 2006-01-25 2007-08-09 Matsushita Electric Ind Co Ltd バランとこれを用いた電子機器
JP2008008900A (ja) * 2006-06-02 2008-01-17 Matsushita Electric Ind Co Ltd レーダ装置
JP2008145424A (ja) * 2006-11-15 2008-06-26 Matsushita Electric Ind Co Ltd スペクトル拡散型レーダ装置用半導体装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936769A (ja) * 1995-07-25 1997-02-07 Hitachi Ltd チューナ回路及びチューナシステム
JPH09148882A (ja) * 1995-11-21 1997-06-06 Nec Corp π／２移相器
JP2000174557A (ja) * 1998-12-08 2000-06-23 Hitachi Ltd ミクサ回路
JP2001036350A (ja) * 1999-07-16 2001-02-09 Nec Corp ミキサ及び直交ミキサ
JP2005244848A (ja) * 2004-02-27 2005-09-08 Sony Corp バランフィルタ
JP2007201666A (ja) * 2006-01-25 2007-08-09 Matsushita Electric Ind Co Ltd バランとこれを用いた電子機器
JP2008008900A (ja) * 2006-06-02 2008-01-17 Matsushita Electric Ind Co Ltd レーダ装置
JP2008145424A (ja) * 2006-11-15 2008-06-26 Matsushita Electric Ind Co Ltd スペクトル拡散型レーダ装置用半導体装置

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015100078A (ja) * 2013-11-20 2015-05-28 三菱電機株式会社 周波数変換器
US9312815B2 (en) 2014-05-23 2016-04-12 Linear Technology Corporation Broadband integrated RF/microwave/millimeter mixer with integrated balun(s)
CN105099369A (zh) * 2014-05-23 2015-11-25 凌力尔特有限公司 具有集成平衡-不平衡转换器的宽带集成rf/微波/毫米波混频器
EP2947767A1 (fr) * 2014-05-23 2015-11-25 Linear Technology Corporation Mélangeur rf/micro-ondes/millimétrique intégré à large bande avec un ou des balun(s) intégré(s)
KR20150135143A (ko) * 2014-05-23 2015-12-02 리니어 테크놀러지 코포레이션 집적된 벌룬(들)을 갖는 광대역 집적형 rf/마이크로웨이브/밀리미터 믹서
JP2015226325A (ja) * 2014-05-23 2015-12-14 リニアー テクノロジー コーポレイションＬｉｎｅａｒ Ｔｅｃｈｎｏｌｏｇｙ Ｃｏｒｐｏｒａｔｉｏｎ 広帯域高周波、マイクロ波、またはミリ波ミキサシステム
KR101688036B1 (ko) 2014-05-23 2016-12-20 리니어 테크놀러지 코포레이션 집적된 벌룬(들)을 갖는 광대역 집적형 rf/마이크로웨이브/밀리미터 믹서
CN104242827A (zh) * 2014-10-09 2014-12-24 江苏大学 一种方向回溯天线的相位共轭电路设计方法
CN104242827B (zh) * 2014-10-09 2017-04-12 江苏大学 一种方向回溯天线的相位共轭电路设计方法
CN106301236A (zh) * 2015-06-26 2017-01-04 艾壳 用于差分功率放大器的多模式操作
US9564860B2 (en) 2015-06-26 2017-02-07 Acco Multimode operation for differential power amplifiers
EP3110003A3 (fr) * 2015-06-26 2017-03-22 Acco Fonctionnement multimode pour des amplificateurs de puissance différentiels
EP3282580A1 (fr) * 2015-06-26 2018-02-14 Acco Fonctionnement multimode pour amplificateurs de puissance différentiels
CN106301236B (zh) * 2015-06-26 2018-11-02 艾壳 用于差分功率放大器的多模式操作

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