Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
  • H03H7/38—Impedance-matching networks
  • H03H7/40—Automatic matching of load impedance to source impedance

Definitions

• This disclosure relates generally to RF impedance measurement and in particular to RF impedance measurements using two point voltage sampling without a phase detector. Some embodiments also relate to adjusting an impedance matching network after the measurement.
• Fig. 1 depicts a prior art RF system which includes an adaptive impedance matching network.
• the system includes an RF power amplifier PA 20 having an output coupled to the input of a duplexer 22.
• the duplexer directs the RF signal from amplifier 20 to the system antenna 24 by way of the adaptive impedance matching network 26.
• Duplexer 22 further channels RF signals received on the antenna to a system receiver (not depicted).
• the adaptive impedance matching network includes a tunable impedance matching network 30 which matches the impedance of the antenna to some target value that matches that of the duplexer.
• an antenna impedance has a real component Rant ranging from 30 to 100 ⁇ and a reactive component j Xant of 0 to +100] ⁇ .
• the matching network converts the antenna impedance to some target impedance such as an impedance matching that of the coupler 28.
• the antenna impedance Zant can change, as previously noted, due to a change in the physical environment surrounding the antenna.
• the impedance at the input of the tunable matching network 30 is monitored by periodically measuring the amplitude of the RF voltage at the input and output of the directional coupled 28 using respective peak detectors 32A and 32B.
• the phase relationship between the two detected voltages is measured using a phase detector 34.
• the peak voltage measurements and the phase measurement are then provided to a processing device 36 such as a digital signal processor to compute the impedance.
• the processor adjusts the tunable matching network 30 as needed to return to the target impedance.
• FIG. 1 is a diagram of a prior art RF system which incorporates an adaptive impedance matching network to compensate for changes in an antenna impedance.
• FIG. 2 is a diagram of an RF system which includes an adaptive impedance matching network in accordance with one embodiment of the disclosure.
• Fig. 3 is a phasor diagram illustrating part of the operation of the Fig. 2 embodiment and which does not rely upon the use of a phase detector.
• Figs. 4 A - 4D are timing diagrams of a simulation further illustrating the operation of the Fig. 2 embodiment.
• Fig. 5 is a diagram of showing an alternative embodiment that uses adjustable attenuator circuitry do reduce the dynamic range requirements of the voltage detectors.
• Fig. 6 is a plot of a complex plane showing the methodology of adjusting the matching network after a change in the antenna impedance is detected.
• FIG. 2 shows an adaptive RF matching network module 38 in accordance with one embodiment of the disclosure.
• An RF power amplifier 20 is coupled to a first port of the network module 38 by way of a duplexer 22 followed by an RF switch 40 which switches between various transceiver paths to accommodate various mobile communication standards such as GSM, WCDMA, LTE, etc.
• Another port of the network module 38 is for connecting to an antenna 24.
• Antenna 24 functions to radiate the RF energy from the amplifier 20 and to receive RF signals which are provided to receiver circuitry by way of the duplexer 22.
• antenna 24 is a narrow bandwidth miniaturized antenna having a high Q.
• the antenna is subject to detuning due to fluctuating body effects and changes in the handset form factor. This detuning has an adverse effect on transmitted radiated power efficiency and over the air receiver sensitivity.
• the adaptive matching network module 38 initially transforms the impedance of the antenna 24 to a target impedance which may be, by way of example, a 50 ⁇ real impedance. Environmental fluctuations may cause the impedance of antenna 24 to change so that the matching network is no longer optimal. As will be described, the adaptive matching network module 38 monitors the impedance of the matched network and, if the impedance varies from the target value, will adjust the matching network so that the impedance is returned to the target value.
• a target impedance which may be, by way of example, a 50 ⁇ real impedance. Environmental fluctuations may cause the impedance of antenna 24 to change so that the matching network is no longer optimal.
• the adaptive matching network module 38 monitors the impedance of the matched network and, if the impedance varies from the target value, will adjust the matching network so that the impedance is returned to the target value.
• the exemplary matching network used in module 38 is a pi type network which includes a series connected inductor Lsense and a pair of shunt connected capacitor arrays Ci and C 2 disposed on either side of the inductor.
• the capacitor arrays each include an array 44A and an array 44B of RF -MEMS (microelectromechanical system) capacitive switches Cn to CI a.
• the capacitive switches are preferably disposed in a binary weighted manner, with there being five capacitive switches connected in parallel, with the relative capacitive values being C, 2C, 4C, 8C and 16C.
• the five capacitive switches are individually enabled and disabled to provide a total capacitance ranging from C to 31C in increments of C.
• Lsense has a typical inductance of 2 to 8 nanoHenries, with the value of C of the capacitive switches being 0.5 to 4.0 pF.
• Each capacitor bank further includes a small (Co ⁇ 0.125 pF) switched capacitor which is periodically connected in parallel with each of the MEMS capacitive switches 44A and 44B.
• the smaller the value of Co the greater the voltage detection accuracy required of the RF detectors employed as peak detectors 52A and 52B to be described.
• a dither clock present on line 50 is used to control the states of switches 48A and 48B which operate to switch capacitors Co in circuit and out of circuit.
• the frequency of the dither clock is determined by the required response time of the RF impedance measurement, which may be as low as a 100 Hz or up to around 1 MHz.
• the dither frequency is not so high as to introduce spikes on the RF sensing lines.
• inductor Lsense In addition to forming part of the impedance matching, inductor Lsense also functions as part of the impedance sensor.
• a pair of peak voltage detectors 52A and 52B are connected to detect respective voltages VI and V2 at opposite ends of inductor Lsense. The voltages are periodically sensed when the switched capacitors 46A and 46B are connected in circuit by switches 48A and 48B and then sensed a second time when the capacitors are switched out of circuit. As will be explained, these four voltage measurements permit the impedance looking into the matching network to be determined.
• Fig. 2 shows a pair of dither caps 46A and 46B having a value CO. Dither cap 46A can be used to determine some useful information regarding the matching network and antenna 24. However, the following description and analysis is based upon the use of dither cap 46B alone.
• Fig. 3 is a phasor diagram (not to scale) illustrating the manner in which the four measurements can be used to determine the impedance Z L , which is the impedance looking from the node where V2 is sampled towards the antenna 24 impedance.
• Voltages VI and V2 are measured using respective peak detectors 52A and 52B when switch 48B is opened based upon the polarity of the dither clock on line 50 so that dither capacitor 46B (Co) is out of circuit.
• VI and V2 can be plotted on the complex plane showing that the difference between the two voltages is Xs which represents the impedance of the sense inductor Lsense.
• the dither clock then closes switch 48B so that capacitor 46B is connected in circuit.
• Voltages V12 and V22 which correspond to VI and V2 for the previous measurement, are then measured using the respective peak detectors 52A and 52B.
• the value of Z L is preferably determined using signal processing circuitry disposed within control unit 54.
• the phase angle ⁇ is expressed as follows:
• Cos ⁇ - 0.5 [Xdp 2 (Vrl 2 - Vr2 2 ) + X S 2 ]/(X S * Xdp * Vrl); (2) where Vrl is the ratio of V1/V2, Vr2 is the ratio of V12/V22, Xdp is the impedance of the dither cap 46B, and Xs is the impedance of inductor Lsense.
• the reactive component X L and real component R L of the impedance Z L can be calculated as follows:
• R L [ X s 2 /(Vrl 2 + 1 - 2Vrl cos q>) - X L 2 ] 1/2 .
• the signal processor in the control unit 54 will proceed to alter the matching characteristics in the matching network. As will be described in greater detail, this is carried out by changing the value(s) of capacitors 44A and 44B.
• Figs. 4A - 4D are timing diagrams further illustrating the operation of the subject impedance matching module 38.
• Waveform 56 of Fig. 4A represents the dither clock which causes the capacitor 46B (Co) (Fig. 2) to be switched into the matching network and to be switched out of the matching network.
• the two peak detectors 52A and 52B sense the peak voltages on opposite sides of inductor Lsense to determine VI and V2.
• the ratio of V1/V2, value Vrl is then produced. It would also be possible to produce the ratio Vrl directly without having to determine the separate values of VI and V2.
• the peak voltages are sensed to determine the values of V21 and V22.
• the ratio Vr2 of V21/V22 is then determined.
• the change in antenna impedance could be caused, by way of example, by a change in the antenna environment such as adjusting the manner in which a cell phone is held.
• the change in antenna impedance at time Tl is rapidly detected as evidenced by a change in the voltage ratios Vrl and Vr2.
• Vrl changed from about 2.6 to 2.5
• Vr2 changed from about 2.8.
• the control unit 54 then recalculates the new impedance values Z L2 , again using equations (2), (3) and (4), as follows:
• the control unit 54 will then precede to alter the matching network by way of the MEMS 44A and 44B so that the matched impedance has returned to the target impedance.
• One approach for adjusting the matching network will now be described. As will be seen, only the change in matching network capacitance to arrive at the target values is needed and not the actual final value of that capacitance.
• the values for R L and X L represent the respective real and imaginary components of the measured impedance.
• the needed change in value of matching network capacitances 44A and 44B, the MEMS capacitor arrays is determine using a signal processor or the like.
• a chart of the complex impedance plane is shown in Fig. 6 in order to illustrate the manner in which the impedance matching module 38 operates to compensate for changes in the impedance Z wt of antenna 24.
• the values be in terms of admittance so that values can be simply added together.
• values be in terms of impedance so that they can also be combined by adding.
• the chart of Fig. 6 shows both approaches. When only an imaginary component of an admittance is being changed, the admittance moves along a constant conductance circle, with all of the circles intersecting at the origin 68.
• the magnitude of AC 2 is determined so that point C is at a location in the complex plane such that, when the fixed value inductor Lsense of impedance Xs is added in series, the combined, new value of impedance will fall on the constant admittance circle 69 of 20 milli-Siemens. That value at point D is the sum of Zjjiew plus Xs.
• a value of Ci of the matching network is then produced which provides a reactance Xi which is of a magnitude sufficient to move the impedance Z L new plus Xs to close to a pure resistance of 50 ⁇ as represented by point A. Since the MEMS cap arrays 44 A and 44B that make up the majority of respective capacitances CI and C2 have only a finite number of possible values, the final impedance value may differ somewhat from the ideal value of 50 ⁇ .
• ⁇ 2 -X S [X S XL+ RL 2 + XL 2 - (RL(- XS 2 RL + 50R L 2 + 50X L 2 )) 1/2 ]/ [(X L + XS) 2 + R L (R L - 50)]; (7) where Xs is the impedance of the inductor Isense, X L is the measured reactive component of Z L per equation (3), R L is the measured resistive component of Z L per equation (4), and the value 50 is target impedance in ohms.
• Xi 5 [ 1 OXn + (- 100R n 2 + 2R n X n 2 + 2R n 3 ) 1/2 ]/ (R n -50) ; (9) where R n is a variable determined by equation (11) below, and X n is a variable determined by equation (12) below.
• ⁇ is the radial frequency 2 ⁇ .
• R n (AX 2 2 R L )/[R L 2 + ( ⁇ 2 + X L ) 2 ]; and (11)
• X n Xs + [R L 2 ⁇ 2 + X L 2 ⁇ 2 + X L ⁇ 2 2 ]/[R L 2 + ( ⁇ 2 + X L ) 2 ] ( 12)
• R L and X L are the real and imaginary parts of Z L per equations (3) and (4).
• MEMS switched capacitors 44A and 44B if Fig. 2 could be replaced with voltage controlled capacitances in the form of varactors.
• switched capacitors 46A and 46B can be eliminated.
• the impedance network changes in response to the dither clock are carried out by altering the magnitude of the varactor control signals in the form of a specific delta voltage to achieve the required difference in capacitance. That change in varactor capacitance can be used as value Xdp in equation (2) above to calculate XL and RL.
• Fig. 5 shows an alternative adaptive matching network module 58 which is similar to that of Fig. 2 in that a pi type architecture is used which includes a series inductor LI flanked by a pair of parallel capacitor banks.
• a first one of the capacitor banks includes an array of capacitive MEMS switches 44A as used in the Fig. 2 embodiment along with three capacitors CA, C B and Cc connected in series with one another and in parallel with capacitive switches 44A.
• the other capacitor bank includes an array of capacitive MEMS switches 44B as used in the Fig. 2 embodiment and three capacitors Cc, C D and C E connected in series with one another and in parallel with capacitive switches 44B.
• the dither cap (not explicitly depicted) is incorporated into the MEMS capacitive switch 44B.
• the MEMS switch can selectively connect capacitances C, 2C, 4C, 8C and 16C is parallel.
• the dither cap is switched in and out by switching the control signal to switch 44B so that the smallest capacitance value C is either in and out of circuit.
• the dither cap 46B of the Fig. 2 embodiment may be implemented into MEMS capacitor array 44B and controlled in this same manner.
• each of the peak detectors 52A and 52B has an associated sensing node which can be changed in response to the state of switches 60A and 60B.
• Peak detectors typically have a limited input range over which they provide an accurate measurement.
• the dynamic range of the ratio V1/V2, which is value Vrl of equation (2), can vary over 30 dB for antenna impedances equivalent of VSWRs of up to 8.
• the peak detector 52A and 52B sensors can have input dynamic range requirements of 60dB which can be difficult to achieve.
• Fig. 5 shows one approach for dealing with such a large input voltage dynamic range.
• capacitors CA, C B and Cc form a voltage divider, as do capacitors Co, C E and C F .
• corresponding capacitors CA and C D have the same value
• C B and C E each have the same value
• capacitors Cc and C F each have the same value.
• respective switches 60 A and 60B connect nodes 62B and 64B as the detector sensing nodes for maximum attenuation.
• nodes 62A and 64A are selected for reduced attenuation.
• capacitors CA, C B , CC, C D , C E and C F function together as a pair of adjustable attenuators. Since the attenuators do not include resistances, no loses result.
• the impedance matching networks of Figs. 2 and 5 are each pi type networks that include three primary impedance components including a series inductance flanked by a pair of parallel capacitances.
• Other types of matching networks can be used, but it is preferred that such networks include at least two primary impedance components (where either similar parallel or similar series components are combined into a primary component) and preferably at least three to provide a sufficiently wide range of impedance matching to cover essentially all possible impedance mismatches.
• a two primary impedance components network would be the three component network of Fig. 2 with capacitances 46A/44A deleted.
• this matching network does not provide the same matching range as that of Fig. 2, it is very useful in those instances where a wide range of matching is not needed while still providing an impedance detection capability.
• the RF detectors are implemented in both the Fig. 2 and Fig. 5 embodiments in the form of peak detectors 52A and 52B. However, rather than using peak detectors it would be possible to use any other types of detectors including RMS, linear and logarithmic. In addition, the greater the sensitivity of errors of the detected voltages VI and V2 or V12 and V22 the greater is the required accuracy of the RF detectors. Conversely, the smaller the sensitivity of errors of the detected voltages the less accuracy is required of the RF detector. Thus, various embodiments of an adaptive impedance network and associated circuitry have been disclosed. Although these embodiments have been described in some detail, certain changes can be made by those skilled in the art without departing from the spirit and scope of the disclosure as defined by the appended claims.

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• Measurement Of Resistance Or Impedance (AREA)
• Transmitters (AREA)
• Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

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