WO2012119556A1 - 电流基准发生电路、恒流开关电源的控制电路及方法 - Google Patents
电流基准发生电路、恒流开关电源的控制电路及方法 Download PDFInfo
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- WO2012119556A1 WO2012119556A1 PCT/CN2012/072082 CN2012072082W WO2012119556A1 WO 2012119556 A1 WO2012119556 A1 WO 2012119556A1 CN 2012072082 W CN2012072082 W CN 2012072082W WO 2012119556 A1 WO2012119556 A1 WO 2012119556A1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4258—Arrangements for improving power factor of AC input using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
- H05B45/382—Switched mode power supply [SMPS] with galvanic isolation between input and output
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/355—Power factor correction [PFC]; Reactive power compensation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
- H05B45/385—Switched mode power supply [SMPS] using flyback topology
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Definitions
- the invention belongs to the technical field of switching power supplies, and relates to a primary power current reference generating circuit, a control circuit and a method for a high power factor constant current switching power supply with adaptive primary side control. Background technique
- FIG. 1 shows the commonly used single-stage power factor correction scheme: by detecting the output current of the secondary side of the transformer, on the secondary side. After the constant current control, the optocoupler feedback is sent to the primary PFC control circuit.
- the prior art scheme shown in FIG. 1 increases the complexity of the circuit due to the presence of the secondary side current sampling circuit and the optocoupler. Further, due to the aging problem of the optocoupler, the stability and service life of the circuit are affected to some extent.
- the solution to the above problem is to adopt a control scheme with primary side constant current control and power factor correction function, that is, without secondary current sampling and optocoupler components, directly obtain information of output current at the primary side of the isolation transformer, and control Achieve constant current output and achieve high power factor at the same time, as shown in Figure 2.
- primary side constant current control and power factor correction function that is, without secondary current sampling and optocoupler components, directly obtain information of output current at the primary side of the isolation transformer, and control Achieve constant current output and achieve high power factor at the same time, as shown in Figure 2.
- the two most critical metrics in the above control scheme are the high power factor of the incoming current and the constant current accuracy of the output current, especially due to the primary side control, the constant current accuracy of the output current is not as good as the secondary constant current control.
- a prior art method of outputting a constant current is to simulate the secondary current at the primary side, simulate the secondary side output current or the secondary side output current average, and then perform constant current control on the primary side, as shown in FIG.
- Vcontrol is the sampling signal
- i sample is the sample-and-hold module output signal
- iemu is the secondary side
- the current analog module outputs a signal.
- the sample-and-hold module has a certain delay time between the sample-and-hold switching, it will cause the error of the primary side current sampling, which causes the simulated secondary current iemu to deviate from the actual value, such as As shown in Figure 4, and the deviation value will vary with the input voltage and the transformer's magnetizing inductance, it is more difficult to compensate, resulting in output constant current.
- the transformer's magnetizing inductance changes and the output constant current accuracy is low.
- the inductor current is controlled to be consistent with the current reference signal to realize the PFC function.
- the multiplier uses the square of the input voltage feedforward signal as a numerator, and in the case of Vea-determination, the input power is independent of the input voltage, that is, constant power control.
- the above method of using the multiplier to cancel the influence of the input voltage to obtain the current reference is essentially voltage feedforward control.
- the AC input signal is missing when the dimming angle is different, and it is no longer a complete half-wave after rectification, so the input feedforward signal Vff contains the phase-cut angle signal.
- the voltage feedforward control causes the Iref to increase sharply with the increase of the phase-cut angle, and the input power also increases accordingly. Therefore, the above method is not suitable for the phase-controlled dimming. Summary of the invention
- the present invention overcomes the above-mentioned drawbacks in the prior art, and proposes a current reference generating circuit capable of generating a reference signal of a primary side current signal of an adaptive switching power supply main circuit to be supplied to a constant current switching power supply.
- the control circuit can adaptively adjust following the change of the input and output conditions of the circuit to meet the needs of the secondary constant current output.
- the invention realizes a high-power constant current switching power supply control circuit with primary side control based on the current reference generating circuit.
- the current reference generation circuit includes:
- the first multiplier module receives a rectified voltage waveform signal lac from a rectifier bridge output of the switching power supply main circuit and an output error amplification signal Vcomp of the average current loop to generate a sine half-wave signal Iref,
- the sinusoidal half-wave signal Iref is in phase with the rectified voltage waveform signal lac, and the amplitude of the sinusoidal half-wave signal Iref varies with the error amplification signal Vcomp, and the sinusoidal half-wave signal Iref is used as a reference for the primary current signal of the main circuit of the switching power supply.
- a second multiplier module inputs the sine half-wave signal Iref and the control signal Vcontrol to generate a pulse signal iemu
- the control signal Vcontrol is a pulse reflecting the on-time of the output diode of the main circuit of the switching power supply a signal
- the amplitude envelope of the pulse signal iemu is a sinusoidal half-wave of the same frequency, in phase and amplitude proportional to the sinusoidal half-wave signal Iref
- the pulse width of the pulse signal iemu is equal to the pulse width of the control signal Vcontrol;
- the current loop compensation network is amplified to obtain an output error amplification signal (Vcomp).
- the average current loop has a filtering function, and the pulse signal iemu is filtered to obtain a switching cycle average value of the pulse signal iemu.
- the current reference generating circuit further includes a filter, and the filter filters the pulse signal iemu and filters out The high frequency harmonics are obtained, and the average value of the switching period of the pulse signal iemu is supplied to the average current loop.
- the pulse signal iemu waveform reflects twice the output diode current waveform, so that the output current constant current can be realized as long as the average value of the average current loop control pulse signal iemu is constant.
- the main circuit of the switching power supply operates in a current interrupted or critical intermittent state.
- the second multiplier module is a multiplier or an equivalent circuit module that implements an equivalent function.
- the control signal Vcontrol is derived from an auxiliary winding of a switching power supply transformer or a gate control signal of a switching power supply.
- the amplitude of the control signal Vcontrol is fixed.
- the positive pulse width of the control signal Vcontrol is the same as the output diode of the switching power supply main circuit.
- the average current loop includes an error amplifier and a compensation network
- the average current loop reference signal Vref is a DC reference
- the average current loop reference signal Vref is a pulse signal capable of reflecting the phase control dimming angle during phase-controlled dimming.
- a primary power controlled high power factor constant current switching power supply control circuit includes: a current reference generating circuit, An output diode on-time detecting module, a comparator, a switch-on conduction control module, and an RS flip-flop: wherein the current reference generating circuit is as described above;
- the output diode on-time detecting module detects an on-time of the main circuit diode of the switching power supply, and outputs a control signal Vcontrol to the current reference generating circuit;
- the two input ends of the comparator respectively input a sinusoidal half-wave signal output by the current reference generating circuit
- Iref and the primary current sampling signal are compared and compared; when the primary current sampling signal rises to reach the sinusoidal half-wave signal Iref, the comparator output signal is flipped from a low level to a high level, after which the primary side current sampling signal drops.
- the comparator output signal is turned from a high level to a low level; the two input terminals of the RS flip-flop are respectively connected to the output end of the comparator and the switch tube conduction control module, and the output
- the trigger signal is sent to the switch circuit of the main circuit, the output end of the comparator is connected to the R terminal of the reset terminal of the RS flip-flop, and the output of the switch tube conduction control module is connected to the set end S of the RS flip-flop; when the reset end of the RS flip-flop When the R terminal detects a rising edge transition from low level to high level, the output signal of the RS flip-flop is reset from high level to low level, which controls the switching of the switching circuit of the main circuit of the switching power supply. When the S terminal of the trigger detects a rising edge transition from low level to high level, the output signal of the RS flip-flop is set from low level to high level, so that the RS is
- the switch tube conduction control module is a timing trigger, and the timing trigger generates a fixed frequency clock signal to be provided to the set terminal S end of the RS flip-flop to control the conduction of the switch tube of the switching power supply main circuit.
- the switch tube conduction control module comprises an output diode on-time detecting module, an inverter and a delay circuit, and generates a pulse signal by detecting a secondary side diode current conduction time, and then providing an inversion and delay to provide to the RS
- the S terminal of the set terminal of the flip-flop controls the conduction of the switch tube of the main circuit of the switching power supply.
- the control method of the constant current switching power supply includes the following steps:
- the main circuit of the switching power supply is operated in a current interrupted or critical intermittent state
- step (3) According to the rectified voltage waveform signal (lac) obtained in step (2) and the pulse signal (iemu) obtained in step (3), a waveform corresponding to the output voltage of the rectifier bridge of the main circuit of the switching power supply is generated, and the amplitude is received by one
- the current reference signal (Iref) controlled by the error amplification signal of the average current loop output, the current reference signal (Iref) is further fed back to step (3), and the control pulse signal (iemu) The generation, where the output constant current value is proportional to the reference of the average current loop.
- the output signal iemu of the second multiplier of the current reference generating circuit proposed by the present invention is different from the current waveform simulated by the sample-and-hold module and the secondary current analog module of FIG. 3, although both positive pulse widths are output diodes.
- the current reference generating circuit can generate a reference signal of the primary current signal of the adaptive switching power supply main circuit to be supplied to the constant current switching power supply control circuit, and the reference signal can be adaptively adjusted to follow the input and output condition changes of the circuit to satisfy the secondary side. The need for constant current output.
- the output constant current control of the constant current switching power supply control circuit proposed by the invention is an adaptive negative feedback closed-loop control mode, that is, the amplitude of the generated current reference signal is controlled by the average current loop, and the generated current reference signal is The input signal that affects the average current loop affects the output of the average current loop.
- the external condition of the switching power supply changes, such as the input voltage changes or the output voltage changes, the output of the average current loop changes, thereby changing the amplitude of the current reference signal, and re-achieving the output constant current after reaching the balance through the negative feedback;
- a high power factor can be achieved.
- the constant current switching power supply control circuit and method proposed by the invention do not need to sample and hold the primary current, eliminate the error caused by sampling and holding, improve the constant current precision of the output current, and compare with the constant power method of voltage feedforward.
- the invention generates an adaptive current reference, and the constant current precision is not affected by the multiplier. In phase-controlled dimming, the current reference can be directly obtained from the phase-cut angle without passing through the multiplier, so the input power is not cut. The phase angle effect does not require additional control costs. Further, the constant current switching power supply control circuit of the present invention can be integrated into a single chip.
- FIG. 2 is a schematic diagram of a constant current circuit with a high power factor controlled by the primary side
- Figure 4 is a schematic diagram of sampling error caused by the sample and hold circuit
- Figure 5 is a constant current output PFC circuit based on the principle of constant power
- 6A and 6B are current reference generating circuits of the present invention.
- Figure 8 is a schematic diagram of key waveforms of the circuits of Figures 6A and 6B;
- FIG. 9 is a specific embodiment of a primary-side controlled fixed-frequency high-power factor control circuit constructed by the current reference generating circuit of the present invention applied to a flyback constant current switching power supply;
- FIG. 10 is a specific embodiment of an output diode on-time detecting module in the circuit shown in FIG. 9;
- FIG. 11 is a schematic diagram of a key waveform of the circuit of FIG.
- Figure 12 is a key waveform of the circuit of the embodiment shown in Figure 9;
- 13 is a specific embodiment of a primary-side controlled variable frequency high-power digital-controlled circuit applied to a flyback constant current switching power supply constructed by the current reference generating circuit 100 of the present invention
- Figure 14 is a key waveform of the circuit shown in Figure 13;
- 15 is a normalized output current calculation waveform of the circuit of the embodiment shown in FIG. 13 in a half AC input power frequency cycle;
- 16 is a specific embodiment of the present invention applied to a fixed frequency high power factor non-isolated buck-boost type (buck-boost) constant current switching power supply;
- Fig. 17 shows a specific embodiment of the present invention applied to a variable frequency high power factor non-isolated buck-boost type (buck-boost) constant current switching power supply.
- the current reference generating circuit 100 of the present invention includes:
- the first multiplier module 101 receives the rectified voltage waveform signal lac from the rectifier bridge output of the switching power supply main circuit and the output error amplification signal Vcomp of the average current loop 104 to generate a sine half-wave signal Iref
- the sinusoidal half-wave signal Iref is in phase with the rectified voltage waveform signal lac, and the amplitude of the sinusoidal half-wave signal Iref varies with the error amplification signal Vcomp.
- the sinusoidal half-wave signal Iref is used as a reference signal followed by the primary current signal of the main circuit of the switching power supply; the second multiplier module 102, the second multiplier module 102 inputs the sinusoidal half-wave signal Iref and the control signal Vcontrol, Generating a pulse signal iemu, the control signal Vcontrol is a pulse signal reflecting the on-time of the output of the switching power supply main circuit, and the amplitude envelope of the pulse signal i emu is the same frequency as the sinusoidal half-wave signal Iref, a sinusoidal half-wave that is in phase and proportional to the amplitude, the pulse width of the pulse signal i emu is equal to the pulse width of the control signal Vcontrol;
- the average current loop 104 inputs a pulse signal iemu and an average current loop reference signal Vref, and the average value of the switching period of the pulse signal iemu is compared with the set average current loop reference signal Vref, and the output signal error is amplified.
- Signal Vcomp The average current loop 104, the average current loop 104 inputs a pulse signal iemu and an average current loop reference signal Vref, and the average value of the switching period of the pulse signal iemu is compared with the set average current loop reference signal Vref, and the output signal error is amplified.
- Signal Vcomp Signal
- the average current loop 104 has a certain filtering function, and the pulse signal i emu is filtered to obtain an average value of the switching period of the pulse signal iemu.
- the current reference generating circuit 100 further includes a filter 103, as shown in FIG. 6B, the filter pair pulse The signal iemu is filtered to filter out its high-frequency harmonics, and the average value of the switching period of the pulse signal iemu is supplied to the average current loop.
- the pulse control signal i emu waveform reflects twice the output diode current waveform, and the amplitude reflects the amplitude of the primary side current signal, so as long as the average value of the switching period of the impulse control signal iemu through the average current loop is constant, Achieve constant current output current.
- the main circuit of the switching power supply operates in a current interrupted or critical intermittent state.
- the second multiplier module 102 is a multiplier or an equivalent circuit module that implements an equivalent function, as shown in FIG.
- the control signal Vcontrol is derived from an auxiliary winding of a switching power supply transformer or a gate control signal of a switching power supply.
- the amplitude of the control signal Vcontrol is fixed.
- the positive pulse width of the control signal Vcontrol is the same as the output diode conduction time of the switching power supply main circuit.
- the average current loop includes an error amplifier and a compensation network, as shown in FIG.
- the average current loop reference signal Vref is a DC reference
- the average current loop reference signal Vref is a pulse capable of reflecting a phase-controlled dimming angle during phase-controlled dimming
- the rush signal is shown in Figure 7.
- Vcomp is the error amplification signal output by the average current loop 104
- Iref is the sine output of the first multiplier 101.
- the half-wave signal, Vcontrol is a pulse signal reflecting the on-time of the output diode of the main circuit of the switching power supply, iemu is the pulse signal of the output of the second multiplier, and Vref is the average current loop reference signal.
- FIG. 9 is a specific embodiment of a primary frequency controlled constant frequency high power factor constant current switching power supply control circuit constructed by the current reference generating circuit of the present invention applied to a flyback constant current switching power supply, wherein the flyback switching power supply operates in Intermittent mode.
- the switching power supply comprises: a main circuit and a control circuit of the primary side controlled constant current switching power supply, wherein the main circuit comprises an AC input 10, a rectifier bridge 11, an input capacitor 12, a rectifier bridge voltage waveform sampling circuit 13, a transformer 14, and an original The side switch tube 15, the sampling resistor 16, the output diode 17, and the output capacitor 18; wherein, the control circuit includes a current reference generating circuit 100, an output diode on time detecting module 200, an average current loop reference 300, a comparator 400, and a timing The flip-flop 500 and the RS flip-flop 600, and the primary side current sampling end, the output diode on-time detecting end, the rectifier bridge voltage waveform signal detecting end and the driving end;
- connection relationship of the control circuit of the primary-controlled constant current switching power supply is as follows: One input terminal II of the output diode conduction time detecting module 200 is connected to the output diode conduction time detecting end, and the other input terminal of the output diode conduction time detecting module 12 is connected to the output terminal Q of the RS flip-flop 600.
- the output terminal 01 of the output diode on-time detecting module 200 is connected to the Vcontrol terminal of the current reference generating circuit 100, and the negative input terminal of the comparator 400 is connected to the output Iref terminal of the current reference generating circuit 100.
- the positive input terminal of the comparator 400 is connected to the primary side current sampling terminal, the output of the comparator 400 is connected to the R terminal (reset terminal) of the RS flip-flop 600, and the output of the timing flip-flop 500 is connected to the S terminal of the RS flip-flop 600 (set)
- the output Q of the RS flip-flop 600 is connected to the driving end, the lac terminal of the current reference generating circuit 100 is connected to the rectifier bridge voltage waveform signal detecting end, and the internal reference of the current reference generating circuit 100 is connected as described above, and the current reference generating circuit 100 Vref terminates the average current loop reference 300.
- the connection relationship of the main circuit is as follows:
- the AC input 10 is connected to the two input ends of the rectifier bridge 11 at both ends, the positive output end of the rectifier bridge 11 is connected to one end of the input capacitor 12, one end of the rectifier bridge voltage waveform sampling circuit 13 and the primary side of the transformer 14
- the negative output of the rectifier bridge 11 is grounded, and the input capacitor 12
- the other end is grounded, the other end of the rectifier bridge voltage waveform sampling circuit 13 is connected to the rectifier bridge voltage waveform signal detecting end of the control circuit, and the original side winding of the transformer 14 is terminated with the drain of the primary side switching tube 15, the primary side switch
- the source of the tube 15 is connected to one end of the sampling resistor 16 and the primary side current sampling end of the control circuit, the other end of the sampling resistor 16 is grounded, and the opposite side of the secondary winding of the transformer 14 is terminated with the anode of the output diode 17, and the output diode 17
- the cathode is connected to the anode
- an output diode on-time detection module 200 including a comparator 201, an offset reference 202, an inverter 203, an RS flip-flop 204, and an exclusive OR gate 205.
- the positive input terminal of the comparator 201 is connected to one input terminal II of the output diode on-time detecting module 200, the negative input terminal of the comparator 201 is connected to the bias reference 202, and the output terminal of the comparator 201 is connected to the input terminal of the inverter 203.
- the output terminal of the inverter 203 is respectively connected to the R terminal (reset terminal) of the RS flip-flop 204 and one input terminal of the exclusive OR gate 205, and the S terminal (set terminal) of the RS flip-flop 204 is connected to the output diode conduction time detection.
- the other input terminal 12 of the module 200, the output terminal Q of the RS flip-flop 204 is connected to the output terminal 01 of the output diode conduction time detecting module 200.
- the key waveform of the embodiment of the output diode on-time detecting module 200 shown in FIG. 10 is as shown in FIG. 11, wherein VI I is the waveform signal of the input terminal II, and the input terminal II is connected to the auxiliary winding of the main circuit auxiliary winding.
- V201 is the output waveform signal of the comparator 201;
- V203 is the output waveform signal of the inverter 203;
- VI2 is the input signal of the input terminal 200, which is the same as the gate drive signal of the main circuit of the main circuit;
- V204 is RS The output waveform signal of the flip-flop 204;
- V01 is the output signal of the exclusive OR gate 205.
- the output diode on-time detecting module shown in Fig. 10 can detect the interval of the high-level end of the auxiliary winding of the main circuit, thereby substantially detecting the on-time interval of the output diode of the main circuit.
- V400 is the output waveform of the comparator 300, and is the reset signal of the primary side switching tube 15 driving pulse
- V500 is the output waveform of the timing trigger 500, which is the primary side.
- the switch tube 15 drives the pulse set signal;
- V600 is the output waveform of the RS flip-flop 600, that is, the primary side switch tube 15 drives the pulse signal;
- ipri is the main circuit primary current waveform;
- i sec is the main circuit output diode current waveform;
- Iref Is the output waveform of the first multiplier 101;
- Vcontrol is the output waveform of the output diode on-time detecting module 200, iemu is the output of the second multiplier 102 Waveform;
- the main working principle of the circuit is as follows: (1) The voltage sampling circuit 13 is outputted from the rectifier bridge 11 to obtain the waveform signal lac of the rectifier bridge output voltage of the switching power supply main circuit; (2) the transformer 14 is detected by the output diode conduction time detecting module 200.
- the positive level interval of the auxiliary winding is obtained as an output diode on-time signal Vcontrol; (3) the two signals lac and Vcontrol are sent to the primary-side controlled constant current switching power supply primary current reference generating circuit 100 of the present invention,
- the output signal of the comparator 400 is set high from the low level, and the jump signal is sent to the reset terminal of the RS flip-flop 400, and the output pulse generated by the RS flip-flop 600 is performed.
- control circuit includes average current reference 000, current reference generation circuit 100 of the present invention, output diode on-time detection module 600, comparator 700, inverter module 800, and RS flip-flop 900, and Side current sampling end, output diode conduction time detecting end, rectifier bridge voltage waveform signal detecting end and driving end;
- main circuit includes AC input 10, rectifier bridge 11, input capacitor 12, rectifier bridge voltage waveform sampling circuit 13, voltage transformation The first switching transistor 15, the sampling resistor 16, the output diode 17, and the output capacitor 18; wherein the control circuit is connected as follows: The output diode on
- the output of 600 is connected to the Vcontrol terminal of the current reference generating circuit 100 and the input terminal of the inverter module 800.
- the positive input terminal of the comparator 700 is connected to the primary current sampling terminal, and the negative input terminal of the comparator 700 is connected to the current reference generating circuit 100.
- the output of the comparator 700 is connected to the R terminal (reset terminal) of the RS flip-flop 900, the lac terminal of the current reference generating circuit 100 is connected to the rectifier bridge voltage waveform signal detecting terminal, and the inverter module 800 includes an inverter 801 and a delay.
- the input end of the inverter 801 is the input end of the inverter module 800, and the output end of the inverter 801 is connected to the input end of the delay link 802.
- the output of the time link 802 is the output end of the inverter module 800, the output of the inverter module 800 is connected to the S terminal (set end) of the RS flip-flop 900, and the output Q of the RS flip-flop 900 is connected to the drive end, current.
- the Vref of the reference generation circuit 100 terminates with an average current loop reference of 000.
- the main circuit connection relationship is as follows:
- the AC input 10 is connected to the two input ends of the rectifier bridge 11 at both ends, the positive output end of the rectifier bridge 11 is connected to one end of the input capacitor 11, one end of the rectifier bridge voltage waveform sampling circuit 13 and the primary winding of the transformer 14
- the negative output terminal of the rectifier bridge 11 is grounded
- the other end of the input capacitor 11 is grounded
- the other end of the rectifier bridge voltage waveform sampling circuit 13 is connected to the rectifier bridge voltage waveform signal detecting end of the control circuit
- the drain of the primary side switch 15 is terminated by a different name.
- the source of the primary switch 15 is connected to one end of the sampling resistor 16 and the primary current sampling end of the control circuit.
- the other end of the sampling resistor 16 is grounded, and the secondary side of the transformer 14
- the winding of the winding is terminated by the anode of the output diode 17, the cathode of the output diode 17 is connected to the anode of the output capacitor 18, the end of the secondary winding of the transformer 14 is connected to the cathode of the output capacitor 18, and the same name of the auxiliary winding of the transformer 14 is grounded.
- the output of the auxiliary winding of the transformer 14 is terminated by the output diode of the control circuit.
- the key waveform of the circuit shown in FIG. 13 is as shown in FIG. 14, wherein V700 is the output waveform of the comparator 700, and is the reset signal of the primary side switch 15 driving pulse; V800 is the output waveform of the inverter module 800, which is the original The side switch tube 15 drives the set signal of the pulse; V900 is the output waveform of the RS flip-flop 900, that is, the primary side switch tube 15 drives the pulse signal; ipri is the primary side current waveform of the main circuit; i sec is the main circuit output diode current waveform; Iref is the output waveform of the first multiplier 101; Vcontrol is the output waveform of the output diode on-time detecting module 600, iemu is the output of the second multiplier 102 Waveform;
- the main working principle of the circuit is as follows: (1) The voltage sampling circuit 13 is outputted from the rectifier bridge 11 to obtain the waveform signal lac of the rectifier bridge output voltage of the switching power supply main circuit; (2) the transformer 14 is detected by the output
- the positive level interval of the auxiliary winding is obtained as an output diode on-time signal Vcontrol; (3) the two signals lac and Vcontrol are sent to the primary-side controlled constant current switching power supply primary current reference generating circuit 100 of the present invention,
- the output signal of the comparator 700 is set high from the low level, and the jump signal is sent to the reset terminal of the RS flip-flop 900, and the output pulse generated by the RS flip-flop 900 is performed.
- RS flip-flop 900 detecting the zero-crossing point of the output diode current waveform by detecting the zero-crossing point of the auxiliary winding voltage of the transformer 14, and applying a delay loop , RS flip-flop 900 is generated so that the output pulse signal is set so as to achieve the primary switch 15 to open bottom, i.e., in the quasi-resonant circuit mode, primary switch driving pulse 15 is a pulse signal frequency.
- the absolute value of the input current of the main circuit is: among them.
- FIG. 16 is a specific embodiment of the present invention applied to a fixed-frequency high-power factor non-isolated buck-boost type (buck-boost) constant current switching power supply, wherein the control circuit is identical to the embodiment shown in Figure 9, the main circuit and The embodiment shown in FIG. 9 differs in that the transformer 14 of FIG. 6 is replaced by the inductor 14 in FIG. 16, and the specific working principle is also the same as that of the embodiment of FIG. 9.
- FIG. 17 is a schematic diagram of the present invention applied to a variable-frequency high-power-factor non-isolated buck.
- a specific embodiment of a -boost type (buck-boost) constant current switching power supply wherein the control circuit is identical to the embodiment shown in FIG. 13, and the main circuit differs from the embodiment shown in FIG. 13 in FIG.
- the transformer 14 of Fig. 13 is replaced by an inductor 14, and the specific operation principle is also the same as that of the embodiment of Fig. 13.
- 18 is a high power factor flyback constant current switching power supply with dimmable primary side control implemented by the present invention in combination with a thyristor dimming circuit.
- the main connection diagram is substantially the same as the embodiment shown in FIG. 9, except that a thyristor dimmer is inserted between the AC input 10 of the main circuit and the rectifier bridge 11 in FIG.
- phase-cut angle detecting circuit 301 replaces the average current loop reference 300 in FIG. 9, and replaces the timing trigger in FIG. 9 with the switch-on conduction control module 501; the input end of the phase-cut angle detection circuit 301 is connected to the rectifier bridge voltage waveform signal rectifier bridge voltage waveform The signal detecting end, the output end of the phase-cut angle detecting circuit 301 is connected to the Vref end of the current reference generating circuit 100; when dimming, the phase-cut angle detecting circuit 301 detects the phase-cut angle signal of the detecting end of the rectifier bridge voltage waveform signal, and converts it into an amplitude value.
- the duty cycle reflects the pulse signal of the phase-cut angle
- the current reference circuit generating circuit 100 serves as a reference for the average current loop, so that the magnitude of the output current can be changed to realize dimming
- the switch-on conduction control module 501 is used to control the primary side.
- the turn-on of the switch shown in FIG. 9, is a timing flip-flop 500, which includes an output diode on-time detection module 600 and an inverter module 800 in FIG.
- the specific module multiplier module and the average current loop included in the present invention can be formed by various embodiments or by various combinations to form different implementations without departing from the spirit of the present invention.
- a multiplier module can be implemented with a combination of switches, which will not be described in detail herein.
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Description
电流基准发生电路、 恒流开关电源的控制电路及方法 技术领域
本发明属于开关电源技术领域, 涉及一种自适应原边控制的高功率因数恒流 开关电源原边电流基准发生电路、 控制电路及方法。 背景技术
目前很多隔离型电源如手机充电器和大功率的 LED驱动器由于应用需求通常 要求电路有输出恒流的功能; 此外, 为了减轻电力污染的危害程度, 满足国际电工 委员会的谐波标准 IEEE555-2和 IEC1000-3-2等,上述隔离型电源还必须具备功率 因数校正 (PFC) 功能, 图 1为目前比较常用的单级功率因数校正方案: 通过检测 变压器副边侧的输出电流,在副边进行恒流控制之后经光耦反馈送到原边 PFC控制 电路。图 1所示现有技术方案由于副边电流采样电路和光耦的存在,增加了电路的 复杂性, 进一步, 由于光耦存在老化问题, 使电路的稳定性和使用寿命都受到一定 影响。
针对上述问题的解决方案是采用兼具原边恒流控制和功率因数校正功能的控 制方案, 即无需副边电流采样和光耦元件,直接通过在隔离变压器的原边获得输出 电流的信息, 加以控制实现输出恒流, 并且同时实现高功率因数, 如图 2所示。 目 前市面上已经有一些能实现上述输出恒流和 PFC功能的控制芯片。衡量上述控制方 案中的两个最关键的指标是进线电流的高功率因数和输出电流的恒流精度,尤其是 由于采用原边控制, 输出电流的恒流精度不如副边恒流控制。
目前一种输出恒流的现有技术是通过在原边模拟出副边电流, 将副边输出电 流模拟出来或副边输出电流平均值计算出来, 然后在原边进行恒流控制, 如图 3 所示, 通过对原边电流 ipri进行采样保持以获取原边电流峰值及对应的副边电流 峰值, 其中 ipri为原边电流信号, Vcontrol为采样信号, i sample为采样保持模 块输出信号, iemu 为副边电流模拟模块输出信号。 然而在实际电路中, 由于采样 保持模块在采样与保持切换之间存在一定的延时时间,会造成原边电流峰值采样的 误差, 从而造成模拟出的副边电流 iemu与实际值存在偏差, 如图 4所示, 并且该 偏差值会随输入电压和变压器激磁电感量变化, 比较难以补偿,从而造成输出恒流
会随输入电压不同, 变压器激磁电感不同而变化, 输出恒流精度较低。
另一种输出恒流常用的现有技术是恒功率的方法, 如图 5所示。 交流输入信 号经过整流后得到整流半波信号 Vin,整流半波信号 Vin经过电压前馈模块后得到 交流输入电压的有效值, 即输入电压前馈信号 Vff; 同时, 其经过波形整形模块 Id 后得到波形信号 Iac。 其中, 波形信号 Iac=k X Vin, k为一系数。 在恒流输出电路 中 Vea为可控常数。 乘法器对所述波形信号 Iac、 输入电压前馈信号 Vff和可控常 数 Vea进行乘法运算, 得到电流基准信号:
I x V k x V x V
ref " v 2 ~ ^ ~2
从而控制电感电流与电流基准信号一致, 实现 PFC功能。 可以看到, 该乘法 器通过将输入电压前馈信号的平方作为分子,在 Vea—定的情况下,实现输入功率 与输入电压无关, 即恒功率控制。上述利用乘法器抵消输入电压的影响来获得电流 基准的方法实质上为电压前馈控制。然而在有相控调光器存在的情况下,交流输入 信号在调光角度不同时会缺失,其整流后也不再是完整的半波, 因此输入前馈信号 Vff 包含了切相角度信号, 该电压前馈控制会导致 Iref 随着切相角度的增加而急 剧增加, 输入功率也相应剧增, 因此上述方法不适用于相控调光的场合。 发明内容
本发明克服上述现有技术中存在的缺陷, 提出了一种电流基准发生电路, 该电流基准发生电路能够产生自适应的开关电源主电路的原边电流信号跟随的基 准信号提供给恒流开关电源控制电路,该基准信号可跟随电路输入输出条件变化进 行自适应调整从而满足副边恒流输出的需要。
同时本发明基于电流基准发生电路实现了一种原边控制的高功率恒流开关电 源控制电路。
电流基准发生电路包括:
第一乘法器模块: 所述第一乘法器模块接收来自开关电源主电路的整流桥输 出的整流电压波形信号 lac和平均电流环的输出误差放大信号 Vcomp,产生一正弦 半波信号 Iref, 所述正弦半波信号 Iref 与整流电压波形信号 lac同频同相, 正弦 半波信号 Iref 的幅值随误差放大信号 Vcomp变化而变化,正弦半波信号 Iref作为 开关电源主电路的原边电流信号跟随的基准信号;
第二乘法器模块, 所述第二乘法器模块输入所述正弦半波信号 Iref和控制信 号 Vcontrol ,产生一脉冲信号 iemu,所述控制信号 Vcontrol是反映开关电源主电 路输出二极管导通时间的脉冲信号, 所述脉冲信号 iemu的幅值包络线是与所述正 弦半波信号 Iref 同频、同相且幅值成比例的正弦半波,脉冲信号 iemu的脉冲宽度 等于控制信号 Vcontrol的脉冲宽度;
平均电流环, 所述平均电流环输入脉冲信号 iemu 和平均电流环基准信号 Vref, 所述脉冲信号 iemu的平均值与设定的平均电流环基准信号 Vref进行比较, 二者之间的误差经平均电流环的补偿网络放大之后得到输出误差放大信号 ( Vcomp) 。
进一步, 所述平均电流环具有滤波功能, 对脉冲信号 iemu进行滤波得到脉冲 信号 iemu的开关周期平均值。
进一步, 若所述平均电流环不具有滤波功能或要直接将 iemu滤波后再送入平 均电流环, 所述电流基准发生电路还包括滤波器, 所述滤波器对脉冲信号 iemu进 行滤波, 滤除其高频谐波, 得到脉冲信号 iemu的开关周期平均值提供给平均电流 环。
进一步, 所述脉冲信号 iemu波形反映两倍输出二极管电流波形, 因此只要通 过平均电流环控制脉冲信号 iemu的平均值为常数的话, 即可实现输出电流恒流。
所述的开关电源主电路工作在电流断续或者临界断续状态。
所述的第二乘法器模块是乘法器或者实现等效功能的等效电路模块。
所述控制信号 Vcontrol来自开关电源变压器的辅助绕组或者开关电源的门极 控制信号。
所述控制信号 Vcontrol的幅值固定不变。
所述控制信号 Vcontrol的正脉冲宽度与开关电源主电路的输出二极管导通时 间相同。
所述的平均电流环包括误差放大器及补偿网络;
所述的平均电流环基准信号 Vref是直流基准;
所述的平均电流环基准信号 Vref在相控调光时为能反映相控调光角的脉冲信 号。
一种原边控制的高功率因数恒流开关电源控制电路包括: 电流基准发生电路、
输出二极管导通时间检测模块、 比较器、 开关管导通控制模块和 RS触发器: 其中, 所述电流基准发生电路如上所述;
所述输出二极管导通时间检测模块检测开关电源主电路二极管的导通时间, 输出控制信号 Vcontrol给电流基准发生电路;
所述比较器的两个输入端分别输入电流基准发生电路输出的正弦半波信号
Iref 和原边电流采样信号, 并进行比较; 当原边电流采样信号上升到触及正弦半 波信号 Iref 时, 比较器输出信号从低电平翻转为高电平, 此后当原边电流采样信 号下降到低于正弦半波信号 Iref 时, 比较器输出信号从高电平翻转为低电平; 所述 RS 触发器的两个输入端分别连接比较器的输出端和开关管导通控制模 块,输出触发信号给主电路的开关管, 比较器的输出端接 RS触发器的复位端 R端, 开关管导通控制模块的输出接 RS触发器的置位端 S端; 当 RS触发器的复位端 R 端检测到一个从低电平到高电平的上升沿跳变时, RS 触发器的输出信号从高电平 复位为低电平, 控制开关电源主电路的开关管的关断, 当 RS触发器的置位端 S端 检测到一个从低电平到高电平的上升沿跳变时, RS 触发器的输出信号从低电平置 位为高电平, 如此周而复始, RS触发器输出脉冲序列信号。
所述的开关管导通控制模块为定时触发器, 所述的定时触发器产生频率固定 的时钟信号提供给 RS触发器的置位端 S端,控制开关电源主电路的开关管的导通。
所述的开关管导通控制模块包括输出二极管导通时间检测模块、 反相器和延 时电路,通过检测副边二极管电流导通时间产生脉冲信号,然后加以反相和延时后 提供给 RS触发器的置位端 S端, 控制开关电源主电路的开关管的导通。
恒流开关电源的控制方法, 包括如下步骤:
( 1 ) 使开关电源的主电路工作在电流断续或者临界断续状态;
( 2) 检测开关电源主电路的整流桥输出的整流电压波形信号 (lac ) ;
( 3 ) 获得一脉宽反映开关电源主电路输出二极管导通时间、幅值反映原边电流 信号幅值的脉冲信号 (iemu) ;
( 4) 根据步骤 (2 ) 得到的整流电压波形信号 (lac ) 以及步骤 (3 ) 得到的脉 冲信号(iemu),产生一与开关电源主电路的整流桥的输出电压波形一致、 幅值受到一平均电流环输出的误差放大信号控制的电流基准信号( Iref ), 电流基准信号 (Iref ) 进一步反馈给步骤 (3 ) , 控制脉冲信号 (iemu)
的生成, 其中输出恒流值与平均电流环的基准成比例关系。
( 5 ) 根据步骤 (4) 得到的电流基准信号 (Iref ) 以及原边电流采样信号, 产 生原边开关管驱动脉冲的关断信号;
( 6) 产生开关管驱动脉冲的导通信号;
( 7) 重复步骤 (1 ) - ( 6 ) 。
本发明的有益效果为:
本发明提出的一种电流基准发生电路的第二乘法器的输出信号 iemu与图 3采 用采样保持模块和副边电流模拟模块模拟出的电流波形不同,虽然二者的正脉宽都 为输出二极管的导通时间, 但是 e ^的每个脉冲波形的高电平都是正弦半波的包 络线, 而图 3中模拟出的脉冲电流波形的高电平是采样保持模块输出的水平直线。 该电流基准发生电路能够产生自适应的开关电源主电路的原边电流信号跟随的基 准信号提供给恒流开关电源控制电路,该基准信号可跟随电路输入输出条件变化进 行自适应调整从而满足副边恒流输出的需要。
本发明提出的恒流开关电源控制电路的输出恒流控制是一种自适应的负反馈 闭环控制方式, 即产生的电流基准信号的幅值受到平均电流环控制,而产生的电流 基准信号又会影响到平均电流环的输入信号从而影响到平均电流环的输出。当开关 电源外部条件发生变化,如输入电压改变或输出电压改变,平均电流环的输出发生 改变, 从而改变电流基准信号幅值, 经过负反馈达到平衡之后重新实现输出恒流; 通过将原边电流对产生电流基准信号进行跟随,可以实现高功率因数。本发明提出 的恒流开关电源控制电路及方法无需对原边电流进行采样保持,消除了采样保持带 来的误差, 提高了输出电流的恒流精度, 此外与电压前馈的恒功率方法相比, 本发 明产生的是一种自适应的电流基准,恒流精度不受乘法器影响,在相控调光时电流 基准可直接由切相角获得而无需经过乘法器, 因此输入功率不受切相角度影响,无 需增加额外的控制成本。 此外, 本发明的恒流开关电源控制电路可集成为单芯片。 附图说明
图 1为现有技术中的一种副边恒流的单级功率因数校正电路;
图 2为原边控制的具有高功率因数的恒流电路示意图;
图 3为一种现有技术的原边控制的恒流开关电源及其控制电路;
图 4为采样保持电路造成的采样误差示意图;
图 5为基于恒功率原理实现的原边控制的恒流输出 PFC电路;
图 6A、 图 6B为本发明的电流基准发生电路;
图 7为本发明的电流基准发生电路一个具体实施例;
图 8为图 6A和图 6B电路的关键波形示意图;
图 9为本发明的电流基准发生电路构成的原边控制的定频高功率因数控制电 路应用于反激式恒流开关电源的一个具体实施例;
图 10为图 9所示电路中的输出二极管导通时间检测模块的一个具体实施例; 图 11为图 10电路的关键波形示意图;
图 12为图 9所示实施例电路的关键波形;
图 13为本发明的电流基准发生电路 100构成的原边控制的变频高功率因数控 制电路应用于反激式恒流开关电源的一个具体实施例;
图 14为图 13所示电路的关键波形;
图 15为图 13所示实施例电路在半个交流输入工频周期内的归一化的输出电 流计算波形;
图 16为本发明应用于定频高功率因数非隔离型 buck-boost型 (升降压) 恒 流开关电源的一个具体实施例;
图 17为本发明应用于变频高功率因数非隔离型 buck-boost型 (升降压) 恒 流开关电源的一个具体实施例。
图 18是本发明与可控硅调光电路结合起来实现的可调光原边控制的高功率因 素反激式恒流开关电源。 具体实施方式
以下结合本发明框图以及具体实施例示意图本发明内容进行详细说明。 如图 6A所示, 本发明的电流基准发生电路 100包括:
第一乘法器模块 101 : 所述第一乘法器模块 101接收来自开关电源主电路 的整流桥输出的整流电压波形信号 lac和平均电流环 104的输出误差放大信号 Vcomp , 产生一正弦半波信号 Iref, 所述正弦半波信号 Iref 同整流电压波形信 号 lac同频同相, 正弦半波信号 Iref 的幅值随误差放大信号 Vcomp变化而变
化, 正弦半波信号 Iref 作为开关电源主电路的原边电流信号跟随的基准信号; 第二乘法器模块 102, 所述第二乘法器模块 102 输入所述正弦半波信号 Iref 和控制信号 Vcontrol , 产生一脉冲信号 iemu, 所述控制信号 Vcontrol是 反映开关电源主电路输出二极管导通时间的脉冲信号, 所述脉冲信号 i emu 的 幅值包络线是与所述正弦半波信号 Iref 同频、 同相且幅值成比例的正弦半波, 脉冲信号 i emu的脉冲宽度等于控制信号 Vcontrol的脉冲宽度;
平均电流环 104,所述平均电流环 104输入脉冲信号 iemu和平均电流环基 准信号 Vref, 所述脉冲信号 iemu的开关周期平均值与设定的平均电流环基准 信号 Vref 进行比较, 输出信号误差放大信号 Vcomp。
进一步, 所述平均电流环 104具有一定的滤波功能, 对脉冲信号 i emu进 行滤波得到脉冲信号 iemu的开关周期平均值。
进一步, 若所述平均电流环 104不具有滤波功能或要直接将 i emu滤波后 送入平均电流环, 所述电流基准发生电路 100还包括滤波器 103, 如图 6B, 所 述滤波器对脉冲信号 iemu进行滤波, 滤除其高频谐波, 得到脉冲信号 iemu的 开关周期平均值提供给平均电流环。
进一步, 所述脉冲控制信号 i emu 波形反映两倍输出二极管电流波形、 幅 值反映原边电流信号幅值, 因此只要通过平均电流环控制脉冲控制信号 iemu 的开关周期平均值为常数的话, 即可实现输出电流恒流。
所述的开关电源主电路工作在电流断续或者临界断续状态。
所述的第二乘法器模块 102是乘法器或者实现等效功能的等效电路模块, 如图 7所示。
所述控制信号 Vcontrol 来自开关电源变压器的辅助绕组或者开关电源的 门极控制信号。
所述控制信号 Vcontrol的幅值固定不变。
所述控制信号 Vcontrol 的正脉冲宽度与开关电源主电路的输出二极管导 通时间相同。
所述的平均电流环包括误差放大器及补偿网络, 如图 7所示。
所述的平均电流环基准信号 Vref 是直流基准;
所述的平均电流环基准信号 Vref 在相控调光时为能反映相控调光角的脉
冲信号, 如图 7所示。
图 8为图 6电路中主要关键波形, 其中 lac为开关电源主电路的整流桥输 出的整流电压波形信号, Vcomp为平均电流环 104输出的误差放大信号, Iref 是第一乘法器 101输出的正弦半波信号, Vcontrol是反映开关电源主电路输出 二极管导通时间的脉冲信号, iemu 是第二乘法器的输出的脉冲信号, Vref 是 平均电流环基准信号。
图 9是本发明的电流基准发生电路构成的原边控制的定频高功率因数恒流 开关电源控制电路应用于反激式恒流开关电源的一个具体实施例, 其中反激式 开关电源工作在断续模式。
开关电源包括: 主电路和原边控制的恒流开关电源的控制电路, 其中, 所 述主电路包括交流输入 10、 整流桥 11、 输入电容 12、 整流桥电压波形采样电 路 13、 变压器 14、 原边开关管 15、 采样电阻 16、 输出二极管 17和输出电容 18; 其中, 所述控制电路包括电流基准发生电路 100、 输出二极管导通时间检 测模块 200、 平均电流环基准 300、 比较器 400、 定时触发器 500和 RS触发器 600, 以及原边电流采样端、 输出二极管导通时间检测端、 整流桥电压波形信 号检测端和驱动端;
原边控制的恒流开关电源的控制电路的连接关系如下: 输出二极管导通时 间检测模块 200 的一个输入端 I I接输出二极管导通时间检测端, 输出二极管 导通时间检测模块的另一个输入端 12接 RS触发器 600的输出端 Q, 输出二极 管导通时间检测模块 200的输出端 01接电流基准发生电路 100的 Vcontrol端, 比较器 400 的负输入端接电流基准发生电路 100的输出 Iref 端, 比较器 400 的正输入端接原边电流采样端, 比较器 400的输出接 RS触发器 600的 R端(复 位端) , 定时触发器 500的输出接 RS触发器 600的 S端 (置位端) , RS触发 器 600的输出 Q接驱动端, 电流基准发生电路 100的 lac端接整流桥电压波形 信号检测端, 电流基准发生电路 100内部模块连接如前文所述, 电流基准发生 电路 100的 Vref 端接平均电流环基准 300。
主电路的连接关系如下: 交流输入 10两端接整流桥 11的两个输入端, 整 流桥 11 的正输出端接输入电容 12的一端、 整流桥电压波形采样电路 13的一 端和变压器 14原边绕组的同名端, 整流桥 11 的负输出端接地, 输入电容 12
的另一端接地, 整流桥电压波形采样电路 13 的另一端接控制电路的整流桥电 压波形信号检测端, 变压器 14的原边绕组的异名端接原边开关管 15的漏极, 原边开关管 15的源极接采样电阻 16的一端和控制电路的原边电流采样端, 采 样电阻 16的另一端接地, 变压器 14的副边绕组的异名端接输出二极管 17的 阳极, 输出二极管 17的阴极接输出电容 18的正极, 变压器 14的副边绕组的 同名端和输出电容 18的负极相连, 变压器 14的辅助绕组的同名端接地, 变压 器 14 的辅助绕组的异名端接控制电路的输出二极管导通时间检测端, 原边开 关管 15的门极接控制电路的驱动端。
图 10为输出二极管导通时间检测模块 200的一个具体实施例, 包括比较 器 201、 偏置基准 202、 反相器 203、 RS触发器 204和异或门 205。 其中比较器 201的正输入端接输出二极管导通时间检测模块 200的一个输入端 I I, 比较器 201的负输入端接偏置基准 202, 比较器 201的输出端接反相器 203的输入端, 反相器 203的输出端分别接 RS触发器 204的 R端 (复位端) 和异或门 205的 一个输入端, RS触发器 204的 S端 (置位端) 接输出二极管导通时间检测模块 200的另一个输入端 12, RS触发器 204的输出端 Q接输出二极管导通时间检测 模块 200的输出端 01。 图 10所示输出二极管导通时间检测模块 200实施例的 关键波形如图 11所示, 其中 VI I是输入端 I I的波形信号, 图中所示为输入端 I I接主电路辅助绕组异名端时的波形; V201 为比较器 201 的输出波形信号; V203为反相器 203的输出波形信号; VI2为输入端 200的输入信号, 与主电路 原边开关管门极驱动信号相同; V204为 RS触发器 204 的输出波形信号; V01 为异或门 205的输出信号。 从图 11所示波形可以看出, 图 10所示输出二极管 导通时间检测模块可以检测出主电路辅助绕组异名端高电平的区间, 从而大致 检测出主电路输出二极管导通时间区间。
图 9所示电路的关键波形如图 12所示, 其中, V400为比较器 300的输出 波形, 为原边开关管 15驱动脉冲的复位信号; V500是定时触发器 500的输出 波形, 为原边开关管 15驱动脉冲的置位信号; V600是 RS触发器 600的输出波 形, 即原边开关管 15驱动脉冲信号; ipri为主电路原边电流波形; i sec为主 电路输出二极管电流波形; Iref 是第一乘法器 101 的输出波形; Vcontrol 为 输出二极管导通时间检测模块 200的输出波形, iemu是第二乘法器 102的输出
波形; 电路主要工作原理如下: (1 ) 通过整流桥 11输出电压采样电路 13得 到开关电源主电路的整流桥输出电压的波形信号 lac ; ( 2 )通过输出二极管导 通时间检测模块 200检测变压器 14的辅助绕组的正电平区间得到输出二极管 导通时间信号 Vcontrol ; ( 3 )将上述两个信号 lac和 Vcontrol送入本发明的 原边控制的恒流开关电源原边电流基准发生电路 100, 产生自适应的原边电流 基准信号 Iref ; ( 4 ) 采样电阻 16上的原边电流与电流基准 Iref 通过比较器 400进行比较产生原边驱动信号的复位信号, 即当采样电阻 16上的原边电流上 升到电流基准 Iref 幅值时, 比较器 400 的输出信号从低电平置位高电平, 该 跳变信号送入到 RS触发器 400的复位端, 将 RS触发器 600产生的输出脉冲进 行复位; (5 ) 定时触发器 500产生的窄脉冲上升沿对 RS触发器 600产生的输 出脉冲进行置位, 因此输出脉冲为频率固定的脉冲信号。 由之前的描述可知, 当开关电源主电路输入或输出条件发生变化时, 通过平均电流环可自动调节原 边电流基准信号 Iref 使输出电流保持不变从而实现输出恒流; 假设输入电压 为 c
则可得到开关电源的占空比为:
ν pkΛ ηωά V pk 其中 1^是变压器 14的激磁电感量, 是开关电源的工作频率, 即 RS触发 器 600的输出脉冲频率, 《是输入交流电压角频率, (0 Λ«是输入交流 电压频率, 由式 (1 ) 可知, 在特定的输入电压和输出电流情况下, 占空比 D 为常数, 进一步可以求出输入交流电流的开关周期平均值为:
V≠ |sm ωί
LJ ( 2 ) 由式 (2 ) 可知, 开关电源交流输入电流波形为纯正弦, 因此可以获得非 常高的功率因数。 图 13是基于本发明的电流基准发生电路 100构成的原边控 制的变频高功率因数控制电路应用于反激式恒流开关电源的一个具体实施例, 其中反激式开关电源工作在临界断续模式, 即准谐振模式; 控制电路包括平均 电流基准 000、 本发明的电流基准发生电路 100、 输出二极管导通时间检测模 块 600、 比较器 700、 反相器模块 800和 RS触发器 900, 以及原边电流采样端、 输出二极管导通时间检测端、 整流桥电压波形信号检测端和驱动端; 主电路包 括交流输入 10、 整流桥 11、 输入电容 12、 整流桥电压波形采样电路 13、 变压
器 14、 原边开关管 15、 采样电阻 16、 输出二极管 17和输出电容 18 ; 其中控 制电路的连接关系如下: 输出二极管导通时间检测模块 600包括比较器 601和 比较器基准 602, 比较器 601 的正输入端接输出二极管导通时间检测端, 比较 器 601的负输入端接比较器基准 602的一端, 比较器基准 602的另一端接地, 比较器 601的输出作为输出二极管导通时间检测模块 600的输出接电流基准发 生电路 100的 Vcontrol端和反相器模块 800的输入端, 比较器 700的正输入 端接原边电流采样端, 比较器 700的负输入端接电流基准发生电路 100的 Iref 端, 比较器 700的输出接 RS触发器 900的 R端 (复位端) , 电流基准发生电 路 100的 lac端接整流桥电压波形信号检测端,反相器模块 800包括反相器 801 和延时环节 802, 反相器 801的输入端即为反相器模块 800的输入端, 反相器 801的输出端接延时环节 802的输入端, 延时环节 802的输出端即为反相器模 块 800的输出端, 反相器模块 800的输出接 RS触发器 900的 S端 (置位端) , RS触发器 900的输出 Q接驱动端, 电流基准发生电路 100的 Vref 端接平均电 流环基准 000。 主电路连接关系如下: 交流输入 10两端接整流桥 11的两个输 入端, 整流桥 11的正输出端接输入电容 11的一端、 整流桥电压波形采样电路 13的一端和变压器 14原边绕组的同名端, 整流桥 11的负输出端接地, 输入电 容 11的另一端接地, 整流桥电压波形采样电路 13的另一端接控制电路的整流 桥电压波形信号检测端, 变压器 14的原边绕组的异名端接原边开关管 15的漏 极,原边开关管 15的源极接采样电阻 16的一端和控制电路的原边电流采样端, 采样电阻 16 的另一端接地, 变压器 14 的副边绕组的异名端接输出二极管 17 的阳极, 输出二极管 17的阴极接输出电容 18的正极, 变压器 14的副边绕组 的同名端和输出电容 18的负极相连, 变压器 14的辅助绕组的同名端接地, 变 压器 14的辅助绕组的异名端接控制电路的输出二极管导通时间检测端。
图 13所示电路的关键波形如图 14所示, 其中, V700为比较器 700的输出 波形, 为原边开关管 15驱动脉冲的复位信号; V800是反相器模块 800的输出 波形, 为原边开关管 15驱动脉冲的置位信号; V900是 RS触发器 900的输出波 形, 即原边开关管 15驱动脉冲信号; ipri为主电路原边电流波形; i sec为主 电路输出二极管电流波形; Iref 是第一乘法器 101 的输出波形; Vcontrol 为 输出二极管导通时间检测模块 600的输出波形, iemu是第二乘法器 102的输出
波形; 电路主要工作原理如下: (1 ) 通过整流桥 11输出电压采样电路 13得 到开关电源主电路的整流桥输出电压的波形信号 lac ; ( 2 )通过输出二极管导 通时间检测模块 200检测变压器 14的辅助绕组的正电平区间得到输出二极管 导通时间信号 Vcontrol ; ( 3 )将上述两个信号 lac和 Vcontrol送入本发明的 原边控制的恒流开关电源原边电流基准发生电路 100, 产生自适应的原边电流 基准信号 Iref ; ( 4 ) 采样电阻 16上的原边电流与电流基准 Iref 通过比较器 300进行比较产生原边驱动信号的复位信号, 即当采样电阻 16上的原边电流上 升到电流基准 Iref 幅值时, 比较器 700 的输出信号从低电平置位高电平, 该 跳变信号送入到 RS触发器 900的复位端, 将 RS触发器 900产生的输出脉冲进 行复位; (5 ) 通过检测变压器 14辅助绕组电压的过零点检测出输出二极管电 流波形的过零点, 加以延时环节, 产生让 RS触发器 900 的输出脉冲置位的信 号, 从而实现原边开关管 15 谷底开通, 即电路工作在准谐振模式, 因此原边 开关管 15的驱动脉冲为变频脉冲信号。 在图 13所示实施例中, 主电路输入电 流绝对值表达式为:
其中 。'为输出电压折算到变压器原边之后的电压, 为电流电压对应系数, D为占空比, 为导通时间与开关周期的比值; Ipk是主电路原边电流峰值, Vpk 是交流输入电压峰值; 根据式 (3 ) 得到半个交流输入工频周期内的归一化的 输出电流波形如图 15所示, 其中 , 可以看到交流输入电流波形接近正 弦波; 但随着 s变小, 即输入电压幅值增大, 输入电流的波形失真越厉害, 功 率因数越低。
本发明可以用于图 9和图 13所示的隔离型拓扑, 也可用于非隔离型拓扑。 图 16是本发明应用于定频高功率因数非隔离型 buck-boost型 (升降压) 恒流 开关电源的一个具体实施例, 其中控制电路与图 9所示实施例完全相同, 主电 路与图 9所示实施例区别在于图 16中用电感 14替代了图 6中的变压器 14,具 体工作原理也与图 9实施例相同; 图 17是本发明应用于变频高功率因数非隔 离型 buck-boost 型 (升降压) 恒流开关电源的一个具体实施例, 其中控制电 路与图 13所示实施例完全相同, 主电路与图 13所示实施例区别在于图 17中
用电感 14替代了图 13中的变压器 14, 具体工作原理也与图 13实施例相同。 图 18 是本发明与可控硅调光电路结合起来实现的可调光原边控制的高功 率因素反激式恒流开关电源。其中主要连接关系图与图 9所示实施例大致相同, 区别在于图 18中主电路的交流输入 10与整流桥 11之间插入了可控硅调光器, 控制电路中用切相角检测电路 301替代了图 9中的平均电流环基准 300, 用开 关管导通控制模块 501替代了图 9中的定时触发器; 切相角检测电路 301的输 入端接整流桥电压波形信号整流桥电压波形信号检测端, 切相角检测电路 301 的输出端接电流基准发生电路 100 的 Vref 端; 调光时, 切相角检测电路 301 检测整流桥电压波形信号检测端的切相角信号, 转换为幅值一定、 占空比反映 切相角的脉冲信号, 送入电流基准发生电路 100充当平均电流环的基准, 从而 可以改变输出电流的大小实现调光; 开关管导通控制模块 501用来控制原边开 关管的开通, 在图 9中为定时触发器 500, 在图 13中包括输出二极管导通时间 检测模块 600和反相器模块 800。
本发明包括的具体模块乘法器模块和平均电流环等, 本领域技术人员可以 在不违背其精神的前提下,可以有多种实施方式,或通过各种不同的组合方式, 形成不同的具体实施例, 例如乘法器模块可以用开关组合实现, 这里不再详细 描述。
无论上文说明如何详细, 还有可以有许多方式实施本发明, 说明书中所述 的只是本发明的一个具体实施例子。 凡根据本发明精神实质所做的等效变换或 修饰, 都应涵盖在本发明的保护范围之内。
本发明实施例的上述详细说明并不是穷举的或者用于将本发明限制在上 述明确的形式上。 在上述以示意性目的说明本发明的特定实施例和实例的同 时, 本领域技术人员将认识到可以在本发明的范围内进行各种等同修改。
在上述说明描述了本发明的特定实施例并且描述了预期最佳模式的同时, 无论在上文中出现了如何详细的说明, 也可以许多方式实施本发明。 上述电路 结构及其控制方式的细节在其执行细节中可以进行相当多的变化, 然而其仍然 包含在这里所公开的本发明中。
如上述一样应当注意, 在说明本发明的某些特征或者方案时所使用的特殊 术语不应当用于表示在这里重新定义该术语以限制与该术语相关的本发明的
某些特定特点、 特征或者方案。 总之, 不应当将在随附的权利要求书中使用的 术语解释为将本发明限定在说明书中公开的特定实施例, 除非上述详细说明部 分明确地限定了这些术语。因此,本发明的实际范围不仅包括所公开的实施例, 还包括在权利要求书之下实施或者执行本发明的所有等效方案。
Claims
1、 电流基准发生电路, 其特征在于包括:
第一乘法器模块: 所述第一乘法器模块接收来自开关电源主电路的整流桥 输出的整流电压波形信号(lac )和平均电流环输出的误差放大信号(Vcomp ) , 产生一正弦半波信号 (Iref) , 所述正弦半波信号 (Iref) 与整流电压波形信号 ( lac ) 同频同相, 正弦半波信号 (Iref) 的幅值随平均电流环的输出误差放大 信号 (Vcomp ) 变化而变化, 正弦半波信号 (Iref) 作为开关电源主电路的原边 电流信号跟随的基准信号;
第二乘法器模块, 所述第二乘法器模块输入所述正弦半波信号 (Iref) 和 控制信号 (Vcontrol) , 产生一脉冲信号 (iemu) , 所述控制信号 (Vcontrol) 是反映开关电源主电路输出二极管导通时间的脉冲信号,所述脉冲信号(iemu) 的幅值包络线是与所述正弦半波信号(Iref) 同频、 同相且幅值成比例的正弦半 波, 脉冲信号 (iemu) 的脉冲宽度等于控制信号 (Vcontrol) 的脉冲宽度; 平均电流环, 所述平均电流环输入脉冲信号 (iemu) 和平均电流环基准信 号( Vref),所述脉冲信号(iemu)的平均值与设定的平均电流环基准信号(Vref) 进行比较, 二者之间的误差经平均电流环的补偿网络放大之后输出误差放大信 号 ( Vcomp ) 。
2、 如权利要求 1 所述电流基准发生电路, 其特征在于所述平均电流环 具有一定的滤波功能, 对脉冲控制信号(iemu)进行滤波得到脉冲信号(iemu) 的开关周期平均值。
3、 如权利要求 1 所述电流基准发生电路, 其特征在于所述电流基准发 生电路还包括滤波器, 所述滤波器对脉冲信号 (iemu) 进行滤波, 滤除其高频 谐波, 得到脉冲信号 (iemu) 的开关周期平均值提供给平均电流环。
4、 如权利要求 1 所述电流基准发生电路, 其特征在于所述脉冲信号
( iemu) 波形反映两倍输出二极管电流波形或近似反映两倍输出二极管电流波 形、 幅值反映原边电流信号幅值。
5、 如权利要求 1 所述电流基准发生电路, 其特征在于所述第二乘法器 模块是乘法器或者实现等效功能的等效电路模块。
6、 如权利要求 1 所述电流基准发生电路, 其特征在于所述控制信号
( Vcontrol) 来自开关电源变压器的辅助绕组或者开关电源的门极控制信号。
7、 如权利要求 1 所述电流基准发生电路, 其特征在于所述控制信号 ( Vcontrol) 的幅值固定不变。
8、 如权利要求 1 所述电流基准发生电路, 其特征在于所述控制信号
( Vcontrol) 的正脉冲宽度与开关电源主电路的输出二极管导通时间相同。
9、 如权利要求 1 所述电流基准发生电路, 其特征在于所述的第二乘法 器模块是乘法器或者实现等效功能的等效电路模块。
10、 如权利要求 1 所述电流基准发生电路, 其特征在于所述的平均电流 环包括误差放大器及补偿网络;
1 1、 恒流开关电源控制电路, 其特征在于包括: 电流基准发生电路、 输 出二极管导通时间检测模块、 比较器、 开关管导通控制模块和 RS触发器, 其 中,
所述电流基准发生电路为权利要求 1 -10 中的任一权利要求中所述的电流 基准发生电路;
所述输出二极管导通时间检测模块检测开关电源主电路二极管的导通时 间, 输出控制信号 (Vcontrol ) 给电流基准发生电路;
所述比较器的两个输入端分别输入电流基准发生电路输出的正弦半波信 号 Iref和原边电流采样信号, 并进行比较;
所述 RS触发器的两个输入端分别连接比较器的输出端和开关管导通控制 模块, 输出触发信号给主电路的开关管;
所述的开关管导通控制模块控制开关电源主电路的开关管的导通。
12、 权利要求 1 1所述恒流开关电源控制电路, 其特征在于: 当原边电流 采样信号上升到触及正弦半波信号(Iref) 时, 比较器输出信号从低电平翻转为 高电平, 此后当原边电流采样信号下降到低于正弦半波信号 (Iref) 时, 比较器 输出信号从高电平翻转为低电平;
比较器的输出端接 RS触发器的复位端 R端, 开关管导通控制模块的输出 接 RS触发器的置位端 S端; 当 RS触发器的复位端 R端检测到一个从低电平 到高电平的上升沿跳变时, RS触发器的输出信号从高电平复位为低电平,控制 开关电源主电路的开关管的关断, 当 RS触发器的置位端 S端检测到一个从低 电平到高电平的上升沿跳变时, RS触发器的输出信号从低电平置位为高电平, 如此周而复始, RS触发器输出脉冲序列信号。
13、 如权利要求 11所述恒流开关电源控制电路, 其特征在于所述开关管 导通控制模块为定时触发器, 所述的定时触发器产生频率固定的时钟信号提供 给 RS触发器, 控制开关电源主电路的开关管的导通。
14、 如权利要求 11所述恒流开关电源控制电路, 其特征在于所述的开关 管导通控制模块包括输出二极管导通时间检测模块、 反相器和延时电路, 通过 检测副边二极管电流导通时间产生脉冲信号,然后加以反相和延时后提供给 RS 触发器, 控制开关电源主电路的开关管的导通。
15、 恒流开关电源的控制方法, 其特征在于包括如下步骤:
(1) 使开关电源的主电路工作在电流断续或者临界断续状态;
(2) 检测开关电源主电路的整流桥输出的整流电压波形信号 (lac) ;
(3) 获得一脉宽反映开关电源主电路输出二极管导通时间、 幅值反映原边 电流信号幅值的脉冲信号 (iemu) ;
(4) 根据步骤 (2) 得到的整流电压波形信号 (lac) 以及步骤 (3) 得到的 脉冲信号 (iemu) , 产生一与开关电源主电路的整流桥的输出电压波 形一致、 幅值受到一平均电流环输出的误差放大信号控制的电流基准 信号 (Iref) , 电流基准信号 (Iref) 进一步反馈给步骤 (3) , 控制脉 冲信号 (iemu) 的生成, 其中输出恒流值与平均电流环的基准成比例 关系。
(5) 根据步骤 (4) 得到的电流基准信号 (Iref) 以及原边电流采样信号, 产生原边开关管驱动脉冲的关断信号;
(6) 产生开关管驱动脉冲的导通信号;
(7) 重复步骤 (1) - (6) 。
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US8520416B2 (en) | 2013-08-27 |
CN102368662B (zh) | 2013-11-27 |
CN102368662A (zh) | 2012-03-07 |
US20130051090A1 (en) | 2013-02-28 |
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