WO2012117872A1 - Substrat de résine doté d'un composant électronique incorporé - Google Patents

Substrat de résine doté d'un composant électronique incorporé Download PDF

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Publication number
WO2012117872A1
WO2012117872A1 PCT/JP2012/053824 JP2012053824W WO2012117872A1 WO 2012117872 A1 WO2012117872 A1 WO 2012117872A1 JP 2012053824 W JP2012053824 W JP 2012053824W WO 2012117872 A1 WO2012117872 A1 WO 2012117872A1
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WO
WIPO (PCT)
Prior art keywords
component
resin
via conductors
resin substrate
substrate
Prior art date
Application number
PCT/JP2012/053824
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English (en)
Japanese (ja)
Inventor
酒井　範夫
喜人 大坪
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2013502243A priority Critical patent/JPWO2012117872A1/ja
Priority to CN201290000317.XU priority patent/CN203482516U/zh
Publication of WO2012117872A1 publication Critical patent/WO2012117872A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09618—Via fence, i.e. one-dimensional array of vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a component-embedded resin substrate.
  • Patent Document 1 An example of a component-embedded substrate formed by alternately laminating insulating layers and conductor patterns made of a thermoplastic resin is described in Japanese Patent Application Laid-Open No. 2007-305664 (Patent Document 1).
  • an electronic component such as a chip resistor is built in the substrate and is connected to another electronic component by wiring.
  • members called via conductors are formed so as to penetrate the insulating layer in the thickness direction.
  • the electronic component is completely covered and hidden inside the component-embedded substrate and is surrounded by a part of the plurality of insulating layers.
  • an insulating layer made of a thermoplastic resin directly surrounds the outer periphery of the electronic component so as to completely surround the outer periphery of the electronic component.
  • FIG. 23 shows an example of a resin substrate with a built-in component based on the conventional technology.
  • the resin layer 2 as an insulating layer is in direct contact with the outer periphery of the component 3 so as to completely surround the outer periphery of the component 3 as an electronic component.
  • the component built-in resin substrate 101 includes a plurality of via conductors 6 and a plurality of conductor patterns 7 therein.
  • the component 3 is a rectangular parallelepiped as shown in FIG. 24, and has electrodes 3a and 3b at both ends, respectively. As shown in FIG. 23, via conductors 6n are connected to the electrodes 3a and 3b of the component 3, respectively.
  • the above-described component-embedded resin substrate has a problem that when the substrate itself is deformed, an insulating layer made of a thermoplastic resin may be peeled around the built-in component.
  • an insulating layer made of a thermoplastic resin may be peeled around the built-in component.
  • the interface 4 where the resin layer 2 as the insulating layer and the component 3 come into contact with each other is first peeled off inside the component-embedded resin substrate 101.
  • the problem is that cracks propagate at the interface 5 between the resin layers 2.
  • an object of the present invention is to provide a component-embedded resin substrate in which the insulating layer made of a thermoplastic resin is prevented from peeling around the built-in component even when the substrate itself is deformed.
  • a component-embedded resin substrate includes a plurality of resin layers stacked on each other and two or more resin layers continuously arranged in the thickness direction included in the plurality of resin layers. Parts arranged so as to be surrounded by and in contact with each resin layer of the first group which is a group, penetrating through at least one of the resin layers belonging to the first group, and in plan view, A plurality of reinforcing via conductors, which are via conductors that are not connected to any other circuit or are grounded, are arranged along at least a part of the outer shape of the component.
  • the plurality of reinforcing via conductors are arranged along at least a part of the outline of the component by arranging a plurality of point-like ones in a plan view. .
  • this configuration it is possible to alleviate the deformation that reaches the interface of the component at least in part of the outline.
  • the plurality of reinforcing via conductors are arranged so as to extend over all of the first group in the thickness direction.
  • the reinforcing via conductor can cover the side surface of the component in a wider range, so that it is possible to more reliably prevent a large deformation from being transmitted to the side surface of the component.
  • the plurality of reinforcing via conductors are arranged so as not to be exposed to the outside.
  • the plurality of reinforcing via conductors are arranged so as to surround the outer periphery of the component in plan view.
  • the plurality of resin layers are mainly composed of a thermoplastic resin.
  • the resin layers can be bonded by heating and pressurizing after laminating the respective resin layers in order, thereby facilitating production.
  • FIG. 1 shows a cross-sectional view of the component-embedded resin substrate 1 in the present embodiment.
  • FIG. FIG. 2 shows a planar positional relationship among the component 3, the plurality of reinforcing via conductors 9, and the wiring pattern 10 in the component-embedded resin substrate 1.
  • the via conductor 6 and the conductor pattern 7 disposed inside are omitted, but the component-embedded resin substrate 1 is similar to the component-embedded resin substrate 101 shown in FIG. 6 and conductor pattern 7 may be provided as appropriate.
  • the via conductor 6 may be formed by filling a through-hole formed by laser processing with a conductive paste containing silver and hardening it.
  • the conductor pattern 7 may be a pattern formed of, for example, copper foil.
  • the component-embedded resin substrate 1 in the present embodiment is a group of a plurality of resin layers 2 stacked on each other and two or more resin layers 2 arranged continuously in the thickness direction included in the plurality of resin layers 2. And a component 3 arranged so as to be surrounded by each resin layer 2 of a certain first group 8.
  • a plurality of reinforcing via conductors 9 are arranged so as to pass through at least one of the resin layers 2 belonging to the first group 8 and along at least a part of the outer shape of the component 3 when viewed in plan.
  • the plurality of reinforcing via conductors 9 are via conductors that are not connected to any other circuit or are grounded. When the plurality of reinforcing via conductors 9 are not connected to any other circuit, the reinforcing via conductors 9 can be regarded as electrically isolated dummy conductive structures. When the plurality of reinforcing via conductors 9 are grounded, the reinforcing via conductors 9 may be connected to the ground wiring or the ground electrode.
  • the plurality of reinforcing via conductors 9 are spaced apart from the component 3. Part of the resin layer 2 enters between the reinforcing via conductor 9 and the component 3.
  • the component 3 included in the component-embedded resin substrate 1 is an example of an electronic component.
  • the component 3 has a rectangular parallelepiped outer shape as shown in FIG. 24, and includes electrodes 3a and 3b at both ends.
  • the electrodes 3a and 3b are provided so as to surround the main body of the component 3 at both ends.
  • the component 3 may be a ceramic capacitor, for example.
  • the electrodes 3a and 3b are electrically connected to the wiring pattern 10 through via conductors 6n, respectively.
  • the via conductor 6 n is drawn downward from the component 3, but this is only an example, and the drawing direction is not limited to the downward direction.
  • the member electrically connected to the component may be configured to be pulled out in another direction.
  • the via conductor 6n may be formed by the same method as the via conductor shown in FIG.
  • the plurality of reinforcing via conductors 9 are arranged in dotted lines so as to surround the component 3 in a state of being separated from the component 3.
  • a plurality of reinforcing via conductors 9 can be seen in front, and a wiring pattern 10 can be seen in the back.
  • the wiring pattern 10 is located at a different height from the plurality of reinforcing via conductors 9.
  • the wiring pattern 10 extends to the outside from the region surrounded by the reinforcing via conductor 9 when viewed in plan.
  • the reinforcing via conductor 9 may be formed by filling a through-hole formed by laser processing with a conductive paste and solidifying, but penetrates the resin layer 2 in the thickness direction. It may be a conductive block formed by other known methods arranged in the above manner.
  • the material of the reinforcing via conductor 9 copper, silver, aluminum, nickel, gold, or an alloy of two or more metals selected from these is preferable for increasing the rigidity.
  • the rigidity of the region around the component 3 is increased. Therefore, even if the component-embedded resin substrate 1 is bent, the periphery of the component 3 is difficult to bend. As a result, even when the substrate itself is deformed, it is possible to reduce the peeling of the insulating layer made of the thermoplastic resin around the built-in component 3.
  • the plurality of reinforcing via conductors 9 are not connected to any other circuit or are grounded, basically, the plurality of reinforcing via conductors 9 do not generate noise themselves, and the operation of the component 3 and other circuits is not caused. There is no adverse electrical effect.
  • the plurality of reinforcing via conductors 9 are preferably arranged so as to surround the outer periphery of the component 3 in plan view. This is because such a surrounding configuration can more reliably protect the area in the vicinity of the component 3 from the deformation occurring in the entire substrate. Therefore, it is possible to prevent a large deformation from being transmitted to the vicinity of the component 3, and as a result, it is possible to reduce the peeling of the insulating layer made of the thermoplastic resin around the component 3.
  • the reinforcing via conductor 9 does not completely surround the outer periphery of the component 3, but is arranged only along two parallel long sides of the four sides of the component 3. ing.
  • the effect is inferior, but even with the configuration shown in FIG. 3, a certain effect can be obtained with respect to protecting the component 3 from the deformation generated in the entire substrate.
  • it arranged here along a long side here as shown in FIG.
  • the component 3 when it is rectangular when viewed in plan, it is preferably arranged along the long side.
  • the plurality of reinforcing via conductors 9 are not limited to two parallel sides of the component 3, and a certain effect can be obtained by arranging them on two adjacent sides as shown in FIG. 5.
  • the plurality of reinforcing via conductors 9 are arranged along only one side of the part 3 as shown in FIG. 6 or FIG. Although it is inferior to the arrangement in the arrangement, a certain effect can be obtained.
  • the component-embedded resin substrate 1 When the component-embedded resin substrate 1 is bent and used in a specific direction, it is particularly effective to dispose the reinforcing via conductor 9 in the bent portion.
  • the reinforcing via conductor 9 In the plan view of FIG. 4 and subsequent figures, for convenience of explanation, only the component 3 and the reinforcing via conductor 9 are shown, and other components are not shown.
  • the plurality of reinforcing via conductors are arranged along at least a part of the outline of the component by arranging a plurality of dot-like conductors in a plan view. This is because, if the arrangement is made along at least a part of the outline of the component, the deformation reaching the interface of the component can be mitigated at least in a part of the outline. Further, since the plurality of reinforcing via conductors have the same shape as conventional via conductors as long as they are point-shaped as shown in FIGS. 2 to 7, conventional via conductors are manufactured by the same method. Can be convenient. In addition, if the reinforcing via conductor is a dot-like one, it can be arranged without hindering the resin flow when the plurality of resin layers 2 are pressure-bonded so that the degree of freedom in design is increased.
  • the reinforcing via conductor used in the present invention is not limited to a point-like one, and may be a linear one.
  • a somewhat long shape like the reinforcing via conductor 9j shown in FIG. 8 may be arranged in a broken line.
  • the length may be approximately equal to the length of the outer side of the component 3.
  • the reinforcing via conductor 9k does not completely surround the part 3 and has a broken portion as seen in a plan view.
  • a structure in which the conductor surrounds the part completely continuously may be adopted.
  • the structure that is interrupted at any point is more realistic because it does not hinder the resin flow when the plurality of resin layers 2 are pressure-bonded and is easy to manufacture.
  • the plurality of reinforcing via conductors are preferably arranged so as to extend over all of the first group in the thickness direction.
  • the first group 8 is composed of the three resin layers 2, but the reinforcing via conductor 9 is formed in two of them. It only straddles. Even with such a configuration, a certain effect can be obtained.
  • the reinforcing via conductors 9 are arranged so as to extend over all three layers of the first group 8. preferable.
  • the reinforcing via conductor 9 can cover the side surface of the component 3 in a wider range, so that it is possible to more reliably prevent a large deformation from being transmitted to the side surface of the component 3. As a result, peeling of the insulating layer made of the thermoplastic resin around the component 3 can be reduced.
  • the plurality of reinforcing via conductors may not only extend across all of the first group in the thickness direction, but may extend beyond the first group in the thickness direction.
  • the plurality of reinforcing via conductors 9 are preferably arranged so as not to be exposed to the outside. As shown in FIG. 12, even if the reinforcing via conductor 9 is exposed to the outside, an effect of suppressing deformation can be obtained to some extent. However, in such a configuration, moisture may enter from the exposed portion. . If the plurality of reinforcing via conductors 9 are arranged so as not to be exposed to the outside, it is preferable because moisture can be more reliably prevented from entering. In any of the examples shown in FIGS. 1, 10, and 11, the plurality of reinforcing via conductors 9 are arranged so as not to be exposed to the outside.
  • the plurality of resin layers have a thermoplastic resin as a main component.
  • the resin layers can be bonded by heating and pressurizing after laminating the respective resin layers in order, thereby facilitating production.
  • the resin sheet with conductor foil 12 is a sheet having a structure in which the conductor foil 17 is attached to one surface of the resin layer 2.
  • the resin layer 2 is made of, for example, LCP (liquid crystal polymer) that is a thermoplastic resin.
  • the material of the resin layer 2 may be PEEK (polyetheretherketone), PEI (polyetherimide), PPS (poniphenylene sulfide), PI (polyimide), etc. in addition to LCP.
  • the conductor foil 17 is a 18 ⁇ m thick foil made of Cu, for example.
  • the material of the conductor foil 17 may be Ag, Al, SUS, Ni, Au other than Cu, or may be an alloy of two or more different metals selected from these metals.
  • the conductor foil 17 has a thickness of 18 ⁇ m, but the conductor foil 17 may have a thickness of about 3 to 40 ⁇ m.
  • the conductor foil 17 may be any thickness that allows circuit formation.
  • via holes 11 are formed so as to penetrate the resin layer 2 by irradiating the surface of the resin sheet 12 with conductor foil on the resin layer 2 side with a carbon dioxide laser beam.
  • the via hole 11 penetrates the resin layer 2 but does not penetrate the conductor foil 17.
  • the smear (not shown) of the via hole 11 is removed.
  • carbon dioxide laser light is used to form the via hole 11, but other types of laser light may be used.
  • a method other than laser beam irradiation may be employed to form the via hole 11.
  • a resist pattern 13 corresponding to a desired circuit pattern is printed on the surface of the conductor foil 17 of the resin sheet 12 with the conductor foil by a method such as screen printing.
  • etching is performed using the resist pattern 13 as a mask, and the portion of the conductor foil 17 that is not covered with the resist pattern 13 is removed as shown in FIG. Thereafter, as shown in FIG. 17, the resist pattern 13 is removed. Thus, a desired conductor pattern 7 is obtained on one surface of the resin layer 2.
  • the via hole 11 is filled with a conductive paste by screen printing or the like. Screen printing is performed from the lower surface in FIG. In FIG. 18, for convenience of explanation, the via hole 11 is displayed in a posture facing downward, but in practice, screen printing may be performed by changing the posture as appropriate.
  • the conductive paste to be filled may be mainly composed of silver as described above, but may instead be composed mainly of copper, for example.
  • This conductive paste forms an alloy layer with the metal that is the material of the conductor pattern 7 at the temperature when the laminated resin layer is thermocompression bonded (hereinafter referred to as “thermocompression temperature”). It is preferable that the metal powder contains an appropriate amount.
  • this conductive paste contains copper, that is, Cu as a main component for exerting conductivity
  • this conductive paste includes at least one of Ag, Cu, and Ni in addition to the main component, and Sn, Bi, Zn. It is preferable that at least one of them is included.
  • the via conductor 6 and the reinforcing via conductor 9 are formed by filling with the conductive paste. This is merely an example, and actually, there may be a resin layer 2 in which only the via conductor 6 is formed, or there may be a resin layer 2 in which only the reinforcing via conductor 9 is formed. Since the resin layer 2 is to be laminated and assembled later, via conductors 6 and / or reinforcing via conductors 9 are formed in the plurality of resin layers 2 in accordance with the design.
  • a through hole having the same area as the projected area of the component 3 or an area larger than the projected area of the component 3 is formed as the component accommodating hole 14 by punching the resin layer 2.
  • the plurality of resin layers 2 that are to be laminated there may be a part in which the component accommodation hole 14 is formed and a part in which the part accommodation hole 14 is not formed.
  • the component accommodation holes 14 are formed only in the resin layer 2 where the component accommodation holes 14 are to be formed.
  • a plurality of resin layers 2 are stacked to form a substrate.
  • the surface of the resin layer 2 on which the conductor pattern 7 is formed is used facing downward so that the conductor pattern 7 is disposed on the lower surface of the substrate.
  • the conductor pattern 7 disposed on the lower surface of the substrate becomes the external electrode 18.
  • the resin layer 2 in which the component accommodation holes 14 are not formed is used.
  • the resin layer 2 in which the component accommodation holes 14 are not formed is arranged in one layer, or two or more layers are laminated, and then the resin layer 2 in which the component accommodation holes 14 are formed is laminated.
  • the resin layer 2 in which the component accommodation holes 14 are formed is laminated.
  • two resin layers 2 in which the component accommodation holes 14 are formed are stacked.
  • a component accommodating portion 15 is formed by combining two or more component accommodating holes 14.
  • the component accommodating portion 15 is a recess having a depth enough to accommodate the component 3.
  • the reinforcing via conductor 9 is arranged around the component housing portion 15.
  • the reinforcing via conductor 9 is disposed so as to surround the component housing portion 15 while being separated from the component housing portion 15. At this time, the upper surface of the reinforcing via conductor 9 may be exposed.
  • the component 3 is inserted into the component accommodating portion 15.
  • the resin layer 2 is disposed so as to cover the upper side of the component 3.
  • the resin layer 2 is disposed so that the conductor pattern 7 is exposed on the upper surface of the substrate.
  • the conductor pattern 7 formed on the resin layer 2 located on the uppermost surface of the substrate serves as an external electrode 19 for mounting other IC components and the like.
  • the upper surface of the reinforcing via conductor 9 is covered with the resin layer 2.
  • only one resin layer 2 is covered as compared with FIG. 21, but not limited to one layer, two or more layers may be covered.
  • thermocompression bonding means the temperature of the main compression bonding.
  • the material of the resin layer 2 is a thermoplastic resin
  • the material of the resin layer 2 softens and flows by thermocompression bonding, the gap around the component 3 is filled with the flow of the material of the peripheral resin layer 2.
  • the surface of the external electrodes 18 and 19 formed on the upper and lower surfaces of the component-embedded resin substrate is plated with Ni, Au or the like.
  • a component-embedded resin substrate 1j is obtained as shown in FIG.
  • a resin substrate with a built-in component that is essentially the same as that described in Embodiment 1 can be obtained by stacking and thermocompression-bonding resin layers that have undergone predetermined processing.
  • the example in which the final pressure bonding is performed after the temporary pressure bonding is performed once is shown.
  • the number of the temporary pressure bonding may be two times or more instead of one time. It is good also as finishing only by this pressure bonding, without performing temporary pressure bonding at all.
  • the reinforcing via conductor via conductors formed for each resin layer are connected side by side in the thickness direction and illustrated as being over multiple layers. It is not limited to such a structure, but may be formed by other methods.
  • the reinforcing via conductor is provided with a concave portion that spans a plurality of layers in the thickness direction in a region where the reinforcing via conductor is to be formed, and a conductor having a height that spans the plurality of layers in the thickness direction is provided in the concave portion. It may be formed by filling as a conductor paste or inserting as a conductor block.
  • the number of components arranged inside one substrate is 1 is shown, but a configuration in which a plurality of components are arranged inside one substrate may be used.
  • the plurality of components arranged inside one substrate are not necessarily the same structure, and may be components having different structures.
  • the material of the resin layer 2 is not limited to a thermoplastic resin but may be a thermosetting resin.
  • the material of the resin layer 2 may be other resins.
  • the present invention can be used for a component-embedded resin substrate.
  • 1, 1i, 1j Component built-in resin substrate, 2 resin layer, 3 component, 3a, 3b (component) electrode, 4 (insulating layer and component) interface, 5 (insulating layer-to-insulator) interface, 6, 6n via Conductor, 7 conductor pattern, 8 first group, 9, 9j, 9k reinforcing via conductor, 10 wiring pattern, 11 via hole, 12 resin sheet with conductive foil, 13 resist pattern, 14 component receiving hole, 15 component receiving part, 17 (Before patterning) Conductor foil, 18, 19 External electrode, 101 (Conventional) Component-embedded resin substrate.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

L'invention porte sur un substrat (1) doté d'un composant électronique incorporé qui comprend une pluralité de couches de résine (2) laminées les unes sur les autres et un composant (3) disposé de façon à être entouré tout en étant en contact avec diverses couches de résine (2) d'un premier groupe (8) de deux couches de résine (2) ou davantage qui sont disposées de manière continue dans la direction d'épaisseur qui comprend la pluralité de couches de résine (2). Une pluralité de conducteurs d'interconnexion de renfort (9) sont disposés de façon à passer à travers au moins l'une des couches de résine (2) dans le premier groupe (8) et à suivre au moins une partie du contour du composant (3) dans une vue en plan. La pluralité de conducteurs d'interconnexion de renfort (9) sont des conducteurs d'interconnexion qui ne viennent pas en contact avec un quelconque autre circuit ou sont des conducteurs d'interconnexion qui sont reliés à la masse.
PCT/JP2012/053824 2011-02-28 2012-02-17 Substrat de résine doté d'un composant électronique incorporé WO2012117872A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013502243A JPWO2012117872A1 (ja) 2011-02-28 2012-02-17 部品内蔵樹脂基板
CN201290000317.XU CN203482516U (zh) 2011-02-28 2012-02-17 元器件内置树脂基板

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-041907 2011-02-28
JP2011041907 2011-02-28

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WO2012117872A1 true WO2012117872A1 (fr) 2012-09-07

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Cited By (6)

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JP2014022716A (ja) * 2012-07-23 2014-02-03 Zhuhai Advanced Chip Carriers & Electronic Substrates Solutions Technologies Co Ltd 一体的構成要素を備えた多層電子支持構造体
CN103683684A (zh) * 2012-09-19 2014-03-26 株式会社捷太格特 控制装置以及具备该装置的马达单元
JP2014075477A (ja) * 2012-10-04 2014-04-24 Shinko Electric Ind Co Ltd 配線基板の製造方法
WO2014069107A1 (fr) * 2012-10-31 2014-05-08 株式会社村田製作所 Substrat avec composant intégré, et appareil de terminal de communication
JPWO2016047446A1 (ja) * 2014-09-26 2017-04-27 株式会社村田製作所 積層モジュールおよび積層モジュールの製造方法
US9681204B2 (en) 2011-04-12 2017-06-13 The Nielsen Company (Us), Llc Methods and apparatus to validate a tag for media

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JP2003086949A (ja) * 2001-06-13 2003-03-20 Denso Corp プリント基板の製造方法およびその製造方法によって形成されるプリント基板
WO2007069789A1 (fr) * 2005-12-16 2007-06-21 Ibiden Co., Ltd. Plaque de cablage imprime multicouche et son procede de fabrication
JP2012023237A (ja) * 2010-07-15 2012-02-02 Nec Corp 機能素子内蔵基板

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