WO2012009831A1 - Wiring board and manufacturing method thereof - Google Patents

Wiring board and manufacturing method thereof Download PDF

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Publication number
WO2012009831A1
WO2012009831A1 PCT/CN2010/001116 CN2010001116W WO2012009831A1 WO 2012009831 A1 WO2012009831 A1 WO 2012009831A1 CN 2010001116 W CN2010001116 W CN 2010001116W WO 2012009831 A1 WO2012009831 A1 WO 2012009831A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
board
substrate
wiring
density
Prior art date
Application number
PCT/CN2010/001116
Other languages
French (fr)
Chinese (zh)
Inventor
张振铨
黄瀚霈
张钦崇
Original Assignee
欣兴电子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 欣兴电子股份有限公司 filed Critical 欣兴电子股份有限公司
Priority to CN201080021816.2A priority Critical patent/CN102742367B/en
Priority to PCT/CN2010/001116 priority patent/WO2012009831A1/en
Publication of WO2012009831A1 publication Critical patent/WO2012009831A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4694Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48105Connecting bonding areas at different heights
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09972Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently

Definitions

  • the present invention relates to a wiring board and a method of fabricating the same, and, in particular, to a wiring board having a high-density interconnector board (HDI Board) and a method of fabricating the same.
  • HDI Board high-density interconnector board
  • the circuit board is currently an electronic device such as a mobile phone, a computer and a digital camera, and a component required for a home appliance such as a television, a washing machine, and a refrigerator.
  • the circuit board can carry and serve as a chip component, an ass ive component, an active component, and a microelectromechanical system (MEMS) and other electronic components. Installation. In this way, current can be transmitted to these electronic components via the circuit board, thereby enabling these electronic devices and home appliances to operate.
  • MEMS microelectromechanical system
  • the present invention provides a wiring board capable of accommodating at least one electronic component.
  • the present invention provides a method of manufacturing a wiring board for manufacturing the above wiring board.
  • a circuit board according to the present invention includes an outer wiring layer, a circuit layer, a body layer, a high density interconnect board (HDI board), and at least one A conductive column.
  • the main layer is disposed between the outer circuit layer and the circuit layer, and the high density inner wiring plate is buried in the main layer.
  • the first conductive pillar is disposed in the main body layer and is connected between the high-density interconnecting board and the outer wiring layer, wherein the main body layer comprises an adhesive layer and an insulating layer (insutralation)
  • the adhesive layer is bonded between the high-density interconnecting board and the outer wiring layer, and the first conductive pillar passes through the adhesive layer.
  • the insulating layer covers the high-density interconnecting board, and the wiring layer is disposed on the insulating layer. , and contact the insulation layer.
  • the object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.
  • the body layer further comprises a substrate between the outer wiring layer and the insulating layer, and the substrate surrounds the high density interconnecting board.
  • the foregoing circuit board further includes at least one second conductive pillar passing through the insulating layer.
  • the second conductive pillar is connected between the high-density interconnecting board and the wiring layer, and the substrate is a semi-cured film (prepreg); or
  • the substrate is a wiring subs trate, and the second conductive pillar is connected between the circuit substrate and the circuit layer.
  • the distance between the high-density interconnecting board and the outer wiring layer is smaller than the distance between the high-density interconnecting board and the wiring layer.
  • the number of layers of the high-density interconnecting board is greater than or equal to the number of layers of the circuit substrate, and the average wiring density of the high-density interconnecting board is greater than or equal to the circuit substrate. Average wiring density.
  • the above further includes a high density interconnect sub-board (H D I Sub-board ).
  • the high-density interconnect wiring sub-board is buried in a high-density interconnecting board.
  • the aforementioned wiring board wherein the first conductive pillar extends from the outer wiring layer to the inside of the high density interconnecting board.
  • a method of manufacturing a wiring board according to the present invention First, at least a uniform hole is formed on a substrate. After the through holes are formed, a high density interconnecting plate is fixed to the substrate, wherein the high density interconnecting wires cover the through holes. A body layer is formed on the substrate, wherein the body layer is coated with a high density interconnector. A metal layer is formed on the body layer. After forming the body layer, at least one first conductive pillar connected between the high density interconnector plate and the substrate is formed.
  • the substrate and the metal layer are patterned to form an outer wiring layer and a wiring layer, respectively, wherein the method of fixing the high-density interconnecting board on the substrate and the method of forming the main layer are as follows Said.
  • An adhesive layer is applied or stuck on the substrate.
  • the high density interconnector board is bonded to the adhesive layer.
  • an insulating layer is formed on the substrate and on the high-density interconnecting board, wherein the insulating layer covers the high-density interconnecting board.
  • the present invention can also be further implemented by the following technical measures.
  • the method of forming the first conductive post is as follows. Remove a portion of the adhesive layer within the through hole.
  • the through holes are subjected to a through hole (PTH) after removing a portion of the adhesive layer and before patterning the substrate.
  • PTH through hole
  • the method for manufacturing a circuit board wherein the method of forming the main body layer further comprises: after bonding the high-density inner wiring board to the adhesive layer, disposing a substrate between the insulating layer and the substrate, wherein the substrate has a The opening, while the high density interconnecting strip is in the opening.
  • the method for manufacturing a circuit board after forming the main body layer, further comprises forming at least one second conductive pillar connected between the high-density interconnecting board and the metal layer, wherein the substrate is a half-cured film; or, the substrate A circuit substrate, and after forming the body layer, further comprising forming at least one second conductive pillar connected between the circuit substrate and the metal layer.
  • the method of forming the main body layer further comprises disposing a half-cured film between the substrate and the substrate.
  • the high-density interconnecting board is formed by cutting a first wiring mother board
  • the circuit substrate is formed by cutting a second wiring mother board
  • the first line mother board includes a plurality of high density interconnect boards
  • the second line mother board includes a plurality of circuit boards.
  • the high-density interconnecting board has at least one pad, and the pad covers the through hole.
  • the high-density interconnecting wiring board has an inner wiring layer, and the first conductive pillar is connected to the inner wiring layer.
  • the wiring board of the present invention can be electrically connected to at least one electronic component by including an outer wiring layer, and therefore the wiring board of the present invention can be provided with at least one electronic component so that current can be transmitted to the electronic component.
  • FIG. 1A to Fig. 2 are schematic cross sectional views showing a method of manufacturing a wiring board according to an embodiment of the present invention.
  • FIGS. 2A to 2F are schematic cross-sectional views showing a method of manufacturing a wiring board according to another embodiment of the present invention.
  • Substrate 12 Plane
  • Second line motherboard 40 First line motherboard
  • circuit board 110 outer circuit layer
  • circuit layer 122 metal layer
  • the circuit board 100 of the present embodiment includes an outer circuit layer 110, a circuit layer 120, a body layer 130, a high density interconnecting board 140, and a plurality of first conductive pillars 150.
  • the main body layer 130 is disposed between the outer wiring layer 110 and the wiring layer 120, that is, the outer wiring layer 110 and the wiring layer 120 are respectively located on opposite surfaces of the main body layer 130.
  • the high density interconnecting board 140 is buried in the body layer 130, that is, the body layer 130 covers the high density interconnecting board 140.
  • These first conductive pillars 150 are disposed in the body layer 130 and are connected between the high density interconnecting board 140 and the outer wiring layer 110.
  • the outer wiring layer 110 may include a plurality of pads 112 and at least one trace 114, and the high density interconnect panel 140 has a plurality of pads 142a, 142b, wherein the first conductive pillars 150 may be connected Between these pads 112 and the pads 142a.
  • At least one electronic component 300 can be mounted on the circuit board 100 and electrically connected to the pads 112.
  • the electronic component 300 is, for example, a chip, a passive component, an active component, or a MEMS component, and the electronic component 300 may be mounted on the wiring board 100 by means of flip chip or wire bonding.
  • the electronic component 300 is mounted on the circuit board 100 in a flip chip manner, so that a plurality of solder bumps S1 are connected between the electronic component 300 and the pads 112 so that the electronic component 300 can pass.
  • the solder bump is electrically connected to S1 and the pads 112, wherein the solder is a solder ball, for example, block S1 (solder bal l) 0
  • the electronic component 300 may be electrically connected 150 via the high density of these pads 112 and the first conductive post
  • the interconnect board 140 allows current to be transferred to the electronic component 300 via the board 100.
  • FIG. 1G illustrates a plurality of first conductive pillars 150
  • the circuit board 100 may include only one first conductive pillar 150, that is, the number of first conductive pillars 150 included in the circuit board 100 may be Just one. Therefore, the number of first conductive pillars 150 shown in Fig. 1G is merely illustrative and is not intended to limit the invention.
  • the main body layer 130 may include an adhesive layer 132, a substrate 134, and an insulating layer 136.
  • the adhesive layer 132, the substrate 134, and the insulating layer 136 may be made of a resin material.
  • the substrate 134 can be a semi-cured film.
  • Adhesive layer 132 adheres to high density
  • the inner wiring board 140 and the outer wiring layer 110 are partially covered, and the outer conductive layer 110 is partially covered, and the first conductive pillars 150 pass through the adhesive layer 132 to connect the high-density interconnecting board 140 and the outer wiring.
  • the insulating layer 136 covers the high density interconnecting board 140, and the wiring layer 120 is disposed on the insulating layer 136 and contacts the insulating layer 136. 134 is between the outer wiring layer 110 and the insulating layer 136 and surrounds the high density interconnecting board 140, so the insulating layer 136 is located between the wiring layers 120 and 134. Since the adhesive layer 1 32 bonds the high-density interconnecting board 140, the substrate 134 surrounds the high-density interconnecting board 140, and the insulating layer 136 covers the high-density interconnecting board 140, the high-density interconnecting board 140 It is buried in the main body layer 130.
  • the body layer 130 shown in FIG. 1G includes the substrate 134, in other embodiments, particularly when the high density interconnector plate 140 has a very thin thickness T1, the insulating layer 136 may be half.
  • the film is cured, and the body layer 130 may not require the substrate 134, i.e., the substrate 134 is only a selective component of the present invention and is not an essential component. Therefore, the high-density interconnecting board 140 may be surrounded only by the adhesive layer 132 and the insulating layer 136, and the substrate 134 shown in Fig. 1G is merely illustrative and does not limit the present invention.
  • the circuit board 100 may further include at least one second conductive pillar 160.
  • the circuit board 100 shown in FIG. 1G includes a plurality of second conductive pillars 160, but in other embodiments, the circuit board 100 may include only one second conductive Column 160.
  • These second conductive pillars 160 pass through the insulating layer 136 and are connected between the high density interconnector board 140 and the wiring layer 120.
  • the second conductive pillars 160 can be connected to the pads 142b, respectively, such that the high-density interconnecting board 140 can be electrically connected to the wiring layer 120 via the second conductive pillars 160.
  • the circuit board 100 may further include at least one conductive connection structure (conductive connection s gagture).
  • the conductive connection structure is disposed in the body layer 130 and is connected between the outer circuit layer 110 and the circuit layer 120.
  • the conductive connection structure may be a conductive bl ind via s gagture or a conductive via.
  • the irth through hole structure utilizes a conductive connection structure, and the outer circuit layer 110 can electrically connect the circuit layer 120.
  • the circuit board 100 can be not only a finished circuit board finished product, but also a component of a mul ti layer wi ring board (par t ), ie
  • the circuit board 100 can function as a line structure within a multilayer circuit board.
  • one or more wiring layers may be additionally formed on the insulating layer 136 by using a build-up method or a stacking method, so that the circuit layer 120 becomes a plurality of layers. The inner wir ing layer of the board.
  • circuit board 100 illustrated in FIG. 1G appears to be an already completed circuit board. Finished product, but in other embodiments, circuit board 100 can also be used as a multilayer line
  • the wiring structure inside the road board. Therefore, the circuit board 100 illustrated in FIG. 1G is merely illustrative and does not limit the present invention.
  • the circuit board 100 can further include a high density interconnect wiring board 180 which is a high density interconnecting board.
  • the high density interconnect wiring board 180 is buried in the high density interconnecting board 140 and may be buried in the high density interconnecting board 140 via a bulking or stacking process.
  • the average wiring density and the number of layers of the high-density interconnecting sub-board 180 may be greater than or equal to the average wiring density and the number of layers of the high-density interconnecting board 140, wherein the number of layers mentioned in the present invention refers to the circuit layer. quantity.
  • the high-density interconnecting board 140 in addition to the pads 142a, 142b, the high-density interconnecting board 140 further has two wiring layers 144a, 144b, wherein the wiring layers 144a, 144b are the inner layers of the high-density interconnecting board 140.
  • the circuit layer, and thus the high-density interconnecting board 140 has a total of four wiring layers, that is, the number of layers of the high-density interconnecting board 140 is four.
  • the number of layers of the high-density interconnecting board 140 in Fig. 1H is merely illustrative and does not limit the invention.
  • the high-density interconnecting board 140 may further have at least one conductive pillar 146, at least one conductive pillar 148a, and at least one conductive pillar 148b, wherein the conductive pillar 146 is connected between the circuit layers 144a and 144b, and the conductive pillar 148a It is connected between the high-density interconnecting sub-board 180 and the pad 142a, and the conductive post 8b is connected between the high-density interconnecting sub-board 180 and the pad 142b.
  • the high-density interconnect wiring sub-board 180 is electrically connected to the high-density interconnecting board 140 so that current can be connected between the high-density interconnecting sub-board 180 and the high-density interconnecting board 140. Transfer between.
  • first conductive pillars 150 may be connected between the pads 112 and the pads 142a, in other embodiments, the first conductive pillars 150 may not pass through any of the pads 142a. It is directly connected between the pad 112 and the circuit layer 144a or 144b, or directly connected to the high-density interconnect sub-board 180. In other words, the first conductive pillar 150 may extend from the outer wiring layer 110 to the inside of the high density interconnecting board 140.
  • the substrate 10 may be a metal foil such as a copper foil or an aluminum foil; or the substrate 10 may be a composite sheet such as a copper clad laminate (CCL).
  • CCL copper clad laminate
  • the high-density interconnecting board 140 is fixed on the substrate 10, wherein the high-density interconnecting board 140 covers the through holes HI, and is high.
  • the pads 142a of the density inner wiring board 140 cover the through holes H1, that is, the pads 142a correspond to the through holes H1, respectively.
  • the high-density interconnecting board 140 can be fixed on the substrate 10 by adhesive bonding. .
  • an adhesive layer 132 is first coated or laminated on the substrate 10.
  • the adhesive layer 132 may partially cover a plane 12 of the substrate 10 and cover the through holes H1.
  • the adhesive layer 132 may be formed of a resin material such as epoxy, and the method of applying the adhesive layer 132 may be a method such as spraying, brushing or screen printing.
  • the high-density interconnecting board 140 is then bonded to the adhesive layer 132.
  • the high-density interconnecting board 140 is fixed to the substrate 10.
  • the adhesive layer 132 may be a liquid material or a paste material having fluidity, so that the adhesive layer 132 can fill the through holes H1.
  • the high-density interconnecting board 140 can be aligned to enable the high-density interconnecting board 140 to be seated in the correct position. in.
  • a body layer 130 covering the high-density interconnecting board 140 is formed on the substrate 10.
  • the body layer 130 includes the adhesive layer 132, when the adhesive layer 132 is coated or bonded on the substrate 10, it is bonded in a high density.
  • the board 140 is connected, the body layer 130 has begun to form.
  • an insulating layer 136 is formed on the substrate 10 and on the high-density interconnecting board 140, and a substrate is disposed between the insulating layer 136 and the substrate 10. 134.
  • the substrate 134 has an opening H2, and the opening H2 may be formed by external routing or laser ablating. When the substrate 134 is disposed, the high density interconnector plate 140 will be positioned within the opening H2 so that the substrate 134 can surround the high density interconnect plate 140.
  • the insulating layer 136 and the substrate 134 may be formed by press bonding.
  • the method of forming the insulating layer 136 and the substrate 134 may be to press the resin layer and the prepreg film onto the substrate 10, wherein the prepreg is disposed between the resin layer and the counter 10.
  • the resin layer and the prepreg film may be heated, i.e., the resin layer and the prepreg film are thermocompression bonded to form the body layer 130.
  • the method of manufacturing the wiring board 100 further includes forming a metal layer 122 on the body layer 130.
  • the metal layer 122 may be formed on the insulating layer 136 and may be a metal foil such as a copper foil or an aluminum foil.
  • the metal layer 122 may be formed simultaneously with the insulating layer 136.
  • the method of forming the metal layer 122 and the insulating layer 136 may be to press a composite sheet onto the substrate 134, and the composite sheet may have a metal foil and a resin layer, for example Copper foil substrate.
  • the substrate 134 is not an essential component of the present invention, in other embodiments, the substrate 134 does not have to be formed, and only the substrate 134 may be formed, and only the substrate 134 may be formed.
  • a piece of metal foil and a piece of semi-cured film are formed on the substrate 10 to form a metal layer 122 and a body layer 130, wherein the metal foil may be a foil coated with a glue, such as a backing copper foil (Res in Coated) Copper, RCC). Therefore, the substrate 134 shown in Fig. ID and Fig. IE is for illustrative purposes only and is not intended to limit the invention.
  • At least one first conductive pillar 150 and at least one second conductive pillar 160 are formed.
  • the first conductive pillar 150 is connected between the high density interconnecting board 140 and the substrate 10
  • the second conductive pillar 160 is connected between the high density interconnecting board 140 and the metal layer 122.
  • the first conductive pillar 150 and the second conductive pillar 160 may be formed by via plating, and the method of forming the first conductive pillar 150 and the second conductive pillar 160 may include electroless plating and electric electricity. After (electroplat ing).
  • the method of forming the first conductive pillar 150 may include the following flow. First, when the adhesive layer 132 fills the through holes HI (as shown in FIG. 1D), the partial adhesive layer 132 in the through holes HI is removed, and the method of removing the partial adhesive layer 132 may include laser burning. A laser ablat ion, that is, an adhesive layer 132 exposed by the laser beam at the through holes HI, enables the through hole HI to partially expose the high density interconnecting plate 140.
  • the through holes HI may be desmear to clean the through holes H1. Thereafter, the through holes HI are subjected to through-hole plating, that is, the through holes HI are sequentially subjected to electroless plating and electroplating.
  • the first conductive pillar 150 is formed in the through hole HI, and connects the substrate 10 and the high-density interconnecting board 140.
  • the through holes HI may be filled with Ful l-Fi l led Plating to make the first conductive pillars 150 a solid conductive pillar structure.
  • a flow of forming the second conductive pillar 160 may be performed to enable the first conductive pillar 150 and the second conductive pillar 160 to be simultaneously formed, and the second conductive pillar 160 is formed as follows. .
  • one or more openings H3 are formed on the metal layer 122, wherein the openings H3 are formed through the metal layer 122 and the insulating layer 136, and the method of forming the opening H3 may be laser drilling or lithography. Further, after the above laser drilling, the openings H3 may be subjected to desmearing.
  • the opening H3 is subjected to through-hole plating, that is, the openings H3 are sequentially subjected to electroless plating and electroplating, wherein the through holes HI and the openings H3 are simultaneously through holes. plating.
  • the second conductive pillars 160 can be respectively formed in the openings H3, and the high-density interconnecting wires 140 and the metal layer 122 are connected, and the first conductive pillars 150 and the second conductive pillars 160 can be in the same pass.
  • the hole plating process is formed.
  • the openings H3 may be filled with holes to make the second conductive pillars 160 a solid conductive pillar structure.
  • the substrate 10 and the metal layer 122 are patterned to form an outer wiring layer 110 and a wiring layer 120, respectively, wherein the substrate 10 and the metal layer 122 are patterned.
  • the method can be: shadow etching.
  • the circuit board 100 has been substantially completed.
  • one or more wiring layers may be additionally formed on the insulating layer 136 or the outer wiring layer 110 by a build-up method or a stacking method, so that the outer wiring layer 110 or the wiring layer 120 becomes the inner wiring layer of the multilayer wiring board.
  • the first conductive pillar 150 can extend to the inside of the high-density interconnecting board 140 , the first conductive pillar 150 can also be formed in the process of forming the first conductive pillar 150 .
  • An inner wiring layer 144 is attached to the high density interconnecting board 140, as shown in FIG. II, wherein the inner wiring layer 144 is, for example, the wiring layer 144a or 144b (please refer to FIG. 1H).
  • FIGS. 2A to 2F are schematic cross-sectional views showing a method of manufacturing a wiring board according to another embodiment of the present invention.
  • the circuit board 200 of the present embodiment is similar in structure to the circuit board 100 of the foregoing embodiment, and the following mainly introduces the difference in structural characteristics between the circuit boards 100 and 200.
  • the circuit board 200 can be provided for at least one electronic component 300 (see FIG. 1G), and the circuit board 200 includes components similar to those of the circuit board 100.
  • the circuit board 200 also includes an outer circuit layer 110, The circuit layer 120, a high density interconnecting board 140, and a plurality of first conductive pillars 150.
  • the body layer 230 included in the wiring board 200 is different from the body layer 130 of the aforementioned wiring board 100.
  • the body layer 230 includes an adhesive layer 232, a substrate 234, an insulating layer 236, and a half cured film 238.
  • the prepreg 238 is disposed between the substrate 234 and the outer wiring layer 110, and the adhesive layer 232 is bonded between the high density interconnecting board 140 and the outer wiring layer 110, and comprehensively covers the outer wiring layer. 110, wherein the material of both the adhesive layer 232 and the insulating layer 236 may include a resin material. Since the adhesive layer 232 comprehensively covers the outer wiring layer 110, the insulating layer 236, the substrate 234 and the prepreg 238 are substantially not in contact with the outer wiring layer 110.
  • the substrate 234 has an opening H4, and the high-density interconnecting board 140 is located in the opening H4, so that the substrate 234 surrounds the high-density interconnecting board 140.
  • the substrate 234 is a wiring substrate, so the substrate 234 can be substantially regarded as a wiring board. Taking FIG. 2D as an example, the substrate 234 can be considered, for example, as a multilayer wiring board having four wiring layers.
  • the average wiring density of the high-density interconnecting board 140 may be greater than or equal to the average wiring density of the circuit substrate (ie, the substrate 234), and the number of layers of the high-density interconnecting board 140 may also be greater than or equal to the substrate 234. The number of layers.
  • the high-density interconnecting board 140 shown in FIG. 1H may have four layers, and the substrate 234 shown in FIG. 2D may have four wiring layers, so from FIG. 1H and FIG. 2D,
  • the number of layers of the high density interconnect panel can be equal to the number of layers of the substrate 234.
  • the number of layers of the high-density interconnecting board 140 may also be greater than the number of layers of the substrate 234, so the number of layers of the high-density interconnecting board 140 shown in FIG. 1H, and FIG. 2D
  • the number of layers of the substrate 234 is both illustrative and not limiting.
  • the thickness T2 of the substrate 234 may be greater than or equal to the high density.
  • the thickness T1 of the interconnecting board 140 is such that the distance D1 between the high-density interconnecting board 140 and the outer wiring layer 110 is smaller than the distance D2 between the high-density interconnecting board 140 and the wiring layer 120, so the high density
  • the interconnect board 140 is closer to the outer wiring layer 110 and is further away from the wiring layer 120.
  • the electronic component 300 can be mounted close to the high-density interconnecting board 140, and electrically connected to the high-density interconnecting board 140 via the outer wiring layer 110 and the first conductive post 150.
  • the average wiring density of the high-density interconnecting board 140 is larger than the average wiring density of the substrate 234, and the average wiring density of the high-density interconnecting board 140 and the substrate 234, the average wiring density of the electronic component 300
  • the average wiring density of the high density interconnecting board 140 will be relatively close, thereby facilitating the mounting of the electronic component 300 near the high density interconnecting board 140, as shown in Fig. 2D.
  • the circuit board 200 may further include at least one second conductive pillar 260, and the shape and material of the second conductive pillar 260 are substantially the same as those of the second conductive pillar 160, different from the foregoing embodiment, the embodiment
  • the second conductive pillar 260 passes through the insulating layer 236 and is connected between the wiring substrate (ie, the substrate 234) and the wiring layer 120.
  • the substrate 234 can be electrically connected to the circuit layer 120 via the second conductive pillars 160.
  • at least one second conductive pillar 160 may also be connected between the high density interconnect plate 140 and the wiring layer 120 through the insulating layer 236.
  • the above mainly describes the structural features of the circuit board 200.
  • a method of manufacturing the wiring board 200 will be described in detail with reference to Figs. 2A to 2F. Since the manufacturing method of the wiring board 200 and the manufacturing method of the aforementioned wiring board 100 all include the same flow, the following mainly describes the difference in manufacturing methods of the wiring boards 100 and 200.
  • the high density interconnecting plate 140 is fixed to the reverse 10.
  • the high-density interconnector plate 140 can be attached to the _3 ⁇ 4 ⁇ reverse 10 by means of bonding.
  • an adhesive layer 232 is applied or laminated on the substrate 10, and the method of applying the adhesive layer 232 therein may be the same as the method of applying the adhesive layer 132.
  • the adhesive layer 232 covers the plane 12 of the substrate 10 in a comprehensive manner, so that these through holes HI are covered by the adhesive layer 232.
  • the high-density interconnecting board 140 is bonded to the adhesive layer 232 so that the high-density interconnecting board 140 is fixed to the substrate 10.
  • an insulating layer 236 covering the high-density interconnecting board 140 is formed on the reverse 10 and on the high-density interconnecting board 140, and between the insulating layer 236 and the substrate 10.
  • the substrate 234 is disposed, wherein the opening H4 can be formed in the same manner as the opening H2.
  • a prepreg 238 is disposed between the substrate 234 and the substrate 10, wherein the prepreg 238 is disposed between the adhesive layer 232 and the substrate 234.
  • the method of forming the insulating layer 236 may be the same as the method of forming the insulating layer 136.
  • the method of forming the insulating layer 236 may be to laminate the resin on the substrate 234.
  • the prepreg film 238 can be pressed between the substrate 10 and the substrate 234.
  • the resin layer and the prepreg film 238 may be heated to allow the glue material of both the resin layer and the prepreg film 238 to flow, thereby filling the opening H4.
  • the body layer 230 is formed.
  • the adhesive layer 232 comprehensively covers the plane 12 of the substrate 10, the adhesive layer 232 can be bonded between the substrate 234 and the substrate 10 even without the semi-cured film 238. It can be seen that the prepreg film 238 is only a selective component of the present invention and is not an essential component, so the prepreg film 238 shown in Figs. 2B to 2D is merely illustrative and not limiting.
  • At least one second conductive pillar 260 connected between the substrate 234 and the metal layer 122 may be formed, and at least one first conductive pillar 150 may be formed.
  • the second conductive pillar 260 is formed in the same manner as the second conductive pillar 160 in the foregoing embodiment, and therefore the method of forming the second conductive pillar 26G will not be repeatedly described below.
  • the substrate 10 and the metal layer 122 are patterned to form the outer wiring layer 110 and the wiring layer 120, respectively.
  • the circuit board 200 has been substantially completed.
  • the above-described patterning method is the same as that of the foregoing embodiment, that is, the method of patterning the substrate 10 and the metal layer 122 may be lithography etching.
  • one or more circuit layers may be additionally formed on the insulating layer 236 or the outer wiring layer 110 by the build-up method or the stacking method, so that the outer circuit layer 110 or the circuit layer 120 becomes the inner wiring layer of the multilayer wiring board.
  • FIG. 2E is a top plan view of a first line mother board including a plurality of high density interconnect boards of FIG. 2D
  • FIG. 2F is a top plan view of a second line mother board including a plurality of circuit boards of FIG. 2D.
  • the high-density interconnecting board 140 may be formed by cutting a first line mother board 40, and the circuit substrate (ie, the substrate 234) may be a cutting one.
  • the second line mother board 34 is formed.
  • the first line mother board 40 includes a plurality of high density interconnect boards 140 and the second line mother board 34 includes a plurality of substrates 234. After the first line mother board 40 and the second line mother board 34 are manufactured, the first line mother board 40 and the second line mother board 34 are cut to obtain a plurality of high density interconnect boards 140 and a plurality of bases. Material 234. Therefore, the use of the first wiring mother board 40 and the second wiring mother board 34 facilitates mass production of the high-density interconnecting board 140 and the substrate 234.
  • the high-density interconnecting board 140 Since the average wiring density of the high-density interconnecting board 140 is larger than the average wiring density of the substrate 234, and the number of layers of the high-density interconnecting board 140 is larger than the number of layers of the substrate 234, the high-density interconnecting board 140 is manufactured. The time required will be longer than the time required to make the material 234, so the high density interconnector board 140 takes a lot of time to manufacture.
  • both the high-density interconnector board 140 and the substrate 234 can be cut from different line mother boards (ie, the first line mother board 40 and the second line mother board 34), and the first line mother board 40 is Both of the second line mother boards 34 can be fabricated simultaneously for the same period of time. In this way, the time required to manufacture the wiring board 200 can be reduced, so that the circuit board 200 can be manufactured quickly.
  • the outer circuit layer included in the circuit board of the present invention can electrically connect a plurality of electronic components, such as a chip, a passive component, an active component, or a germanium electromechanical system component, so that the circuit board of the present invention can be provided.
  • At least one electronic component is mounted so that current can be transmitted to the electronic component, thereby allowing an electronic device (such as a cell phone, a computer or a digital camera) and household appliances (such as a television, a washing machine, or a water tank) to operate.
  • an electronic device such as a cell phone, a computer or a digital camera
  • household appliances such as a television, a washing machine, or a water tank
  • the high-density interconnecting board is buried in the main body layer, and the average wiring density and the number of layers of the high-density interconnecting board are larger than the wiring substrate in the main body layer (ie, the substrate)
  • the average wiring density and the number of layers so that a densely distributed and a large number of layers can be formed in a certain area of the wiring board; in another area of the wiring board, a thin distribution and a small number of layers are formed. wiring.
  • the overall number of layers of the board and the overall thickness can be reduced, and the wiring design of the board can be simplified.

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Abstract

A wiring board and a manufacturing method thereof are provided. The wiring board includes: an outer wiring layer, a wiring layer, a body layer, a high density interconnection board (HDI board), and at least a first conductive plug. The body layer is mounted between the outer wiring layer and the wiring layer, and the HDI board is buried in the body layer. The first conductive plug is formed in the body layer, and connects the HDI board to the outer wiring board.

Description

线路板及其制造方法 技术领域  Circuit board and manufacturing method thereof
本发明涉及一种线路板 ( wiring board )及其制造方法, 特别是涉及 一种具有高密度内连线板 ( High Dens i ty Interconnect ion Board, HDI Board ) 的线路板及其制造方法。 背景技术  The present invention relates to a wiring board and a method of fabricating the same, and, in particular, to a wiring board having a high-density interconnector board (HDI Board) and a method of fabricating the same. Background technique
线路板是目前手机、电脑与数码相机等电子装置( electronic device ), 以及电视、 洗衣机与;氷箱等家电用品所需要的零件。 详细而言, 线路板能 承载以及供芯片 ( chip ) 被动元件( ass ive component ),主动元件( act ive component ) 以及微机电系统元件 ( Microelectromechanical Sys tems, MEMS )等多种电子元件 ( electronic component )装设。 如此, 电流可以 经由线路板而传输至这些电子元件, 进而让这些电子装置以及家电用品能 够运作。 发明内容  The circuit board is currently an electronic device such as a mobile phone, a computer and a digital camera, and a component required for a home appliance such as a television, a washing machine, and a refrigerator. In detail, the circuit board can carry and serve as a chip component, an ass ive component, an active component, and a microelectromechanical system (MEMS) and other electronic components. Installation. In this way, current can be transmitted to these electronic components via the circuit board, thereby enabling these electronic devices and home appliances to operate. Summary of the invention
本发明提供一种线路板, 其能装设至少一个电子元件。  The present invention provides a wiring board capable of accommodating at least one electronic component.
本发明,提供一种线路板的制造方法, 其用来制造上述线路板。  The present invention provides a method of manufacturing a wiring board for manufacturing the above wiring board.
本发明可采用以下技术方案来实现的。 依据本发明提出的一种线路板, 其包括一外层线路层(outer wiring layer ), 一线路层、 一主体层 (body layer ), 一高密度内连线板( HDI board ) 以及至少一第一导电柱。 主体层 配置在外层线路层与线路层之间, 而高密度内连线板内埋在主体层中。 第 一导电柱配置在主体层中, 并且连接于高密度内连线板与外层线路层之间, 其中所述的主体层包括一粘合层(adhes ive layer) 以及一绝缘层 ( insulat ion layer 粘合层粘合于高密度内连线板与外层线路层之间, 而第一导电柱穿过粘合层。 绝缘层覆盖高密度内连线板, 而线路层配置在 绝缘层上, 并且接触绝缘层。  The present invention can be implemented by the following technical solutions. A circuit board according to the present invention includes an outer wiring layer, a circuit layer, a body layer, a high density interconnect board (HDI board), and at least one A conductive column. The main layer is disposed between the outer circuit layer and the circuit layer, and the high density inner wiring plate is buried in the main layer. The first conductive pillar is disposed in the main body layer and is connected between the high-density interconnecting board and the outer wiring layer, wherein the main body layer comprises an adhesive layer and an insulating layer (insutralation) The adhesive layer is bonded between the high-density interconnecting board and the outer wiring layer, and the first conductive pillar passes through the adhesive layer. The insulating layer covers the high-density interconnecting board, and the wiring layer is disposed on the insulating layer. , and contact the insulation layer.
本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。 前述的线路板, 其中所述的粘合层全面性覆盖外层线路层。  The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures. The aforementioned wiring board, wherein the adhesive layer comprehensively covers the outer wiring layer.
前述的线路板, 其中所述的粘合层局部覆盖外层线路层。  The aforementioned wiring board, wherein the adhesive layer partially covers the outer wiring layer.
前述的线路板, 其中所述的主体层更包括一位在外层线路层与绝缘层 之间的基材, 而基材围绕高密度内连线板。  The circuit board of the foregoing, wherein the body layer further comprises a substrate between the outer wiring layer and the insulating layer, and the substrate surrounds the high density interconnecting board.
前述的线路板,更包括至少一穿过绝缘层的笫二导电柱。 第二导电柱连 接于高密度内连线板与线路层之间,而基材为一半固化胶片(prepreg);或 者,基材为一线路基板(wiring subs trate ), 而第二导电柱连接于线路基 板与线路层之间。 The foregoing circuit board further includes at least one second conductive pillar passing through the insulating layer. The second conductive pillar is connected between the high-density interconnecting board and the wiring layer, and the substrate is a semi-cured film (prepreg); or The substrate is a wiring subs trate, and the second conductive pillar is connected between the circuit substrate and the circuit layer.
前述的线路板, 当基材为线路基板时, 高密度内连线板与外层线路层 之间的距离小于高密度内连线板与线路层之间的距离。  In the foregoing circuit board, when the substrate is a circuit substrate, the distance between the high-density interconnecting board and the outer wiring layer is smaller than the distance between the high-density interconnecting board and the wiring layer.
前述的线路板, 其中所迷的高密度内连线板的层数大于或等于线路基 板的层数, 且高密度内连线板的平均布线密度 (mean layout dens i ty)大于 或等于线路基板的平均布线密度。  In the foregoing circuit board, the number of layers of the high-density interconnecting board is greater than or equal to the number of layers of the circuit substrate, and the average wiring density of the high-density interconnecting board is greater than or equal to the circuit substrate. Average wiring density.
前述的线路板, 其中所述的更包括一高密度内连线子板( H D I Sub-board )。 高密度内连线子板内埋于高密度内连线板中。  In the foregoing circuit board, the above further includes a high density interconnect sub-board (H D I Sub-board ). The high-density interconnect wiring sub-board is buried in a high-density interconnecting board.
前述的线路板, 其中所述的高密度内连线子板的层数大于或等于高密 度内连线板的层数, 而高密度内连线子板的平均布线密度大于或等于高密 度内连线板的平均布线密度。  In the foregoing circuit board, wherein the number of layers of the high-density interconnecting sub-board is greater than or equal to the number of layers of the high-density interconnecting board, and the average wiring density of the high-density interconnecting sub-board is greater than or equal to the high density The average wiring density of the wiring board.
前述的线路板 , 其中所述的第一导电柱从外层线路层延伸至高密度内 连线板的内部。  The aforementioned wiring board, wherein the first conductive pillar extends from the outer wiring layer to the inside of the high density interconnecting board.
本发明还可采用以下技术方案来实现。 依据本发明提出的一种线路板 的制造方法。 首先,在一基板上形成至少一贯孔。 在形成贯孔之后, 将一高 密度内连线板固定在基板上, 其中高密度内连线板遮盖贯孔。 在基板上形 成一主体层, 其中主体层包覆高密度内连线板。 在主体层上形成一金属层。 在形成主体层之后, 形成至少一连接于高密度内连线板与基板之间的第一 导电柱。 在形成第一导电柱之后, 图案化基板与金属层, 以分别形成一外 层线路层以及一线路层, 其中将高密度内连线板固定在基板上的方法以及 形成主体层的方法如下所述。在基板上涂布(applying )或贴合(sticking ) 一粘合层。 接着,将高密度内连线板粘合在粘合层上。 之后,在基板上以及 在高密度内连线板上形成一绝缘层, 其中绝缘层覆盖高密度内连线板。  The invention can also be implemented by the following technical solutions. A method of manufacturing a wiring board according to the present invention. First, at least a uniform hole is formed on a substrate. After the through holes are formed, a high density interconnecting plate is fixed to the substrate, wherein the high density interconnecting wires cover the through holes. A body layer is formed on the substrate, wherein the body layer is coated with a high density interconnector. A metal layer is formed on the body layer. After forming the body layer, at least one first conductive pillar connected between the high density interconnector plate and the substrate is formed. After forming the first conductive pillar, the substrate and the metal layer are patterned to form an outer wiring layer and a wiring layer, respectively, wherein the method of fixing the high-density interconnecting board on the substrate and the method of forming the main layer are as follows Said. An adhesive layer is applied or stuck on the substrate. Next, the high density interconnector board is bonded to the adhesive layer. Thereafter, an insulating layer is formed on the substrate and on the high-density interconnecting board, wherein the insulating layer covers the high-density interconnecting board.
本发明还可采用以下技术措施进一步实现。  The present invention can also be further implemented by the following technical measures.
前述的线路板的制造方法, 其中所述的粘合层填满贯孔,而形成第一导 电柱的方法如下所述。 移除贯孔内的部分粘合层。 在移除部分粘合层之后 以及在图案化基板之前,对贯孔进行通孔电镀(Plating Through Hole, PTH )。  In the above method of manufacturing a wiring board, wherein the adhesive layer fills the through hole, and the method of forming the first conductive post is as follows. Remove a portion of the adhesive layer within the through hole. The through holes are subjected to a through hole (PTH) after removing a portion of the adhesive layer and before patterning the substrate.
前述的线路板的制造方法, 其中形成主体层的方法更包括: 在高密度 内连线板粘合在粘合层上之后, 在绝缘层与基板之间配置一基材, 其中基 材具有一开口, 而高密度内连线板位在开口内。  The method for manufacturing a circuit board, wherein the method of forming the main body layer further comprises: after bonding the high-density inner wiring board to the adhesive layer, disposing a substrate between the insulating layer and the substrate, wherein the substrate has a The opening, while the high density interconnecting strip is in the opening.
前述的线路板的制造方法, 在形成主体层之后, 更包括形成至少一连 接于高密度内连线板与金属层之间的第二导电柱, 其中基材为一半固化胶 片;或者, 基材为一线路基板, 而在形成主体层之后, 更包括形成至少一连 接于线路基板与金属层之间的第二导电柱。 前述的线路板的制造方法, 其中当基材为线路基板时, 形成主体层的 方法更包括在基材与基板之间配置一半固化胶片。 The method for manufacturing a circuit board, after forming the main body layer, further comprises forming at least one second conductive pillar connected between the high-density interconnecting board and the metal layer, wherein the substrate is a half-cured film; or, the substrate A circuit substrate, and after forming the body layer, further comprising forming at least one second conductive pillar connected between the circuit substrate and the metal layer. In the above method for manufacturing a wiring board, when the substrate is a wiring substrate, the method of forming the main body layer further comprises disposing a half-cured film between the substrate and the substrate.
前述的线路板的制造方法, 其中所述的高密度内连线板是切割一第一 线路母板(f irst wiring panel ) 而形成, 而线路基板是切割一第二线路 母板而形成, 其中第一线路母板包括多个高密度内连线板, 而第二线路母 板包括多个线路基板。  In the above method for manufacturing a wiring board, wherein the high-density interconnecting board is formed by cutting a first wiring mother board, and the circuit substrate is formed by cutting a second wiring mother board, wherein The first line mother board includes a plurality of high density interconnect boards, and the second line mother board includes a plurality of circuit boards.
前述的线路板的制造方法, 其中所述的高密度内连线板具有至少一接 垫,而接垫遮盖贯孔。 .  In the above method of manufacturing a wiring board, the high-density interconnecting board has at least one pad, and the pad covers the through hole. .
前述的线路板的制造方法, 其中所述的高密度内连线板具有一内层线 路层, 而第一导电柱连接于内层线路层。  In the above method of manufacturing a wiring board, the high-density interconnecting wiring board has an inner wiring layer, and the first conductive pillar is connected to the inner wiring layer.
本发明的线路板因包括外层线路层而能电性连接至少一个电子元件,因 此本发明的线路板可以供至少一个电子元件所装设, 以使电流可以传输至 电子元件。  The wiring board of the present invention can be electrically connected to at least one electronic component by including an outer wiring layer, and therefore the wiring board of the present invention can be provided with at least one electronic component so that current can be transmitted to the electronic component.
上述说明仅是本发明技术方案的概述, 为了能够更清楚了解本发明的 技术手段, 而可依照说明书的内容予以实施, 并且为了让本发明的上述和 其他目的、 特征和优点能够更明显易懂, 以下特举实施例, 并配合附图,详 细说明:^下。 附图的简要说明  The above description is only an overview of the technical solutions of the present invention, and the technical means of the present invention can be more clearly understood, and can be implemented in accordance with the contents of the specification, and the above and other objects, features and advantages of the present invention can be more clearly understood. The following specific embodiments are described in detail with reference to the accompanying drawings: BRIEF DESCRIPTION OF THE DRAWINGS
图 1A至图 II是本发明一实施例的线路板的制造方法的流程剖面示意 图。  BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A to Fig. 2 are schematic cross sectional views showing a method of manufacturing a wiring board according to an embodiment of the present invention.
图 2A至图 2F是本发明另一实施例的线路板的制造方法的流程剖面示 意图。  2A to 2F are schematic cross-sectional views showing a method of manufacturing a wiring board according to another embodiment of the present invention.
10: 基板 12: 平面  10: Substrate 12: Plane
34: 第二线路母板 40: 第一线路母板  34: Second line motherboard 40: First line motherboard
100、 200:线路板 110: 外层线路层  100, 200: circuit board 110: outer circuit layer
112、 142a, 142b:接塾 114: 走线  112, 142a, 142b: interface 114: routing
120、 144、 144a, 144b:线路层 122: 金属层  120, 144, 144a, 144b: circuit layer 122: metal layer
130、 230:主体层 132、 232:粘合层  130, 230: main body layer 132, 232: adhesive layer
134、 234:基材 136、 236:绝缘层  134, 234: substrate 136, 236: insulation
140: 高密度内连线板 146、 148a, 148b:导电柱  140: High-density interconnect plate 146, 148a, 148b: conductive column
150: 第一导电柱 160、 260:笫二导电柱  150: first conductive column 160, 260: 笫 two conductive columns
180: 高密度内连线子板 238: 半固化胶片  180: High Density Interconnect Daughter Board 238: Semi-cured Film
300: 电子元件 Dl、 D2:距离  300: Electronic components Dl, D2: distance
HI: 贯孔 H2、 H4:开口  HI: through hole H2, H4: opening
H3: 开孔 SI: 焊料块 Tl、 T2:厚度 实现发明的最佳方式 H3: Opening SI: Solder block Tl, T2: the best way to achieve the invention in thickness
为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功 效,以下结合附图及实施例, 对依据本发明提出的线路板及其制造方法其具 体实施方式、 结构、 方法、 步骤、 特征及其功效, 详细说明如后。  In order to further explain the technical means and functions of the present invention for achieving the intended purpose of the invention, the following describes the specific embodiments, structures, methods, and steps of the circuit board and the manufacturing method thereof according to the present invention with reference to the accompanying drawings and embodiments. Features and their effects, as detailed below.
图 1A至图 II是本发明一实施例的线路板的制造方法的流程剖面示意 图,而图 1G绘示出本实施例的线路板的剖面结构。 请先参阅图 1G所示,在 此先介绍本实施例的线路板 100的结构特征。 本实施例的线路板 100包括 一外层线路层 110、 一线路层 120、 一主体层 130、 一高密度内连线板 140 以及多根第一导电柱 150。  1A to 1 are schematic cross-sectional views showing a method of manufacturing a wiring board according to an embodiment of the present invention, and Fig. 1G is a sectional view showing the structure of the wiring board of the present embodiment. Referring first to FIG. 1G, the structural features of the circuit board 100 of the present embodiment will be described first. The circuit board 100 of the present embodiment includes an outer circuit layer 110, a circuit layer 120, a body layer 130, a high density interconnecting board 140, and a plurality of first conductive pillars 150.
主体层 130配置在外层线路层 110与线路层 120之间,即外层线路层 110 以及线路层 120分别位在主体层 130的相对二表面上。高密度内连线板 140 内埋在主体层 130中,也就是说,主体层 130包覆高密度内连线板 140。这些 第一导电柱 150配置在主体层 130中, 并且连接于高密度内连线板 140与 外层线路层 110之间。  The main body layer 130 is disposed between the outer wiring layer 110 and the wiring layer 120, that is, the outer wiring layer 110 and the wiring layer 120 are respectively located on opposite surfaces of the main body layer 130. The high density interconnecting board 140 is buried in the body layer 130, that is, the body layer 130 covers the high density interconnecting board 140. These first conductive pillars 150 are disposed in the body layer 130 and are connected between the high density interconnecting board 140 and the outer wiring layer 110.
外层线路层 110可以包括多个接 pad )112以及至少一奈走线( trace ) 114,而高密度内连线板 140具有多个接垫 142a、 142b, 其中这些第一导电 柱 150可以连接于这些接垫 112与这些接垫 142a之间。 至少一个电子元件 300能装设在线路板 100上, 并且电性连接这些接垫 112。 电子元件 300例 如是芯片、 被动元件、 主动元件或微机电系统元件等, 而且电子元件 300 可以是以覆晶 (fl ip chip )或打线(wire bonding )等方式装设在线路板 100上。  The outer wiring layer 110 may include a plurality of pads 112 and at least one trace 114, and the high density interconnect panel 140 has a plurality of pads 142a, 142b, wherein the first conductive pillars 150 may be connected Between these pads 112 and the pads 142a. At least one electronic component 300 can be mounted on the circuit board 100 and electrically connected to the pads 112. The electronic component 300 is, for example, a chip, a passive component, an active component, or a MEMS component, and the electronic component 300 may be mounted on the wiring board 100 by means of flip chip or wire bonding.
以图 1G为例, 电子元件 300是以覆晶的方式装设在线路板 100上,所 以多个焊料块 S1会连接在电子元件 300以及这些接垫 112之间, 以使电子 元件 300能通过这些焊料块 S1而电性连接这些接垫 112,其中焊料块 S1例 如是焊球 ( solder bal l )0 如此, 电子元件 300可以经由这些接垫 112以 及第一导电柱 150而电性连接高密度内连线板 140,进而让电流能经由线路 板 100而传输至电子元件 300。 Taking FIG. 1G as an example, the electronic component 300 is mounted on the circuit board 100 in a flip chip manner, so that a plurality of solder bumps S1 are connected between the electronic component 300 and the pads 112 so that the electronic component 300 can pass. the solder bump is electrically connected to S1 and the pads 112, wherein the solder is a solder ball, for example, block S1 (solder bal l) 0 thus, the electronic component 300 may be electrically connected 150 via the high density of these pads 112 and the first conductive post The interconnect board 140, in turn, allows current to be transferred to the electronic component 300 via the board 100.
虽然图 1G绘示出多根第一导电柱 150, 但是在其他实施例中, 线路板 100可以只包括一根第一导电柱 150,即线路板 100所包括的第一导电柱 150 的数量可以仅为一个。 因此, 图 1G所示的第一导电柱 150的数量仅为举例 说明, 并非限定本发明。  Although FIG. 1G illustrates a plurality of first conductive pillars 150, in other embodiments, the circuit board 100 may include only one first conductive pillar 150, that is, the number of first conductive pillars 150 included in the circuit board 100 may be Just one. Therefore, the number of first conductive pillars 150 shown in Fig. 1G is merely illustrative and is not intended to limit the invention.
在本实施例中, 主体层 130可以包括一粘合层 132、一基材 134以及一 绝缘层 136, 其中粘合层 132、 基材 134以及绝缘层 136三者材料皆可为树 脂材料, 而基材 134更可以是一种半固化胶片。 粘合层 132粘合于高密度 内连线板 140与外层线路层 110之间, 并且局部覆盖外层线路层 110, 而这 些第一导电柱 150会穿过粘合层 132而连接高密度内连线板 140与外层线 路层 11 0。 In this embodiment, the main body layer 130 may include an adhesive layer 132, a substrate 134, and an insulating layer 136. The adhesive layer 132, the substrate 134, and the insulating layer 136 may be made of a resin material. The substrate 134 can be a semi-cured film. Adhesive layer 132 adheres to high density The inner wiring board 140 and the outer wiring layer 110 are partially covered, and the outer conductive layer 110 is partially covered, and the first conductive pillars 150 pass through the adhesive layer 132 to connect the high-density interconnecting board 140 and the outer wiring. Layer 11 0.
绝缘层 136覆盖高密度内连线板 140,而线路层 120配置在绝缘层 136 上,并接触绝缘层 136。 134位在外层线路层 110与绝缘层 136之间,并围 绕高密度内连线板 140, 所以绝缘层 136位在线路层 120与^ # 134之间。 由 于粘合层 1 32粘合高密度内连线板 140,基材 134围绕高密度内连线板 140,而 绝缘层 136覆盖高密度内连线板 140,因此高密度内连线板 140得以内埋在 主体层 1 30中。  The insulating layer 136 covers the high density interconnecting board 140, and the wiring layer 120 is disposed on the insulating layer 136 and contacts the insulating layer 136. 134 is between the outer wiring layer 110 and the insulating layer 136 and surrounds the high density interconnecting board 140, so the insulating layer 136 is located between the wiring layers 120 and 134. Since the adhesive layer 1 32 bonds the high-density interconnecting board 140, the substrate 134 surrounds the high-density interconnecting board 140, and the insulating layer 136 covers the high-density interconnecting board 140, the high-density interconnecting board 140 It is buried in the main body layer 130.
须说明的是, 虽然图 1G所示的主体层 130包括基材 134 , 但是在其他 实施例中,特别是当高密度内连线板 140具有很薄的厚度 T1时,绝缘层 136 可为半固化胶片, 而主体层 130可以不需要基材 134 , 即基材 1 34仅为本发 明的选择性元件, 并非必要元件。 因此, 高密度内连线板 140 可以只被粘 合层 132与绝缘层 136所包围, 而图 1G所示的基材 134仅为举例说明,并 非限定本发明。  It should be noted that although the body layer 130 shown in FIG. 1G includes the substrate 134, in other embodiments, particularly when the high density interconnector plate 140 has a very thin thickness T1, the insulating layer 136 may be half. The film is cured, and the body layer 130 may not require the substrate 134, i.e., the substrate 134 is only a selective component of the present invention and is not an essential component. Therefore, the high-density interconnecting board 140 may be surrounded only by the adhesive layer 132 and the insulating layer 136, and the substrate 134 shown in Fig. 1G is merely illustrative and does not limit the present invention.
线路板 100可以更包括至少一 第二导电柱 160, 例如图 1G所示的线 路板 100包括多根第二导电柱 160,但在其他实施例中, 线路板 100可以仅 包括一根第二导电柱 160。 这些第二导电柱 160穿过绝缘层 136, 并且连接 于高密度内连线板 140与线路层 120之间。 这些第二导电柱 160可以分别 连接这些接垫 142b, 如此高密度内连线板 140能经由第二导电柱 160而电 性连接线路层 120。  The circuit board 100 may further include at least one second conductive pillar 160. For example, the circuit board 100 shown in FIG. 1G includes a plurality of second conductive pillars 160, but in other embodiments, the circuit board 100 may include only one second conductive Column 160. These second conductive pillars 160 pass through the insulating layer 136 and are connected between the high density interconnector board 140 and the wiring layer 120. The second conductive pillars 160 can be connected to the pads 142b, respectively, such that the high-density interconnecting board 140 can be electrically connected to the wiring layer 120 via the second conductive pillars 160.
另外, 线路板 100 可以更包括至少一个导电连接结构 (conduct ive connect ion s tructure )。 导电连接结构配置在主体层 130中, 并且连接于 外层线路层 110与线路层 120之间, 其中导电连接结构可为一种导电盲孔 结构 ( conduct ive bl ind via s tructure )或导电通孑 Li结构 ( conduct ive through hole structure 利用导电连接结构, 外层线路层 110能电性连 接线路层 120。  In addition, the circuit board 100 may further include at least one conductive connection structure (conductive connection s tructure). The conductive connection structure is disposed in the body layer 130 and is connected between the outer circuit layer 110 and the circuit layer 120. The conductive connection structure may be a conductive bl ind via s tructure or a conductive via. The irth through hole structure utilizes a conductive connection structure, and the outer circuit layer 110 can electrically connect the circuit layer 120.
值得一提的是, 线路板 100 不仅可以是一块已经制造完成的线路板成 品,且也可为一种多层线路板 ( mul t i layer wi r ing board ) 的其中一个部 件(par t ), 即线路板 100可作为多层线路板内的线路结构。 详细而言,在 其他实施例中, 可以利用增层法(bui ld- up )或叠合法, 在绝缘层 136上 额外制作出一层或二层以上的线路层, 使得线路层 120成为多层线路板的 内 线路层 ( inner wir ing layer )。  It is worth mentioning that the circuit board 100 can be not only a finished circuit board finished product, but also a component of a mul ti layer wi ring board (par t ), ie The circuit board 100 can function as a line structure within a multilayer circuit board. In detail, in other embodiments, one or more wiring layers may be additionally formed on the insulating layer 136 by using a build-up method or a stacking method, so that the circuit layer 120 becomes a plurality of layers. The inner wir ing layer of the board.
因此, 虽然在图 1G所示的实施例中, 线路屋 120与绝缘层 136上方没 有绘示出任何线路层, 使得图 1G所绘示的线路板 100看似为一种已经制造 完成的线路板成品, 但是在其他实施例中, 线路板 100也可以作为多层线 路板内的线路结构。 因此, 图 1G所绘示的线路板 100仅为举例说明, 并非 限定本发明。 Therefore, although in the embodiment shown in FIG. 1G, no circuit layers are depicted above the line house 120 and the insulating layer 136, the circuit board 100 illustrated in FIG. 1G appears to be an already completed circuit board. Finished product, but in other embodiments, circuit board 100 can also be used as a multilayer line The wiring structure inside the road board. Therefore, the circuit board 100 illustrated in FIG. 1G is merely illustrative and does not limit the present invention.
请参阅图 1H所示,其放大绘示出图 1G中高密度内连线板 140。 线路板 100可以更包括一高密度内连线子板 180, 其为一种高密度内连线板。 高密 度内连线子板 180 内埋于高密度内连线板 140 中, 并且可经由增层法 ( bui ld- up )或叠合法而内埋在高密度内连线板 140中。 此外, 高密度内连 线子板 180 的平均布线密度及层数皆可以大于或等于高密度内连线板 140 的平均布线密度及层数, 其中本发明所提及的层数是指线路层的数量。  Referring to Figure 1H, an enlarged view of the high density interconnect panel 140 of Figure 1G is shown. The circuit board 100 can further include a high density interconnect wiring board 180 which is a high density interconnecting board. The high density interconnect wiring board 180 is buried in the high density interconnecting board 140 and may be buried in the high density interconnecting board 140 via a bulking or stacking process. In addition, the average wiring density and the number of layers of the high-density interconnecting sub-board 180 may be greater than or equal to the average wiring density and the number of layers of the high-density interconnecting board 140, wherein the number of layers mentioned in the present invention refers to the circuit layer. quantity.
以图 1H为例, 除了接垫 142a、 142b之外, 高密度内连线板 140更具 有二层线路层 144a、 144b, 其中线路层 144a, 144b 皆为高密度内连线板 140的内层线路层, 因此高密度内连线板 140共具有四层线路层, 即高密度 内连线板 140的层数为四层。 然而, 必须强调的是, 图 1H中的高密度内连 线板 140的层数仅为举例说明, 并非限定本发明。  Taking FIG. 1H as an example, in addition to the pads 142a, 142b, the high-density interconnecting board 140 further has two wiring layers 144a, 144b, wherein the wiring layers 144a, 144b are the inner layers of the high-density interconnecting board 140. The circuit layer, and thus the high-density interconnecting board 140 has a total of four wiring layers, that is, the number of layers of the high-density interconnecting board 140 is four. However, it must be emphasized that the number of layers of the high-density interconnecting board 140 in Fig. 1H is merely illustrative and does not limit the invention.
另外, 高密度内连线板 140可以更具有至少一根导电柱 146、至少一根 导电柱 148a以及至少一 ^导电柱 148b,其中导电柱 146连接于线路层 144a 与 144b之间, 导电柱 148a连接于高密度内连线子板 180与接垫 142a之 间,而导电柱 8b连接于高密度内连线子板 180与接垫 142b之间。 利用这 些导电柱 148a与 148b,高密度内连线子板 180得以电性连接高密度内连线 板 140 ,以使电流能在高密度内连线子板 180与高密度内连线板 140之间传 输。  In addition, the high-density interconnecting board 140 may further have at least one conductive pillar 146, at least one conductive pillar 148a, and at least one conductive pillar 148b, wherein the conductive pillar 146 is connected between the circuit layers 144a and 144b, and the conductive pillar 148a It is connected between the high-density interconnecting sub-board 180 and the pad 142a, and the conductive post 8b is connected between the high-density interconnecting sub-board 180 and the pad 142b. With these conductive pillars 148a and 148b, the high-density interconnect wiring sub-board 180 is electrically connected to the high-density interconnecting board 140 so that current can be connected between the high-density interconnecting sub-board 180 and the high-density interconnecting board 140. Transfer between.
特别一提的是, 虽然这些第一导电柱 150可以连接于这些接垫 112与 这些接垫 142a之间, 但在其他实施例中, 第一导电柱 150也可以不穿过任 何一个接垫 142a而直接连接于接垫 112与线路层 144a或 144b之间, 或是 直接连接于高密度内连线子板 180。换句话说, 笫一导电柱 150可以从外层 线路层 110延伸至高密度内连线板 140的内部。  In particular, although the first conductive pillars 150 may be connected between the pads 112 and the pads 142a, in other embodiments, the first conductive pillars 150 may not pass through any of the pads 142a. It is directly connected between the pad 112 and the circuit layer 144a or 144b, or directly connected to the high-density interconnect sub-board 180. In other words, the first conductive pillar 150 may extend from the outer wiring layer 110 to the inside of the high density interconnecting board 140.
以上主要介绍线路板 100的结构特征。 接下来, 将配合图 1A至图 II 来详细介绍线路板 100的制造方法。  The above mainly describes the structural features of the circuit board 100. Next, a method of manufacturing the wiring board 100 will be described in detail with reference to Figs. 1A to II.
请参阅图 1A所示, 关于线路板 100的制造方法, 首先, 在一基板 10 上形成至少一个贯孔 Hl, 例如在图 1A的实施例中, 在基板 10上形成多个 贯孔 HI , 但在其他实施例中, 可以只形成一个贯孔 Hl。 形成贯孔 HI的方 法有很多种, 例如是激光钻孔( laser dri l l ing )、 机械钻孔(mechanical dri l l ing )或微:影蚀刻 ( l i thography etching )。 此外, 基板 10可为金属 箔片, 例如铜箔或铝箔; 或者, 基板 10 也可为复合板材, 例如铜箔基板 ( Copper Clad Laminate, CCL )。  Referring to FIG. 1A, in the method of manufacturing the circuit board 100, first, at least one through hole H1 is formed on a substrate 10. For example, in the embodiment of FIG. 1A, a plurality of through holes HI are formed on the substrate 10, but In other embodiments, only one through hole H1 may be formed. There are many ways to form the through hole HI, such as laser ray l, mechanical lining or microlithography. Further, the substrate 10 may be a metal foil such as a copper foil or an aluminum foil; or the substrate 10 may be a composite sheet such as a copper clad laminate (CCL).
请参阅图 IB与图 1C所示,在形成贯孔 HI之后,将高密度内连线板 140 固定在基板 10上,其中高密度内连线板 140会遮盖这些贯孔 HI, 而且是高 密度内连线板 140的接垫 142a遮盖贯孔 Hl, 即这些接垫 142a会分别对应 这些贯孔 Hl。 固定高密度内连线板 140在基板 10上的方式有多种, 而在图 IB与图 1C所示的实施例中,高密度内连线板 140可利用粘合的方式固定在 基板 10上。 Referring to FIG. 1B and FIG. 1C, after the through holes HI are formed, the high-density interconnecting board 140 is fixed on the substrate 10, wherein the high-density interconnecting board 140 covers the through holes HI, and is high. The pads 142a of the density inner wiring board 140 cover the through holes H1, that is, the pads 142a correspond to the through holes H1, respectively. There are various ways of fixing the high-density interconnecting board 140 on the substrate 10. In the embodiment shown in FIGS. 1B and 1C, the high-density interconnecting board 140 can be fixed on the substrate 10 by adhesive bonding. .
详细而言,请先参阅图 1B所示,先在基板 10上涂布或贴合一层粘合层 132。 粘合层 132可局部覆盖基板 10的一平面 12,并且遮盖这些贯孔 Hl。 粘 合层 132 可以是由树脂材料所形成, 其中此树脂材料例如是环氧树脂 (epoxy),而其中涂布粘合层 132的方法可以是喷涂、 刷涂或网印等方法。  In detail, referring to FIG. 1B, an adhesive layer 132 is first coated or laminated on the substrate 10. The adhesive layer 132 may partially cover a plane 12 of the substrate 10 and cover the through holes H1. The adhesive layer 132 may be formed of a resin material such as epoxy, and the method of applying the adhesive layer 132 may be a method such as spraying, brushing or screen printing.
请参阅图.1C所示, 之后, 将高密度内连线板 140粘合在粘合层 132 上。 如此, 高密度内连线板 140得以固定在基板 10上。 此外, 粘合层 132 可以是具有流动性的液态材料或膏状材料, 所以粘合层 132 能填满这些贯 孔 Hl。 另外, 在高密度内连线板 140粘合在粘合层 132上以前, 可以对高 密度内连线板 140进行对位程序, 以使高密度内连线板 140能座落在正确 的位置中。  Referring to Fig. 1C, the high-density interconnecting board 140 is then bonded to the adhesive layer 132. Thus, the high-density interconnecting board 140 is fixed to the substrate 10. Further, the adhesive layer 132 may be a liquid material or a paste material having fluidity, so that the adhesive layer 132 can fill the through holes H1. In addition, before the high-density interconnecting board 140 is bonded to the adhesive layer 132, the high-density interconnecting board 140 can be aligned to enable the high-density interconnecting board 140 to be seated in the correct position. in.
请参阅图 1D与图 1E所示,接着,在基板 10上形成包覆高密度内连线板 140的主体层 130。 形成主体层 130的方法有很多种,而在本实施例中,由于 主体层 130包括粘合层 132,因此,当在基板 10上涂布或贴合粘合层 132,以 粘合高密度内连线板 140时, 主体层 130已经开始形成。  Referring to FIG. 1D and FIG. 1E, a body layer 130 covering the high-density interconnecting board 140 is formed on the substrate 10. There are many methods of forming the body layer 130, and in the present embodiment, since the body layer 130 includes the adhesive layer 132, when the adhesive layer 132 is coated or bonded on the substrate 10, it is bonded in a high density. When the board 140 is connected, the body layer 130 has begun to form.
在高密度内连线板 140粘合在粘合层 132上之后, 在基板 10上以及在 高密度内连线板 140上形成绝缘层 136, 并且在绝缘层 136与基板 10之间 配置基材 134。 基材 134具有一开口 H2, 而开口 H2可以是经由外型切割 ( routing )或激光烧蚀 (laser ablat ion ) 而形成。 当配置基材 134时,高 密度内连线板 140会位在开口 H2内, 所以基材 134能围绕高密度内连线板 140。  After the high-density interconnector board 140 is bonded to the adhesive layer 132, an insulating layer 136 is formed on the substrate 10 and on the high-density interconnecting board 140, and a substrate is disposed between the insulating layer 136 and the substrate 10. 134. The substrate 134 has an opening H2, and the opening H2 may be formed by external routing or laser ablating. When the substrate 134 is disposed, the high density interconnector plate 140 will be positioned within the opening H2 so that the substrate 134 can surround the high density interconnect plate 140.
绝缘层 136与基材 134可以是经由压合而形成。 详细而言,形成绝缘层 136与基材 134的方法可以是将树脂层与半固化胶片二者压合在基板 10 上,其中半固化胶片配置在树脂层与 反 10之间。在进行压合的过程中,可 以加热树脂层与半固化胶片,也就是对树脂层与半固化胶片进行热压合,以 形成主体层 130。  The insulating layer 136 and the substrate 134 may be formed by press bonding. In detail, the method of forming the insulating layer 136 and the substrate 134 may be to press the resin layer and the prepreg film onto the substrate 10, wherein the prepreg is disposed between the resin layer and the counter 10. In the process of lamination, the resin layer and the prepreg film may be heated, i.e., the resin layer and the prepreg film are thermocompression bonded to form the body layer 130.
另外, 线路板 100的制造方法还包括在主体层 130上形成一金属层 122。 金属层 122可以形成在绝缘层 136上, 且可以是金属箔片, 例如铜箔 或铝箔。 金属层 122可以与绝缘层 136同时形成, 例如形成金属层 122与 绝缘层 136的方法可以是将一块复合板材压合在基材 134上, 而此复合板 材可具有金属箔片与树脂层, 例如铜箔基板。  In addition, the method of manufacturing the wiring board 100 further includes forming a metal layer 122 on the body layer 130. The metal layer 122 may be formed on the insulating layer 136 and may be a metal foil such as a copper foil or an aluminum foil. The metal layer 122 may be formed simultaneously with the insulating layer 136. For example, the method of forming the metal layer 122 and the insulating layer 136 may be to press a composite sheet onto the substrate 134, and the composite sheet may have a metal foil and a resin layer, for example Copper foil substrate.
须说明的是, 由于基材 134 并非为本发明的必要元件, 所以在其他实 施例中, 不一定要形成基材 134 , 而在不形成基材 134的条件下, 可以只压 合一片金属箔片以及一片半固化胶片在基板 10上, 以形成金属层 122与主 体层 130 , 其中此金属箔片可以是表面涂有粘胶的箔片, 例如背胶铜箔 ( Res in Coated Copper, RCC )。 因此, 图 ID与图 IE所示的基材 134仅为 举例说明, 并非限定本发明。 It should be noted that since the substrate 134 is not an essential component of the present invention, in other embodiments, the substrate 134 does not have to be formed, and only the substrate 134 may be formed, and only the substrate 134 may be formed. A piece of metal foil and a piece of semi-cured film are formed on the substrate 10 to form a metal layer 122 and a body layer 130, wherein the metal foil may be a foil coated with a glue, such as a backing copper foil (Res in Coated) Copper, RCC). Therefore, the substrate 134 shown in Fig. ID and Fig. IE is for illustrative purposes only and is not intended to limit the invention.
请参阅图 1E与图 1F所示, 接着, 形成至少一根第一导电柱 150以及 至少一根第二导电柱 160。第一导电柱 150连接于高密度内连线板 140与基 板 10之间, 而第二导电柱 160连接于高密度内连线板 140与金属层 122之 间。 第一导电柱 150与第二导电柱 160二者可以是经由通孔电镀而形成,而 形成第一导电柱 150 与第二导电柱 160 的方法可以包括无电电镀 ( electroless plating ) 以及有电电後 ( electroplat ing )。  Referring to FIG. 1E and FIG. 1F, at least one first conductive pillar 150 and at least one second conductive pillar 160 are formed. The first conductive pillar 150 is connected between the high density interconnecting board 140 and the substrate 10, and the second conductive pillar 160 is connected between the high density interconnecting board 140 and the metal layer 122. The first conductive pillar 150 and the second conductive pillar 160 may be formed by via plating, and the method of forming the first conductive pillar 150 and the second conductive pillar 160 may include electroless plating and electric electricity. After (electroplat ing).
形成第一导电柱 150的方法可包括以下流程。 首先,当粘合层 132填满 这些贯孔 HI时(如图 1D所示), 移除这些贯孔 HI内的部分粘合层 132,其 中移除部分粘合层 132的方法可以包括激光烧蚀(laser ablat ion ), 也就 是照射一激光光束在这些贯孔 HI所暴露的粘合层 132,使得贯孔 HI能局部 暴露出高密度内连线板 140。  The method of forming the first conductive pillar 150 may include the following flow. First, when the adhesive layer 132 fills the through holes HI (as shown in FIG. 1D), the partial adhesive layer 132 in the through holes HI is removed, and the method of removing the partial adhesive layer 132 may include laser burning. A laser ablat ion, that is, an adhesive layer 132 exposed by the laser beam at the through holes HI, enables the through hole HI to partially expose the high density interconnecting plate 140.
另外, 在进行上述激光烧蚀之后, 可以对这些贯孔 HI 进行去胶渣 ( desmear ), 以清洁这些贯孔 Hl。 之后, 对这些贯孔 HI进行通孔电镀,即对 这些贯孔 HI依序进行无电电镀与有电电镀。 如此, 第一导电柱 150得以形 成在贯孔 HI内, 并且连接基板 10以及高密度内连线板 140。 当对这些贯孔 HI进行通孔电镀时, 更可以对这些贯孔 HI进行填满孔电镀(Ful l-Fi l led Plat ing ), 使这些第一导电柱 150成为实心导电柱体结构。  Further, after the above laser ablation, the through holes HI may be desmear to clean the through holes H1. Thereafter, the through holes HI are subjected to through-hole plating, that is, the through holes HI are sequentially subjected to electroless plating and electroplating. Thus, the first conductive pillar 150 is formed in the through hole HI, and connects the substrate 10 and the high-density interconnecting board 140. When the through holes HI are subjected to through-hole plating, the through holes HI may be filled with Ful l-Fi l led Plating to make the first conductive pillars 150 a solid conductive pillar structure.
当形成第一导电柱 150时, 可以进行形成第二导电柱 160的流程,以使 第一导电柱 150与第二导电柱 160能同时形成, '而第二导电柱 160的形成 方法如下所述。 首先, 在金属层 122上形成一个或多个开孔 H3, 其中这些 开孔 H3是贯穿金属层 122与绝缘层 136而形成, 而形成开孔 H3的方法可 以是激光钻孔或微影蚀刻。 此外, 在进行上述激光钻孔之后, 也可以对这 些开孔 H3进行去胶渣。  When the first conductive pillar 150 is formed, a flow of forming the second conductive pillar 160 may be performed to enable the first conductive pillar 150 and the second conductive pillar 160 to be simultaneously formed, and the second conductive pillar 160 is formed as follows. . First, one or more openings H3 are formed on the metal layer 122, wherein the openings H3 are formed through the metal layer 122 and the insulating layer 136, and the method of forming the opening H3 may be laser drilling or lithography. Further, after the above laser drilling, the openings H3 may be subjected to desmearing.
在形成开孔 H3之后, 对开孔 H3进行通孔电镀, 也就是对这些开孔 H3 依序进行无电电镀与有电电镀, 其中更可对这些贯孔 HI与开孔 H3同时进 行通孔电镀。 如此, 这些第二导电柱 160能分别形成在这些开孔 H3内,并 连接高密度内连线板 140与金属层 122, 而第一导电柱 150与第二导电柱 160更可以在同一道通孔电镀的流程中形成。 此外, 当对这些开孔 H3进行 通孔电镀时,更可以对这些开孔 H3进行填满孔电镀,使这些第二导电柱 160 成为实心导电柱体结构。  After the opening H3 is formed, the opening H3 is subjected to through-hole plating, that is, the openings H3 are sequentially subjected to electroless plating and electroplating, wherein the through holes HI and the openings H3 are simultaneously through holes. plating. In this way, the second conductive pillars 160 can be respectively formed in the openings H3, and the high-density interconnecting wires 140 and the metal layer 122 are connected, and the first conductive pillars 150 and the second conductive pillars 160 can be in the same pass. The hole plating process is formed. In addition, when the openings H3 are subjected to through-hole plating, the openings H3 may be filled with holes to make the second conductive pillars 160 a solid conductive pillar structure.
请参阅图 1F与图 1G所示,接着, 图案化基板 10以及金属层 122,以分 別形成外层线路层 110以及线路层 120, 其中图案化基板 10与金属层 122 的方法可以是 :影蚀刻。 至此, 线路板 100基本上已制造完成。 另外,在线 路板 100制造完成之后, 可利用增层法或叠合法, 在绝缘层 136或外层线 路层 110上额外制作出一层或多层线路层, 使得外层线路层 110或线路层 120成为多层线路板的内层线路层。 Referring to FIG. 1F and FIG. 1G, the substrate 10 and the metal layer 122 are patterned to form an outer wiring layer 110 and a wiring layer 120, respectively, wherein the substrate 10 and the metal layer 122 are patterned. The method can be: shadow etching. At this point, the circuit board 100 has been substantially completed. In addition, after the circuit board 100 is completed, one or more wiring layers may be additionally formed on the insulating layer 136 or the outer wiring layer 110 by a build-up method or a stacking method, so that the outer wiring layer 110 or the wiring layer 120 becomes the inner wiring layer of the multilayer wiring board.
请参阅图 II所示, 值得一提的是, 由于第一导电柱 150可以延伸至高 密度内连线板 140的内部, 因此在形成第一导电柱 150的过程中, 第一导 电柱 150也可以连接于高密度内连线板 140的一内层线路层 144, 如图 II 所示, 其中内层线路层 144例如是线路层 144a或 144b (请参考图 1H )。  Referring to FIG. 2 , it is worth mentioning that, since the first conductive pillar 150 can extend to the inside of the high-density interconnecting board 140 , the first conductive pillar 150 can also be formed in the process of forming the first conductive pillar 150 . An inner wiring layer 144 is attached to the high density interconnecting board 140, as shown in FIG. II, wherein the inner wiring layer 144 is, for example, the wiring layer 144a or 144b (please refer to FIG. 1H).
图 2A至图 2F是本发明另一实施例的线路板的制造方法的流程剖面示 意图。 请先参阅图 2D所示, 本实施例的线路板 200与前述实施例的线路板 100二者结构相似, 而以下主要介绍线路板 100、 200二者在结构特征上的 差异  2A to 2F are schematic cross-sectional views showing a method of manufacturing a wiring board according to another embodiment of the present invention. Referring to FIG. 2D, the circuit board 200 of the present embodiment is similar in structure to the circuit board 100 of the foregoing embodiment, and the following mainly introduces the difference in structural characteristics between the circuit boards 100 and 200.
线路板 200可以供至少一个电子元件 300 (请参阅图 1G )来装设,而且 线路板 200所包括的元件相似于线路板 100的元件, 例如线路板 200也包 括一外层线路层 110、 一线路层 120、 一高密度内连线板 140以及多根第一 导电柱 150。 然而, 线路板 200所包括的主体层 230不同于前述线路板 100 的主体层 130。  The circuit board 200 can be provided for at least one electronic component 300 (see FIG. 1G), and the circuit board 200 includes components similar to those of the circuit board 100. For example, the circuit board 200 also includes an outer circuit layer 110, The circuit layer 120, a high density interconnecting board 140, and a plurality of first conductive pillars 150. However, the body layer 230 included in the wiring board 200 is different from the body layer 130 of the aforementioned wiring board 100.
详细而言, 主体层 230包括一粘合层 232、 一基材 234、 一绝缘层 236 以及一半固化胶片 238。 半固化胶片 238配置在基材 234与外层线路层 110 之间, 而粘合层 232粘合在高密度内连线板 140与外层线路层 110之间,并 且全面性覆盖外层线路层 110,其中粘合层 232与绝缘层 236二者材料可包 括树脂材料。 由于粘合层 232 全面性覆盖外层线路层 110, 所以绝缘层 236、 基材 234与半固化胶片 238基本上是不接触到外层线路层 110。  In detail, the body layer 230 includes an adhesive layer 232, a substrate 234, an insulating layer 236, and a half cured film 238. The prepreg 238 is disposed between the substrate 234 and the outer wiring layer 110, and the adhesive layer 232 is bonded between the high density interconnecting board 140 and the outer wiring layer 110, and comprehensively covers the outer wiring layer. 110, wherein the material of both the adhesive layer 232 and the insulating layer 236 may include a resin material. Since the adhesive layer 232 comprehensively covers the outer wiring layer 110, the insulating layer 236, the substrate 234 and the prepreg 238 are substantially not in contact with the outer wiring layer 110.
另夕卜,在本实施例中,基材 234具有一开口 H4, 而高密度内连线板 140 位在开口 H4内, 因此基材 234围绕高密度内连线板 140。 基材 234为线路 基板, 所以基材 234实质上可以视为一种线路板。 以图 2D为例, 基材 234 例如可以视为一种具有四层线路层的多层线路板。 此外, 高密度内连线板 140的平均布线密度可以大于或等于线路基板(即基材 234 )的平均布线密 度,且高密度内连线板 140的层数也可以大于或等于基材 234的层数。  In addition, in the present embodiment, the substrate 234 has an opening H4, and the high-density interconnecting board 140 is located in the opening H4, so that the substrate 234 surrounds the high-density interconnecting board 140. The substrate 234 is a wiring substrate, so the substrate 234 can be substantially regarded as a wiring board. Taking FIG. 2D as an example, the substrate 234 can be considered, for example, as a multilayer wiring board having four wiring layers. In addition, the average wiring density of the high-density interconnecting board 140 may be greater than or equal to the average wiring density of the circuit substrate (ie, the substrate 234), and the number of layers of the high-density interconnecting board 140 may also be greater than or equal to the substrate 234. The number of layers.
举例而言, 图 1H所示的高密度内连线板 140的层数可为四层, 而图 2D 所示的基材 234可具有四层线路层, 所以从图 1H与图 2D来看, 高密度内 连线板 的层数可以等于基材 234的层数。 当然, 在其他实施例中,高密 度内连线板 140的层数也可以大于基材 234的层数, 所以图 1H所示的高密 度内连线板 140的层数, 以及图 2D所示的基材 234的层数二者皆为举例说 明,并非限定本发明。  For example, the high-density interconnecting board 140 shown in FIG. 1H may have four layers, and the substrate 234 shown in FIG. 2D may have four wiring layers, so from FIG. 1H and FIG. 2D, The number of layers of the high density interconnect panel can be equal to the number of layers of the substrate 234. Of course, in other embodiments, the number of layers of the high-density interconnecting board 140 may also be greater than the number of layers of the substrate 234, so the number of layers of the high-density interconnecting board 140 shown in FIG. 1H, and FIG. 2D The number of layers of the substrate 234 is both illustrative and not limiting.
当基材 234为线路基板时, 基材 234的厚度 T2可以大于或等于高密度 内连线板 140的厚度 T1 , 以至于高密度内连线板 140与外层线路层 110之 间的距离 D1小于高密度内连线板 140与线路层 120之间的距离 D2,所以高 密度内连线板 140距离外层线路层 110较近, 距离线路层 120较远。 When the substrate 234 is a circuit substrate, the thickness T2 of the substrate 234 may be greater than or equal to the high density. The thickness T1 of the interconnecting board 140 is such that the distance D1 between the high-density interconnecting board 140 and the outer wiring layer 110 is smaller than the distance D2 between the high-density interconnecting board 140 and the wiring layer 120, so the high density The interconnect board 140 is closer to the outer wiring layer 110 and is further away from the wiring layer 120.
因此, 电子元件 300能装设在接近高密度内连线板 140的地方, 并且 经由外层线路层 110与第一导电柱 150而电性连接高密度内连线板 140。此 外,由于高密度内连线板 140 的平均布线密度大于基材 234 的平均布线密 度,而比较高密度内连线板 140与基材 234二者的平均布线密度, 电子元件 300的平均布线密度会比较接近高密度内连线板 140的平均布线密度,因而 有利于将电子元件 300装设在接近高密度内连线板 140的地方, 如图 2D所 示。  Therefore, the electronic component 300 can be mounted close to the high-density interconnecting board 140, and electrically connected to the high-density interconnecting board 140 via the outer wiring layer 110 and the first conductive post 150. In addition, since the average wiring density of the high-density interconnecting board 140 is larger than the average wiring density of the substrate 234, and the average wiring density of the high-density interconnecting board 140 and the substrate 234, the average wiring density of the electronic component 300 The average wiring density of the high density interconnecting board 140 will be relatively close, thereby facilitating the mounting of the electronic component 300 near the high density interconnecting board 140, as shown in Fig. 2D.
另外, 虽然线路板 200可以更包括至少一根第二导电柱 260, 而且第二 导电柱 260的外形及材料皆与前述第二导电柱 160大体相同, 但有别于前 述实施例,本实施例的第二导电柱 260会穿过绝缘层 236 , 并且连接于线路 基板(即基材 234 )与线路层 120之间。 如此, 基材 234可以经由第二导电 柱 160而电性连接线路层 120。 不过, 在其他实施例中, 至少一根第二导电 柱 160也可以穿过绝缘层 236而连接于高密度内连线板 140与线路层 120 之间。  In addition, although the circuit board 200 may further include at least one second conductive pillar 260, and the shape and material of the second conductive pillar 260 are substantially the same as those of the second conductive pillar 160, different from the foregoing embodiment, the embodiment The second conductive pillar 260 passes through the insulating layer 236 and is connected between the wiring substrate (ie, the substrate 234) and the wiring layer 120. As such, the substrate 234 can be electrically connected to the circuit layer 120 via the second conductive pillars 160. However, in other embodiments, at least one second conductive pillar 160 may also be connected between the high density interconnect plate 140 and the wiring layer 120 through the insulating layer 236.
以上主要介绍线路板 200的结构特征。 接下来, 将配合图 2A至图 2F 来详细介绍线路板 200的制造方法。 由于线路板 200的制造方法与前述线 路板 100的制造方法皆包括相同的流程,因此以下主要介绍线路板 100、 200 二者在制造方法上的差异。  The above mainly describes the structural features of the circuit board 200. Next, a method of manufacturing the wiring board 200 will be described in detail with reference to Figs. 2A to 2F. Since the manufacturing method of the wiring board 200 and the manufacturing method of the aforementioned wiring board 100 all include the same flow, the following mainly describes the difference in manufacturing methods of the wiring boards 100 and 200.
请参阅图 2A所示,在形成贯孔 HI之后,将高密度内连线板 140固定在 反 10上。 高密度内连线板 140可以利用粘合的方式固定在 _¾ ^反 10上。 举 例而言, 在基板 10上涂布或贴合一层粘合层 232, 而其中涂布粘合层 232 的方法可以相同于涂布粘合层 132的方法。 粘合层 232全面性覆盖基板 10 的平面 12 , 所以这些贯孔 HI皆会被粘合层 232所遮盖。 接着, 将高密度内 连线板 140粘合在粘合层 232上, 以使高密度内连线板 140得以固定在基 板 10上。  Referring to Fig. 2A, after the through hole HI is formed, the high density interconnecting plate 140 is fixed to the reverse 10. The high-density interconnector plate 140 can be attached to the _3⁄4^reverse 10 by means of bonding. For example, an adhesive layer 232 is applied or laminated on the substrate 10, and the method of applying the adhesive layer 232 therein may be the same as the method of applying the adhesive layer 132. The adhesive layer 232 covers the plane 12 of the substrate 10 in a comprehensive manner, so that these through holes HI are covered by the adhesive layer 232. Next, the high-density interconnecting board 140 is bonded to the adhesive layer 232 so that the high-density interconnecting board 140 is fixed to the substrate 10.
请参阅图 2B与图 2C所示, 之后, 在 反 10上以及在高密度内连线板 140上形成覆盖高密度内连线板 140的绝缘层 236 , 并且在绝缘层 236与基 板 10之间配置基材 234, 其中开口 H4的形成方法可以与开口 H2相同。 此 外,在基材 234与基板 10之间配置半固化胶片 238,其中半固化胶片 238可 配置在粘合层 232与基材 234之间。  Referring to FIG. 2B and FIG. 2C, an insulating layer 236 covering the high-density interconnecting board 140 is formed on the reverse 10 and on the high-density interconnecting board 140, and between the insulating layer 236 and the substrate 10. The substrate 234 is disposed, wherein the opening H4 can be formed in the same manner as the opening H2. Further, a prepreg 238 is disposed between the substrate 234 and the substrate 10, wherein the prepreg 238 is disposed between the adhesive layer 232 and the substrate 234.
绝缘层 236的形成方法可相同于绝缘层 136的形成方法, 例如形成绝 缘层 236的方法可以是将树脂层压合在基材 234上。当配置半固化胶片 238 时,可将半固化胶片 238压合在基板 10与基材 234之间。 此外, 在进行上 述压合的过程中,可加热树脂层与半固化胶片 238 , 以使树脂层与半固化胶 片 238二者的胶材能流动, 进而将开口 H4填满。 如此, 主体层 230得以形 成。 The method of forming the insulating layer 236 may be the same as the method of forming the insulating layer 136. For example, the method of forming the insulating layer 236 may be to laminate the resin on the substrate 234. When the prepreg film 238 is disposed, the prepreg film 238 can be pressed between the substrate 10 and the substrate 234. In addition, in progress In the process of press-bonding, the resin layer and the prepreg film 238 may be heated to allow the glue material of both the resin layer and the prepreg film 238 to flow, thereby filling the opening H4. As such, the body layer 230 is formed.
值得一提的是,由于粘合层 232全面性覆盖基板 10的平面 12,所以即使 没有半固化胶片 238,粘合层 232也可以粘合在基材 234与基板 10之间。可 见,半固化胶片 238仅为本发明的选择性元件而非必要元件, 所以图 2B至 图 2D所示的半固化胶片 238仅为举例说明, 并非限定本发明。  It is worth mentioning that since the adhesive layer 232 comprehensively covers the plane 12 of the substrate 10, the adhesive layer 232 can be bonded between the substrate 234 and the substrate 10 even without the semi-cured film 238. It can be seen that the prepreg film 238 is only a selective component of the present invention and is not an essential component, so the prepreg film 238 shown in Figs. 2B to 2D is merely illustrative and not limiting.
请参阅图 2C所示, 在形成主体层 230之后, 可以形成至少一根连接于 基材 234与金属层 122之间的第二导电柱 260,以及形成至少一才艮第一导电 柱 150。第二导电柱 260的形成方法与前述实施例中的第二导电柱 160的形 成方法相同, 因此以下不再重复介绍第二导电柱 26G的形成方法。  Referring to FIG. 2C, after the body layer 230 is formed, at least one second conductive pillar 260 connected between the substrate 234 and the metal layer 122 may be formed, and at least one first conductive pillar 150 may be formed. The second conductive pillar 260 is formed in the same manner as the second conductive pillar 160 in the foregoing embodiment, and therefore the method of forming the second conductive pillar 26G will not be repeatedly described below.
请参阅图 2C与图 2D所示, 接着, 图案化基板 10以及金属层 122, 以 分別形成外层线路层 110以及线路层 120。 至此, 线路板 200基本上已制造 完成。 此外, 上述图案化的方法与前述实施例相同, 即图案化基板 10与金 属层 122的方法可以是微影蚀刻。 另外, 在线路板 200制造完成之后,可以 利用增层法或叠合法, 在绝缘层 236或外层线路层 110上额外制作出一层 或多层线路层, 使得外层线路层 110或线路层 120成为多层线路板的内层 线路层。  Referring to FIG. 2C and FIG. 2D, the substrate 10 and the metal layer 122 are patterned to form the outer wiring layer 110 and the wiring layer 120, respectively. At this point, the circuit board 200 has been substantially completed. Further, the above-described patterning method is the same as that of the foregoing embodiment, that is, the method of patterning the substrate 10 and the metal layer 122 may be lithography etching. In addition, after the circuit board 200 is completed, one or more circuit layers may be additionally formed on the insulating layer 236 or the outer wiring layer 110 by the build-up method or the stacking method, so that the outer circuit layer 110 or the circuit layer 120 becomes the inner wiring layer of the multilayer wiring board.
图 2E是一种包括多个图 2D中高密度内连线板的第一线路母板的俯视 示意图, 而图 2F是一种包括多个图 2D中线路基板的第二线路母板的俯视 示意图。 请参阅图 2E与图 2F所示, 在本实施例中, 高密度内连线板 140 可以是切割一第一线路母板 40而形成, 而线路基板 (即基材 234 )可以是 切割一第二线路母板 34而形成。  2E is a top plan view of a first line mother board including a plurality of high density interconnect boards of FIG. 2D, and FIG. 2F is a top plan view of a second line mother board including a plurality of circuit boards of FIG. 2D. Referring to FIG. 2E and FIG. 2F, in the embodiment, the high-density interconnecting board 140 may be formed by cutting a first line mother board 40, and the circuit substrate (ie, the substrate 234) may be a cutting one. The second line mother board 34 is formed.
第一线路母板 40包括多个高密度内连线板 140,而第二线路母板 34包 括多个基材 234。 当第一线路母板 40与第二线路母板 34制造完成之后,对 第一线路母板 40与第二线路母板 34进行切割, 以得到多个高密度内连线 板 140与多个基材 234。 因此,利用第一线路母板 40与第二线路母板 34,有 利于大量制造高密度内连线板 140与基材 234。  The first line mother board 40 includes a plurality of high density interconnect boards 140 and the second line mother board 34 includes a plurality of substrates 234. After the first line mother board 40 and the second line mother board 34 are manufactured, the first line mother board 40 and the second line mother board 34 are cut to obtain a plurality of high density interconnect boards 140 and a plurality of bases. Material 234. Therefore, the use of the first wiring mother board 40 and the second wiring mother board 34 facilitates mass production of the high-density interconnecting board 140 and the substrate 234.
基于高密度内连线板 140的平均布线密度大于基材 234的平均布线密 度,以及高密度内连线板 140的层数大于基材 234的层数, 因此制造高密度 内连线板 140的所需时间会多于制t^材 234的所需时间, 所以高密度内 连线板 140需要花费很多时间来制造。  Since the average wiring density of the high-density interconnecting board 140 is larger than the average wiring density of the substrate 234, and the number of layers of the high-density interconnecting board 140 is larger than the number of layers of the substrate 234, the high-density interconnecting board 140 is manufactured. The time required will be longer than the time required to make the material 234, so the high density interconnector board 140 takes a lot of time to manufacture.
然而,高密度内连线板 140与基材 234二者可以从不同的线路母板(即 第一线路母板 40与第二线路母板 34 )切割而成, 而且第一线路母板 40与 第二线路母板 34二者可以在同一段时间内同时制造。 如此, 可以减少制造 线路板 200的所需时间, 使得线路板 200可以很快地制造完成。 综上所述, 本发明的线路板所包括的外层线路层能电性连接多种电子 元件, 其例如是芯片、 被动元件、 主动元件或敖机电系统元件, 因此本发 明的线路板可以供至少一个电子元件所装设, 以使电流可以传输至电子元 件,进而让电子装置(例如手机、 电脑或数码相机) 以及家电用品(例如电 视、 洗衣机或;水箱)运作。 However, both the high-density interconnector board 140 and the substrate 234 can be cut from different line mother boards (ie, the first line mother board 40 and the second line mother board 34), and the first line mother board 40 is Both of the second line mother boards 34 can be fabricated simultaneously for the same period of time. In this way, the time required to manufacture the wiring board 200 can be reduced, so that the circuit board 200 can be manufactured quickly. In summary, the outer circuit layer included in the circuit board of the present invention can electrically connect a plurality of electronic components, such as a chip, a passive component, an active component, or a germanium electromechanical system component, so that the circuit board of the present invention can be provided. At least one electronic component is mounted so that current can be transmitted to the electronic component, thereby allowing an electronic device (such as a cell phone, a computer or a digital camera) and household appliances (such as a television, a washing machine, or a water tank) to operate.
其次, 在本发明的线路板中, 主体层内埋高密度内连线板, 而且高密 度内连线板的平均布线密度与层数皆可大于主体层中的线路基板 (即基材 Secondly, in the circuit board of the present invention, the high-density interconnecting board is buried in the main body layer, and the average wiring density and the number of layers of the high-density interconnecting board are larger than the wiring substrate in the main body layer (ie, the substrate)
234 )的平均布线密度与层数, 因而能在线路板的某一区域中形成分布较为 密集且层数较多的布线; 在线路板的另一区域中形成分布较为稀疏且层数 较少的布线。 如此, 可以减少线路板的整体层数以及整体厚度, 并且能简 化线路板的布线设计。 234) the average wiring density and the number of layers, so that a densely distributed and a large number of layers can be formed in a certain area of the wiring board; in another area of the wiring board, a thin distribution and a small number of layers are formed. wiring. Thus, the overall number of layers of the board and the overall thickness can be reduced, and the wiring design of the board can be simplified.
以上所述, 仅是本发明的实施例而已, 并非对本发明作任何形式上的 限制, 虽然本发明已以实施例揭露如上, 然而并非用以限定本发明,任何熟 悉本专业的技术人员,在不脱离本发明技术方案范围内, 当可利用上述揭示 的方法及技术内容作出些许的更动或修饰为等同变化的等效实施例, 但凡 是未脱离本发明技术方案的内容, 依据本发明的技术实质对以上实施例所 作的任何简单修改、 等同变化与修饰, 均仍属于本发明技术方案的范围内。  The above is only the embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any skilled person in the art Without departing from the spirit and scope of the invention, the invention may be modified or modified to the equivalents of the equivalents. It is still within the scope of the technical solution of the present invention to make any simple modifications, equivalent changes and modifications to the above embodiments.

Claims

权 利 要 求 Rights request
1、 一种线路板, 其特征在于其包括: A circuit board characterized in that it comprises:
一外层线路层;  An outer circuit layer;
一线路层;  a circuit layer
一主体层, 配置在该外层线路层与该线路层之间;  a body layer disposed between the outer circuit layer and the circuit layer;
一高密度内连线板, 内埋在该主体层中; 以及  a high density interconnecting board embedded in the body layer;
至少一第一导电柱, 配置在该主体层中, 并且连接于该高密度内连线 板与该外层线路层之间, 其中所述的主体层包括一粘合层以及一绝缘层,该 粘合层粘合于该高密度内连线板与该外层线路层之间,而该第一导电柱穿过 该粘合层,该绝缘层覆盖该高密度内连线板,而该线路层配置在该绝缘层上, 并且接触该绝缘层。  At least one first conductive pillar disposed in the body layer and connected between the high density interconnecting board and the outer wiring layer, wherein the body layer comprises an adhesive layer and an insulating layer, An adhesive layer is bonded between the high-density interconnecting board and the outer wiring layer, and the first conductive pillar passes through the adhesive layer, the insulating layer covers the high-density interconnecting board, and the line A layer is disposed on the insulating layer and contacts the insulating layer.
2、 根据权利要求 1所述的线路板, 其特征在于其中所述的粘合层全面 性覆盖该外层线路层。  The wiring board according to claim 1, wherein said adhesive layer comprehensively covers said outer wiring layer.
3、 根据权利要求 1所述的线路板, 其特征在于其中所述的粘合层局部 覆盖该外层线路层。  3. The wiring board according to claim 1, wherein said adhesive layer partially covers said outer wiring layer.
4、 根据权利要求 2或 3所述的线路板, 其特征在于其中所述的主体层 更包括一位在该外层线路层与该绝缘层之间的基材, 该基材围绕该高密度 内连线板。  The circuit board according to claim 2 or 3, wherein said main body layer further comprises a substrate between said outer circuit layer and said insulating layer, said substrate surrounding said high density Inner wiring board.
5、 根据权利要求 1所述的线路板, 其特征在于其中所述的主体层更包 括一位在该外层线路层与该绝缘层之间的基材, 该基材围绕该高密度内连 线板。  5. The circuit board according to claim 1, wherein said main body layer further comprises a substrate between said outer circuit layer and said insulating layer, said substrate surrounding said high density interconnect Wire board.
6、 根据权利要求 5所述的线路板, 其特征在于更包括至少一穿过该绝 缘层的第二导电柱, 该第二导电柱连接于该高密度内连线板与该线路层之 间,而该基材为一半固化胶片。  6. The wiring board according to claim 5, further comprising at least one second conductive pillar passing through the insulating layer, the second conductive pillar being connected between the high density interconnecting board and the wiring layer And the substrate is a half cured film.
7、 根据权利要求 5所述的线路板, 其特征在于更包括至少一穿过该绝 缘层的第二导电柱, 该基材为一线路基板, 而该第二导电柱连接于该线路 基板与该线路层之间。  The circuit board according to claim 5, further comprising at least one second conductive pillar passing through the insulating layer, the substrate is a circuit substrate, and the second conductive pillar is connected to the circuit substrate Between the circuit layers.
8、 根据权利要求 7所述的线路板, 其特征在于其中所述的主体层更包 括一半固化胶片, 该半固化胶片配置在该基材与该外层线路层之间。  8. The wiring board according to claim 7, wherein said main body layer further comprises a half-cured film disposed between said substrate and said outer circuit layer.
9、 根据权利要求 7所述的线路板, 其特征在于其中所述的高密度内连 线板与该外层线路层之间的距离小于该高密度内连线板与线路层之间的距 离。  9. The wiring board according to claim 7, wherein a distance between said high density interconnecting board and said outer wiring layer is smaller than a distance between said high density interconnecting board and said wiring layer. .
10、 根据权利要求 7所述的线路板, 其特征在于其中所述的高密度内 连线板的层数大于或等于该线路基板的层数, 而该高密度内连线板的平均 布线密度大于或等于该线路基板的平均布线密度。 The circuit board according to claim 7, wherein the number of layers of the high-density interconnecting board is greater than or equal to the number of layers of the circuit substrate, and the average wiring density of the high-density interconnecting board Greater than or equal to the average wiring density of the circuit substrate.
11、 根据权利要求 1、 8或 9所述的线路板, 其特征在于更包括一高密 度内连线子板, 该高密度内连线子板内埋于该高密度内连线板中。 The circuit board according to claim 1, 8 or 9, further comprising a high density interconnecting sub-board embedded in the high-density interconnecting board.
12、 根据权利要求 11所述的线路板, 其特征在于其中所述的高密度内 连线子板的层数大于或等于该高密度内连线板的层数, 而该高密度内连线 子板的平均布线密度大于或等于该高密度内连线板的平均布线密度。  The circuit board according to claim 11, wherein the number of layers of the high-density interconnecting sub-board is greater than or equal to the number of layers of the high-density interconnecting board, and the high-density interconnecting line The average wiring density of the daughter boards is greater than or equal to the average wiring density of the high density interconnect boards.
13、 根据权利要求 1 所述的线路板, 其特征在于其中所述的第一导电 柱从该外层线路层延伸至该高密度内连线板的内部。  13. The circuit board of claim 1 wherein said first conductive post extends from said outer circuit layer to the interior of said high density interconnect.
14、 一种线路板的制造方法, 其特征在于其包括以下步骤:  14. A method of manufacturing a circuit board, characterized in that it comprises the following steps:
在一基板上形成至少一贯孔;  Forming at least a consistent hole on a substrate;
在形成该贯孔之后, 将一高密度内连线板固定在该基板上, 其中该高 密度内连线板遮盖该贯孔;  After forming the through hole, a high-density interconnecting board is fixed on the substrate, wherein the high-density interconnecting board covers the through hole;
在该基板上形成一主体层, 其中该主体层包覆该高密度内连线板; 在该主体层上形成一金属层;  Forming a body layer on the substrate, wherein the body layer covers the high-density interconnecting plate; forming a metal layer on the body layer;
在形成该主体层之后, 形成至少一连接于该高密度内连线板与该基板 之间的第一导电柱; 以及  After forming the body layer, forming at least one first conductive pillar connected between the high density interconnecting board and the substrate;
在形成该第一导电柱之后, 图案化该基板与该金属层, 以分别形成一 外层线路层以及一线路层; 其中将该高密度内连线板固定在该基板上的方 法以及形成该主体层的方法包括:  After forming the first conductive pillar, patterning the substrate and the metal layer to form an outer wiring layer and a wiring layer, respectively; wherein the high density interconnecting board is fixed on the substrate and forming the same The method of the main layer includes:
在该基板上涂布或贴合一粘合层;  Coating or laminating an adhesive layer on the substrate;
将该高密度内连线板粘合在该粘合层上; 以及  Bonding the high density interconnector board to the adhesive layer;
在该基板上以及在该高密度内连线板上形成一绝缘层, 其中该绝缘层 覆盖该高密度内连线板。  An insulating layer is formed on the substrate and on the high density interconnecting board, wherein the insulating layer covers the high density interconnecting board.
15、 根据权利要求 14所述的线路板的制造方法, 其特征在于其中所述 的粘合层填满该贯孔, 而形成该第一导电柱的方法包括:  The method of manufacturing a circuit board according to claim 14, wherein the adhesive layer fills the through hole, and the method of forming the first conductive column comprises:
移除该贯孔内的部分该粘合层; 以及  Removing a portion of the adhesive layer within the through hole;
在移除部分该粘合层之后以及在图案化该基板之前, 对该贯孔进行通 孔电镀。  The through holes are subjected to through plating after removing a portion of the adhesive layer and before patterning the substrate.
16、 根据权利要求 14所述的线路板的制造方法, 其特征在于其中形成 该主体层的方法更包括:  The method of manufacturing a circuit board according to claim 14, wherein the method of forming the body layer further comprises:
在该高密度内连线板粘合在该粘合层上之后, 在该绝缘层与该基板之 间配置一基材, 其中该基材具有一开口, 而该高密度内连线板位在该开口 内。  After the high-density interconnecting board is bonded to the adhesive layer, a substrate is disposed between the insulating layer and the substrate, wherein the substrate has an opening, and the high-density interconnecting board is located at Inside the opening.
17、 根据权利要求 16所述的线路板的制造方法, 其特征在于在形成该 主体层之后, 更包括形成至少一连接在该高密度内连线板与该金属层之间 的第二导电柱, 其中该基材为一半固化胶片。  The method of manufacturing a circuit board according to claim 16, further comprising forming at least one second conductive pillar connected between the high-density interconnecting board and the metal layer after forming the main body layer. Wherein the substrate is a half cured film.
18、 根据权利要求 16所述的线路板的制造方法, 其特征在于其中形成 该主体层的方法更包括在该基材与该基板之间配置一半固化胶片。 A method of manufacturing a wiring board according to claim 16, wherein the method is formed The method of the bulk layer further includes disposing a half cured film between the substrate and the substrate.
19、 根据权利要求 16所述的线路板的制造方法, 其特征在于其中所述 的基材为一线路基板, 在形成该主体层之后, 更包括形成至少一连接在该 线路基板与该金属层之间的第二导电柱。  The method of manufacturing a circuit board according to claim 16, wherein the substrate is a circuit substrate, and after forming the body layer, further comprising forming at least one of the circuit substrate and the metal layer. A second conductive column between.
20、 根据权利要求 19所述的线路板的制造方法, 其特征在于其中所述 的高密度内连线板是切割一第一线路母板而形成, 该线路基板是切割一第 二线路母板而形成, 该第一线路母板包括多个该高密度内连线板, 而该第 二线路母板包括多个该线路基板。  The method of manufacturing a circuit board according to claim 19, wherein said high-density interconnecting board is formed by cutting a first line mother board, and wherein said circuit board is cut by a second line mother board. Forming, the first line mother board includes a plurality of the high density interconnect boards, and the second line mother board includes a plurality of the circuit boards.
21、 根据权利要求 14所述的线路板的制造方法, 其特征在于其中所述 的高密度内连线板具有至少一接垫, 该接垫遮盖该贯孔。  The method of manufacturing a circuit board according to claim 14, wherein said high-density interconnecting board has at least one pad, and said pad covers said through hole.
22、 根据权利要求 14所述的线路板的制造方法, 其特征在于其中所述 的高密度内连线板具有一内层线路层, 该第一导电柱连接于该内层线路层。  A method of manufacturing a wiring board according to claim 14, wherein said high-density interconnecting wiring board has an inner wiring layer, and said first conductive pillar is connected to said inner wiring layer.
PCT/CN2010/001116 2010-07-23 2010-07-23 Wiring board and manufacturing method thereof WO2012009831A1 (en)

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