CN101784156A - Circuit board and preparation method thereof - Google Patents
Circuit board and preparation method thereof Download PDFInfo
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- CN101784156A CN101784156A CN200910002689A CN200910002689A CN101784156A CN 101784156 A CN101784156 A CN 101784156A CN 200910002689 A CN200910002689 A CN 200910002689A CN 200910002689 A CN200910002689 A CN 200910002689A CN 101784156 A CN101784156 A CN 101784156A
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Abstract
The invention discloses a circuit board with a groove, which comprises a first core layer, a second core layer and a central dielectric layer, wherein the first core layer comprises a core dielectric layer and a core circuit layer; the core circuit layer is configured on the core dielectric layer; the second core layer is configured on the first core layer; the central dielectric layer is configured between the first and second core layers; and the groove runs through the second core layer and the central dielectric layer and exposes a part of the core circuit layer.
Description
Technical field
The invention relates to a kind of wiring board and preparation method thereof, and particularly relevant for a kind of wiring board with groove and preparation method thereof.
Background technology
Because there is demand compact and easy to carry in market for electronic product, so the package thickness of electronic component in the electronic product and wiring board will develop towards the direction of slimming.
Known technology is by forming a groove in the circuit board and electronic component (as chip-packaging structure) is disposed in the groove, reducing the package thickness of electronic component and wiring board.Fig. 1 illustrates the profile of known wiring board.Please refer to Fig. 1, line construction 120 and line construction 130 that wiring board 100 has a core layer 110 and is disposed at the both sides up and down of core layer 110 respectively, wherein core layer 110 has a core dielectric layer 112 and the two line layers 114,116 that is disposed at the both sides up and down of core dielectric layer 112 respectively.Recess R 1 runs through line construction 120 and core dielectric layer 112 and exposes line layer 116.
Increase layer because the technology of known wiring board 100 is the both sides up and down from core layer 110, to form line construction 120 and line construction 130, then, the line construction 120 that removes part and the core dielectric layer 112 of part are to expose line layer 116.Therefore, line layer 116 is embedded in the dielectric layer 132 of line construction 130 in being.
Summary of the invention
The invention provides a kind of wiring board, have two core layers of mutual storehouse.
The invention provides a kind of manufacture method of wiring board, can make a wiring board with two core layers of mutual storehouse.
The present invention proposes a kind of wiring board, and it has a groove, and wiring board comprises one first core layer, one second core layer and a central dielectric layer.First core layer comprises a core dielectric layer and a core line layer, and the core line layer is disposed on the core dielectric layer.Second core layer is disposed on first core layer.Central authorities' dielectric layer is disposed between first core layer and second core layer.Groove runs through second core layer and central dielectric layer and exposes part core line layer.
In one embodiment of this invention, the core line layer protrudes in the surface of core dielectric layer.
In one embodiment of this invention, wiring board also comprises one first line construction and one second line construction.First line construction is disposed at the side away from central dielectric layer of first core layer.Second line construction is disposed at the side away from central dielectric layer of second core layer, and groove runs through second line construction.
In one embodiment of this invention, first line construction comprises one first dielectric layer and one first line layer, and first dielectric layer is disposed on first core layer, and first line layer is disposed on first dielectric layer.
In one embodiment of this invention, second line construction comprises one second dielectric layer and one second line layer, and second dielectric layer is disposed on second core layer, and second line layer is disposed on second dielectric layer.
In one embodiment of this invention, the core line layer has a laser barrier pattern, the laser barrier pattern be positioned at the core dielectric layer by on the edge of the part that groove exposed.
In one embodiment of this invention, central dielectric layer covers the laser barrier pattern of a part, and groove exposes the laser barrier pattern of another part.
It is as described below that the present invention proposes a kind of manufacture method of wiring board.At first, provide one first core layer, one second core material layer and a center dielectric materials layer.First core layer comprises a core dielectric layer and a core line layer, the core line layer is disposed on the core dielectric layer, and the core line layer is a non-embedded line layer, the second core material layer is disposed on first core layer, and the center dielectric materials layer is disposed between first core layer and the second core material layer.Then, pressing first core layer, the second core material layer and center dielectric materials layer, to form a composite line structure, the composite line structure has one and removes the district in advance, and is positioned to small part core-wire road floor and removes the district in advance.Then, remove the part that removes area edge in advance that is positioned at of the part that being positioned at of center dielectric materials layer remove area edge in advance and the second core material layer.Afterwards, remove part and being positioned at of the second core material floor that being positioned at of center dielectric materials layer remove the district in advance and remove the part of distinguishing in advance, to form a central dielectric layer and one second core layer.
In one embodiment of this invention, when pressing first core layer, the second core material layer and center dielectric materials layer, also comprise following technology.At first, on pressing one first dielectric materials layer and one first conductive layer to the first core layer, wherein first dielectric materials layer is between first core layer and first conductive layer, and on pressing one second dielectric materials layer and one second conductive layer to the second core layer, wherein second dielectric materials layer is between second core layer and second conductive layer.Then, patterning first conductive layer and second conductive layer are to form one first line layer and one second line layer.
In one embodiment of this invention, the manufacture method of wiring board also be included in remove the part that being positioned at of center dielectric materials layer remove area edge in advance and the second core material layer be positioned at the part that removes area edge in advance the time, remove the part that removes area edge in advance that is positioned at of second dielectric materials layer, and when removing being positioned at of center dielectric materials layer and remove being positioned at of the part in district and the second core material floor in advance and remove the part of distinguishing in advance, remove the part that being positioned at of second dielectric materials layer removes the district in advance, to form one second dielectric layer.
In one embodiment of this invention, remove the part that being positioned at of center dielectric materials layer remove area edge in advance and the method that is positioned at the part that removes area edge in advance of the second core material layer and comprise laser-induced thermal etching.
In one embodiment of this invention, the core line layer has a laser barrier pattern, and the laser barrier pattern is positioned at and removes area edge in advance.
In one embodiment of this invention, remove that being positioned at of center dielectric materials layer removes the part in district in advance and the method that removes the part of distinguishing in advance that is positioned at of the second core material floor comprises the method for divesting.
In one embodiment of this invention, first core layer also comprises a protective layer, and it covers the part that being positioned at of core line layer removes the district in advance.
In one embodiment of this invention, the manufacture method of wiring board also is included in and removes part and being positioned at of the second core material floor that being positioned at of center dielectric materials layer remove the district in advance and remove in advance after the part of distinguishing, and removes protective layer.
The present invention proposes a kind of wiring board and has a groove, wiring board comprises a multilayer core texture, the multilayer core texture comprises alternately a plurality of core layers and a plurality of central dielectric layer of storehouse, the part core layer that groove runs through the multilayer core texture with to small part central authorities dielectric layer, and one of them is positioned at the bottom of groove core layer, and groove exposes a core line layer of the core layer that is positioned at bottom portion of groove.
In one embodiment of this invention, wiring board also comprises one first line construction and one second line construction.First line construction is disposed at one first side of multilayer core texture.Second line construction is disposed at one second side of multilayer core texture, and wherein first side is with respect to second side, and groove runs through second line construction.
Based on above-mentioned, because wiring board of the present invention has alternately a plurality of core layers and a plurality of central dielectric layer of storehouse, therefore, when groove runs through the number of plies over half of total dielectric number of plies, groove can run through the part core layer with to small part central authorities' dielectric layer and expose the core line layer of the core layer that is positioned at bottom portion of groove.
Description of drawings
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and conjunction with figs. is described in detail below, wherein:
Fig. 1 illustrates the profile of known wiring board.
Fig. 2 A is the profile of the wiring board of one embodiment of the invention.
Fig. 2 B is a kind of variation of the wiring board of Fig. 2 A.
Fig. 3 A～Fig. 3 E is the process section of the wiring board of one embodiment of the invention.
Embodiment
Fig. 2 A is the profile of the wiring board of one embodiment of the invention, and Fig. 2 B is a kind of variation of the wiring board of Fig. 2 A.Please refer to Fig. 2 A, the wiring board 200 of present embodiment has a recess R, and wiring board 200 comprises one first core layer 210, one second core layer, 220, one central dielectric layer 230, one first line construction 240 and one second line construction 250.
The recess R of wiring board 200 runs through second core layer 220, central dielectric layer 230 and second line construction 250 and exposes part core line layer 214.It should be noted that, in the present embodiment, total dielectric number of plies (comprising core dielectric layer 212 and dielectric layer 242,246) of not running through greater than recess R of total dielectric number of plies of running through of recess R (comprising central dielectric layer 230, core dielectric layer 222 and dielectric layer 252,256).In other words, recess R can run through the number of plies over half of (wiring board 200) total dielectric number of plies.Certainly, in the embodiment that other does not illustrate, recess R can run through half following number of plies of total dielectric number of plies.Because the wiring board 200 of present embodiment has first and second core layer 210,220 of mutual storehouse, therefore, when recess R ran through the number of plies over half of total dielectric number of plies, recess R can run through second core layer 220 and expose the core line layer 214 of first core layer 210.
It should be noted that, in the present embodiment, do not limit the number of core layer, in other words, the number of core layer also can be more than three or three, groove can run through the part core layer and to small part central authorities dielectric layer, one of them is positioned at the bottom of groove these core layers, and groove exposes a core line layer of the core layer that is positioned at bottom portion of groove.For instance, please refer to Fig. 2 B, the wiring board 200a of present embodiment comprises a multilayer core texture M, and multilayer core texture M has one first core layer 210, one second core layer 220, one the 3rd core layer 270, be disposed at the central dielectric layer 230 between first and second core layer 210,220 and be disposed at a central dielectric layer 280 between the second and the 3rd core layer 220,270.Recess R runs through the second and the 3rd core layer 220,270 and central dielectric layer 230,280 and exposes a core line layer 214 of first core layer 210 of the bottom that is positioned at recess R.It should be noted that present embodiment is not that in other words, recess R also can only run through the 3rd core layer 270 in order to the core number of plies that is run through by recess R that limits multilayer core texture M and the core number of plies that is not run through by recess R.
Please referring again to Fig. 2 A, in the present embodiment, core line layer 214 has a laser barrier pattern 214a, and laser barrier pattern 214a is positioned at the edge of the core dielectric layer 212 that recess R exposes.Central authorities' dielectric layer 230 can cover the laser barrier pattern 214a of a part, and recess R can expose the laser barrier pattern 214a of another part.In addition, in the present embodiment, can on first line construction 240, second line construction 250 and first core layer 210, form a welding cover layer 260 respectively, to cover and protection line layer 248,258 and core line layer 214 partly.
Below will introduce wherein a kind of manufacture method of the wiring board 200 of present embodiment in detail.
Fig. 3 A～Fig. 3 E is the process section of the wiring board of one embodiment of the invention.
At first, please refer to Fig. 3 A, one first core layer 210, one second core material layer 220a, a center dielectric materials layer 230a, a dielectric layer 242, a conductive layer 244a, a dielectric materials layer 252a and a conductive layer 254a are provided.
The structure of first core layer 210 is identical with first core layer 210 of Fig. 2 A.The second core material layer 220a is disposed on first core layer 210, and center dielectric materials layer 230a is disposed between first core layer 210 and the second core material layer 220a.Dielectric layer 242 is disposed at the side away from center dielectric materials layer 230a of first core layer 210, and between first core layer 210 and conductive layer 244a.Dielectric materials layer 252a is disposed at the side away from center dielectric materials layer 230a of the second core material layer 220a, and between the conductive layer 254a and the second core material layer 220a.
Then, please refer to Fig. 3 B, pressing first core layer 210, the second core material layer 220a, center dielectric materials layer 230a, dielectric layer 242, conductive layer 244a, dielectric materials layer 252a and conductive layer 254a, to form a composite line structure C, the composite line structure C have one remove in advance the district P, and part core line layer 214 be positioned at remove in advance the district P.Afterwards, can distinguish patterned conductive layer 244a and conductive layer 254a, forming a line layer 244 and a line layer 254, and form a plurality of conductive channel V1, V2, so that line layer 244 is electrically connected to first core layer 210 and the second core material layer 220a respectively with line layer 254.
Afterwards, please refer to Fig. 3 C, can form the mode of dielectric layer 242, line layer 244, dielectric materials layer 252a and line layer 254, optionally on dielectric layer 242, form a dielectric layer 246 and a line layer 248, and go up formation one a dielectric materials layer 256a and a line layer 258 in dielectric materials layer 252a.
Then, please refer to Fig. 3 D, for example be that mode with laser-induced thermal etching removes center dielectric materials layer 230a, the second core material floor 220a, dielectric materials layer 252a, the 256a that is positioned at the edge that removes district P in advance, run through the slit G of previous materials layer 230a, 220a, 252a, 256a with formation.In the present embodiment, core line layer 214 can have one and be positioned at the laser barrier pattern 214a that removes P edge, district in advance, with the destruction of protecting core dielectric layer 212 to avoid suffering laser-induced thermal etching.In addition, first core layer 210 can have a protective layer A, and it covers the part that being positioned at of core line layer 214 removes district P in advance, to protect core line layer 214 in the technology in follow-up removing.In addition, protective layer A can be a release layer, and it can help to remove to be positioned at desires to remove the center dielectric materials layer 230a that distinguishes P.
Afterwards, please refer to Fig. 3 E, with for example divest method remove be positioned at remove in advance the district P center dielectric materials layer 230a, the second core material floor 220a and dielectric materials layer 252a, 256a, to form a central dielectric layer 230, one second core layer 220, dielectric layer 252,256 and a recess R.Dielectric layer 252,256 and line layer 254,258 constitute one second line construction 250, and recess R runs through second line construction 250, second core layer 220 and central dielectric layer 230.Then, remove protective layer A.In other embodiments, can remove protective layer A simultaneously and be positioned at center dielectric materials layer 230a, the second core material floor 220a and dielectric materials layer 252a, the 256a that removes district P in advance.Then, in the present embodiment, can on first line construction 240, second line construction 250 and first core layer 210, form a welding cover layer 260 respectively, to cover and protection line layer 248,258 and core line layer 214 partly.
In sum, because wiring board of the present invention has alternately a plurality of core layers and a plurality of central dielectric layer of storehouse, therefore, when groove runs through the number of plies over half of total dielectric number of plies, groove can run through the part core layer with to small part central authorities' dielectric layer and expose the core line layer of the core layer that is positioned at bottom portion of groove.
Though the present invention discloses as above with embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is when looking being as the criterion that the claim scope defined.
Claims (16)
1. a wiring board has a groove, and this wiring board comprises:
One first core layer comprises a core dielectric layer and a core line layer, and this core line layer is disposed on this core dielectric layer;
One second core layer is disposed on this first core layer; And
One central dielectric layer is disposed between this first core layer and this second core layer, and wherein this groove runs through this second core layer and this central authorities' dielectric layer and exposes this core line layer of part.
2. wiring board as claimed in claim 1 also comprises:
One first line construction is disposed at the side away from this central authorities' dielectric layer of this first core layer; And
One second line construction be disposed at the side away from this central authorities' dielectric layer of this second core layer, and this groove runs through this second line construction.
3. wiring board as claimed in claim 2, wherein this first line construction comprises:
One first dielectric layer is disposed on this first core layer; And
One first line layer is disposed on this first dielectric layer.
4. wiring board as claimed in claim 2, wherein this second line construction comprises:
One second dielectric layer is disposed on this second core layer; And
One second line layer is disposed on this second dielectric layer.
5. wiring board as claimed in claim 1, wherein this core line layer has a laser barrier pattern, this laser barrier pattern be positioned at this core dielectric layer by on the edge of the part that this groove exposed.
6. wiring board as claimed in claim 5 wherein should cover this a part of laser barrier pattern by central authorities' dielectric layer, and this groove exposes this laser barrier pattern of another part.
7. the manufacture method of a wiring board comprises:
One first core layer, one second core material layer and a center dielectric materials layer are provided, this first core layer comprises a core dielectric layer and a core line layer, this core line layer is disposed on this core dielectric layer, this second core material layer is disposed on this first core layer, and this center dielectric materials layer is disposed between this first core layer and this second core material layer;
This first core layer of pressing, this second core material layer and this center dielectric materials layer, to form a composite line structure, this composite line structure has one and removes the district in advance, and is positioned at this to this core line layer of small part and removes the district in advance;
Remove the part that this removes area edge in advance that is positioned at that is positioned at this part that removes area edge in advance and this second core material layer of this center dielectric materials layer; And
Remove the part that this removes the district in advance that is positioned at that is positioned at this part that removes the district in advance and this second core material floor of this center dielectric materials layer, to form a central dielectric layer and one second core layer.
8. the manufacture method of wiring board as claimed in claim 7 wherein when this first core layer of pressing, this second core material layer and this center dielectric materials layer, also comprises:
Pressing one first dielectric materials layer and one first conductive layer are to this first core layer, and wherein this first dielectric materials layer is between this first core layer and this first conductive layer;
Pressing one second dielectric materials layer and one second conductive layer are to this second core layer, and wherein this second dielectric materials layer is between this second core layer and this second conductive layer; And
This first conductive layer of patterning and this second conductive layer are to form one first line layer and one second line layer.
9. the manufacture method of wiring board as claimed in claim 8 also comprises:
Remove this center dielectric materials layer be positioned at this part that removes area edge in advance and this second core material layer be positioned at this part that removes area edge in advance the time, remove the part that this removes area edge in advance that is positioned at of this second dielectric materials layer; And
Remove this center dielectric materials layer be positioned at this part that removes the district in advance and this second core material floor be positioned at this part that removes the district in advance the time, remove being positioned at this and removing the part of distinguishing in advance of this second dielectric materials layer, to form one second dielectric layer.
10. the manufacture method of wiring board as claimed in claim 7, this method that removes the part of area edge in advance that is positioned at that is positioned at this part that removes area edge in advance and this second core material layer that wherein removes this center dielectric materials layer comprises laser-induced thermal etching.
11. the manufacture method of wiring board as claimed in claim 10, wherein this core line layer has a laser barrier pattern, and this laser barrier pattern is positioned at this and removes area edge in advance.
12. the manufacture method of wiring board as claimed in claim 7, this method that removes the part in district in advance that is positioned at that is positioned at this part that removes the district in advance and this second core material floor that wherein removes this center dielectric materials layer comprises the method for divesting.
13. the manufacture method of wiring board as claimed in claim 7, wherein this first core layer also comprises:
One protective layer, cover this core line layer be positioned at this remove in advance the district part.
14. the manufacture method of wiring board as claimed in claim 13 also comprises:
Remove this center dielectric materials layer be positioned at this part that removes the district in advance and this second core material floor be positioned at this to remove part of distinguishing in advance in or afterwards, remove this protective layer.
15. wiring board, has a groove, this wiring board comprises a multilayer core texture, this multilayer core texture comprises alternately a plurality of core layers and a plurality of central dielectric layer of storehouse, this groove run through the described core layer of part of this multilayer core texture with to the described central dielectric layer of small part, and one of them is positioned at the bottom of this groove described core layer, and this groove exposes a core line layer of this core layer that is positioned at this bottom portion of groove.
16. wiring board as claimed in claim 15 also comprises:
One first line construction is disposed at one first side of this multilayer core texture; And
, second line construction is disposed at one second side of this multilayer core texture, and wherein this first side is with respect to this second side, and this groove runs through this second line construction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910002689A CN101784156B (en) | 2009-01-19 | 2009-01-19 | Circuit board and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910002689A CN101784156B (en) | 2009-01-19 | 2009-01-19 | Circuit board and preparation method thereof |
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| Publication Number | Publication Date |
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| CN101784156A true CN101784156A (en) | 2010-07-21 |
| CN101784156B CN101784156B (en) | 2012-10-17 |
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| CN200910002689A Active CN101784156B (en) | 2009-01-19 | 2009-01-19 | Circuit board and preparation method thereof |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012009831A1 (en) * | 2010-07-23 | 2012-01-26 | 欣兴电子股份有限公司 | Wiring board and manufacturing method thereof |
| CN103227164A (en) * | 2013-03-21 | 2013-07-31 | 日月光半导体制造股份有限公司 | Semiconductor package structure and manufacturing method thereof |
| CN103458628A (en) * | 2012-05-30 | 2013-12-18 | 富葵精密组件(深圳)有限公司 | Multi-layer circuit board and manufacturing method thereof |
| CN104106318A (en) * | 2011-12-05 | 2014-10-15 | At&S奥地利科技与系统技术股份公司 | Method for the production of a circuit board involving the removal of a subregion thereof, and use of such a method |
| CN104377187A (en) * | 2013-08-16 | 2015-02-25 | 宏启胜精密电子(秦皇岛)有限公司 | IC carrier plate, semiconductor device provided with same and manufacturing method of semiconductor device |
| TWI621382B (en) * | 2016-01-06 | 2018-04-11 | 欣興電子股份有限公司 | Circuit board and manufacturing method thereof |
| CN108323002A (en) * | 2017-01-16 | 2018-07-24 | 中兴通讯股份有限公司 | A kind of printed circuit board and method |
| CN114025484A (en) * | 2021-09-24 | 2022-02-08 | 安捷利美维电子(厦门)有限责任公司 | Method for manufacturing substrate with cross-core board layer groove |
| CN114040572A (en) * | 2021-09-24 | 2022-02-11 | 安捷利美维电子(厦门)有限责任公司 | Manufacturing method of cross-core board layer groove substrate |
| CN116581091A (en) * | 2023-07-13 | 2023-08-11 | 芯爱科技(南京)有限公司 | Electronic package and method for manufacturing the same |
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2009
- 2009-01-19 CN CN200910002689A patent/CN101784156B/en active Active
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012009831A1 (en) * | 2010-07-23 | 2012-01-26 | 欣兴电子股份有限公司 | Wiring board and manufacturing method thereof |
| CN104106318A (en) * | 2011-12-05 | 2014-10-15 | At&S奥地利科技与系统技术股份公司 | Method for the production of a circuit board involving the removal of a subregion thereof, and use of such a method |
| CN103458628A (en) * | 2012-05-30 | 2013-12-18 | 富葵精密组件(深圳)有限公司 | Multi-layer circuit board and manufacturing method thereof |
| CN103458628B (en) * | 2012-05-30 | 2016-06-01 | 富葵精密组件(深圳)有限公司 | Multilayer circuit board and making method thereof |
| CN103227164A (en) * | 2013-03-21 | 2013-07-31 | 日月光半导体制造股份有限公司 | Semiconductor package structure and manufacturing method thereof |
| CN104377187A (en) * | 2013-08-16 | 2015-02-25 | 宏启胜精密电子(秦皇岛)有限公司 | IC carrier plate, semiconductor device provided with same and manufacturing method of semiconductor device |
| TWI621382B (en) * | 2016-01-06 | 2018-04-11 | 欣興電子股份有限公司 | Circuit board and manufacturing method thereof |
| CN108323002A (en) * | 2017-01-16 | 2018-07-24 | 中兴通讯股份有限公司 | A kind of printed circuit board and method |
| CN114025484A (en) * | 2021-09-24 | 2022-02-08 | 安捷利美维电子(厦门)有限责任公司 | Method for manufacturing substrate with cross-core board layer groove |
| CN114040572A (en) * | 2021-09-24 | 2022-02-11 | 安捷利美维电子(厦门)有限责任公司 | Manufacturing method of cross-core board layer groove substrate |
| CN116581091A (en) * | 2023-07-13 | 2023-08-11 | 芯爱科技(南京)有限公司 | Electronic package and method for manufacturing the same |
| CN116581091B (en) * | 2023-07-13 | 2024-01-12 | 芯爱科技(南京)有限公司 | Electronic package and method for manufacturing the same |
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| Publication number | Publication date |
|---|---|
| CN101784156B (en) | 2012-10-17 |
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