CN102623115A - Chip resistor and its manufacturing method - Google Patents
Chip resistor and its manufacturing method Download PDFInfo
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- CN102623115A CN102623115A CN2011100354534A CN201110035453A CN102623115A CN 102623115 A CN102623115 A CN 102623115A CN 2011100354534 A CN2011100354534 A CN 2011100354534A CN 201110035453 A CN201110035453 A CN 201110035453A CN 102623115 A CN102623115 A CN 102623115A
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Abstract
The present invention relates to a chip resistor and its manufacturing method, the manufacturing method comprises the following steps: a) providing a substrate and a resistor layer; b) combining the resistor layer to the substrate; c) forming a first metal layer; d) forming a plurality of through-holes; e) forming a connection metal layer in the through-holes for electrically connecting with the resistor layer and the first metal layer; f) patterning the resistor layer to form a plurality of first resistor bodies; g) forming a plurality of the first protective layers to protect the first resistor bodies; and h) carrying out a monomer manufacturing method along a plurality of cutting lines to form a plurality of chip resistors. Therefore, the alignment problem can not generate and the yield can be enhanced.
Description
Technical field
The present invention relates to a kind of chip resister and manufacturing approach thereof, in detail, relate to a kind of have low-resistance chip resister and manufacturing approach thereof.
Background technology
Chip resister is that a kind of weldering is bonded at the passive device on the laminated circuit board in the electronic installation, is used to provide resistance value.Existing chip resister comprises a substrate, two positive electrodes, two back electrodes, a resistive layer and two lateral electrodes at least.
The manufacturing approach that should have chip resister now is following.At first, a substrate is provided, this substrate is to constitute with insulating material, is generally ceramic substrate, and has many broken lines that depict in advance.Then, form the front of a plurality of positive electrodes, and form the back side of a plurality of back electrodes in this substrate in this substrate.Then, form the front of a resistive layer, and in the zone between these positive electrodes, wherein this resistive layer has predetermined resistance value in substrate.Then, along these broken lines this substrate that fractures, to form a plurality of monomers.Afterwards, form two sides of two lateral electrodes respectively, to electrically connect this positive electrode and this back electrode respectively in this monomer.
The shortcoming of being somebody's turn to do the manufacturing approach that has chip resister now is following.Along with this electronic installation is accurate day by day, the size of this existing chip resister also must be dwindled thereupon.When the dimension shrinks of this existing chip resister arrived to a certain degree, these positive electrodes, these back electrodes and this resistive layer were difficult to be formed on exactly on the defined monomer of these broken lines, and alignment issues takes place, thereby reduce its yield.
Therefore, be necessary to provide the chip resister and the manufacturing approach thereof of a kind of innovation and tool progressive, to address the above problem.
Summary of the invention
The present invention provides a kind of manufacturing approach of chip resister, may further comprise the steps: a base material and a resistive layer a) are provided, and this base material has a first surface and a second surface; B) combine the first surface of this resistive layer in this base material; C) form a first metal layer in the second surface of this base material; D) form a plurality of perforations, to run through this first metal layer, this base material and this resistive layer; E) form one and connect metal level in these perforations, to electrically connect this resistive layer and this first metal layer; F) this resistive layer of patterning is to form a plurality of first resistance bodies; G) form a plurality of first protective layers to protect these first resistance bodies; And h) carry out the singulation manufacturing approach along many lines of cut, to form a plurality of chip resisters, wherein these lines of cut of part are through these perforations.
Because the material of this base material for can directly cutting; Therefore when the dimension shrinks of this chip resister arrives to a certain degree; These positive electrodes, these back electrodes and this resistive layer can be formed on this base material exactly, and alignment issues can not take place, thereby can improve yield.
The present invention provides a kind of chip resister in addition, and it comprises that a base material, a resistive layer, a first metal layer, connect metal level and one first protective layer.This base material has a first surface, a second surface, the right opening of a base material and base material left side opening.This resistive layer is positioned at the first surface of this base material; And have one first resistance body, a right back electrode and a left back electrode; This right side back electrode and this left side back electrode lay respectively at the both sides of this first resistance body; This right side back electrode has a right back electrode opening, and this left side back electrode has a left back electrode opening.This first metal layer is positioned at the second surface of this base material; And have one first right opening and one first left opening; Wherein the right opening of this base material, right back electrode opening and this first right opening form a right side and run through groove, and this base material left side opening, left back electrode opening and this first left opening form a left side and run through groove.This connection metal level comprises that one connects a metal right-hand part and a connection metal left side; This connection metal right-hand part and this connection metal left side do not connect; This connection metal right-hand part is positioned at that this right side runs through groove and electrically connect should right side back electrode and this first metal layer, and this connections metal left half part runs through in the groove in this left side and electric connection should left side back electrode and this first metal layer.This first protective layer covers this first resistance body.
Description of drawings
Fig. 1 to Figure 13 shows the sketch map of first embodiment of the manufacturing approach of chip resister of the present invention;
Figure 14 shows the cross-sectional schematic of first embodiment of chip resister of the present invention;
Figure 15 to Figure 27 shows the sketch map of second embodiment of the manufacturing approach of chip resister of the present invention; And
Figure 28 shows the cross-sectional schematic of second embodiment of chip resister of the present invention
The main element symbol description
1 chip resister
2 chip resisters
10 base materials
12 resistive layers
14 the first metal layers
16 adhesion layers
18 perforations
20 connect metal level
22 first resistance bodies
24 second photoresist layers
26 the 3rd photoresist layers
28 back electrodes
30 cooling mechanisms
32 positive electrodes
34 first non-conductive material layers
36 second metal levels
38 first protective layers
40 second protective layers
42 the 3rd metal levels
50 base materials
52 resistive layers
54 the first metal layers
56 adhesion layers
58 perforations
60 connect metal level
62 first resistance bodies
64 the 3rd photoresist layers
66 the 4th photoresist layers
68 back electrodes
70 second resistance bodies
74 first non-conductive material layers
76 second metal levels
78 first protective layers
80 second protective layers
82 the 3rd metal levels
The first surface of 101 base materials
The second surface of 102 base materials
The right opening of 103 base materials
104 base materials left side opening
121 lines of cut
141 first right openings
142 first left openings
143 right positive electrodes
144 left positive electrodes
Groove is run through on 181 right sides
Groove is run through on 182 left sides
201 connect the metal right-hand part
202 connect the metal left side
241 second patterns
261 the 3rd patterns
281 right back electrodes
282 left back electrodes
361 second metal level right-hand parts
362 second metal level left sides
421 the 3rd metal level right-hand parts
422 the 3rd metal level left sides
The first surface of 501 base materials
The second surface of 502 base materials
The right opening of 503 base materials
504 base materials left side opening
521 lines of cut
541 first right openings
542 first left openings
561 second photoresist layers
Groove is run through on 581 right sides
Groove is run through on 582 left sides
601 connect the metal right-hand part
602 connect the metal left side
641 the 3rd patterns
681 right back electrodes
682 left back electrodes
721 right positive electrodes
722 left positive electrodes
741 second non-conductive material layers
761 second metal level right-hand parts
762 second metal level left sides
821 the 3rd metal level right-hand parts
822 the 3rd metal level left sides
2011 right cooling mechanisms
2021 left cooling mechanisms
2811 right back electrode openings
2821 left back electrode openings
6811 right back electrode openings
6821 left back electrode openings
Embodiment
Referring to figs. 1 to Figure 13, the sketch map of first embodiment of the manufacturing approach of demonstration chip resister of the present invention.With reference to figure 1, a base material 10 and a resistive layer 12 are provided, this base material 10 has a first surface 101 and a second surface 102.Then, in conjunction with the first surface 101 of this resistive layer 12 in this base material 10.Then, form the second surface 102 of a first metal layer 14 in this base material 10.
In the present embodiment, this base material 10 is an organic substrate, is preferably an organic multilayer plate body base material.This resistive layer 12 is a corronil paillon foil or cupromanganese paillon foil.This first metal layer 14 is a copper foil.Because this resistive layer 12 is a sheet material, so it is incorporated into the first surface 101 of this base material 10 with the pressing mode, preferably, further comprises an adhesion coating (not shown) between this resistive layer 12 and this base material 10.In addition, this first metal layer 14 also is a sheet material, and it also is formed at the second surface 102 of this base material 10 with the pressing mode, preferably, further comprises an adhesion coating (not shown) between this first metal layer 14 and this base material 10.
In the present embodiment, have many preset lines of cut 121,, therefore appear with imaginary line in the drawings because these lines of cut 121 are imaginary line on these resistive layer 12 surfaces.Yet it is understandable that these lines of cut 121 also can be the entity line of cut that is positioned on this base material 10, for example broken line.
With reference to figure 2, form an adhesion layer 16 (for example: one first photoresist layer or a protection glue) to cover this resistive layer 12.With reference to figure 3, form a plurality of perforations 18, to run through this first metal layer 14, this base material 10, this resistive layer 12 and this adhesion layer 16.These perforations 18 are positioned on these lines of cut 121, but are not positioned at the intersection point of these lines of cut 121.
With reference to figure 4, form one and connect metal level 20 in these perforations 18, to electrically connect this resistive layer 12 and this first metal layer 14.In the present embodiment, this connection metal level 20 is a chemical metal layer, chemical copper layer for example, and it utilizes the chemically plating making method to form.In addition, this connection metal level 20 further is formed on these the first metal layer 14 whole planes.
With reference to figure 5, remove this adhesion layer 16, and appear whole this resistive layer 12.
With reference to figure 6,6A, 7 and 7A, wherein Fig. 6 A is the face upwarding stereogram of Fig. 6, and Fig. 7 A is the face upwarding stereogram of Fig. 7.This resistive layer 12 of patterning is to form a plurality of first resistance bodies 22.In the present embodiment, this patterning manufacturing approach is following.At first, with reference to figure 6 and 6A, form one second photoresist layer 24 on this resistive layer 12, and form one the 3rd photoresist layer 26 on this connection metal level 20.Then, after exposure and video picture, form one second pattern 241 on this second photoresist layer 24, and form one the 3rd pattern 261 on the 3rd photoresist layer 26.This second pattern 241 is a plurality of openings, and the 3rd pattern 261 is the groove of many intersections.Not corresponding these perforations 18 in the position of these openings and groove, in other words, these openings and groove do not pass through these perforations 18.
Then; With reference to figure 7 and 7A; Remove the first surface 101 that this resistive layer 12 of part appears this base material 10 of part according to this second pattern 241 with etching mode; And form a plurality of first resistance bodies 22 and a plurality of back electrode 28, wherein per two back electrodes 28 are positioned at the both sides of each first resistance body 22, and the corresponding perforation 18 in the position of each back electrode 28; And remove part this connection metal level 20 with etching mode and this first metal layer 14 appears the partly second surface 102 of this base material 10 according to the 3rd pattern 261; And form a plurality of cooling mechanisms 30 and a plurality of positive electrode 32 respectively; Wherein these cooling mechanisms 30 are positioned on these positive electrodes 32; And these positive electrode 32 separate gaps, each positive electrode 32 comprises a perforation 18.Afterwards, remove this second photoresist layer 24 and the 3rd photoresist layer 26.
With reference to figure 8, form a plurality of first non-conductive material layers 34 to cover the first surface 101 of these first resistance bodies 22 and this base material 10 of part, wherein these first non-conductive material layers 34 are parallel and do not cover these perforations 18.In the present embodiment, this first non-conductive material layer 34 is a dry film (Dry Film) or wet film (Wet Film).
With reference to figure 9 and 9A, wherein Fig. 9 A is the face upwarding stereogram of Fig. 9.Forming a plurality of second metal levels 36 upward reaches on this connection metal level 20 (being these perforations 18 and these cooling mechanisms 30) in the resistive layer 12 (being these back electrodes 28) that is not covered by these first non-conductive material layers 34.In the present embodiment, this second metal level 36 is the copper layer, and it forms with plating mode.This second metal level 36 extends to the side of these back electrodes 28, and contacts the first surface 101 of this base material 10.And this second metal level 36 extends to the side of these cooling mechanisms 30 and these positive electrodes 32, and contacts the second surface 102 of this base material 10.
With reference to Figure 10, remove these first non-conductive material layers 34, to appear the first surface 101 of these first resistance bodies 22 and this base material 10 of part.
With reference to Figure 11, form a plurality of first protective layers 38 to protect these first resistance bodies 22.In the present embodiment, the material of this first protective layer 38 is an anti-solder ink, for example: epoxy resin (Epoxy).These first protective layers 38 cover the first surface 101 of these first resistance bodies 22 and this base material 10 of part, and wherein these first protective layers 38 do not cover these perforations 18.
Preferably, present embodiment further forms the second surface 102 of a plurality of second protective layers 40 with these second metal levels 36 of cover part and this base material 10 of part, and wherein these second protective layers 40 do not cover these perforations 18.In the present embodiment, the material of this second protective layer 40 is an anti-solder ink, for example: epoxy resin (Epoxy).
With reference to Figure 12, form a plurality of the 3rd metal levels 42 on second metal level 36 that is not covered by these first protective layers 38 and these second protective layers 40.In the present embodiment, the 3rd metal level 42 forms with plating mode, and its material is nickel, tin or gold.Preferably, if the material of the 3rd metal level 42 is a nickel, but then re-plating one deck gold or tin on it.In other embodiments, the 3rd metal level 42 fills up these perforations 18.
At last, carry out the singulation manufacturing approach along these lines of cut 121, shown in figure 13 to form a plurality of chip resisters 1, wherein these lines of cut 121 of part are through these perforations 18.In the present embodiment, this singulation manufacturing approach utilizes laser or cutter to cut along these lines of cut 121.Yet, it is understandable that if these lines of cut 121 are for being positioned at the entity line of cut on this base material 10, this singulation manufacturing approach utilizes breaker along these lines of cut 121 manufacturing approach that fractures.
In the present invention; The material of this base material 10 for can directly cutting; Therefore when the dimension shrinks of this chip resister 1 arrives to a certain degree; These positive electrodes 32, these back electrodes 28 and this resistive layer 22 can be formed on this base material 10 exactly, and alignment issues can not take place, thereby can improve yield.
With reference to Figure 13 and 14, show solid and the cross-sectional schematic of first embodiment of chip resister of the present invention respectively.This chip resister 1 comprises that a base material 10, a resistive layer 12, a first metal layer 14, connect metal level and one first protective layer 38.
This base material 10 has a first surface 101, a second surface 102, the right opening 103 of a base material and base material left side opening 104.In the present embodiment, this base material 10 is an organic substrate, is preferably an organic multilayer plate body base material.
This resistive layer 12 is positioned at the first surface 101 of this base material 10, and has one first resistance body, 22, one a right back electrode 281 and a left back electrode 282.This right side back electrode 281 and this left side back electrode 282 lay respectively at the both sides of this first resistance body 22, and this right side back electrode 281 has a right back electrode opening 2811, and this left side back electrode 282 has a left back electrode opening 2821.In the present embodiment, this resistive layer 12 is a corronil paillon foil or cupromanganese paillon foil, and preferably, further comprises an adhesion coating (not shown) between this resistive layer 12 and this base material 10.
This first metal layer 14 is positioned at the second surface 102 of this base material 10; And have one first right opening 141 and one first left opening 142; Wherein groove 181 is run through on the right opening 103 of this base material, right back electrode opening 2811 and this first right opening 141 formation, one right side, and groove 182 is run through on this base material left side opening 104, left back electrode opening 2821 and this first left opening 142 formation, one left side.In the present embodiment, this first metal layer 14 is a copper foil, and preferably, further comprises an adhesion coating (not shown) between this first metal layer 14 and this base material 10.This first metal layer 14 comprises a right positive electrode 143 and a left positive electrode 144, this right side positive electrode 143 and should not connecting by left side positive electrode 144, and a separate gap.This right side positive electrode 143 and should left side positive electrode 144 be to form via this singulation manufacturing approach by these positive electrodes 32 (Fig. 7 and Fig. 7 A).
This connection metal level comprises that one connects a metal right-hand part 201 and a connection metal left side 202.This connection metal right-hand part 201 and this connection metal left side 202 do not connect, and this connection metal right-hand part 201 is positioned at the right positive electrode 143 that this right side is run through groove 181 and electrically connected this right side back electrode 281 and this first metal layer 14.This connection metal left side 202 is positioned at the left positive electrode 144 that this left side is run through groove 182 and electrically connected this left side back electrode 282 and this first metal layer 14.In the present embodiment, this connection metal level is a chemical metal layer, for example the chemical copper layer.This connection metal right-hand part 201 and this connection metal left side 202 are to be formed via this singulation manufacturing approach by this connection metal level 20 (Figure 12).
This connection metal right-hand part 201 comprises a right cooling mechanism 2011, and it is positioned on this right side positive electrode 143.This connection metal left side 202 comprises a left cooling mechanism 2021, and it is positioned on this left side positive electrode on 144.This right side cooling mechanism 2011 and should left side cooling mechanism 2021 be to form via this singulation manufacturing approach by these these cooling mechanisms 30 (Fig. 7 and Fig. 7 A).
This first protective layer 38 covers this first resistance body 22.In the present embodiment, the material of this first protective layer 38 is an anti-solder ink, for example: epoxy resin (Epoxy).These first protective layers 38 cover the first surface 101 of this first resistance body 22 and this base material 10 of part.
Preferably, this chip resister 1 further comprises one second metal level right-hand part 361, one second metal level left side 362, one second protective layer 40, one the 3rd metal level right-hand part 421 and one the 3rd metal level left side 422.
The material of this second metal level right-hand part 361 and this second metal level left side 362 is a copper.This second metal level right-hand part 361 is positioned on this connection metal right-hand part 201, and this second metal level right-hand part 361 extends to the side of this right side back electrode 281, and contacts the first surface 101 of this base material 10.And this second metal level right-hand part 361 extends to the side of this right side cooling mechanism 2011 and this right side positive electrode 143, and contacts the second surface 102 of this base material 10.
This second metal level left side 362 is positioned on this connection metal left side 202, and this second metal level left side 362 extends to the side of this left side back electrode 282, and contacts the first surface 101 of this base material 10.And this second metal level left side 362 extends to the side of this left side cooling mechanism 2021 and this left side positive electrode 144, and contacts the second surface 102 of this base material 10.
This second protective layer 40 is positioned on the second surface 102 of this base material 10 of 144 of this right side positive electrode 143 and this left side positive electrodes, with the second surface 102 of these second metal levels 36 of cover part (this second metal level right-hand part 361 and this second metal level left side 362) and this base material 10 of part.In the present embodiment, the material of this second protective layer 40 is an anti-solder ink, for example: epoxy resin (Epoxy).
The 3rd metal level right-hand part 421 is positioned on this second metal level right-hand part 361, and the 3rd metal level left side 422 is positioned on this second metal level left side 362.In the present embodiment, the material of the 3rd metal level right-hand part 421 and the 3rd metal level left side 422 is nickel, tin or gold.Preferably, if the material of the 3rd metal level right-hand part 421 and the 3rd metal level left side 422 is a nickel, but then re-plating one deck gold or tin on it.
In the present embodiment, this chip resister 1 has two and runs through groove (i.e. this right side run through groove 181 and groove 182 is run through on this left side).Yet in other embodiments, this chip resister 1 can have the groove that runs through more than four, and promptly a side has the plural groove that runs through.What be positioned at the same side runs through groove conducting or not conducting each other.
With reference to Figure 15 to Figure 27, the sketch map of second embodiment of the manufacturing approach of demonstration chip resister of the present invention.With reference to Figure 15, a base material 50 and a resistive layer 52 are provided, this base material 50 has a first surface 501 and a second surface 502.Then, in conjunction with the first surface 501 of this resistive layer 52 in this base material 50.Then, form the second surface 502 of a first metal layer 54 in this base material 50.
In the present embodiment, this base material 50 is an organic substrate, is preferably an organic multilayer plate body base material.This resistive layer 52 is a corronil paillon foil or cupromanganese paillon foil.This first metal layer 54 also is a corronil paillon foil or cupromanganese paillon foil.Because this resistive layer 52 is a sheet material, so it is incorporated into the first surface 501 of this base material 50 with the pressing mode, preferably, further comprises an adhesion coating (not shown) between this resistive layer 52 and this base material 50.In addition, this first metal layer 54 also is a sheet material, and it also is formed at the second surface 502 of this base material 50 with the pressing mode, preferably, further comprises an adhesion coating (not shown) between this first metal layer 54 and this base material 50.
In the present embodiment, have many preset lines of cut 521 on these resistive layer 52 surfaces.
With reference to Figure 16, form an adhesion layer 56 (for example: one first photoresist layer or a protection glue) covering this resistive layer 52, and form one second photoresist layer 561 to cover this first metal layer 54.With reference to Figure 17, form a plurality of perforations 58, to run through this second photoresist layer 561, this first metal layer 54, this base material 50, this resistive layer 52 and this adhesion layer 56.These perforations 58 are positioned on these lines of cut 521, but are not positioned at the intersection point of these lines of cut 521.
With reference to Figure 18, form one and connect metal level 60 in these perforations 58, to electrically connect this resistive layer 52 and this first metal layer 54.In the present embodiment, this connection metal level 60 is a chemical metal layer, chemical copper layer for example, and it utilizes the chemically plating making method to form.
With reference to Figure 19, remove this adhesion layer 56 and this second photoresist layer 561, and appear whole this resistive layer 52 and this first metal layer 54.
With reference to Figure 20,21 and 21A, wherein Figure 21 A is the face upwarding stereogram of Figure 21.This resistive layer 52 of patterning and this first metal layer 54.In the present embodiment, this patterning manufacturing approach is following.At first, with reference to Figure 20, form one the 3rd photoresist layer 64 on this resistive layer 52, and form one the 4th photoresist layer 66 on this first metal layer 54.Then, after exposure and video picture, form one the 3rd pattern 641 on the 3rd photoresist layer 64, and form one the 4th pattern (not shown) on the 4th photoresist layer 66.The 3rd pattern 641 and the 4th pattern are a plurality of openings and correspond to each other.Not corresponding these perforations 58 in the position of these openings, in other words, these openings do not pass through these perforations 58.
Then; With reference to Figure 21 and 21A; Remove the first surface 501 that this resistive layer 52 of part appears this base material 50 of part according to the 3rd pattern 641 with etching mode; And form a plurality of first resistance bodies 62 and a plurality of back electrode 68, wherein per two back electrodes 68 are positioned at the both sides of each first resistance body 62, and the corresponding perforation 58 in the position of each back electrode 68; And remove the second surface 502 that this first metal layer 54 of part appears this base material 50 of part with etching mode according to the 4th pattern; And form a plurality of second resistance bodies 70 and a plurality of positive electrode 72; Wherein per two positive electrodes 72 are positioned at the both sides of each second resistance body 70, and the corresponding perforation 58 in the position of each positive electrode 72.Afterwards, remove the 3rd photoresist layer 64 and the 4th photoresist layer 66.
With reference to Figure 22, form a plurality of first non-conductive material layers 74 to cover the first surface 501 of these first resistance bodies 62 and this base material 50 of part, wherein these first non-conductive material layers 74 are parallel and do not cover these perforations 58.And, form a plurality of second non-conductive material layers 741 to cover the second surface 502 of these second resistance bodies 70 and this base material 50 of part, wherein these second non-conductive material layers 741 are parallel and do not cover these perforations 58.
In the present embodiment, the material of these first non-conductive material layers 74 and these second non-conductive material layers 741 is dry film or wet film, and its position corresponds to each other.
With reference to Figure 23, form a plurality of second metal levels 76 on the first metal layer 54 (being these positive electrodes 72) that the resistive layer 52 (being these back electrodes 68) that on this connection metal level 60, is not covered by these first non-conductive material layers 74 is gone up and do not covered by these second non-conductive material layers 741.In the present embodiment, this second metal level 76 is the copper layer, and it forms with plating mode.This second metal level 76 extends to the side of these back electrodes 68, and contacts the first surface 501 of this base material 50.And this second metal level 76 extends to the side of these positive electrodes 72, and contacts the second surface 502 of this base material 50.
With reference to Figure 24, remove these first non-conductive material layers 74 to appear the first surface 501 of these first resistance bodies 62 and this base material 50 of part.And remove these second non-conductive material layers 741 to appear the second surface 502 of these second resistance bodies 70 and this base material 50 of part.
With reference to Figure 25, form a plurality of first protective layers 78 protecting these first resistance bodies 62, and form a plurality of second protective layers 80 to protect these second resistance bodies 70.In the present embodiment, the material of this first protective layer 78 is an anti-solder ink, for example: and epoxy resin (Epoxy), and the material of this second protective layer 80 is anti-solder ink, for example: epoxy resin (Epoxy).These first protective layers 78 cover the first surface 501 of these first resistance bodies 62 and this base material 50 of part, and wherein these first protective layers 78 do not cover these perforations 58.These second protective layers 80 cover the second surface 502 of these second resistance bodies 70 and this base material 50 of part, and wherein these second protective layers 80 do not cover these perforations 58.
With reference to Figure 26, form a plurality of the 3rd metal levels 82 on second metal level 76 that is not covered by these first protective layers 78 and these second protective layers 80.In the present embodiment, the 3rd metal level 82 forms with plating mode, and its material is nickel, tin or gold.Preferably, if the material of the 3rd metal level 82 is a nickel, but then re-plating one deck gold or tin on it.In other embodiments, the 3rd metal level 82 fills up these perforations 58.
At last, carry out the singulation manufacturing approach along these lines of cut 521, shown in figure 27 to form a plurality of chip resisters 2, wherein these lines of cut 521 of part are through these perforations 58.
With reference to Figure 27 and 28, show solid and the cross-sectional schematic of second embodiment of chip resister of the present invention respectively.This chip resister 2 comprises that a base material 50, a resistive layer 52, a first metal layer 54, connect metal level and one first protective layer 78.
This base material 50 has a first surface 501, a second surface 502, the right opening 503 of a base material and base material left side opening 504.In the present embodiment, this base material 50 is an organic substrate, is preferably an organic multilayer plate body base material.
This resistive layer 52 is positioned at the first surface 501 of this base material 50, and has one first resistance body, 62, one a right back electrode 681 and a left back electrode 682.This right side back electrode 681 and this left side back electrode 682 lay respectively at the both sides of this first resistance body 62, and this right side back electrode 681 has a right back electrode opening 6811, and this left side back electrode 682 has a left back electrode opening 6821.In the present embodiment, this resistive layer 52 is a corronil paillon foil or cupromanganese paillon foil, and preferably, further comprises an adhesion coating (not shown) between this resistive layer 52 and this base material 50.This right side back electrode 681 and should left side back electrode 682 be to form via this singulation manufacturing approach by these back electrodes 68 (Figure 21).
This first metal layer 54 is positioned at the second surface 502 of this base material 50; And have one first right opening 541 and one first left opening 542; Wherein groove 581 is run through on the right opening 503 of this base material, right back electrode opening 6811 and this first right opening 541 formation, one right side, and groove 582 is run through on this base material left side opening 504, left back electrode opening 6821 and this first left opening 542 formation, one left side.In the present embodiment, this first metal layer 54 is a corronil paillon foil or cupromanganese paillon foil, and it is identical with this resistive layer 52.And preferably, further comprise an adhesion coating (not shown) between this first metal layer 54 and this base material 50.This first metal layer 54 comprises one second resistance body, 70, one a right positive electrode 721 and a left positive electrode 722, this right side positive electrode 721 and should not connecting by left side positive electrode 722, and a separate gap.This right side positive electrode 721 and should left side positive electrode 722 be to form via this singulation manufacturing approach by these positive electrodes 72 (Figure 21 A).
This connection metal level comprises that one connects a metal right-hand part 601 and a connection metal left side 602.This connection metal right-hand part 601 is positioned at that this right side runs through groove 581 and electrically connect should right side back electrode 681 and should right side positive electrode 721.This connection metal left side 602 is positioned at that this left side runs through groove 582 and electrically connect should left side back electrode 682 and should left side positive electrode 722.In the present embodiment, in the present embodiment, this connection metal level is a chemical metal layer, for example the chemical copper layer.This connection metal right-hand part 601 and this connection metal left side 602 are to be formed via this singulation manufacturing approach by this connection metal level 60 (Figure 26).
This first protective layer 78 covers this first resistance body 62.In the present embodiment, the material of this first protective layer 78 is an anti-solder ink, for example: epoxy resin (Epoxy).This first protective layer 78 covers the first surface 501 of this first resistance body 62 and this base material 50 of part.
Preferably, this chip resister 2 further comprises one second metal level right-hand part 761, one second metal level left side 762, one second protective layer 80, one the 3rd metal level right-hand part 821 and one the 3rd metal level left side 822.
The material of this second metal level right-hand part 761 and this second metal level left side 762 is a copper.This second metal level right-hand part 761 is positioned on this connection metal right-hand part 601, extends to the side of this right side back electrode 681, and contacts the first surface 501 of this base material 50.And this second metal level right-hand part 761 extends to the side of this right side positive electrode 721, and contacts the second surface 502 of this base material 50.
This second metal level left side 762 is positioned on this connection metal left side 602, extends to the side of this left side back electrode 682, and contacts the first surface 501 of this base material 50.And this second metal level left side 762 extends to the side of this left side positive electrode 722, and contacts the second surface 502 of this base material 50.
This second protective layer 80 covers this second resistance body 70.In the present embodiment, the material of this second protective layer 80 is an anti-solder ink, for example: epoxy resin (Epoxy).This second protective layer 80 covers the second surface 502 of this second resistance body 70 and this base material 50 of part.
The 3rd metal level right-hand part 821 is positioned on this second metal level right-hand part 761, and the 3rd metal level left side 822 is positioned on this second metal level left side 762.In the present embodiment, the material of the 3rd metal level right-hand part 821 and the 3rd metal level left side 822 is nickel, tin or gold.Preferably, if the material of the 3rd metal level right-hand part 821 and the 3rd metal level left side 822 is a nickel, but then re-plating one deck gold or tin on it.
In the present embodiment, this chip resister 2 has two and runs through groove (i.e. this right side run through groove 581 and groove 582 is run through on this left side).Yet in other embodiments, this chip resister 2 can have the groove that runs through more than four, and promptly a side has the plural groove that runs through.What be positioned at the same side runs through groove conducting or not conducting each other.
But the foregoing description is merely explanation principle of the present invention and effect thereof, but not in order to restriction the present invention.Therefore, those skilled in the art make amendment to the foregoing description and change and still do not take off spirit of the present invention.Interest field of the present invention should be listed like claims scope.
Claims (26)
1. the manufacturing approach of a chip resister may further comprise the steps:
A) base material and a resistive layer are provided, this base material has a first surface and a second surface;
B) combine the first surface of this resistive layer in this base material;
C) form a first metal layer in the second surface of this base material;
D) form a plurality of perforations, to run through this first metal layer, this base material and this resistive layer;
E) form one and connect metal level in these perforations, to electrically connect this resistive layer and this first metal layer;
F) this resistive layer of patterning is to form a plurality of first resistance bodies;
G) form a plurality of first protective layers to protect these first resistance bodies; And
H) carry out the singulation manufacturing approach along many lines of cut, to form a plurality of chip resisters, wherein these lines of cut of part are through these perforations.
2. the manufacturing approach of chip resister as claimed in claim 1, wherein this base material is an organic multilayer plate body base material, and this resistive layer is a corronil paillon foil or cupromanganese paillon foil, and this first metal layer is a copper foil.
3. the manufacturing approach of chip resister as claimed in claim 1, wherein in this step b), this resistive layer is a sheet material; And be incorporated into the first surface of this base material with the pressing mode; In this step c), this first metal layer is a sheet material, and is formed at the second surface of this base material with the pressing mode.
4. the manufacturing approach of chip resister as claimed in claim 1 comprises further after this step c) that wherein one forms an adhesion layer covering the step of this resistive layer, and comprises further after the step e) that one removes the step of this adhesion layer.
5. the manufacturing approach of chip resister as claimed in claim 1, wherein this step f) further forms a plurality of back electrodes, and wherein per two back electrodes are positioned at the both sides of each first resistance body.
6. the manufacturing approach of chip resister as claimed in claim 1; Wherein this connection metal level further is formed on this first metal layer in this step e); This step f) further comprises this connection metal level of a patterning and this first metal layer to form a plurality of cooling mechanisms and a plurality of positive electrode respectively, and wherein these cooling mechanisms are positioned on these positive electrodes.
7. the manufacturing approach of chip resister as claimed in claim 1 wherein further comprises after this step f):
F1) form a plurality of first non-conductive material layers to cover these first resistance bodies, these first non-conductive material layers do not cover these perforations;
F2) form a plurality of second metal levels on this connection metal level and on the resistive layer that is not covered by these first non-conductive material layers; And
F3) remove these first non-conductive material layers.
8. the manufacturing approach of chip resister as claimed in claim 7 wherein further comprises after this step g):
G1) form the second surface of a plurality of second protective layers with these second metal levels of cover part and this base material of part, wherein these second protective layers do not cover these perforations.
9. the manufacturing approach of chip resister as claimed in claim 8, wherein this step g 1) further comprise afterwards:
G2) form a plurality of the 3rd metal levels on second metal level that is not covered by these first protective layers and these second protective layers.
10. the manufacturing approach of chip resister as claimed in claim 1, wherein this step g) forms these first protective layers to cover the first surface of these first resistance bodies and this base material of part, and wherein these first protective layers do not cover these perforations.
11. the manufacturing approach of chip resister as claimed in claim 1, wherein this base material is an organic multilayer plate body base material, and this resistive layer is a corronil paillon foil or cupromanganese paillon foil, and this first metal layer is a corronil paillon foil or cupromanganese paillon foil.
12. the manufacturing approach of chip resister as claimed in claim 11; Further comprise that wherein one forms an adhesion layer covering this resistive layer and to form one second photoresist layer covering the step of this first metal layer after this step c), and comprise further after the step e) that one removes the step of this adhesion layer and this second photoresist layer.
13. the manufacturing approach of chip resister as claimed in claim 11; Wherein this this resistive layer of step f) patterning is to form a plurality of first resistance bodies and a plurality of back electrode; And this first metal layer of patterning is to form a plurality of second resistance bodies and a plurality of positive electrode; Wherein per two back electrodes are positioned at the both sides of each first resistance body, and per two positive electrodes are positioned at the both sides of each second resistance body.
14. the manufacturing approach of chip resister as claimed in claim 13 wherein further comprises after this step f):
F1) form a plurality of first non-conductive material layers to cover these first resistance bodies, these first non-conductive material layers do not cover these perforations;
F2) form a plurality of second non-conductive material layers to cover these second resistance bodies, these second non-conductive material layers do not cover these perforations;
F3) forming a plurality of second metal levels connects on the metal level, is not reached on the first metal layer that is not covered by these second non-conductive material layers by the resistive layer of these first non-conductive material layers coverings in this; And
F4) remove these first non-conductive material layers and these second non-conductive material layers.
15. the manufacturing approach of chip resister as claimed in claim 14 wherein further comprises after this step g):
G1) form a plurality of second protective layers to protect these second resistance bodies.
16. the manufacturing approach of chip resister as claimed in claim 15, wherein this step g 1) further comprise afterwards:
G2) form a plurality of the 3rd metal levels on second metal level that is not covered by these first protective layers and these second protective layers.
17. a chip resister comprises:
One base material has a first surface, a second surface, the right opening of a base material and base material left side opening;
One resistive layer; Be positioned at the first surface of this base material; And have one first resistance body, a right back electrode and a left back electrode; This right side back electrode and this left side back electrode lay respectively at the both sides of this first resistance body, and this right side back electrode has a right back electrode opening, and this left side back electrode has a left back electrode opening;
One the first metal layer; Be positioned at the second surface of this base material; And have one first right opening and one first left opening; Wherein the right opening of this base material, right back electrode opening and this first right opening form a right side and run through groove, and this base material left side opening, left back electrode opening and this first left opening form a left side and run through groove;
One connects metal level; Comprise that one connects a metal right-hand part and a connection metal left side; This connection metal right-hand part and this connection metal left side do not connect; This connection metal right-hand part is positioned at that this right side runs through groove and electrically connect should right side back electrode and this first metal layer, and this connections metal left half part runs through in the groove in this left side and electric connection should left side back electrode and this first metal layer; And
One first protective layer covers this first resistance body.
18. chip resister as claimed in claim 17, wherein this base material is an organic multilayer plate body base material, and this resistive layer is a corronil paillon foil or cupromanganese paillon foil, and this first metal layer is a copper foil.
19. chip resister as claimed in claim 18; Wherein this first metal layer comprises a right positive electrode and a left positive electrode; This right side positive electrode and should not connecting by left side positive electrode; This connection metal level comprises a right cooling mechanism and a left cooling mechanism, and this right side cooling mechanism is positioned on this right side positive electrode, and this left side cooling mechanism is positioned on this left side positive electrode.
20. chip resister as claimed in claim 19 further comprises one second protective layer, is positioned on the second surface of this base material between this right side positive electrode and this left side positive electrode.
21. chip resister as claimed in claim 17, wherein this base material is an organic multilayer plate body base material, and this resistive layer is a corronil paillon foil or cupromanganese paillon foil, and this first metal layer is a corronil paillon foil or cupromanganese paillon foil.
22. chip resister as claimed in claim 21, wherein this first metal layer has one second resistance body, a right positive electrode and a left positive electrode, and this right side positive electrode and this left side positive electrode lay respectively at the both sides of this second resistance body.
23. chip resister as claimed in claim 22 further comprises one second protective layer, covers this second resistance body.
24. chip resister as claimed in claim 17; Further comprise one second metal level right-hand part and one second metal level left side; This second metal level right-hand part is positioned on this connection metal right-hand part, and this second metal level left half part connects on the metal left side in this.
25. chip resister as claimed in claim 24; Further comprise one the 3rd metal level right-hand part and one the 3rd metal level left side; The 3rd metal level right-hand part is positioned on this second metal level right-hand part, and the 3rd metal level left half part is on this second metal level left side.
26. chip resister as claimed in claim 25, wherein the material of this second metal level right-hand part and this second metal level left side is a copper, and the material of the 3rd metal level right-hand part and the 3rd metal level left side is nickel, gold or tin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100354534A CN102623115A (en) | 2011-01-28 | 2011-01-28 | Chip resistor and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100354534A CN102623115A (en) | 2011-01-28 | 2011-01-28 | Chip resistor and its manufacturing method |
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| CN102623115A true CN102623115A (en) | 2012-08-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011100354534A Pending CN102623115A (en) | 2011-01-28 | 2011-01-28 | Chip resistor and its manufacturing method |
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| CN (1) | CN102623115A (en) |
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| CN105513728A (en) * | 2016-01-27 | 2016-04-20 | 广东欧珀移动通信有限公司 | Resistance device |
| CN108091460A (en) * | 2016-11-23 | 2018-05-29 | 三星电机株式会社 | resistor element and its manufacturing method |
| CN110364318A (en) * | 2018-03-26 | 2019-10-22 | 国巨电子（中国）有限公司 | The manufacturing method of high fdrequency resistor and high fdrequency resistor |
| CN110998757A (en) * | 2017-08-10 | 2020-04-10 | Koa株式会社 | Method for manufacturing resistor |
| CN115206608A (en) * | 2021-04-08 | 2022-10-18 | 光颉科技股份有限公司 | Pulse resistance trimming manufacturing method of columnar resistor element and columnar resistor manufactured in pulse resistance trimming mode |
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| CN110364318B (en) * | 2018-03-26 | 2021-08-17 | 国巨电子（中国）有限公司 | High-frequency resistor and method for manufacturing high-frequency resistor |
| CN115206608A (en) * | 2021-04-08 | 2022-10-18 | 光颉科技股份有限公司 | Pulse resistance trimming manufacturing method of columnar resistor element and columnar resistor manufactured in pulse resistance trimming mode |
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Application publication date: 20120801 |