WO2013021477A1 - Circuit substrate manufacturing method - Google Patents

Circuit substrate manufacturing method Download PDF

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Publication number
WO2013021477A1
WO2013021477A1 PCT/JP2011/068243 JP2011068243W WO2013021477A1 WO 2013021477 A1 WO2013021477 A1 WO 2013021477A1 JP 2011068243 W JP2011068243 W JP 2011068243W WO 2013021477 A1 WO2013021477 A1 WO 2013021477A1
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WO
WIPO (PCT)
Prior art keywords
metal foil
main
hole
prepreg
forming
Prior art date
Application number
PCT/JP2011/068243
Other languages
French (fr)
Japanese (ja)
Inventor
秀吉 瀧井
典明 種子
高木 剛
Original Assignee
株式会社メイコー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社メイコー filed Critical 株式会社メイコー
Priority to PCT/JP2011/068243 priority Critical patent/WO2013021477A1/en
Priority to TW101126558A priority patent/TW201320849A/en
Publication of WO2013021477A1 publication Critical patent/WO2013021477A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/094Array of pads or lands differing from one another, e.g. in size, pitch, thickness; Using different connections on the pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/063Lamination of preperforated insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/421Blind plated via connections

Definitions

  • the present invention relates to a circuit board manufacturing method, and more particularly to a circuit board manufacturing method having a heat dissipation path for heat dissipation.
  • High heat generation type circuit boards such as circuit boards on which electrical or electronic components with a large amount of heat are mounted and circuit boards for large currents where large currents flow through the circuit, have a heat dissipation path that dissipates the generated heat.
  • This type of heat dissipation path generally includes a thermal via, which covers the through hole penetrating from one surface of the circuit board to the other surface and the inner wall surface of the through hole and the both surfaces of the circuit board. And a metal material connected to the wiring pattern.
  • a circuit board including such a thermal via for example, even if the component mounted on one surface of the circuit board generates heat, the heat is transmitted to the other surface of the circuit board through the thermal via. The heat is dissipated.
  • the through hole is filled with a metal paste to further improve the heat dissipation efficiency.
  • a technique of filling the through hole provided in the circuit board with the metal paste for example, see Patent Document 1 is used.
  • the method of filling the through hole of the circuit board of Patent Document 1 with the metal paste is as follows. First, through holes are provided in a circuit board having wiring patterns on both sides. Thereafter, a metal paste containing a required metal powder is prepared, and this metal paste is pushed into the through hole with a roll or a piston. At this time, by applying ultrasonic vibration to the circuit board at the same time, the metal paste can easily flow and the metal paste can easily enter the through hole. In this way, the metal paste is filled into the through hole.
  • the metal paste may not be completely filled in the through holes, and the desired heat dissipation efficiency may not be obtained with certainty.
  • An object of the present invention is to provide a manufacturing method that enables rapid manufacture of a circuit board having a heat dissipation function without requiring a separate manufacturing process for securing only a heat dissipation path.
  • an insulating substrate, a first wiring pattern formed on one surface of the insulating substrate, a second wiring pattern formed on the other surface, and the first and first wiring patterns are provided in the insulating substrate.
  • a circuit board manufacturing method comprising a heat radiation path made of a metal column that thermally connects two wiring patterns, wherein first and second supporting substrates are prepared, and the first supporting substrate is provided with the first supporting substrate.
  • the first and second support substrates are arranged, and the columnar body Forming the insulating substrate sandwiched between the first metal foil and the second metal foil and having the columnar body embedded therein while the first bump and the second bump are abutted with each other to form And laminating the both sides of the insulating substrate with the first and second metal foils interposed therebetween to form a laminate, and peeling the first and second carrier substrates from the laminate. And a pattern forming step of forming the first and second metal foils on the first and second wiring patterns after exposing the first and second metal foils, respectively.
  • a circuit board manufacturing method is provided.
  • the laminating step is a plate-like main prepreg having one main through-hole into which the first and second bumps are to be inserted, and prepares a main prepreg containing uncured insulating resin,
  • the first and second support substrates on both sides of the main prepreg
  • the first and second bumps are integrated to form the columnar body, and the main prepreg It is preferable to form the insulating substrate in which the columnar body is embedded by flowing the insulating resin.
  • the bump forming step is a thick conductor for providing a thick wiring pattern thicker than the first wiring pattern by a formation method similar to the formation method of the first bump on the first metal foil.
  • the laminating step includes a main prepreg having a part of the main through hole and a remaining part of forming the main through hole in cooperation with the part of the main through hole.
  • Sub-prepregs each having a main through-hole and a sub-through-hole into which the thick conductor is to be inserted, further comprising a sub-prepreg containing uncured insulating resin, for pressing the first and second supporting substrates Prior to disposing the first and second supporting substrates to sandwich the sub-prepreg and the main prepreg between the first metal foil and the second metal foil, It is preferable to insert the thick conductor sub through hole.
  • the first and second bumps are brought into contact with each other through the main through hole of the prepreg to form a metal columnar body, thereby thermally radiating the first wiring pattern and the second wiring pattern.
  • a route is secured. Since this heat dissipation path is not formed by a manufacturing process separately provided in the manufacturing process of the circuit board, rapid manufacturing of the entire circuit board can be realized.
  • a heat radiation path having a desired diameter can be easily formed without being limited by the hole diameter, as compared with filling the through hole or the like with a metal paste. Further, compared with the case where the through hole is filled with a metal paste, the work efficiency due to the number of holes does not decrease.
  • the wiring pattern in the portion where the thick conductor exists can be partially thickened, and a large current can flow in this portion.
  • the heat dissipation path can be easily secured even in the large current substrate.
  • the stacking process can be easily and quickly performed.
  • first and second carrier substrates 14 and 36 are prepared, and the first metal foil 8 on which the first wiring pattern 6 is to be formed is formed on the first carrier substrate 14, while the second carrier substrate is formed.
  • a second metal foil 38 on which the second wiring pattern 62 is to be formed is formed on 36 (preparation step).
  • a first carrier substrate 14 is prepared.
  • the first carrier substrate 14 is a thin plate made of, for example, stainless steel.
  • a first metal foil 8 is formed on the first carrier substrate 14.
  • the first metal foil 8 is made of, for example, a copper plating film obtained by electrolytic plating.
  • the copper-clad steel plate 16 which consists of a stainless steel plate with one surface covered with copper foil is obtained.
  • a surface in contact with the first carrier substrate 14 is a first surface 18, and a surface opposite to the first surface 18 is a second surface 20.
  • metal first and second bumps 10 and 30 having substantially half the height of the columnar body 4 are formed on the first and second metal foils 8 and 38 by plating (bump forming step), respectively.
  • metallic first bumps 10 are formed on the first metal foil 8 to be formed on the first wiring pattern 6 of the circuit board 2.
  • the second surface 20 of the first metal foil 8 of the copper-clad steel plate 16 is covered with a plating resist 22 made of a dry film having a predetermined thickness.
  • the plating resist 22 is provided with a bump formation hole 24 that reaches the second surface 20 of the first metal foil 8 at a predetermined position.
  • the bump formation hole 24 is a hole used for forming the first bump 10 to be a part of the heat dissipation path, and one opening end 23 is closed by the first metal foil 8, and the other The opening end 25 of the plating resist 22 is open to the exposed surface 34 opposite to the contact surface 35 of the plating resist 22 with the first metal foil 8.
  • the plating resist 22 is formed on the mask layer 26 that exposes the first metal foil 8 in the bump forming hole 24 and covers the other portion of the first metal foil 8 (FIG. 1D). )).
  • the bump formation hole 24 is formed at a site to be a heat dissipation path in the future by a known photoetching method, laser processing method, or the like. At least one bump forming hole 24 (four in FIG. 1D) is formed. At this time, the diameter of the bump formation hole 24 can be arbitrarily set according to the diameter of the heat dissipation path.
  • the first metal foil 8 is formed at a predetermined position on the second surface 20 of the first metal foil 8 by removing the mask layer 26 (FIG. 1F). In this way, the first metal foil 8 having the first bump 10 is obtained.
  • the first metal foil 8 is supported on a stainless steel plate as the first supporting substrate 14.
  • the second bump 30 is formed on the second metal foil 38 in parallel with or after the formation of the first bump 10.
  • the procedure for forming the second bump is shown in FIGS. 1G to 1L and is basically the same as the procedure for forming the first bump. That is, a mask layer 44 obtained by processing a plating resist 42 is formed on a copper-clad steel plate 40 in which a copper foil (second metal foil 38) is formed on a stainless steel plate (second support substrate 36), and bumps of the mask layer 44 are formed. Copper plating is performed on the portion of the formation hole 46 to form a copper pillar, and the second bump 30 is obtained. However, when the mask layer 44 is formed, the bump formation hole 46 is provided at a position facing the first bump 10.
  • first and second supporting substrates 14 and 36 are arranged so that the first metal foil 8 and the second metal foil 38 face each other, and the first bump 10 and the second bump are formed to form the columnar body 4. 30, and an insulating substrate 58 sandwiched between the first metal foil 8 and the second metal foil 38 and having the columnar body 4 embedded therein.
  • a laminated body 60 is formed in which the carrier substrates 14 and 36 are overlaid via the second metal foils 8 and 38 (lamination process).
  • first and second metal foils 8 and 38 carried on the first and second carrying substrates 14 and 36 are first formed into the first bump 10 and the second bump.
  • the second surfaces 20 and 50 having the bumps 30 are opposed to each other with the main prepreg 52 interposed therebetween.
  • the main prepreg 52 has, for example, a plate shape in which a glass fiber is impregnated with an uncured thermosetting resin.
  • the main prepreg 52 has a main through hole 54 as shown in FIG.
  • the main through hole 54 is provided at a predetermined position where the first bump 10 can be inserted from one side and the second bump 30 can be inserted from the other side. Yes.
  • the alignment of the first and second metal foils 8 and 38 supported on the first and second support substrates 14 and 36 and the main prepreg 52 is performed using, for example, a pin lamination method.
  • the first and second bumps 10 and 30 are placed on the main prepreg 50. While being inserted into the main through hole 54, the first and second carrier substrates 14 and 36 are pressed toward each other and the whole is heated.
  • the first bump 10 and the second bump 30 have the top portions 28 and 56 abutted against each other and thermocompression bonded, and the columnar body 4 connecting the first metal foil 8 and the second metal foil 38 to each other.
  • the columnar body 4 is used as a heat dissipation path in the circuit board 2.
  • the first and second bumps 10 and 30 are integrated by collapsing and deforming the top portions 28 and 56, so that the columnar body 4 having high heat radiation efficiency is obtained. be able to.
  • this columnar body 4 is the same also about conduction
  • the uncured thermosetting resin of the main prepreg 52 is pressed and flows, spread around the columnar body 4, and the like between the through hole 54 and the columnar body 4. Meet. Thereafter, such a thermosetting resin is cured by being heated. As a result, the main prepreg 52 is formed on the insulating substrate 58 in which the columnar body 4 is embedded.
  • first and second metal foils 8 and 38 are formed on the first and second wiring patterns 6 and 62, respectively (pattern forming step).
  • the first and second support substrates 14 and 36 are peeled off from the first metal foil 8 and the second metal foil 38, respectively, and the first metal foil 8 and the first metal foil 8 The first surfaces 18 and 48 of the two metal foils 38 are exposed.
  • wiring patterns 6 and 38 are formed on the first metal foil 8 and the second metal foil 38 by using a normal etching method. Specifically, an etching resist is applied to the portions of the first metal foil 8 and the second metal foil 38 that are to be left as wiring, and unnecessary portions are removed by etching, thereby forming wiring patterns 6 and 62 having a predetermined shape. (FIG. 2 (c)). Then, in the obtained wiring patterns 6 and 62, only the portions that require soldering are exposed, and the solder resist layer 64 is formed so that the solder does not adhere to the portions that do not require soldering.
  • the insulating substrate 58, the first and second wiring patterns 6, 62 having a predetermined shape formed on the front and back surfaces of the insulating substrate 58, and the first and second wiring patterns 6 built in the insulating substrate 58 are provided.
  • 62 is obtained as a circuit board 2 provided with a copper columnar body 4 as a heat radiation path (FIG. 2D).
  • the circuit board 2 provided with the heat dissipation path obtained in this way is then mounted with electronic components or processed according to the board shape to be used.
  • the first metal foil 8 and the second metal foil 38 are opposed to each other with the main prepreg 52 interposed therebetween.
  • the first and second bumps 10 and 30 of the first and second metal foils 8 and 38 are abutted and integrated with each other through the main through hole 54 of the main prepreg 52, the first wiring pattern 6 and the second wiring
  • the columnar body 4 connecting the pattern 62 is secured as a heat dissipation path. Since this heat dissipation path is not formed by a manufacturing process separately provided in the manufacturing process of the circuit board 2, the entire circuit board can be quickly manufactured.
  • a heat dissipation path having a desired diameter can be easily formed without being limited by the hole diameter, as compared with the conventional method of filling the through hole with a metal paste.
  • the bumps 10 and 30 to be the columnar bodies 4 are formed by plating, even if the number of heat dissipation paths is increased, a large number of bumps can be formed by plating at the same time, and a reduction in work efficiency is suppressed.
  • the columnar body 4 can be used not only for the purpose of heat dissipation but also as a means for achieving conduction between the wiring patterns on both sides.
  • a thick conductor 72 for providing a thick wiring pattern thicker than the first wiring pattern 6 is further formed in the bump forming process by the same formation method as that of the first bump 10.
  • a thick conductor forming hole 74 for the thick conductor 72 is further formed in a predetermined portion where the thick conductor 72 is to be formed in the plating resist layer 22 shown in FIG. ))
  • Plating is performed on the thick conductor formation hole 74 for the thick conductor 72 simultaneously with the bump formation hole 24 for the first bump 10, and the thick conductor 72 is formed in the same manner as the first bump 10.
  • the thick conductor 72 is provided along the wiring through which a large current flows in the first wiring pattern 6 formed on the surface of the circuit board 70. That is, the thick conductor 72 is formed on a portion of the first metal foil 8 that should be a wiring pattern through which a large current flows. As a result, in the first wiring pattern 6, a portion where the thick conductor 72 exists is locally thick, and the portion becomes a thick wiring pattern, so that a large current can flow.
  • the first metal foil 8 in which the thick conductor 72 is formed in addition to the first bump 10 is obtained (FIG. 3F). Since the thick conductor 72 is different from the first bump 10, the second bump 30 is not provided on the second metal foil 38 at a position facing the thick conductor 72.
  • a main prepreg 52 provided with a partial main through hole 55 that forms a part of the main through hole 54 at a position corresponding to each of the first and second bumps 10 and 30 is prepared.
  • a sub-prepreg provided with a sub through hole 78 into which the thick conductor 72 is to be inserted at a position corresponding to the remaining main through hole 57 and the thick conductor 72 that form the main through hole 54 in cooperation with the main through hole 55. 76 is prepared. These two prepregs 52 and 76 are disposed between the first and second metal foils 8 and 38.
  • the sub-prepreg 76 is arranged on the metal foil side on which the thick conductor 72 is formed, that is, on the first metal foil 8 side in this embodiment (FIG. 3 (m)).
  • the first and second support substrates 14 and 36 are pressed in a direction approaching each other, and the whole is heated.
  • the thick conductor 72 is embedded in the insulating substrate 58 (FIG. 4A).
  • the first and second carrier boards 14 and 36 are peeled off (FIG. 4B), and the first and second wiring patterns 6 and 62 are formed (FIG. 4C).
  • a solder resist layer 64 is formed (FIG. 4D).
  • the circuit board 70 for large current is manufactured.
  • the circuit board 70 since the thickness of the first metal foil 8 (copper foil) on the surface is not different from the conventional one, even if a thick thick conductor 72 is formed in the insulating substrate 58 for a large current, it is fine. A simple wiring pattern can be formed. Further, by using the sub prepreg 76 in which the sub through holes 78 are formed at positions corresponding to the thick conductors 72, the laminating process can be performed easily and quickly.
  • the circuit board 70 has the same structure, operation, and effects as those of the circuit board 2.
  • Circuit board 4 Columnar body (heat dissipation path) 6 1st wiring pattern 8 1st metal foil 10 1st bump 14 1st support substrate 24 bump formation hole 26 mask layer 28 top 30 2nd bump 36 2nd support substrate 38 2nd metal foil 44 mask layer 46 bump formation hole 52 Main prepreg 54 Main through hole 62 Second wiring pattern 70 Circuit board 72 Thick conductor 74 Thick conductor forming hole 78 Sub through hole

Abstract

Provided is a circuit substrate manufacturing method, comprising: a preparation step of forming a first metal foil (8) upon a first support substrate (14), and forming a second metal foil (38) upon a second support substrate (36); a bump forming step of respectively forming metallic first and second bumps (21, 38) upon the first and second metal foils by plating; a layering step of placing the first bumps (21) and the second bumps (38) opposite one another to form columnar bodies (4), forming an insulation substrate (58) which is sandwiched between the first metal foil and the second metal foil and wherein the columnar bodies (4) are embedded, and forming a layered body (60) wherein the support substrates are respectively overlapped via the first and second metal foils on both sides of the insulation substrate; and a pattern forming step of detaching the first and second support substrates (14, 36) from the layered body (60), exposing the first and second metal foils (8, 38), and respectively forming the first and second metal foils in first and second wiring patterns (6, 62).

Description

回路基板の製造方法Circuit board manufacturing method
 本発明は、回路基板の製造方法に関し、詳しくは、放熱のための放熱経路を有する回路基板の製造方法に関する。 The present invention relates to a circuit board manufacturing method, and more particularly to a circuit board manufacturing method having a heat dissipation path for heat dissipation.
 発熱量の多い電気的又は電子的な部品が実装される回路基板や回路に大電流が流される大電流用の回路基板等の高発熱型の回路基板は、発生した熱を放散させる放熱経路を備えている。この種の放熱経路は一般的にサーマルビアを含み、このサーマルビアは、回路基板の一方の面から他方の面に貫通する貫通孔と、この貫通孔の内壁面を覆うとともに回路基板における前記両面の配線パターンに接続された金属材料とからなる。このようなサーマルビアを含む回路基板によれば、例えば、回路基板の一方の面に実装された前記部品が発熱しても、その熱がサーマルビアを介して回路基板の他方の面に伝わるので、熱の放散が行われる。 High heat generation type circuit boards, such as circuit boards on which electrical or electronic components with a large amount of heat are mounted and circuit boards for large currents where large currents flow through the circuit, have a heat dissipation path that dissipates the generated heat. I have. This type of heat dissipation path generally includes a thermal via, which covers the through hole penetrating from one surface of the circuit board to the other surface and the inner wall surface of the through hole and the both surfaces of the circuit board. And a metal material connected to the wiring pattern. According to a circuit board including such a thermal via, for example, even if the component mounted on one surface of the circuit board generates heat, the heat is transmitted to the other surface of the circuit board through the thermal via. The heat is dissipated.
 しかしながら、前記サーマルビアを形成する金属材料は、貫通孔の内壁にのみ薄く形成された層形態をなしているだけなので、サーマルビアによる伝熱効果、即ち、放熱効率は比較的低い。このため、電子部品等の発熱量が多くなると十分に放熱することができないという問題がある。
 そこで、前記貫通孔を金属ペーストで満たし、放熱効率をより高めることが考えられる。貫通孔を金属ペーストで満たす手段としては、回路基板に設けた貫通孔内に金属ペーストを充填する技術(例えば、特許文献1参照)が利用される。
However, since the metal material forming the thermal via is only in the form of a thin layer formed only on the inner wall of the through hole, the heat transfer effect by the thermal via, that is, the heat radiation efficiency is relatively low. For this reason, when the calorific value of electronic parts etc. increases, there exists a problem that it cannot fully radiate.
Therefore, it can be considered that the through hole is filled with a metal paste to further improve the heat dissipation efficiency. As a means for filling the through hole with the metal paste, a technique of filling the through hole provided in the circuit board with the metal paste (for example, see Patent Document 1) is used.
 特許文献1の回路基板の貫通孔に金属ペーストを充填する方法は、以下の通りである。
 まず、両面に配線パターンを有する回路基板に貫通孔を設ける。その後、所要の金属の粉を含む金属ペーストを準備し、この金属ペーストを前記貫通孔にロール又はピストンで押し込む。このとき、回路基板に超音波振動を同時に加えることにより、前記金属ペーストを流動し易くし、前記貫通孔内へ金属ペーストを入り込み易くする。このようにして、前記貫通孔内に金属ペーストを充填する。
The method of filling the through hole of the circuit board of Patent Document 1 with the metal paste is as follows.
First, through holes are provided in a circuit board having wiring patterns on both sides. Thereafter, a metal paste containing a required metal powder is prepared, and this metal paste is pushed into the through hole with a roll or a piston. At this time, by applying ultrasonic vibration to the circuit board at the same time, the metal paste can easily flow and the metal paste can easily enter the through hole. In this way, the metal paste is filled into the through hole.
特開平5-37157号公報JP-A-5-37157
 ところで、回路基板の貫通孔に金属ペーストを充填することは、上記したように、とても手間がかかり、作業性が悪く、回路基板の製造効率を悪化させる。しかも、金属ペーストが貫通孔内に完全に充填されないこともあり、所望の放熱効率が確実に得られない場合もある。 By the way, as described above, filling the through hole of the circuit board with the metal paste is very time-consuming, has poor workability, and deteriorates the manufacturing efficiency of the circuit board. In addition, the metal paste may not be completely filled in the through holes, and the desired heat dissipation efficiency may not be obtained with certainty.
 本発明の目的は、放熱経路のみを確保するための製造工程を別途必要とすることなく、放熱機能を備えた回路基板の迅速な製造を可能にする製造方法を提供することにある。 An object of the present invention is to provide a manufacturing method that enables rapid manufacture of a circuit board having a heat dissipation function without requiring a separate manufacturing process for securing only a heat dissipation path.
 本発明では、絶縁基板と、前記絶縁基板の一方の面に形成された第1配線パターン及び他方の面に形成された第2配線パターンと、前記絶縁基板内に設けられ、前記第1及び第2配線パターンを熱的に連結する金属製の柱状体からなる放熱経路とを備えた回路基板の製造方法であって、第1及び第2担持基板を準備し、第1担持基板に前記第1配線パターンを形成すべき第1金属箔を形成する一方、第2担持基板に前記第2配線パターンを形成すべき第2金属箔を形成する準備工程と、前記第1及び第2金属箔上に前記柱状体の略半分の高さを有する金属製の第1及び第2バンプをめっきによりそれぞれ形成するバンプ形成工程と、前記第1金属箔と前記第2金属箔とが互いに対向すべく前記第1及び第2担持基板を配置して、前記柱状体を形成すべく前記第1バンプと前記第2バンプとを互いに突き合わせる一方、前記第1金属箔と前記第2金属箔との間に挟み込まれた且つ前記柱状体を埋設させた前記絶縁基板を形成し、前記絶縁基板の両面に前記第1及び第2金属箔を介して前記担持基板がそれぞれ重ね合わされた積層体を形成する積層工程と、前記積層体から前記第1及び第2担持基板を剥離して、前記第1及び第2金属箔を露出させた後、前記第1及び前記第2金属箔を前記第1及び第2配線パターンにそれぞれ形成するパターン形成工程とを備えたことを特徴とする回路基板の製造方法が提供される。 In the present invention, an insulating substrate, a first wiring pattern formed on one surface of the insulating substrate, a second wiring pattern formed on the other surface, and the first and first wiring patterns are provided in the insulating substrate. A circuit board manufacturing method comprising a heat radiation path made of a metal column that thermally connects two wiring patterns, wherein first and second supporting substrates are prepared, and the first supporting substrate is provided with the first supporting substrate. Forming a first metal foil on which a wiring pattern is to be formed, and forming a second metal foil on which a second wiring pattern is to be formed on a second carrier substrate; and on the first and second metal foils A bump forming step of forming metal first and second bumps each having a height approximately half the height of the columnar body by plating, and the first metal foil and the second metal foil to face each other. The first and second support substrates are arranged, and the columnar body Forming the insulating substrate sandwiched between the first metal foil and the second metal foil and having the columnar body embedded therein while the first bump and the second bump are abutted with each other to form And laminating the both sides of the insulating substrate with the first and second metal foils interposed therebetween to form a laminate, and peeling the first and second carrier substrates from the laminate. And a pattern forming step of forming the first and second metal foils on the first and second wiring patterns after exposing the first and second metal foils, respectively. A circuit board manufacturing method is provided.
 ここで、前記積層工程は、前記第1及び第2バンプをそれぞれ挿入させるべき1つのメイン貫通孔を有した板状のメインプリプレグであって、未硬化の絶縁樹脂を含むメインプリプレグを準備し、前記メインプリプレグの前記メイン貫通孔に前記第1及び第2バンプを挿入し且つこれら第1及び第2バンプの先端同士を互いに接触させるべく、前記メインプリプレグの両側に前記第1及び第2担持基板をそれぞれ配置し、この後、前記第1及び第2担持基板を互いに近付く方向へ押圧することにより、前記第1及び第2バンプを一体化させて前記柱状体に形成するとともに、前記メインプリプレグの前記絶縁樹脂を流動させて前記柱状体を埋設した前記絶縁基板を形成することが好ましい。 Here, the laminating step is a plate-like main prepreg having one main through-hole into which the first and second bumps are to be inserted, and prepares a main prepreg containing uncured insulating resin, In order to insert the first and second bumps into the main through-holes of the main prepreg and to bring the tips of the first and second bumps into contact with each other, the first and second support substrates on both sides of the main prepreg After that, by pressing the first and second supporting substrates in a direction approaching each other, the first and second bumps are integrated to form the columnar body, and the main prepreg It is preferable to form the insulating substrate in which the columnar body is embedded by flowing the insulating resin.
 また、前記バンプ形成工程は、前記第1金属箔に前記第1バンプの形成方法と同様の形成方法により、前記第1配線パターンよりも肉厚が厚い肉厚配線パターンを提供するための厚導体を更に形成し、前記積層工程は、前記メイン貫通孔の一部を形成する一部メイン貫通孔を有するメインプリプレグと、前記一部メイン貫通孔と協働して前記メイン貫通孔を形成する残部メイン貫通孔及び前記厚導体を挿入させるべきサブ貫通孔をそれぞれ有したサブプリプレグであって、未硬化の絶縁樹脂を含むサブプリプレグとを更に準備し、前記第1及び第2担持基板の押圧に先立ち、前記第1金属箔と前記第2金属箔との間にて前記サブプリプレグ及び前記メインプリプレグを挟み込むべく第1及び第2担持基板を配置し、前記サブプリプレグの前記サブ貫通孔に前記厚導体を挿入させることが好ましい。 Further, the bump forming step is a thick conductor for providing a thick wiring pattern thicker than the first wiring pattern by a formation method similar to the formation method of the first bump on the first metal foil. And the laminating step includes a main prepreg having a part of the main through hole and a remaining part of forming the main through hole in cooperation with the part of the main through hole. Sub-prepregs each having a main through-hole and a sub-through-hole into which the thick conductor is to be inserted, further comprising a sub-prepreg containing uncured insulating resin, for pressing the first and second supporting substrates Prior to disposing the first and second supporting substrates to sandwich the sub-prepreg and the main prepreg between the first metal foil and the second metal foil, It is preferable to insert the thick conductor sub through hole.
 本発明によれば、プリプレグのメイン貫通孔を通して第1及び第2バンプを互いに突き合わせて金属製の柱状体を形成することにより、第1配線パターンと第2配線パターンとを熱的に連結する放熱経路が確保される。この放熱経路は回路基板の製造過程において別途設けられた製造工程により形成されたものではないので、回路基板全体として迅速な製造を実現できる。また、貫通孔等に金属ペーストを充填することに比べ、孔径の制限を受けずに所望の径の放熱経路を簡単に形成できる。また、貫通孔に金属ペーストを充填する場合に比べ、孔の数による作業効率の低下も発生しない。 According to the present invention, the first and second bumps are brought into contact with each other through the main through hole of the prepreg to form a metal columnar body, thereby thermally radiating the first wiring pattern and the second wiring pattern. A route is secured. Since this heat dissipation path is not formed by a manufacturing process separately provided in the manufacturing process of the circuit board, rapid manufacturing of the entire circuit board can be realized. In addition, a heat radiation path having a desired diameter can be easily formed without being limited by the hole diameter, as compared with filling the through hole or the like with a metal paste. Further, compared with the case where the through hole is filled with a metal paste, the work efficiency due to the number of holes does not decrease.
 また、厚導体を第1バンプとは別に設けることで、この厚導体が存在する部分の配線パターンを部分的に肉厚とすることができ、この部分に大電流を流すことができる。これにより、大電流用基板においても放熱経路を簡単に確保することができる。この際、厚導体に対応した位置にサブ貫通孔が形成されたサブプリプレグを用いることにより、積層工程も容易且つ迅速に行うことができる。 Further, by providing the thick conductor separately from the first bump, the wiring pattern in the portion where the thick conductor exists can be partially thickened, and a large current can flow in this portion. As a result, the heat dissipation path can be easily secured even in the large current substrate. At this time, by using a sub-prepreg in which a sub through hole is formed at a position corresponding to the thick conductor, the stacking process can be easily and quickly performed.
本発明に係る回路基板の製造方法の第1の実施形態を順番に示す概略図である。It is the schematic which shows 1st Embodiment of the manufacturing method of the circuit board based on this invention in order. 図1の続きを順番に示す概略図である。It is the schematic which shows the continuation of FIG. 1 in order. 本発明に係る回路基板の製造方法の第2の実施形態を順番に示す概略図である。It is the schematic which shows 2nd Embodiment of the manufacturing method of the circuit board based on this invention in order. 図3の続きを順番に示す概略図である。It is the schematic which shows the continuation of FIG. 3 in order.
(第1の実施形態)
 図1及び図2を参照して本発明に係る金属製の柱状体4からなる放熱経路を備えた回路基板2の製造方法について説明する。
 本発明においては、まず、第1及び第2担持基板14,36を準備し、第1担持基板14に第1配線パターン6を形成すべき第1金属箔8を形成する一方、第2担持基板36に第2配線パターン62を形成すべき第2金属箔38を形成する(準備工程)。
(First embodiment)
With reference to FIG.1 and FIG.2, the manufacturing method of the circuit board 2 provided with the thermal radiation path | route which consists of the metal columnar bodies 4 which concern on this invention is demonstrated.
In the present invention, first and second carrier substrates 14 and 36 are prepared, and the first metal foil 8 on which the first wiring pattern 6 is to be formed is formed on the first carrier substrate 14, while the second carrier substrate is formed. A second metal foil 38 on which the second wiring pattern 62 is to be formed is formed on 36 (preparation step).
 本工程では、まず、図1(a)に示すように、第1担持基板14を準備する。この第1担持基板14は、例えばステンレス鋼製の薄板である。そして、図1(b)に示すように、第1担持基板14上に第1金属箔8を形成する。この第1金属箔8は、例えば、電解めっきにより得られる銅めっき膜からなる。このようにして、一面が銅の箔で覆われたステンレス鋼板からなる銅張り鋼板16を得る。ここで、第1金属箔8において、第1担持基板14に接している面を第1面18とし、この第1面18とは反対側の面を第2面20とする。 In this step, first, as shown in FIG. 1A, a first carrier substrate 14 is prepared. The first carrier substrate 14 is a thin plate made of, for example, stainless steel. Then, as shown in FIG. 1B, a first metal foil 8 is formed on the first carrier substrate 14. The first metal foil 8 is made of, for example, a copper plating film obtained by electrolytic plating. Thus, the copper-clad steel plate 16 which consists of a stainless steel plate with one surface covered with copper foil is obtained. Here, in the first metal foil 8, a surface in contact with the first carrier substrate 14 is a first surface 18, and a surface opposite to the first surface 18 is a second surface 20.
 次に、第1及び第2金属箔8,38上に柱状体4の略半分の高さを有する金属製の第1及び第2バンプ10,30をめっきによりそれぞれ形成する(バンプ形成工程)。 Next, metal first and second bumps 10 and 30 having substantially half the height of the columnar body 4 are formed on the first and second metal foils 8 and 38 by plating (bump forming step), respectively.
 本工程では、まず、回路基板2の第1配線パターン6に形成されるべき第1金属箔8の上に金属製の第1バンプ10を形成する。 In this step, first, metallic first bumps 10 are formed on the first metal foil 8 to be formed on the first wiring pattern 6 of the circuit board 2.
 詳しくは、図1(c)に示すように、銅張り鋼板16の第1金属箔8の第2面20を所定厚みのドライフィルムからなるめっきレジスト22で覆う。その後、めっきレジスト22には、その所定位置に第1金属箔8の第2面20まで到達するバンプ形成孔24が設けられる。詳しくは、このバンプ形成孔24は、放熱経路の一部となるべき第1バンプ10の形成に用いられる孔であり、一方の開口端23が第1金属箔8で塞がれており、他方の開口端25が、めっきレジスト22の第1金属箔8との接触面35とは反対側の露出面34に開口している。これにより、めっきレジスト22は、かかるバンプ形成孔24の部分の第1金属箔8を露出させ、それ以外の部分の第1金属箔8をカバーするマスク層26に形成される(図1(d))。 Specifically, as shown in FIG. 1C, the second surface 20 of the first metal foil 8 of the copper-clad steel plate 16 is covered with a plating resist 22 made of a dry film having a predetermined thickness. Thereafter, the plating resist 22 is provided with a bump formation hole 24 that reaches the second surface 20 of the first metal foil 8 at a predetermined position. Specifically, the bump formation hole 24 is a hole used for forming the first bump 10 to be a part of the heat dissipation path, and one opening end 23 is closed by the first metal foil 8, and the other The opening end 25 of the plating resist 22 is open to the exposed surface 34 opposite to the contact surface 35 of the plating resist 22 with the first metal foil 8. Thus, the plating resist 22 is formed on the mask layer 26 that exposes the first metal foil 8 in the bump forming hole 24 and covers the other portion of the first metal foil 8 (FIG. 1D). )).
 ここで、バンプ形成孔24は、公知のフォトエッチング法、レーザー加工法等により、将来放熱経路となるべき部位に形成される。このバンプ形成孔24は、少なくとも1個(図1(d)では、4個)形成される。このとき、バンプ形成孔24の径は、放熱経路の径に合わせて任意に設定することができる。 Here, the bump formation hole 24 is formed at a site to be a heat dissipation path in the future by a known photoetching method, laser processing method, or the like. At least one bump forming hole 24 (four in FIG. 1D) is formed. At this time, the diameter of the bump formation hole 24 can be arbitrarily set according to the diameter of the heat dissipation path.
 次に、マスク層26が形成されている銅張り鋼板16に対し銅の電解めっきを施す。これにより、バンプ形成孔24から露出している第1金属箔8の第2面20上に優先的に銅を析出させ、かかるバンプ形成孔24に沿って銅の柱を形成していく(図1(e))。この銅の柱は、一般的にマスク層26の厚みを越えることはないが、図1(e)のように、バンプ形成孔24の開口端25を越えて成長する場合、バンプ形成孔24の径方向外側に向かって環状に僅かに広がるフランジを形成するとともに頂部28がラウンド形状となってもよい。この後、マスク層26を除去することにより、第1金属箔8の第2面20上の所定位置に銅からなる第1バンプ10が形成される(図1(f))。このようにして、第1バンプ10を有する第1金属箔8が得られる。この段階では、図1(f)から明らかなように、第1金属箔8は、第1担持基板14としてのステンレス鋼板に担持されている。 Next, electrolytic plating of copper is performed on the copper-clad steel plate 16 on which the mask layer 26 is formed. Thus, copper is preferentially deposited on the second surface 20 of the first metal foil 8 exposed from the bump formation hole 24, and a copper column is formed along the bump formation hole 24 (FIG. 1 (e)). The copper pillar generally does not exceed the thickness of the mask layer 26, but when it grows beyond the opening end 25 of the bump formation hole 24 as shown in FIG. A flange that extends slightly in a ring shape toward the outside in the radial direction may be formed, and the top portion 28 may have a round shape. Thereafter, the first bump 10 made of copper is formed at a predetermined position on the second surface 20 of the first metal foil 8 by removing the mask layer 26 (FIG. 1F). In this way, the first metal foil 8 having the first bump 10 is obtained. At this stage, as apparent from FIG. 1 (f), the first metal foil 8 is supported on a stainless steel plate as the first supporting substrate 14.
 一方、この第1バンプ10を形成することと並行して、又は後に、第2金属箔38上に第2バンプ30を形成する。 On the other hand, the second bump 30 is formed on the second metal foil 38 in parallel with or after the formation of the first bump 10.
 この第2バンプの形成の手順は、図1の(g)~(l)に示されており、基本的に第1バンプを形成する手順と同様である。すなわち、ステンレス鋼板(第2担持基板36)上に銅箔(第2金属箔38)を形成した銅張り鋼板40上にめっきレジスト42を加工したマスク層44を形成し、かかるマスク層44のバンプ形成孔46の部分に銅めっきを施して銅の柱を形成し、第2バンプ30を得る。但し、マスク層44を形成する際、バンプ形成孔46の位置を第1バンプ10と対向する位置に設けることが異なる。つまり、第2金属箔38の第2担持基板36に接する第1面48とは反対側の第2面50を第1金属箔8の第2面20に対向させたとき、第1バンプ10と相対する位置に第2バンプ30用のバンプ形成孔46がめっきレジスト42に形成される。 The procedure for forming the second bump is shown in FIGS. 1G to 1L and is basically the same as the procedure for forming the first bump. That is, a mask layer 44 obtained by processing a plating resist 42 is formed on a copper-clad steel plate 40 in which a copper foil (second metal foil 38) is formed on a stainless steel plate (second support substrate 36), and bumps of the mask layer 44 are formed. Copper plating is performed on the portion of the formation hole 46 to form a copper pillar, and the second bump 30 is obtained. However, when the mask layer 44 is formed, the bump formation hole 46 is provided at a position facing the first bump 10. That is, when the second surface 50 of the second metal foil 38 opposite to the first surface 48 in contact with the second carrier substrate 36 is opposed to the second surface 20 of the first metal foil 8, Bump formation holes 46 for the second bumps 30 are formed in the plating resist 42 at opposite positions.
 次に、第1金属箔8と第2金属箔38とが互いに対向すべく第1及び第2担持基板14,36を配置して、柱状体4を形成すべく第1バンプ10と第2バンプ30とを互いに突き合わせる一方、第1金属箔8と第2金属箔38との間に挟み込まれた且つ柱状体4を埋設させた絶縁基板58を形成し、絶縁基板58の両面に第1及び第2金属箔8,38を介して担持基板14,36がそれぞれ重ね合わされた積層体60を形成する(積層工程)。 Next, the first and second supporting substrates 14 and 36 are arranged so that the first metal foil 8 and the second metal foil 38 face each other, and the first bump 10 and the second bump are formed to form the columnar body 4. 30, and an insulating substrate 58 sandwiched between the first metal foil 8 and the second metal foil 38 and having the columnar body 4 embedded therein. A laminated body 60 is formed in which the carrier substrates 14 and 36 are overlaid via the second metal foils 8 and 38 (lamination process).
 具体的には、図1(m)に示すように、まず、第1及び第2担持基板14,36に担持された第1及び第2金属箔8,38が、第1バンプ10及び第2バンプ30を有する互いの第2面20,50同士を対向した状態でメインプリプレグ52を間に挟んで対向配置される。 Specifically, as shown in FIG. 1 (m), first and second metal foils 8 and 38 carried on the first and second carrying substrates 14 and 36 are first formed into the first bump 10 and the second bump. The second surfaces 20 and 50 having the bumps 30 are opposed to each other with the main prepreg 52 interposed therebetween.
 ここで、メインプリプレグ52は、例えば、ガラス繊維に未硬化状態の熱硬化性樹脂を含浸させた板状をなしている。このメインプリプレグ52は、図1(m)に示したように、メイン貫通孔54を有している。このメイン貫通孔54は、一方から第1バンプ10を挿入するとともに他方から第2バンプ30を挿入することができる所定位置に設けられ、各バンプ10,30が挿入可能な大きさに形成されている。 Here, the main prepreg 52 has, for example, a plate shape in which a glass fiber is impregnated with an uncured thermosetting resin. The main prepreg 52 has a main through hole 54 as shown in FIG. The main through hole 54 is provided at a predetermined position where the first bump 10 can be inserted from one side and the second bump 30 can be inserted from the other side. Yes.
 ここで、第1及び第2担持基板14,36に担持された第1及び第2金属箔8,38とメインプリプレグ52との位置合わせは、例えば、ピンラミネーション法を用いて行われる。 Here, the alignment of the first and second metal foils 8 and 38 supported on the first and second support substrates 14 and 36 and the main prepreg 52 is performed using, for example, a pin lamination method.
 第1及び第2担持基板14,36に担持された第1及び第2金属箔8,38とメインプリプレグ52とは、位置合わせされた後、第1及び第2バンプ10,30がメインプリプレグ50のメイン貫通孔54内に挿入された状態で第1及び第2担持基板14,36が互いに近付く方向へ押圧されるとともに全体が加熱される。 After the first and second metal foils 8 and 38 carried on the first and second carrying substrates 14 and 36 and the main prepreg 52 are aligned, the first and second bumps 10 and 30 are placed on the main prepreg 50. While being inserted into the main through hole 54, the first and second carrier substrates 14 and 36 are pressed toward each other and the whole is heated.
 このとき、第1バンプ10と第2バンプ30とは、互いに頂部28,56が突き合わされるとともに熱圧着され、第1金属箔8と第2金属箔38との間を連結する柱状体4となる。この柱状体4は、回路基板2において、放熱経路として利用される。詳しくは、図2(a)に示すように、第1及び第2バンプ10,30は、互いの頂部28,56が潰れて変形して一体化されるので放熱効率の高い柱状体4を得ることができる。また、この柱状体4は、導通に関しても同様であり、安定した導電性を確保できる。 At this time, the first bump 10 and the second bump 30 have the top portions 28 and 56 abutted against each other and thermocompression bonded, and the columnar body 4 connecting the first metal foil 8 and the second metal foil 38 to each other. Become. The columnar body 4 is used as a heat dissipation path in the circuit board 2. Specifically, as shown in FIG. 2A, the first and second bumps 10 and 30 are integrated by collapsing and deforming the top portions 28 and 56, so that the columnar body 4 having high heat radiation efficiency is obtained. be able to. Moreover, this columnar body 4 is the same also about conduction | electrical_connection, and can ensure the stable electroconductivity.
 一方、柱状体4の形成と同時に、メインプリプレグ52の未硬化状態の熱硬化性樹脂が押圧されて流動し、柱状体4の周囲に行き渡り、貫通孔54と柱状体4との間の隙間等を満たす。この後、斯かる熱硬化性樹脂は、加熱されることにより硬化する。その結果、メインプリプレグ52は、柱状体4を埋設した絶縁基板58に形成される。 On the other hand, simultaneously with the formation of the columnar body 4, the uncured thermosetting resin of the main prepreg 52 is pressed and flows, spread around the columnar body 4, and the like between the through hole 54 and the columnar body 4. Meet. Thereafter, such a thermosetting resin is cured by being heated. As a result, the main prepreg 52 is formed on the insulating substrate 58 in which the columnar body 4 is embedded.
 これにより、図2(a)に示すように、絶縁基板58の両面に第1及び第2金属箔8,38を介して第1及び第2担持基板14,36がそれぞれ重ね合わされた積層体60が得られる。 As a result, as shown in FIG. 2A, a laminate 60 in which the first and second carrying substrates 14 and 36 are overlapped on both surfaces of the insulating substrate 58 via the first and second metal foils 8 and 38, respectively. Is obtained.
 次いで、第1及び第2金属箔8,38を第1及び第2配線パターン6,62にそれぞれ形成する(パターン形成工程)。 Next, the first and second metal foils 8 and 38 are formed on the first and second wiring patterns 6 and 62, respectively (pattern forming step).
 本工程では、まず、図2(b)に示すように、第1金属箔8及び第2金属箔38からそれぞれ第1及び第2担持基板14,36を剥離させ、第1金属箔8及び第2金属箔38の各第1面18,48を露出させる。 In this step, first, as shown in FIG. 2B, the first and second support substrates 14 and 36 are peeled off from the first metal foil 8 and the second metal foil 38, respectively, and the first metal foil 8 and the first metal foil 8 The first surfaces 18 and 48 of the two metal foils 38 are exposed.
 次に、第1金属箔8及び第2の金属箔38に対し、通常のエッチング法を用いて配線パターン6,38を形成する。具体的には、第1金属箔8及び第2金属箔38において配線として残したい部分にエッチングレジストを塗布し、不要な部分をエッチング除去することにより、所定形状の配線パターン6,62を形成する(図2(c))。そして、得られた配線パターン6,62において、はんだ付けが必要な部分だけを露出させ、はんだ付けが不要な部分にはんだが付着しないようにソルダレジスト層64を形成する。これにより、絶縁基板58と、この絶縁基板58の表面及び裏面に形成された所定形状の第1及び第2配線パターン6,62と、絶縁基板58に内蔵され、第1及び第2配線パターン6,62を連結する放熱経路としての銅製の柱状体4を備えた回路基板2が得られる(図2(d))。 Next, wiring patterns 6 and 38 are formed on the first metal foil 8 and the second metal foil 38 by using a normal etching method. Specifically, an etching resist is applied to the portions of the first metal foil 8 and the second metal foil 38 that are to be left as wiring, and unnecessary portions are removed by etching, thereby forming wiring patterns 6 and 62 having a predetermined shape. (FIG. 2 (c)). Then, in the obtained wiring patterns 6 and 62, only the portions that require soldering are exposed, and the solder resist layer 64 is formed so that the solder does not adhere to the portions that do not require soldering. Thus, the insulating substrate 58, the first and second wiring patterns 6, 62 having a predetermined shape formed on the front and back surfaces of the insulating substrate 58, and the first and second wiring patterns 6 built in the insulating substrate 58 are provided. , 62 is obtained as a circuit board 2 provided with a copper columnar body 4 as a heat radiation path (FIG. 2D).
 このようにして得られた放熱経路を備えた回路基板2には、その後、電子部品等が実装され、あるいは、使用する基板形状に応じた加工が施される。 The circuit board 2 provided with the heat dissipation path obtained in this way is then mounted with electronic components or processed according to the board shape to be used.
 以上説明したように、本発明に係る回路基板2の製造方法は、第1金属箔8と、第2金属箔38とをメインプリプレグ52を間に介して対向させる。このとき、第1及び第2金属箔8,38の第1及び第2バンプ10,30をメインプリプレグ52のメイン貫通孔54を通して互いに突き合わせて一体化するため、第1配線パターン6と第2配線パターン62とを連結する柱状体4が放熱経路として確保される。この放熱経路は、回路基板2の製造過程において別途設けられた製造工程により形成されたものではないので、回路基板全体して迅速な製造を実現できる。また、貫通孔に金属ペーストを充填する従来の方法に比べ、孔径の制限を受けずに所望の径の放熱経路を簡単に形成できる。また、柱状体4となるバンプ10,30は、めっき法により形成されるので、放熱経路の数が増えても、多数のバンプを同時にめっき成長させて形成でき、作業効率の低下は抑制される。なお、柱状体4は、放熱目的以外にも、両面の配線パターン間の導通を図る手段としても用いることができる。 As described above, in the method of manufacturing the circuit board 2 according to the present invention, the first metal foil 8 and the second metal foil 38 are opposed to each other with the main prepreg 52 interposed therebetween. At this time, since the first and second bumps 10 and 30 of the first and second metal foils 8 and 38 are abutted and integrated with each other through the main through hole 54 of the main prepreg 52, the first wiring pattern 6 and the second wiring The columnar body 4 connecting the pattern 62 is secured as a heat dissipation path. Since this heat dissipation path is not formed by a manufacturing process separately provided in the manufacturing process of the circuit board 2, the entire circuit board can be quickly manufactured. In addition, a heat dissipation path having a desired diameter can be easily formed without being limited by the hole diameter, as compared with the conventional method of filling the through hole with a metal paste. Further, since the bumps 10 and 30 to be the columnar bodies 4 are formed by plating, even if the number of heat dissipation paths is increased, a large number of bumps can be formed by plating at the same time, and a reduction in work efficiency is suppressed. . In addition, the columnar body 4 can be used not only for the purpose of heat dissipation but also as a means for achieving conduction between the wiring patterns on both sides.
(第2の実施形態)
 第2の実施形態として、大電流が流される大電流用の回路基板70についても放熱経路を確保することができる回路基板の製造方法を図3、図4を参照して以下に説明する。なお、第2の実施形態を説明するにあたり、既に説明した第1の実施形態と同一の工程の作業手順については、関連する部材及び部位に同一の参照符号を付して、これらの説明は省略し、相違する点のみを説明する。
(Second Embodiment)
As a second embodiment, a method for manufacturing a circuit board capable of securing a heat dissipation path for the circuit board 70 for a large current through which a large current flows will be described below with reference to FIGS. In the description of the second embodiment, the same reference numerals are assigned to the related members and parts for the operation procedures of the same steps as those of the first embodiment already described, and the description thereof is omitted. Only the differences will be described.
 第2の実施形態では、バンプ形成工程にて、第1バンプ10と同様の形成方法により、第1配線パターン6よりも肉厚が厚い肉厚配線パターンを提供するための厚導体72を更に形成する。具体的には、図3(c)に示すめっきレジスト層22に対し、厚導体72を形成すべき所定の部位に、厚導体72用の厚導体形成孔74を更に形成し(図3(d))、第1バンプ10用のバンプ形成孔24と同時に厚導体72用の厚導体形成孔74にもめっき処理をほどこして、第1バンプ10と同様にして厚導体72を形成する。 In the second embodiment, a thick conductor 72 for providing a thick wiring pattern thicker than the first wiring pattern 6 is further formed in the bump forming process by the same formation method as that of the first bump 10. To do. Specifically, a thick conductor forming hole 74 for the thick conductor 72 is further formed in a predetermined portion where the thick conductor 72 is to be formed in the plating resist layer 22 shown in FIG. )), Plating is performed on the thick conductor formation hole 74 for the thick conductor 72 simultaneously with the bump formation hole 24 for the first bump 10, and the thick conductor 72 is formed in the same manner as the first bump 10.
 この厚導体72は、回路基板70の表面に形成される第1配線パターン6のうち、大電流が流される配線に沿って設けられる。つまり、厚導体72は、第1金属箔8において、大電流が流される配線パターンとなるべき部位の上に形成される。これにより、第1配線パターン6は、厚導体72が存在する部分が局所的に厚くなり、その部分が肉厚配線パターンとなり大電流を流すことが可能となる。 The thick conductor 72 is provided along the wiring through which a large current flows in the first wiring pattern 6 formed on the surface of the circuit board 70. That is, the thick conductor 72 is formed on a portion of the first metal foil 8 that should be a wiring pattern through which a large current flows. As a result, in the first wiring pattern 6, a portion where the thick conductor 72 exists is locally thick, and the portion becomes a thick wiring pattern, so that a large current can flow.
 次いで、マスク層26を除去することにより、第1バンプ10に加え、厚導体72が形成されている第1金属箔8が得られる(図3(f))。
 なお、この厚導体72は第1バンプ10とは別のものであるので、第2金属箔38には、厚導体72に対向する位置に第2バンプ30は設けられない。
Next, by removing the mask layer 26, the first metal foil 8 in which the thick conductor 72 is formed in addition to the first bump 10 is obtained (FIG. 3F).
Since the thick conductor 72 is different from the first bump 10, the second bump 30 is not provided on the second metal foil 38 at a position facing the thick conductor 72.
 次に、積層工程では、それぞれ第1及び第2バンプ10,30に対応する位置にメイン貫通孔54の一部を形成する一部メイン貫通孔55が設けられたメインプリプレグ52を用意し、更に、一部メイン貫通孔55と協働してメイン貫通孔54を形成する残部メイン貫通孔57及び厚導体72に対応した位置に厚導体72を挿入させるべきサブ貫通孔78が設けられたサブプリプレグ76を用意する。これら2枚のプリプレグ52,76は、第1及び第2金属箔8,38の間に配置される。このとき、サブプリプレグ76は、厚導体72が形成された金属箔側、すなわち、この実施形態では第1金属箔8側に配される(図3(m))。そしてこの状態で第1及び第2担持基板14,36を互いに近付く方向へ押圧するとともに、全体を加熱する。これにより、厚導体72は絶縁基板58内に埋設される(図4(a))。そして上述した回路基板2と同様に、第1及び第2担持基板14,36を剥離し(図4(b))、第1及び第2配線パターン6,62を形成し(図4(c))、ソルダレジスト層64を形成する(図4(d))。これにより、大電流用の回路基板70が製造される。 Next, in the stacking step, a main prepreg 52 provided with a partial main through hole 55 that forms a part of the main through hole 54 at a position corresponding to each of the first and second bumps 10 and 30 is prepared. A sub-prepreg provided with a sub through hole 78 into which the thick conductor 72 is to be inserted at a position corresponding to the remaining main through hole 57 and the thick conductor 72 that form the main through hole 54 in cooperation with the main through hole 55. 76 is prepared. These two prepregs 52 and 76 are disposed between the first and second metal foils 8 and 38. At this time, the sub-prepreg 76 is arranged on the metal foil side on which the thick conductor 72 is formed, that is, on the first metal foil 8 side in this embodiment (FIG. 3 (m)). In this state, the first and second support substrates 14 and 36 are pressed in a direction approaching each other, and the whole is heated. Thereby, the thick conductor 72 is embedded in the insulating substrate 58 (FIG. 4A). Then, similarly to the circuit board 2 described above, the first and second carrier boards 14 and 36 are peeled off (FIG. 4B), and the first and second wiring patterns 6 and 62 are formed (FIG. 4C). ) And a solder resist layer 64 is formed (FIG. 4D). Thereby, the circuit board 70 for large current is manufactured.
 この回路基板70では、表面の第1金属箔8(銅箔)の厚さは従来と変わらないので、絶縁基板58内に大電流用に肉厚の厚導体72が形成されていても、微細な配線パターンを形成することができる。また、厚導体72に対応した位置にサブ貫通孔78が形成されたサブプリプレグ76を用いることにより、積層工程も容易且つ迅速に行うことができる。なお、回路基板70は、その他の構造、作用、効果は回路基板2と同様である。 In this circuit board 70, since the thickness of the first metal foil 8 (copper foil) on the surface is not different from the conventional one, even if a thick thick conductor 72 is formed in the insulating substrate 58 for a large current, it is fine. A simple wiring pattern can be formed. Further, by using the sub prepreg 76 in which the sub through holes 78 are formed at positions corresponding to the thick conductors 72, the laminating process can be performed easily and quickly. The circuit board 70 has the same structure, operation, and effects as those of the circuit board 2.
2    回路基板
4    柱状体(放熱経路)
6    第1配線パターン
8    第1金属箔
10   第1バンプ
14   第1担持基板
24   バンプ形成孔
26   マスク層
28   頂部
30   第2バンプ
36   第2担持基板
38   第2金属箔
44   マスク層
46   バンプ形成孔
52   メインプリプレグ
54   メイン貫通孔
62   第2配線パターン
70   回路基板
72   厚導体
74   厚導体形成孔
78   サブ貫通孔
2 Circuit board 4 Columnar body (heat dissipation path)
6 1st wiring pattern 8 1st metal foil 10 1st bump 14 1st support substrate 24 bump formation hole 26 mask layer 28 top 30 2nd bump 36 2nd support substrate 38 2nd metal foil 44 mask layer 46 bump formation hole 52 Main prepreg 54 Main through hole 62 Second wiring pattern 70 Circuit board 72 Thick conductor 74 Thick conductor forming hole 78 Sub through hole

Claims (3)

  1.  絶縁基板と、前記絶縁基板の一方の面に形成された第1配線パターン及び他方の面に形成された第2配線パターンと、前記絶縁基板内に設けられ、前記第1及び第2配線パターンを熱的に連結する金属製の柱状体からなる放熱経路とを備えた回路基板の製造方法であって、
     第1及び第2担持基板を準備し、第1担持基板に前記第1配線パターンを形成すべき第1金属箔を形成する一方、第2担持基板に前記第2配線パターンを形成すべき第2金属箔を形成する準備工程と、
     前記第1及び第2金属箔上に前記柱状体の略半分の高さを有する金属製の第1及び第2バンプをめっきによりそれぞれ形成するバンプ形成工程と、
     前記第1金属箔と前記第2金属箔とが互いに対向すべく前記第1及び第2担持基板を配置して、前記柱状体を形成すべく前記第1バンプと前記第2バンプとを互いに突き合わせる一方、
     前記第1金属箔と前記第2金属箔との間に挟み込まれた且つ前記柱状体を埋設させた前記絶縁基板を形成し、前記絶縁基板の両面に前記第1及び第2金属箔を介して前記担持基板がそれぞれ重ね合わされた積層体を形成する積層工程と、
     前記積層体から前記第1及び第2担持基板を剥離して、前記第1及び第2金属箔を露出させた後、前記第1及び前記第2金属箔を前記第1及び第2配線パターンにそれぞれ形成するパターン形成工程と
    を備えたことを特徴とする回路基板の製造方法。
    An insulating substrate; a first wiring pattern formed on one surface of the insulating substrate; a second wiring pattern formed on the other surface; and the first and second wiring patterns provided in the insulating substrate. A circuit board manufacturing method comprising a heat dissipation path made of a metal columnar body that is thermally connected,
    First and second supporting substrates are prepared, and a first metal foil on which the first wiring pattern is to be formed is formed on the first supporting substrate, while a second wiring pattern is to be formed on the second supporting substrate. A preparation step of forming a metal foil;
    A bump forming step of forming, on the first and second metal foils, metal first and second bumps each having a height approximately half of the columnar body by plating;
    The first and second supporting substrates are disposed so that the first metal foil and the second metal foil face each other, and the first bump and the second bump are butted against each other to form the columnar body. While
    The insulating substrate sandwiched between the first metal foil and the second metal foil and having the columnar body embedded therein is formed, and the first and second metal foils are interposed on both surfaces of the insulating substrate. A laminating step of forming a laminated body in which the carrier substrates are superposed;
    After peeling off the first and second supporting substrates from the laminate to expose the first and second metal foils, the first and second metal foils are used as the first and second wiring patterns. A circuit board manufacturing method comprising: a pattern forming process for forming each pattern.
  2.  前記積層工程は、
     前記第1及び第2バンプをそれぞれ挿入させるべき1つのメイン貫通孔を有した板状のメインプリプレグであって、未硬化の絶縁樹脂を含むメインプリプレグを準備し、
     前記メインプリプレグの前記メイン貫通孔に前記第1及び第2バンプを挿入し且つこれら第1及び第2バンプの先端同士を互いに接触させるべく、前記メインプリプレグの両側に前記第1及び第2担持基板をそれぞれ配置し、この後、前記第1及び第2担持基板を互いに近付く方向へ押圧することにより、前記第1及び第2バンプを一体化させて前記柱状体に形成するとともに、前記メインプリプレグの前記絶縁樹脂を流動させて前記柱状体を埋設した前記絶縁基板を形成することを特徴とする請求項1に記載の回路基板の製造方法。
    The laminating step includes
    A plate-shaped main prepreg having one main through-hole into which the first and second bumps are to be inserted, and preparing a main prepreg containing uncured insulating resin,
    In order to insert the first and second bumps into the main through-holes of the main prepreg and to bring the tips of the first and second bumps into contact with each other, the first and second support substrates on both sides of the main prepreg. Then, the first and second support substrates are pressed in a direction approaching each other, thereby integrating the first and second bumps into the columnar body, and the main prepreg The method for manufacturing a circuit board according to claim 1, wherein the insulating substrate is formed by flowing the insulating resin to embed the columnar body.
  3.  前記バンプ形成工程は、
     前記第1金属箔に前記第1バンプの形成方法と同様の形成方法により、前記第1配線パターンよりも肉厚が厚い肉厚配線パターンを提供するための厚導体を更に形成し、
     前記積層工程は、
     前記メイン貫通孔の一部を形成する一部メイン貫通孔を有するメインプリプレグと、前記一部メイン貫通孔と協働して前記メイン貫通孔を形成する残部メイン貫通孔及び前記厚導体を挿入させるべきサブ貫通孔をそれぞれ有したサブプリプレグであって、未硬化の絶縁樹脂を含むサブプリプレグとを更に準備し、
     前記第1及び第2担持基板の押圧に先立ち、前記第1金属箔と前記第2金属箔との間にて前記サブプリプレグ及び前記メインプリプレグを挟み込むべく第1及び第2担持基板を配置し、前記サブプリプレグの前記サブ貫通孔に前記厚導体を挿入させることを特徴とする請求項2に記載の回路基板の製造方法。
     
     
    The bump forming step includes
    Further forming a thick conductor for providing a thick wiring pattern thicker than the first wiring pattern by the same formation method as the first bump formation method on the first metal foil,
    The laminating step includes
    A main prepreg having a partial main through hole that forms a part of the main through hole, a remaining main through hole that forms the main through hole in cooperation with the partial main through hole, and the thick conductor are inserted. A sub-prepreg each having a sub-through hole to be prepared, and further comprising a sub-prepreg containing an uncured insulating resin,
    Prior to pressing the first and second supporting substrates, the first and second supporting substrates are arranged to sandwich the sub-prepreg and the main prepreg between the first metal foil and the second metal foil, The method for manufacturing a circuit board according to claim 2, wherein the thick conductor is inserted into the sub through hole of the sub prepreg.

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JP2001177249A (en) * 1999-12-16 2001-06-29 Hitachi Ltd Electrode structure, manufacturing method therefor, and electronic circuit board using the structure
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CN107205313A (en) * 2016-03-16 2017-09-26 景硕科技股份有限公司 It is easy to the multilayer circuit board of test
CN107205313B (en) * 2016-03-16 2020-01-03 景硕科技股份有限公司 Easy-to-test multilayer circuit board

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