WO2011162470A2 - 리드선이 개량된 다이오드 패키지 및 그 제조방법 - Google Patents
리드선이 개량된 다이오드 패키지 및 그 제조방법 Download PDFInfo
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- WO2011162470A2 WO2011162470A2 PCT/KR2011/001978 KR2011001978W WO2011162470A2 WO 2011162470 A2 WO2011162470 A2 WO 2011162470A2 KR 2011001978 W KR2011001978 W KR 2011001978W WO 2011162470 A2 WO2011162470 A2 WO 2011162470A2
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- Prior art keywords
- lead wire
- diode chip
- diode
- diode package
- lower lead
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 title claims abstract description 105
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000465 moulding Methods 0.000 claims abstract description 25
- 150000001875 compounds Chemical class 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims description 14
- 238000005520 cutting process Methods 0.000 claims description 6
- 238000005476 soldering Methods 0.000 claims description 6
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 230000017525 heat dissipation Effects 0.000 description 12
- 238000004806 packaging method and process Methods 0.000 description 4
- 229940125810 compound 20 Drugs 0.000 description 2
- JAXFJECJQZDFJS-XHEPKHHKSA-N gtpl8555 Chemical compound OC(=O)C[C@H](N)C(=O)N[C@@H](CCC(O)=O)C(=O)N[C@@H](C(C)C)C(=O)N[C@@H](C(C)C)C(=O)N1CCC[C@@H]1C(=O)N[C@H](B1O[C@@]2(C)[C@H]3C[C@H](C3(C)C)C[C@H]2O1)CCC1=CC=C(F)C=C1 JAXFJECJQZDFJS-XHEPKHHKSA-N 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 238000007499 fusion processing Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
Definitions
- the present invention relates to a diode package, and more particularly, to a diode package and a method of manufacturing the same, which can be manufactured by a simple process by improving the structure of a lead wire and also improve heat dissipation efficiency.
- FIG. 1 is a view for explaining a conventional diode package. As shown in FIG. 1, in the conventional diode package, the ends of the lead wires 30 and 40 are fused to opposite surfaces of the diode chip 10, respectively, and the diode chip 10 and the lead wires 30 and 40 are combined together. It is made by packaging into a molding compound 20. Reference numerals 30a and 40a denote fusion portions.
- the two lead wires 30 and 40 should be aligned so as to be arranged in a straight line, and the fusion process should be carried out. Afterwards, packaging with molding compound 20 while maintaining its shape is a cumbersome task.
- the heat radiation efficiency is not good because the lead wires 30 and 40 have a thin wire shape.
- the lead wires 30 and 40 In order to increase the heat dissipation efficiency, the lead wires 30 and 40 must be thickened. In this case, the size of the diode chip 10 must be large because the lead wire welding portions 30a and 40a must have a considerable thickness. Therefore, when the diode chip 10 is small, it is difficult to increase the heat radiation efficiency.
- the conventional diode package is very cumbersome in its manufacturing process, and has a limitation in improving heat dissipation efficiency.
- an object of the present invention is to provide a diode package and a method for manufacturing the same, which can be manufactured by a simple process by improving the structure of the lead wire and can improve heat dissipation efficiency.
- the present invention for achieving the above object is a diode package is sealed by a molding compound and a lead wire connected to the diode chip is directed to a diode package, wherein the lead wire is specifically, the lead wire is an upper lead wire And an upper lead wire and a lower lead wire, each of the upper lead wire and the lower lead wire having a long flat plate shape and having a first end and a second end facing each other.
- An upper surface of the diode chip has a lower surface of the first end of the upper lead wire.
- an upper surface of the first end of the lower lead wire is attached to a lower surface of the diode chip, and a second end of the upper lead wire and a second end of the lower lead wire are externally drawn out in the lateral direction of the molding compound. It is done.
- the first end of the upper lead wire is formed with a hemispherical contact hole which is recessed in a hemispherical shape from the top to the bottom and protrudes in a hemispherical shape below.
- a through hole is formed in the center of the hemispherical contact hole.
- Coupling holes may be formed in the second ends of the upper lead wire and the lower lead wire, respectively.
- the upper lead wire is bent downward from the inside of the molding compound while going from the first end to the second end such that the second ends of the upper lead wire and the lower lead wire are drawn out at the same height in opposite directions from the molding compound. It is preferable to have a bent portion.
- a second lead of the upper lead is continuously connected sideways, and a plurality of upper leads are connected in parallel, and a second end of the lower lead is continuously connected laterally, and a plurality of upper leads are connected in parallel.
- the molding process can be packaged into the molding compound through a single bonding process up and down. This is simple. Therefore, the production yield can be improved, manufacturing cost can be lowered, and the heat dissipation efficiency is good, thereby improving the durability and reliability of the product.
- the diode package according to the present invention has a thin thickness and high heat dissipation efficiency, the diode package is suitable for use as a smart diode in recent smart phones, smart TVs, etc., and also suitable for use as a bypass diode of a solar cell. Do.
- 1 is a view for explaining a conventional diode package
- FIG. 2 is a plan view for explaining a diode package according to the present invention.
- FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. 2;
- FIG. 5 is a cross-sectional view taken along line AA ′ of FIG. 4;
- FIG. 7 is a cross-sectional view taken along line AA ′ of FIG. 6;
- FIG. 8 is a plan view illustrating an assembly process of an upper lead frame of FIG. 4 and a lower lead frame of FIG. 5;
- FIG. 9 is a cross-sectional view taken along line AA ′ of FIG. 8;
- FIG. 10 is a view for explaining an installation example of a diode package according to the present invention.
- FIG. 2 is a plan view illustrating a diode package according to the present invention
- FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. 2.
- the lead wires 130 and 140 according to the present invention have a long flat plate shape, unlike the conventional case of the wire shape, and the upper lead wire 130 and the lower lead wire 140. ).
- the lower surface of the first end of the upper lead wire 130 is attached to the upper surface of the diode chip 110, and the coupling hole 131 penetrates through the second end.
- the upper surface of the first end of the lower lead wire 140 is attached to the lower surface of the diode chip 110, and the coupling hole 141 penetrates through the second end.
- the diode chip 110 to which the upper lead wire 130 and the lower lead wire 140 are attached is packaged by the molding compound 120 so that the second ends of the upper lead wire 130 and the lower lead wire 140 are respectively drawn out. Is sealed.
- the upper lead wire 130 moves from the first end to the second end so that the upper lead wire 130 and the lower lead wire 140 extend outward from the same height in the molding compound 120. It has a bent portion (A) that is bent downward about the thickness of the diode chip (110) inside.
- FIG. 4 is a plan view illustrating an upper lead frame
- FIG. 5 is a cross-sectional view taken along line AA ′ of FIG. 4. 4 and 5, the second lead of the upper lead wire 130 is continuously connected to the side of the upper lead frame so that the plurality of upper lead wires 130 are connected in parallel.
- a hemispherical contact hole 132 is formed at the first end of the upper lead wire 130 in a hemispherical shape to be recessed downward from the top to protrude downward into a hemispherical shape, and a through hole 133 is formed at the center of the hemispherical contact hole 132. Is formed.
- the upper lead wire 130 has a bent portion A that is bent downward while going from the first end to the second end. This is because the hemispherical contact hole 132 of the upper lead wire 130 is attached to the upper surface of the diode chip 110 so that the upper lead wire 130 is flush with the lower lead wire 140 when drawn out from the molding compound 120. To be withdrawn. To this end, the bent portion A of the upper lead wire 130 is properly spaced apart from the hemispherical contact hole 132 to be located inside the molding compound 120.
- FIG. 6 is a plan view illustrating the lower lead frame
- FIG. 7 is a cross-sectional view taken along line AA ′ of FIG. 6. 6 and 7, the second lead of the lower lead wire 140 is continuously connected to the side of the lower lead frame 140 so that the plurality of lower lead wires 140 are connected in parallel.
- the diode chip 110 is placed on the upper surface of the second end of the lower lead wire 140.
- the lower lead wire 140 Since the upper lead wire 130 is bent downward, the lower lead wire 140 has a flat shape without needing to be bent upward. If the upper lead wire 130 has a flat shape, the lower lead wire 140 should be bent upward while going from the first end to the second end.
- FIG. 8 is a plan view illustrating an assembly process of the upper lead frame of FIG. 4 and the lower lead frame of FIG. 5, and FIG. 9 is a cross-sectional view taken along line AA ′ of FIG. 8.
- the hemispherical contact hole 132 of the upper lead wire 130 is connected to the diode chip 110 while the diode chip 110 is placed on the first end of the lower lead wire 140.
- the upper lead wires 130 and the lower lead wires 140 are disposed in one-to-one correspondence with the upper surface.
- the second end of the upper lead wire 130 and the second end of the lower lead wire 140 are positioned to face each other in opposite directions so that the upper lead wire 130 and the lower lead wire 140 are linearly arranged.
- soldering is performed to join the upper lead wire 130 and the diode chip 110 at the inlet of the hemispherical contact hole 132. Soldering is then performed through the through hole 133.
- the through hole 133 is small in size, since the inlet of the hemispherical contact hole 132 is large, the process margin during soldering is large and the soldering process can be easily performed.
- the bonding process between the lower lead wire 140 and the diode chip 110 is also performed before or after the upper lead wire 130 is installed.
- the packaging by the molding compound 120 is made in a single bonding process. Thereafter, cutting along the cutting line of FIG. 8 yields a diode package according to the present invention as shown in FIG. 3. After cutting along the cutting line, the packaging by the molding compound 120 may proceed separately, but the former is preferable for mass production.
- FIG. 10 is a view for explaining an installation example of a diode package according to the present invention.
- the widths of the upper lead wires 130 and the lower lead wires 140 are increased in order to increase heat dissipation efficiency, since the thickness does not increase, the upper lead wires 130 and the lower lead wires can be easily bent up and down.
- the heat dissipation efficiency is increased even though the thickness is thinner than that of the wire shape.
- the molding compound 120 is formed through a single bonding process up and down. Packaging process is simple. Therefore, the production yield can be improved, manufacturing cost can be lowered, and the heat dissipation efficiency is good, thereby improving the durability and reliability of the product.
- the diode package according to the present invention has a thin thickness and high heat dissipation efficiency, the diode package is suitable for use as a smart diode in recent smart phones, smart TVs, etc., and also suitable for use as a bypass diode of a solar cell. Do.
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- Condensed Matter Physics & Semiconductors (AREA)
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- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (6)
- 다이오드 칩이 몰딩 컴파운드에 의해 밀봉되고 상기 다이오드 칩에 연결되는 리드선이 상기 몰딩 컴파운드의 외부로 인출되어 이루어지는 다이오드 패키지에 있어서,상기 리드선은 상부 리드선과 하부 리드선으로 구분되고, 상기 상부 리드선과 하부 리드선은 길이가 긴 납작한 판 형태를 하여 서로 대향하는 제1단과 제2단을 각각 가지며, 상기 다이오드 칩의 윗면에는 상기 상부 리드선의 제1단의 아랫면이 부착되고, 상기 다이오드 칩의 아랫면에는 상기 하부 리드선의 제1단의 윗면이 부착되며, 상기 상부 리드선의 제2단과 상기 하부 리드선의 제2단이 상기 몰딩 컴파운드의 측방향으로 외부 인출되는 것을 특징으로 하는 다이오드 패키지.
- 제1항에 있어서, 상기 상부 리드선의 제1단에 위에서 밑으로 반구형으로 오목하게 함몰되어 밑으로 반구형으로 돌출되는 반구형 접촉구가 형성되며, 상기 반구형 접촉구의 중앙에는 관통공이 형성되는 것을 특징으로 하는 다이오드 패키지.
- 제1항에 있어서, 상기 상부 리드선과 하부 리드선의 제2단에는 결합공이 각각 형성되는 것을 특징으로 하는 다이오드 패키지.
- 제1항에 있어서, 상기 상부 리드선과 하부 리드선의 제2단이 상기 몰딩 컴파운드에서 서로 반대방향으로 같은 높이에서 외부로 인출되도록 상기 상부 리드선은 상기 제1단에서 제2단쪽으로 가면서 상기 몰딩 컴파운드의 내부에서 밑으로 절곡되는 절곡부를 가지는 것을 특징으로 하는 다이오드 패키지.
- 제1항에 있어서, 상기 상부 리드선과 하부 리드선의 제2단이 상기 몰딩 컴파운드에서 서로 반대방향으로 같은 높이에서 외부로 인출되도록 상기 하부 리드선은 상기 제1단에서 제2단쪽으로 가면서 상기 몰딩 컴파운드의 내부에서 위로 절곡되는 절곡부를 가지는 것을 특징으로 하는 다이오드 패키지.
- 제2항의 다이오드 패키지를 제조하는 방법에 있어서,상기 상부 리드선의 제2단이 연속적으로 옆으로 연결되어 복수개의 상부 리드선이 병렬 연결되어 이루어지는 상부 리드 프레임과, 상기 하부 리드선의 제2단이 연속적으로 옆으로 연결되어 복수개의 상부 리드선이 병렬 연결되어 이루어지는 하부 리드 프레임을 준비하고, 상기 하부 리드선의 제1단의 윗면에 다이오드 칩이 부착되고 상기 상부 리드선의 반구형 접촉구가 상기 다이오드 칩의 윗면에 부착하도록 상기 상부 리드 프레임과 하부 리드 프레임을 정렬하는 단계;상기 상부 리드선의 반구형 접촉구와 상기 관통공을 통해 상기 다이오드 칩에 납땜하는 단계;상기 다이오드 칩이 있는 부위를 위 아래쪽에서 몰딩 컴파운드로 합착하여 패키징하는 단계; 및상기 상부 리드선과 하부 리드선의 병렬연결이 해제되도록 상기 상부 리드 프레임과 하부 리드 프레임의 제2단의 연결부위를 절단하는 단계; 를 포함하는 것을 특징으로 하는 다이오드 패키지 제조방법.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US13/805,666 US9065030B2 (en) | 2010-06-21 | 2011-03-23 | Diode package having improved lead wire and manufacturing method thereof |
CN201180030496.1A CN103038878B (zh) | 2010-06-21 | 2011-03-23 | 改进引线的二极管包及其制造方法 |
Applications Claiming Priority (2)
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KR1020100058818A KR101101018B1 (ko) | 2010-06-21 | 2010-06-21 | 리드선이 개량된 다이오드 패키지 및 그 제조방법 |
KR10-2010-0058818 | 2010-06-21 |
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WO2011162470A2 true WO2011162470A2 (ko) | 2011-12-29 |
WO2011162470A3 WO2011162470A3 (ko) | 2012-02-16 |
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PCT/KR2011/001978 WO2011162470A2 (ko) | 2010-06-21 | 2011-03-23 | 리드선이 개량된 다이오드 패키지 및 그 제조방법 |
Country Status (5)
Country | Link |
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US (1) | US9065030B2 (ko) |
KR (1) | KR101101018B1 (ko) |
CN (1) | CN103038878B (ko) |
TW (1) | TWI424549B (ko) |
WO (1) | WO2011162470A2 (ko) |
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US20190097524A1 (en) * | 2011-09-13 | 2019-03-28 | Fsp Technology Inc. | Circuit having snubber circuit in power supply device |
US10032726B1 (en) * | 2013-11-01 | 2018-07-24 | Amkor Technology, Inc. | Embedded vibration management system |
KR20160028014A (ko) | 2014-09-02 | 2016-03-11 | 삼성전자주식회사 | 반도체 소자 패키지 제조방법 |
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EP0621102B1 (en) * | 1993-04-21 | 2000-06-28 | Babcock-Hitachi Kabushiki Kaisha | Tips for welding and their manufacturing process |
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TW441139B (en) * | 2000-03-10 | 2001-06-16 | Huang Wen Bin | Manufacturing method of surface mounted-type diode |
WO2003077312A1 (en) * | 2002-03-08 | 2003-09-18 | Rohm Co.,Ltd. | Semiconductor device using semiconductor chip |
TWI233195B (en) * | 2003-12-19 | 2005-05-21 | Concord Semiconductor Corp | Method of distributing conducting adhesive to lead frame |
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-
2010
- 2010-06-21 KR KR1020100058818A patent/KR101101018B1/ko active IP Right Grant
-
2011
- 2011-03-23 CN CN201180030496.1A patent/CN103038878B/zh not_active Expired - Fee Related
- 2011-03-23 US US13/805,666 patent/US9065030B2/en not_active Expired - Fee Related
- 2011-03-23 WO PCT/KR2011/001978 patent/WO2011162470A2/ko active Application Filing
- 2011-06-20 TW TW100121436A patent/TWI424549B/zh not_active IP Right Cessation
Patent Citations (4)
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JPH0982865A (ja) * | 1995-09-08 | 1997-03-28 | Canon Inc | リード端子付きチップダイオード及びこれを用いた太陽電池モジュール |
JPH09219481A (ja) * | 1997-03-17 | 1997-08-19 | Rohm Co Ltd | 面実装型ダイオードの製造方法 |
JP2003347491A (ja) * | 2002-05-28 | 2003-12-05 | Renesas Technology Corp | 半導体装置 |
US20080224285A1 (en) * | 2007-03-12 | 2008-09-18 | Lim Seung-Won | Power module having stacked flip-chip and method of fabricating the power module |
Also Published As
Publication number | Publication date |
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US20130087826A1 (en) | 2013-04-11 |
CN103038878B (zh) | 2016-02-24 |
CN103038878A (zh) | 2013-04-10 |
TWI424549B (zh) | 2014-01-21 |
KR20110138749A (ko) | 2011-12-28 |
TW201205763A (en) | 2012-02-01 |
WO2011162470A3 (ko) | 2012-02-16 |
KR101101018B1 (ko) | 2011-12-29 |
US9065030B2 (en) | 2015-06-23 |
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