WO2011162470A3 - 리드선이 개량된 다이오드 패키지 및 그 제조방법 - Google Patents
리드선이 개량된 다이오드 패키지 및 그 제조방법 Download PDFInfo
- Publication number
- WO2011162470A3 WO2011162470A3 PCT/KR2011/001978 KR2011001978W WO2011162470A3 WO 2011162470 A3 WO2011162470 A3 WO 2011162470A3 KR 2011001978 W KR2011001978 W KR 2011001978W WO 2011162470 A3 WO2011162470 A3 WO 2011162470A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- lead wire
- diode package
- manufacturing
- method therefor
- improved lead
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H01L2224/37599—Material
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- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01047—Silver [Ag]
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- H01L2924/12035—Zener diode
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- H01L2924/12041—LED
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- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/805,666 US9065030B2 (en) | 2010-06-21 | 2011-03-23 | Diode package having improved lead wire and manufacturing method thereof |
CN201180030496.1A CN103038878B (zh) | 2010-06-21 | 2011-03-23 | 改进引线的二极管包及其制造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2010-0058818 | 2010-06-21 | ||
KR1020100058818A KR101101018B1 (ko) | 2010-06-21 | 2010-06-21 | 리드선이 개량된 다이오드 패키지 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2011162470A2 WO2011162470A2 (ko) | 2011-12-29 |
WO2011162470A3 true WO2011162470A3 (ko) | 2012-02-16 |
Family
ID=45371896
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2011/001978 WO2011162470A2 (ko) | 2010-06-21 | 2011-03-23 | 리드선이 개량된 다이오드 패키지 및 그 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9065030B2 (ko) |
KR (1) | KR101101018B1 (ko) |
CN (1) | CN103038878B (ko) |
TW (1) | TWI424549B (ko) |
WO (1) | WO2011162470A2 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20190097524A1 (en) * | 2011-09-13 | 2019-03-28 | Fsp Technology Inc. | Circuit having snubber circuit in power supply device |
US10032726B1 (en) * | 2013-11-01 | 2018-07-24 | Amkor Technology, Inc. | Embedded vibration management system |
KR20160028014A (ko) | 2014-09-02 | 2016-03-11 | 삼성전자주식회사 | 반도체 소자 패키지 제조방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0982865A (ja) * | 1995-09-08 | 1997-03-28 | Canon Inc | リード端子付きチップダイオード及びこれを用いた太陽電池モジュール |
JPH09219481A (ja) * | 1997-03-17 | 1997-08-19 | Rohm Co Ltd | 面実装型ダイオードの製造方法 |
JP2003347491A (ja) * | 2002-05-28 | 2003-12-05 | Renesas Technology Corp | 半導体装置 |
US20080224285A1 (en) * | 2007-03-12 | 2008-09-18 | Lim Seung-Won | Power module having stacked flip-chip and method of fabricating the power module |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1100019A (zh) * | 1993-04-21 | 1995-03-15 | 巴布考克日立株式会社 | 焊接导电嘴和其加工方法 |
TW434756B (en) * | 1998-06-01 | 2001-05-16 | Hitachi Ltd | Semiconductor device and its manufacturing method |
US6249041B1 (en) * | 1998-06-02 | 2001-06-19 | Siliconix Incorporated | IC chip package with directly connected leads |
US6040626A (en) * | 1998-09-25 | 2000-03-21 | International Rectifier Corp. | Semiconductor package |
TW441139B (en) * | 2000-03-10 | 2001-06-16 | Huang Wen Bin | Manufacturing method of surface mounted-type diode |
KR100951626B1 (ko) * | 2002-03-08 | 2010-04-09 | 로무 가부시키가이샤 | 반도체 칩을 사용한 반도체 장치 |
TWI233195B (en) * | 2003-12-19 | 2005-05-21 | Concord Semiconductor Corp | Method of distributing conducting adhesive to lead frame |
CN2686094Y (zh) * | 2004-01-05 | 2005-03-16 | 番禺得意精密电子工业有限公司 | 电子元件 |
TWM359797U (en) * | 2009-01-20 | 2009-06-21 | Anova Technologies Co Ltd | Surface-mount semiconductor package structure and its lead-frame structure |
-
2010
- 2010-06-21 KR KR1020100058818A patent/KR101101018B1/ko active IP Right Grant
-
2011
- 2011-03-23 US US13/805,666 patent/US9065030B2/en not_active Expired - Fee Related
- 2011-03-23 CN CN201180030496.1A patent/CN103038878B/zh not_active Expired - Fee Related
- 2011-03-23 WO PCT/KR2011/001978 patent/WO2011162470A2/ko active Application Filing
- 2011-06-20 TW TW100121436A patent/TWI424549B/zh not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0982865A (ja) * | 1995-09-08 | 1997-03-28 | Canon Inc | リード端子付きチップダイオード及びこれを用いた太陽電池モジュール |
JPH09219481A (ja) * | 1997-03-17 | 1997-08-19 | Rohm Co Ltd | 面実装型ダイオードの製造方法 |
JP2003347491A (ja) * | 2002-05-28 | 2003-12-05 | Renesas Technology Corp | 半導体装置 |
US20080224285A1 (en) * | 2007-03-12 | 2008-09-18 | Lim Seung-Won | Power module having stacked flip-chip and method of fabricating the power module |
Also Published As
Publication number | Publication date |
---|---|
CN103038878B (zh) | 2016-02-24 |
TWI424549B (zh) | 2014-01-21 |
WO2011162470A2 (ko) | 2011-12-29 |
US20130087826A1 (en) | 2013-04-11 |
KR101101018B1 (ko) | 2011-12-29 |
US9065030B2 (en) | 2015-06-23 |
CN103038878A (zh) | 2013-04-10 |
TW201205763A (en) | 2012-02-01 |
KR20110138749A (ko) | 2011-12-28 |
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