WO2011145269A1 - Ic電流測定用装置、及びic電流測定用アダプタ - Google Patents
Ic電流測定用装置、及びic電流測定用アダプタ Download PDFInfo
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- WO2011145269A1 WO2011145269A1 PCT/JP2011/002274 JP2011002274W WO2011145269A1 WO 2011145269 A1 WO2011145269 A1 WO 2011145269A1 JP 2011002274 W JP2011002274 W JP 2011002274W WO 2011145269 A1 WO2011145269 A1 WO 2011145269A1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/20—Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
- G01R1/203—Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2896—Testing of IC packages; Test features related to IC packages
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/58—Testing of lines, cables or conductors
Definitions
- the present invention relates to an apparatus for measuring an IC current for measuring a current flowing in an integrated circuit (IC).
- an adapter for separating the IC side power supply and the substrate side power supply is inserted between the IC and the substrate, and a positive electrode test terminal on the adapter connected to the IC side power supply and the substrate side power supply
- a technique is disclosed for measuring the total amount of current consumed by the IC by connecting an ammeter between the negative electrode test terminal on the adapter to be connected.
- the connected ammeter can measure the total amount of current flowing to the IC, it can not measure the current flowing to each of the plurality of terminals of the IC.
- the present invention has been made in view of such problems, and is a device for measuring an IC current mounted between an IC and a substrate in order to measure a current flowing to a terminal of the IC.
- An object of the present invention is to provide a device for measuring an IC current which can measure currents flowing to terminals independently of each other.
- an IC current measurement device is an IC current measurement device mounted between the IC and a substrate to measure a current flowing to a terminal of the IC, A plurality of IC side terminals for connecting to the plurality of terminals of the IC and a plurality of substrate sides used to connect to the plurality of terminals of the substrate and electrically connected to the corresponding IC side terminals, respectively.
- the first element that generates a potential difference according to the current flowing between the terminal, the IC-side first terminal, and the substrate-side terminal corresponding to the IC-side first terminal, the IC-side second terminal, and the IC-side second terminal A second element that generates a potential difference according to the current flowing between the second element and the substrate side terminal, a first lead terminal for outputting the potential difference generated in the first element to the outside, and the potential difference generated in the second element To output to the outside Characterized in that it comprises a second extraction terminal.
- the device for measuring IC current having the above-described configuration measures the potential difference generated in the first element using the first lead terminal, and thereby the substrate corresponding to the IC side first terminal and the IC side first terminal. It becomes possible to measure the current flowing between it and the side terminal, and measure the potential difference generated in the second element using the second lead terminal to correspond to the IC side second terminal and the IC side second terminal. It is possible to measure the current flowing between it and the substrate side terminal.
- the current flowing to the IC-side first terminal and the current flowing to the IC-side second terminal can be measured independently of each other.
- Sectional view of the device 100 for IC current measurement Top view of IC current measurement apparatus 100 viewed from above
- An enlarged plan view of a portion of the plan view of the device 100 for IC current measurement Diagram showing the characteristics obtained by Fourier transforming the measured current Sectional view of the first modified IC current measurement device 500 Top view of the second modified IC current measurement device 600 as viewed from above Sectional view of the third modified IC current measurement device 700
- Sectional view of a fourth modified IC current measurement device 800 Cross section of the fifth modified IC current measurement device 900
- Sectional view of seventh modified IC current measurement device 1200 Cross section of the raised substrate 1300 Cross section of IC current measurement device 1400
- Embodiment 1 As one embodiment of the device for measuring IC current according to the present invention, current flowing in each of the power supply terminals of an IC provided with a total of 25 terminals of 5 ⁇ 5 packaged by a BGA (Ball Grid Array) package is measured An apparatus for measuring an IC current for the purpose will be described.
- BGA Bit Grid Array
- the IC current measurement device is mounted between the IC and the substrate to electrically connect each terminal of the IC to each terminal of the corresponding substrate, and in particular, the power supply terminal.
- a resistance of 1 ⁇ is inserted in each of the current paths between the power supply terminal of the IC and the power supply terminal of the corresponding substrate.
- this IC current measurement device is provided with a terminal for measuring the potential difference between both ends of each of the resistors inserted.
- a measurer who measures the current flowing to the power supply terminal of the IC mounts this IC current measuring device between the IC and the substrate to be measured, and the potential difference between both ends of the interpolation resistance corresponding to the power supply terminal to be measured. By measuring, the current flowing to the power supply terminal of the operating IC can be measured.
- FIG. 1 is a cross-sectional view of an IC current measurement device 100 mounted between an IC 101 and a substrate 102.
- the IC 101 is an IC having a total of 25 IC terminals of 5 ⁇ 5 packaged by a BGA package and internally having a circuit operating at 667 MHz, for example.
- a terminal 180 to an IC terminal 184 are provided.
- the IC terminal 181 and the IC terminal 183 are power terminals, and the IC terminal 182 is a ground terminal.
- IC terminals of the IC 101, 8 are power terminals and 8 are ground terminals, including those not shown in FIG.
- the substrate 102 is a substrate provided with 25 substrate terminals respectively corresponding to the IC terminals of the IC 101, and provided with substrate terminals 185 to 189 on the cross section shown in FIG.
- each of the substrate terminals matches the relative position of each of the corresponding IC terminals.
- the substrate terminal 186 and the substrate terminal 188 are power terminals, and the substrate terminal 187 is a ground terminal.
- eight are power supply terminals and eight are ground terminals, including those not shown in FIG.
- the substrate 102 further has a bypass capacitor connected to the power supply terminal in the vicinity of the power supply terminal, and a substrate terminal 186 and a substrate terminal 186 in the vicinity of the power supply terminal on the cross section shown in FIG.
- a bypass capacitor 148 connected is provided, and a bypass capacitor 149 connected to the substrate terminal 188 is provided in the vicinity of the substrate terminal 188 which is a power supply terminal.
- the IC current measurement device 100 is formed of a laminated substrate in which the wiring layer 120, the component built-in layer 110, and the wiring layer 130 are stacked, and the IC 101 side of the IC current measurement device 100 is shown in FIG.
- the IC-side terminal 121 to IC-side terminal 125 and the lead-out terminal 126 to the lead-out terminal 129 are provided on the main surface of the substrate, and the substrate-side terminal 131 to the substrate side And 135.
- the IC current measurement device 100 includes 25 IC side terminals and 16 lead terminals on the main surface on the IC 101 side of the IC current measurement device 100, including those not shown in FIG. Twenty-five substrate side terminals are provided on the main surface on the 102 side.
- the component built-in layer 110 is formed to include a plurality of conductive (for example, copper) vias and a 1 ⁇ resistive element penetrating between the main surface on the IC 101 side and the main surface on the substrate 102 side.
- a 0.6 mm substrate made of, for example, a thermosetting resin, and on the cross section shown in FIG. 1, the via 111, the via 112, the resistive element 113, the via 114, the resistive element 115, the via 116, and the via 117 are provided.
- the resistor element included in the component built-in layer 110 is, for example, a chip resistor having a size of 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm, which is commercially available at low cost and easily available.
- the wiring layer 120 is formed by stacking the first substrate 120a, the second substrate 120b, and the third substrate 120c, and has a metal (for example, copper) wiring and a conductive (for example, copper) contact hole.
- the via and the contact hole are substantially the same, here, the one included in the wiring layer 120 and the wiring layer 130 is referred to as a contact hole, and included in the component built-in layer 110.
- a via we call something that is called a via.
- a first ground plane 140 formed of a metal (for example, copper) thin plate is formed between the second substrate 120 b and the third substrate 120 c.
- the wiring between the first substrate 120a and the second substrate 120b and the first ground plane can be electrically connected.
- the wiring on the back surface of the third substrate 120c and the first ground plane are in an electrically capacitively coupled state.
- the wiring layer 130 is formed by laminating the fourth substrate 130a, the fifth substrate 130b, and the sixth substrate 130c, and has a metal (for example, copper) wiring and a conductive (for example, copper) contact hole.
- the wiring layer electrically connects the side terminal to the lower end of the via included in the component built-in layer 110 or the lower end of the resistance element, and has a thickness of 0.3 mm, for example.
- a second ground plane 141 made of a metal (for example, copper) thin plate is formed between the fourth substrate 130a and the fifth substrate 130b.
- the wiring on the surface of the fourth substrate 130a and the first ground plane are electrically capacitively coupled,
- the interconnection between the fifth substrate 130b and the sixth substrate 130c and the second ground plane are in a state where they are electrically capacitively coupled.
- the IC side terminal 121 to the IC side terminal 125 are disposed on the main surface of the IC 101 side of the IC current measurement device 100, and are terminals for connecting to the corresponding IC terminals 180 to 184, respectively.
- the IC terminal 180 to the IC terminal 184 are connected through the solder 190 to the solder 194.
- the IC side terminals not shown in FIG. 1 are disposed on the main surface of the IC current measurement device 100 on the IC 101 side, and connected to the corresponding IC terminals, respectively. These terminals are connected to corresponding IC terminals through solder.
- the IC side terminals 122 and the IC side terminals 124 are power supply terminals, and the IC side terminals 123 are ground terminals.
- the substrate side terminals 131 to the substrate side terminals 135 are disposed on the main surface of the substrate 102 side of the IC current measurement device 100, and are terminals for connecting to the corresponding substrate terminals 185 to 189, respectively.
- And solder 199 are connected to the substrate terminal 185 to the substrate terminal 189.
- the substrate side terminals not shown in FIG. 1 are disposed on the main surface on the substrate 102 side of the IC current measurement device 100, and respectively corresponding substrate terminals Terminals for connection, which are respectively connected to corresponding substrate terminals through solder.
- the substrate terminals are disposed at positions facing the corresponding IC terminals.
- the substrate terminals 132 and the substrate terminals 134 are power terminals, and the substrate terminals 133 are ground terminals.
- the lead terminal 126 and the lead terminal 127 are disposed on the main surface of the IC current measurement device 100 on the IC 101 side, and are terminals for measuring the potential difference between the upper end and the lower end of the resistance element 113.
- the lead terminal 128 and the lead terminal 129 are disposed on the main surface of the IC current measurement device 100 on the side of the IC 101, and are terminals for measuring the potential difference between the upper end and the lower end of the resistance element 115.
- lead terminals not shown in FIG. 1 are disposed on the main surface of the IC current measurement device 100 on the IC 101 side, and between the upper end and the lower end of the corresponding resistive element. It is a terminal for measuring the potential difference.
- Two lead terminals correspond to one resistance element.
- each of the terminals which is neither a power supply terminal nor a ground terminal is a contact hole of the first substrate 120a arranged in a straight line, a contact hole of the second substrate 120b, and a contact hole of the third substrate 120c.
- the IC side terminal 121 which is not a power supply terminal or a ground terminal on the cross section shown in FIG. 1 is connected to the upper end of the via 111 by a wiring path 165 formed by contact holes stacked vertically in a straight line.
- the lower end of the via 111 is connected to the substrate side terminal 131 by a wiring path 173 formed by contact holes stacked vertically in a straight line.
- each of the ground terminals includes the contact holes of the first substrate 120a, the contact holes of the second substrate 120b, the contact holes of the third substrate 120c, and the component built-in layer 110 arranged in a straight line. It is connected to each of the ground terminals of the corresponding substrate side terminals via the via, the contact hole of the fourth substrate 130a, the contact hole of the fifth substrate 130b, and the contact hole of the sixth substrate 130c, and further , And the first ground plane 140 and the second ground plane 141.
- the IC side terminal 123 which is a ground terminal on the cross section shown in FIG. 1 is connected to the first ground plane 140 and the upper end of the via 114 by the wiring path 166 formed by contact holes stacked vertically in a straight line.
- the lower end of the via 114 is connected to the second ground plane 141 and the substrate side terminal 133 which is a ground terminal by a wiring path 174 formed by contact holes stacked vertically in a straight line.
- Each of the power supply terminals among the IC-side terminals includes the contact holes of the first substrate 120a, the contact holes of the second substrate 120b, the contact holes of the third substrate 120c, and the component built-in layer 110 arranged in a straight line. It is connected to each of the power supply terminals of the corresponding substrate side terminals through the resistance element, the contact hole of the fourth substrate 130a, the contact hole of the fifth substrate 130b, and the contact hole of the sixth substrate 120c. .
- the upper end of the corresponding resistive element is the contact hole of the third substrate 120c, the contact hole of the second substrate 120b, and the first substrate 120a and the second substrate 120b.
- the contact hole of the first substrate 120a to one of the two lead terminal pairs, and the lower end of the corresponding resistive element is connected to the surface of the fourth substrate 130a.
- the IC side terminal 124 which is a power supply terminal on the cross section shown in FIG. 1 is connected to the upper end of the resistive element 115 and the lead terminal 128 by the wiring path 163 formed by the contact hole and the wiring
- the lower end of the via 115 is connected to the lower end of the via 116 and the substrate side terminal 134 by a wiring path 172 formed by the contact hole and the wiring
- the upper end of the via 116 is a wiring path formed by the contact hole and the wiring
- the lead terminal 129 is connected to the lead terminal 129.
- FIG. 2 is a plan view of the IC current measurement device 100 as viewed from above.
- the plane perpendicular to the main surface on the IC 101 side of the IC current measurement device 100 including the line segment connecting point A and point B shown in the figure is the cross section of the IC current measurement device 100 shown in FIG. ing.
- the IC side terminals 201, 205, 207, 209, 122, 124, 216, 220 are power supply terminals
- the IC side terminals 202, 204, 208, 211, 215, 123, 216, 220 are , Ground terminal.
- the lead terminal 126 and the lead terminal 127 are terminals for measuring the potential difference between both ends of the resistance element connected to the IC side terminal 122 which is a power supply terminal, and the lead terminal 128 and the lead terminal 129 are power terminals.
- the lead terminal 231 and the lead terminal 232 are both ends of the resistive element connected to the IC side terminal 201 which is a power supply terminal.
- the lead-out terminal 233 and the lead-out terminal 234 are terminals for measuring the potential difference between both ends of the resistive element connected to the IC side terminal 205 which is a power supply terminal, and the lead-out terminal
- the reference numeral 235 and the lead terminal 236 are terminals for measuring the potential difference between both ends of the resistive element connected to the IC side terminal 207 which is a power supply terminal, and the lead terminal 237 and the lead terminal
- the reference numeral 38 denotes a terminal for measuring the potential difference between both ends of the resistive element connected to the IC terminal 209 which is a power supply terminal, and the lead terminal 239 and the lead terminal 240 are connected to the IC terminal 216 which is a power terminal.
- the lead terminal 241 and the lead terminal 242 are for measuring the potential difference of the both ends of the resistive element connected to the IC side terminal 220 which is a power supply terminal. It is a terminal of.
- Each of the side surfaces of the IC current measurement device 100 has a distance of 1.5 mm from the corresponding side surface of the IC 101 in a state where the IC 101 is mounted.
- FIG. 3 is an enlarged plan view of a portion of the region 250 of FIG.
- those shown by broken lines are wires, vias and the like included inside the device 100 for measuring IC current, and for convenience, they are visible from the outside of the device 100 for measuring IC current Although it will be described as it is, it can not be seen directly from the outside of the IC current measurement device 100 in practice.
- the wire 301 is a wire formed between the first substrate 120a (see FIG. 1) and the second substrate 120b (see FIG. 1) among the wires connecting the IC side terminal 124 and the lead terminal 128, The wiring is performed avoiding a contact hole disposed under the IC side terminal 125.
- the wire 302 is a wire formed on the back surface of the third substrate 120c (see FIG. 1) among the wires connecting the upper end of the via 116 and the lead terminal 129, and is disposed under the IC side terminal 125 Are routed around the contact holes.
- the resistance value of the resistance element inserted in the IC current measurement device 100 is 1 ⁇
- the potential difference v (V) between both ends of the resistance element directly indicates the current i (A) flowing through the resistance element. It becomes.
- a current measuring person who measures the current flowing to the power supply terminal of the IC 101 measures the potential difference between both ends of the resistance element corresponding to the power supply terminal of the IC 101 to be measured, that is, between the lead terminals forming a pair corresponding to the resistance element.
- the potential difference can be obtained, for example, by a spectrum analyzer using a differential active probe, for example, to measure the current flowing to the power supply terminal.
- the measured current contains various frequency components.
- Some commercially available spectrum analyzers have a function of performing Fourier transform on the current measured for a predetermined time according to the frequency included in the current and outputting it.
- FIG. 4 is supplied to the power supply terminal of the IC obtained by Fourier-transforming the current of the power supply terminal of the IC 101 measured for a predetermined time (for example, 1 second) using the device 100 for IC current measurement. It is a figure which shows the frequency characteristic of an electric current.
- FIG. 4A shows an IC terminal (hereinafter referred to as an IC power supply terminal A) corresponding to the IC side terminal 122 (see FIG. 2) which is a power supply terminal. ) Is a diagram showing frequency characteristics of the current flowing to.
- the first peak 401 is formed at the position of 667 MHz in frequency component
- the second peak 402 to the fifth peak 405 are formed at the position of frequency component of integral multiple of 667 MHz.
- the current is supplied to the circuit operating at 667 MHz in the IC 101 through the IC power supply terminal A.
- FIG. 4B is a diagram showing frequency characteristics of current flowing in an IC terminal (hereinafter referred to as an IC power supply terminal B) corresponding to, for example, an IC side terminal 220 (see FIG. 2) which is a power supply terminal.
- an IC power supply terminal B IC power supply terminal
- the first peak 411 is formed at the position of 667 MHz in frequency component
- the second peak 412 to the fifth peak 415 are formed at the position of frequency component of integral multiple of 667 MHz.
- each of the first peak 411 to the fifth peak 415 is smaller than that of each of the first peak 401 to the fifth peak 405 in FIG. 4A.
- FIG. 4C is a diagram showing frequency characteristics of current flowing in an IC terminal (hereinafter referred to as an IC power terminal C) corresponding to the IC side terminal 205 (see FIG. 2) which is a power terminal, for example.
- the pair of lead terminals is for measuring the difference between the potential at the upper end of the resistive element and the potential at the lower end, but in the first modified IC current measuring device, the pair of lead terminals is The pair is for measuring the difference between the potential at the top of the resistive element and the ground potential.
- the configuration of the first modified IC current measurement device according to the second embodiment will be described below with reference to the drawings, focusing on differences from the IC current measurement device 100 according to the first embodiment.
- FIG. 5 is a cross-sectional view of the first modified IC current measurement device 500 mounted between the IC 101 and the substrate 102.
- the wiring layer 120 is deformed to the wiring layer 520 from the IC current measurement device 100, the component built-in layer 110 is deformed to the component built-in layer 510, and the wiring layer 130 is the wiring layer 530 As a result, the outer peripheral side of the pair of lead terminals is deformed so as to have the ground potential.
- the wiring layer 520 is a part of the wiring path of the wiring layer 120 deformed, and a terminal on the outer peripheral side of the pair of lead terminals is deformed so as to be connected to the first ground plane 140. It is a thing.
- the lead terminal 126 and the first ground plane 140 are connected, and the lead terminal 129 and the first ground plane 140 are connected.
- the component built-in layer 510 is a part of the component built-in layer 110 deformed, and a via for electrically connecting one end of the resistance element on the substrate 102 side to the lead terminal from the component built-in layer 110 is It has been deleted.
- the via 112 (see FIG. 1) and the via 116 (see FIG. 1) are removed from the component built-in layer 110.
- the wiring layer 530 is a part of the wiring path of the wiring layer 130 deformed, and is a wiring path for electrically connecting one end of the resistance element on the substrate 102 side to the lead terminal from the wiring layer 130. Is the one that was deleted.
- the wiring layer 130 connects the lower end of the via 112 (see FIG. 1) and the lower end of the resistive element 113 (see FIG. 1), and the lower end of the via 116 (see FIG. 1) And the wiring connecting the lower end of the resistance element 115 (see FIG. 1) are deleted.
- a current measurement person who measures the current flowing to the power supply terminal of the IC 101 measures the ground plane 140 and the upper end of the resistive element corresponding to the power supply terminal of the IC 101 to be measured.
- a potential difference can be measured, for example, by using a differential probe capable of measuring a voltage between two terminals, and measuring a potential between measurement power terminals forming a pair corresponding to the resistance element.
- the potential of the ground plane 140 is the same as the ground potential of the substrate 102, and the potential of the lower end of the resistance element is the same as the power supply potential of the substrate 102.
- the potential difference between the upper end and the lower end of the resistance element can be determined by subtracting the potential difference between the power supply potential and the ground potential from the potential difference between the two.
- a current measurement person who measures the current flowing to the power supply terminal of the IC 101 can measure the current flowing to the power supply terminal of the IC 101 to be measured.
- the number of vias to be interpolated can be reduced as compared with the IC current measurement device 100 according to the first embodiment.
- Embodiment 3 hereinafter, as one embodiment of the IC current measurement device according to the present invention, a second variation IC current measurement according to the third embodiment in which a part of the first variation IC current measurement device 500 according to the second embodiment is modified Device will be described.
- the outer peripheral extraction terminal of the pair of extraction terminals is the extraction terminal for measuring the ground potential.
- the second deformation current measurement device uses the ground potential. Instead of the lead-out terminal for measurement, a linear electrode for measuring the ground potential is arranged on the main surface on the IC 101 side.
- FIG. 6 is a plan view of the second modified IC current measurement device 600 as viewed from above.
- the second modified IC current measurement device 600 all the lead terminals for measuring the ground potential are eliminated from the first modified IC current measurement device 500, and instead, the first electrode 610 for measuring the ground potential is used. And a second electrode 620 for measuring the ground potential, a third electrode 630 for measuring the ground potential, and a fourth electrode for measuring the ground potential. is there.
- the first electrode 610 is a linear electrode connected to the ground plane 140 via the contact holes 611 to 615
- the second electrode 620 is connected to the ground plane 140 via the contact holes 621 to 625.
- the third electrode 630 is a linear electrode to be connected
- the third electrode 630 is a linear electrode connected to the ground plane 140 through the contact holes 631 to 635.
- the fourth electrode 640 is a contact electrode It is a linear electrode connected to the ground plane 140 through the contact hole 645.
- the electrode for measuring the ground potential is linear compared to the first modified IC current measurement device 500, so that the external measurement device The degree of freedom in the place where the probe etc. is applied becomes high.
- the pair of lead terminals is for measuring the difference between the electric potential at the upper end of a specific resistance element and the electric potential at the lower end of the resistance element.
- the lower ends of all the resistance elements are connected to each other by a wire, so that the same potential is obtained. It is intended to measure the
- FIG. 7 is a cross-sectional view of the third modified IC current measurement device 700 mounted between the IC 101 and the substrate 102.
- the wiring layer 120 is deformed to the wiring layer 720 from the IC current measurement device 100, the component built-in layer 110 is deformed to the component built-in layer 710, and the wiring layer 130 is the wiring layer 730 In the pair of lead terminals, the lead terminals on the outer peripheral side are deformed so as to have the potential of the lower end common to the resistance elements.
- the wiring layer 730 is a part of the wiring path of the wiring layer 130 deformed, and is deformed such that all of the power supply terminals of the substrate side terminals are connected to each other.
- the substrate side terminal 132 as the power supply terminal and the substrate side terminal 134 as the power supply terminal are connected via the wiring 703.
- the component built-in layer 710 is a part of the component built-in layer 110 deformed, and a via for electrically connecting one end of the resistance element on the substrate 102 side to the lead terminal from the component built-in layer 110 is , Except for one, all were deleted.
- the wiring layer 720 is a part of the wiring layer 120 in which the wiring path is deformed, and all the terminals on the outer peripheral side of the pair of lead terminals are connected to one end of the resistance element on the substrate 102 side. It is deformed to be connected with the upper end of.
- the lead terminal 126 and the upper end of the via 112 are connected via the wiring path 701, and the lead terminal 129 and the upper end of the via 112 are connected via the wiring path 702.
- the number of vias to be interpolated can be reduced compared to the IC current measurement device 100 according to the first embodiment.
- the Fifth Preferred Embodiment as an embodiment of an IC current measurement apparatus according to the present invention, a fourth modified IC current measurement apparatus according to a fifth embodiment in which a part of the IC current measurement apparatus 100 according to the first embodiment is modified explain.
- the fourth modified IC current measurement device is for the IC current measurement device 100 on the wiring path between the lead terminal and the upper end of the resistive element and on the wiring path between the lead terminal and the lower end of the resistive element. , A reflection suppressing resistance element is inserted.
- the reflection suppressing resistance element is for suppressing a reflected wave generated by the alternating current component included in the current to be measured being reflected by the extraction terminal.
- FIG. 8 is a cross-sectional view of a fourth modified IC current measurement device 800 mounted between the IC 101 and the substrate 102.
- the wiring layer 120 is deformed to the wiring layer 820 from the IC current measurement device 100
- the component built-in layer 110 is deformed to the component built-in layer 810
- the wiring layer 130 is the wiring layer 830
- the reflection is suppressed on the wiring path between the lead terminal and the upper end of the resistance element and on the wiring path between the lead terminal and the lower end of the resistance element.
- the component built-in layer 810 is a part of the component built-in layer 110 deformed, and the reflection suppressing resistive element on the wiring path between the upper end of the resistive element and the lead terminal, the lower end of the resistive element and the lead terminal And a reflection suppressing resistive element on the wiring path of (1) is added, and a portion of the via is deformed so as to be moved.
- the reflection suppressing resistive element 821 to the reflection suppressing resistive element 824 are added, the via 112 (see FIG. 1) is moved to the via 811 and the via 116 (see FIG. 1) is the via 812 It has been moved to
- Each of the reflection suppressing resistive element 821 to the reflection suppressing resistive element 824 is, for example, a chip resistance having a resistance value of 100 ⁇ and a size of 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm, and is commercially available at low cost. , Are readily available.
- the wiring layer 830 is a part of the wiring layer 130 deformed, and a reflection suppressing resistance element is added on the wiring path between the upper end of the resistance element and the lead terminal, and the lower end of the resistance element and the lead terminal A part of the wiring path is deformed due to the addition of the reflection suppressing resistive element on the wiring path of the above and the movement of the location of the part of the via.
- a path connecting the lower end of the resistive element 113 and the lower end of the reflection suppressing resistive element 821 is added to the wiring path 171, and the lower end of the resistive element 115 and the reflection suppressing resistance
- a path connecting the lower end of the element 823 is added, a wiring path 871 connecting the lower end of the reflection suppressing resistive element 822 and the lower end of the via 811 is added, and the lower end of the reflection suppressing resistive element 824 and the lower end of the via 812
- the wiring path connecting the lower end of the resistive element 113 and the lower end of the via 112 is removed, and the lower end of the resistive element 115 and the via 116 (see FIG.
- the wiring path connecting the lower end is deleted.
- the wiring layer 820 is a part of the wiring layer 120 deformed, and a reflection suppressing resistive element is added on the wiring path between the upper end of the resistive element and the lead terminal, and the lower end of the resistive element and the lead terminal As a result of the addition of the reflection suppressing resistive element on the wiring path of and the movement of the location of a part of the vias, a part of the wiring paths is deformed.
- a path connecting the upper end of resistive element 113 and the upper end of reflection suppressing resistive element 822 is added to interconnection path 162, and the interconnection path connecting the upper end of via 811 to lead terminal 126.
- 861 is added
- a wiring path 862 connecting the upper end of the reflection suppressing resistive element 821 and the lead terminal 127 is added, and the upper end of the resistance element 115 and the upper end of the reflection suppressing resistive element 824 are connected to the wiring path 163
- a path is added, a wiring path 864 connecting the upper end of the via 812 and the lead terminal 129 is added, a wiring path 863 connecting the upper end of the reflection suppressing resistive element 823 and the lead terminal 128 is added, and a wiring path 162 Of the paths (see FIG.
- the path to the lead terminal 127 is eliminated, and the wiring path 161 (see FIG. 1) between the upper end of the via 112 (see FIG. 1) and the lead terminal 126 Of the wiring path 163 (see FIG. 1) is deleted and the wiring path 164 (see FIG. 1) of the upper end of the via 116 (see FIG. 1) and the lead terminal 129 is deleted. ing.
- the AC component included in the current to be measured is generated by being reflected by the extraction terminal.
- the reflected wave can be suppressed.
- Embodiment 6 As an embodiment of an IC current measurement device according to the present invention, a fifth modified IC current measurement device according to the sixth embodiment in which a portion of the IC current measurement device 100 according to the first embodiment is modified explain.
- the IC current measurement device 100 measures the current flowing through the current path by measuring the potential difference between the upper end and the lower end of the resistance element on the current path of the current flowing through the terminal to be measured.
- the fifth modified IC current measurement device forms an electromagnetic wave receiving element for receiving an electromagnetic wave generated by fluctuation of the current flowing in the current path, without inserting a resistance element on the current path. By measuring the potential at both ends of the electromagnetic wave receiving element, the current flowing in the current path is measured.
- FIG. 9 is a cross-sectional view of a fifth modified IC current measurement device 900 mounted between the IC 101 and the substrate 102.
- the wiring layer 120 is deformed to the wiring layer 920 from the IC current measurement device 100, the component built-in layer 110 is deformed to the component built-in layer 910, and the wiring layer 130 is the wiring layer 930
- each of the power supply terminals of the IC side terminals and each of the power supply terminals of the corresponding substrate side terminals are deformed so as to be connected without passing through the resistance element, and The pair of lead terminals is deformed so as to measure the potential difference between both ends of the coil formed in the vicinity of the current path to be measured.
- the component built-in layer 910 is a part of the component built-in layer 110 deformed, and from the component built-in layer 110, the resistance element is replaced with a via, and the via for connecting the lower end of the resistance element and the lead terminal Is eliminated, and an electromagnetic wave receiving element is formed in the vicinity of the via of the current path to be measured.
- FIG. 10 is a perspective view showing the structure of an electromagnetic wave receiving element formed in the vicinity of the current path.
- the current path 1000 is a current path of a current to be measured, which is formed by a via, a contact hole, and the like.
- the electromagnetic wave receiving element is formed by the vias 1001 to 1006, the wirings 1012 and 1013 formed on the back surface of the wiring layer 920, and the wirings 1021 to 1023 formed on the surface of the wiring layer 930.
- a coil is formed.
- the distance between via 1002 and current path 1000 is 0.3 mm
- the distance between via 1004 and current path 1000 is 0.3 mm
- the distance between via 1006 and current path 1000 is 0.3 mm
- the distance between via 1001 and current path 1000 is 0.6 mm
- the distance between via 1003 and current path 1000 is 0.6 mm
- the distance between via 1005 and current path 1000 is 0.6 mm It is.
- the electromagnetic wave reception element 901 and the electromagnetic wave reception element 902 are added, the resistance element 113 (see FIG. 1) is changed to the via 923, and the resistance element 115 (see FIG. 1) is the via 925. It has been modified so that vias 112 (see FIG. 1) and vias 116 (see FIG. 1) have been deleted.
- the wiring layer 920 is a part of the wiring path of the wiring layer 120 deformed, and is deformed such that the lead terminal is connected to the terminal of the electromagnetic wave receiving element.
- the wiring path 911 of one terminal of the electromagnetic wave reception element 901 and the extraction terminal 126 is added, and the wiring path 912 of the other terminal of the electromagnetic wave reception element 901 and the extraction terminal 127 is added.
- the wiring path 914 between one terminal of the electromagnetic wave reception element 902 and the lead terminal 128 is added, the wiring path 913 between the other terminal of the electromagnetic wave reception element 902 and the lead terminal 129 is added, and the lead terminal 126 and the via 112
- the wiring path 161 (see FIG. 1) connecting with the upper end of FIG. 1 is deleted, and the path to the lead terminal 127 of the wiring path 162 (see FIG. 1) is deleted.
- the wiring path 164 (see FIG. 1) connecting with the upper end of FIG. 1) is deleted, and the path to the lead terminal 129 in the wiring path 163 (see FIG. 1) is deleted. .
- the wiring layer 930 is a part of the wiring path of the wiring layer 130 deformed, and a part of the wiring path is deleted along with the deletion of the wiring path between the lower end of the resistance element and the lead terminal. It is.
- the current can be measured by measuring the potential difference generated in the electromagnetic wave reception element which is physically not in contact with the current path of the current to be measured.
- the sixth modified IC current measurement device has a wiring path between the lead terminal and the upper end of the resistance element with respect to the IC current measurement device 100 as in the fourth modified IC current measurement device 800 according to the fifth embodiment.
- a reflection suppressing resistance element is inserted in each of the upper side and the wiring path between the lead terminal and the lower end of the resistance element.
- the fourth modified IC current measurement device 800 according to the fifth embodiment is an example in which the reflection suppressing resistive element is realized by the resistive element included in the component built-in layer 810 (see FIG. 8)
- the sixth modified IC current measurement device according to the seventh embodiment is an example in which the reflection suppressing resistive element is realized by a formation resistance formed in the wiring layer.
- FIG. 12 is a cross-sectional view of the sixth modified IC current measurement device 1200 mounted between the IC 101 and the substrate 102.
- the wiring layer 120 is deformed to the wiring layer 320 from the IC current measurement device 100
- the component built-in layer 110 is deformed to the component built-in layer 310
- the wiring layer 130 is the wiring layer 330.
- the reflection is suppressed on the wiring path between the lead terminal and the upper end of the resistance element and on the wiring path between the lead terminal and the lower end of the resistance element.
- the component built-in layer 310 is one in which the component built-in layer 110 is deformed such that the locations of some vias are moved.
- the via 112 (see FIG. 1) is moved to the via 1212 and the via 116 (see FIG. 1) is moved to the via 1216.
- the wiring layer 320 is a part of the wiring layer 120 deformed so that the reflection suppressing resistance element is added on the wiring path between the upper end of the resistance element and the lead terminal, and a part of the via As a result of the movement of the part of the wiring path, a part of the wiring path is deformed.
- the reflection suppressing resistive element 1230 is added on the wiring path connecting the upper end of the resistive element 113 and the lead terminal 127, and the wiring connecting the upper end of the resistive element 115 and the lead terminal 128 A reflection suppressing resistive element 1210 is added on the path.
- the reflection suppressing resistance element 1210 and the reflection suppressing resistance element 1230 are, for example, formation resistances formed by trimming a copper wiring by a laser trimming method, and have a resistance value of 100 ⁇ , for example. .
- the wiring layer 330 is a part of the wiring layer 130 deformed so that a reflection suppressing resistance element is added on the wiring path between the lower end of the resistance element and the lead terminal, and a part of the via As a result of the movement of the part of the wiring path, a part of the wiring path is deformed.
- the reflection suppressing resistive element 1230 is added on the wiring path connecting the upper end of the resistive element 113 and the lead terminal 127, and the wiring connecting the upper end of the resistive element 115 and the lead terminal 129 A reflection suppressing resistive element 1210 is added on the path.
- the reflection suppressing resistive element 1210 and the reflection suppressing resistive element 1230 are, for example, formation resistors formed by trimming a copper wiring by a laser trimming method, and have, for example, a resistance value of 100 ⁇ . There is.
- the above-described sixth modified IC current measurement device 1200 even if the component built-in layer 310 is not provided with the component reflection suppressing resistive element, it is the same as the fourth modified IC current measurement device 800 according to the fifth embodiment. As compared with the IC current measurement device 100 according to the first embodiment, it is possible to suppress a reflected wave generated by the alternating current component included in the current to be measured being reflected by the extraction terminal.
- Embodiment 8 hereinafter, as an embodiment of the IC current measurement device according to the present invention, a bulking substrate mounted on the substrate 102 side main surface of the IC current measurement device 100 (see FIG. 1) according to the first embodiment will be described.
- This bulking substrate is a rectangle whose main surface is substantially the same as the main surface of the IC 101, that is, a rectangle in which each of width and height is substantially the same as the width and height of the main surface of the IC 101, For example, it has an external appearance of a substantially rectangular solid of about 2 mm, and is used by being connected to the substrate 102 in a state of being mounted on the substrate 102 side main surface of the IC current measurement device 100. As a result, a gap of about 2 mm, for example, is formed between the IC current measurement device 100 and the substrate 102.
- FIG. 13 is a cross-sectional view of the raised substrate 1300 mounted on the substrate 102 side main surface of the IC current measurement device 100 and further connected to the substrate 102.
- the raised substrate 1300 has the surface side terminals 395 to the surface side terminals 399 on the main surface on the IC current measurement device 100 side, and the back surface side terminal on the substrate 102 side main surface. 385 to back side terminals 389 are provided.
- the bulking substrate 1300 includes 25 surface side terminals on the main surface on the IC current measurement device 100 side, and 25 substrate side terminals on the main surface on the substrate 102 side, including those not shown in FIG. Is equipped.
- Each of the 25 surface-side terminals is electrically connected to each of the corresponding substrate-side terminals by, for example, a copper contact hole.
- the surface side terminals 395 to the surface side terminals 399 are respectively connected to the corresponding substrate side terminals 131 to the substrate side terminals 135 via the solder 195 to the solder 199 respectively,
- the 385 to the back side terminals 389 are respectively connected to the corresponding substrate terminals 185 to 189 through the solders 375 to 379, respectively.
- Each of the surface side terminals not shown in FIG. 13 is also connected to each of the corresponding substrate side terminals through solder, and each of the back side terminals not shown in FIG. 13 is also compatible through solder. Connect to the board terminal to be
- the bulking substrate 1300 described above by being connected to the substrate 102 in a state of being mounted on the substrate 102 side main surface of the device 100 for IC current measurement, between the device 100 for IC current measurement and the substrate 102 A gap will be formed. As a result, even if the device 100 for IC current measurement can not be directly connected to the substrate 102 due to the presence of the electronic components disposed on the main surface of the substrate 102, the device 100 for IC current measurement and the substrate 102. By mounting the bulking substrate 1300 therebetween, the IC current measurement device 100 can be connected to the substrate 102 through the bulking substrate 1300.
- the present invention is not limited to the device for measuring IC current as described in the above-described embodiment.
- the device 100 for measuring the IC current is described as one for measuring the current flowing to the terminal of the IC 101 provided with a total of 25 terminals of 5 ⁇ 5 packaged by the BGA package.
- the IC to be measured is not necessarily limited to the one packaged by the BGA package, and may be one packaged by a method other than the BGA package such as QFP (Quad Flat Package), for example.
- the present invention is not necessarily limited to an IC provided with a total of 25 of 5 ⁇ 5 and a terminal, and may be, for example, an IC provided with a total of 100 terminals of 20 ⁇ 10.
- the IC current measurement device 100 is described as measuring the current flowing to each of the power supply terminals of the IC 101, but the terminal to be measured is necessarily limited to the power supply terminal.
- terminals other than the power supply terminals such as a ground terminal, a digital signal output terminal, a digital signal input terminal, an analog signal input terminal, and an analog signal output may be used.
- the resistance element included in the component built-in layer 110 has been described as a chip resistance having a resistance value of 1 ⁇ and a size of 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm, The resistance value is not necessarily limited to 1 ⁇ , and the size is not necessarily limited to 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm, and is not necessarily limited to the chip resistance.
- the resistance element for example, a chip resistance of 4 ⁇ ⁇ 0.2 mm ⁇ 0.2 mm which is a commercial product, for example, a chip resistance of 4 ⁇ , for example, a metal wiring with high resistance value such as a nichrome wire can be considered.
- the resistance element included in the component built-in layer 110 is described as penetrating the main surface on the IC 101 side of the component built-in layer 110 and the main surface on the substrate 102 side. As long as they are arranged on the wiring path of the target terminal, the resistance element does not necessarily have to penetrate the main surface on the IC 101 side and the main surface on the substrate 102 side.
- FIG. 11 shows a direction in which a part of the IC current measurement device 100 is deformed, and the resistance element included in the component wiring layer is perpendicular to the line connecting the corresponding IC side terminal and the corresponding substrate side terminal.
- FIG. 16 is a cross-sectional view of a sixth modified IC current measurement device 1100 disposed in FIG.
- the resistance element 11 is disposed in a direction perpendicular to the line connecting the IC terminal 122 and the substrate terminal 132, and the resistance element 17 comprises the IC terminal 124 and the substrate terminal 134. It is arranged in the direction perpendicular to the connecting line segment.
- the IC side terminal 122 and the substrate side terminal 132 are connected via the wiring path 61, the via 13, the wiring path 71, the resistance element 11, and the wiring path 171, and the IC side terminal 124 and the substrate side terminal 134 are the wiring path 63, vias 15, wiring paths 72, resistance elements 17, and wiring paths 172 are connected.
- the IC current measurement device 100 is described as being connected to the IC 101 by solder, but each of the IC side terminals is electrically connected to each of the corresponding terminals of the IC 101 So, it is not necessarily limited to what is connected by solder.
- each of the IC side terminals is connected via a socket electrically connected to each of the corresponding terminals of the IC 101.
- the IC current measurement device 100 is described as being connected to the substrate 102 by solder, but each of the substrate side terminals is electrically connected to each of the corresponding terminals of the substrate 102. As long as it is done, it is not necessarily limited to what is connected by solder.
- the resistance value of the reflection suppressing resistive element included in the component built-in layer 810 is 100 ⁇ .
- the reflected wave from the lead terminal is suppressed. If it is a resistance value that can be suppressed, or a reflected wave from the measurement terminal in a state where an external measuring device is connected to the lead-out terminal, or a reflected wave from the external device, it is reflected.
- the resistance value of the suppression resistance element is not necessarily limited to 100 ⁇ .
- the resistive element a commercially available chip resistor of a size of 0.4 mm ⁇ 0.2 mm ⁇ 0.2 mm, for example, a metal wire having a high resistance value such as a nichrome wire, or the like can be considered.
- the reflection suppressing resistance element included in the component built-in layer 810 is described as chip resistance of 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm in size.
- the element is not necessarily limited in size to 0.6 mm ⁇ 0.3 mm ⁇ 0.3 mm, and not necessarily limited to chip resistance.
- the electromagnetic wave receiving element is a coil has been described.
- a metal disposed in parallel with the current path in the vicinity (for example, 0.3 mm) of the current path to be measured It has mutual inductance with the current path to be measured, such as copper (for example) wiring, and the potential difference that can be measured according to the variation of the magnetic field generated by the change of the current flowing to the current path to be measured It does not have to be a coil if it does occur.
- the resistance element for reflection suppression contained in the wiring layer is described as the formation resistance formed by trimming the copper wiring by the laser trimming method, the wiring may be processed. It is not necessary that the resistance is formed by trimming the copper wiring by the laser trimming method as long as the resistance is formed by the following method.
- the copper wiring is replaced with a high resistance metal such as tungsten. It may be formed resistance formed by (10)
- the configuration of the IC current measurement device according to an embodiment of the present invention, its modification and each effect will be described.
- a device for measuring an IC current is a device for measuring an IC current mounted between the IC and a substrate in order to measure a current flowing to a terminal of the IC, A plurality of IC side terminals for connecting to the plurality of terminals of the IC and a plurality of substrate sides used to connect to the plurality of terminals of the substrate and electrically connected to the corresponding IC side terminals, respectively.
- the first element that generates a potential difference according to the current flowing between the terminal, the IC-side first terminal, and the substrate-side terminal corresponding to the IC-side first terminal, the IC-side second terminal, and the IC-side second terminal A second element that generates a potential difference according to the current flowing between the second element and the substrate side terminal, a first lead terminal for outputting the potential difference generated in the first element to the outside, and the potential difference generated in the second element Second pull to output Characterized in that it comprises a terminal.
- the IC current measurement device having the above-described configuration measures the potential difference generated in the first element using the first lead terminal, and thereby the IC side first terminal and the substrate side terminal corresponding to the IC side first terminal. It becomes possible to measure the current flowing between them, and by measuring the potential difference generated in the second element using the second lead terminal, the IC side second terminal and the substrate side terminal corresponding to the IC side second terminal And the current flowing between them can be measured.
- the current flowing to the IC-side first terminal and the current flowing to the IC-side second terminal can be measured independently of each other.
- FIG. 14 is a cross-sectional view of a device 1400 for measuring IC current in the above-described modified example.
- This IC current measuring device 1400 has IC side terminals 1421 to IC side terminals 1425, a first lead terminal 1401, and a second lead terminal 1402 on the main surface on the IC side on the cross section shown in FIG.
- a substrate side terminal 1431 to a substrate side terminal 1435 are provided on the main surface on the substrate side, and a first element 1413 and a second element 1415 are provided inside.
- the IC side terminal 1421 to the IC side terminal 1425 are terminals used to connect with a plurality of terminals of the IC.
- Each of IC terminal 1421 to IC terminal 1425 is realized as each of IC terminal 121 to IC terminal 125 in the first embodiment (see FIG. 1), as an example.
- the substrate side terminal 1431 to the substrate side terminal 1435 are terminals for connecting to the plurality of terminals of the substrate, and are electrically connected to the corresponding IC side terminals 1421 to 1425, respectively.
- Each of the substrate side terminal 1431 to the substrate side terminal 1435 is realized as each of the substrate side terminal 131 to the substrate side terminal 135 in the first embodiment (see FIG. 1) as an example.
- the first element 1413 is an element that generates a potential difference in accordance with the current flowing between the IC side terminal 1422 and the substrate side terminal 1432 and, as an example, the resistance element 113 in the first embodiment (see FIG. 1). To be realized.
- the second element 1415 is an element that generates a potential difference according to the current flowing between the IC side terminal 1424 and the substrate side terminal 1434, and as the resistive element 115 in the first embodiment (see FIG. 1), for example. To be realized.
- the first lead terminal 1401 is a terminal for outputting the potential difference generated in the first element 1413 to the outside, and is realized as the lead terminal 127 in the first embodiment (see FIG. 1) as an example.
- the second lead terminal 1402 is a terminal for outputting the potential difference generated in the second element 1415 to the outside, and is realized as the lead terminal 128 in the first embodiment (see FIG. 1) as an example.
- the first element is a resistive element connected between the IC-side first terminal and a substrate-side terminal corresponding to the IC-side first terminal
- the second element is the resistor.
- a resistive element connected between an IC-side second terminal and a substrate-side terminal corresponding to the IC-side second terminal, wherein the first lead-out terminal is an end on the IC-side terminal side of the first element
- the second lead-out terminal may be connected to one end of the second element on the IC-side terminal side.
- the first element and the second element can be made relatively inexpensive and can be easily obtained resistive elements.
- the IC current measurement device has a first main surface and a second main surface parallel to the first main surface, and one end on the substrate side terminal side of the first element and the inside A third lead terminal connected via a wire, and a fourth lead terminal connected via an inner wire to one end of the second element on the substrate side terminal side, the plurality of IC side terminals being The plurality of substrate side terminals are disposed on the first main surface, and the plurality of substrate side terminals are disposed on the second main surface at a position facing the corresponding IC side terminal, and the first element is the IC side first terminal The second element is disposed between the IC-side second terminal and the substrate-side terminal corresponding to the IC-side second terminal.
- the first lead terminal is connected to an end on the IC side terminal side of the first element through an internal wiring, and Lead terminals may be connected through one end and internal wiring of the IC-side terminal side of the second element.
- the current path between the IC-side first terminal and the substrate-side terminal corresponding to the IC-side first terminal is the shortest between the IC-side first terminal and the substrate-side first terminal.
- the current path between the IC side second terminal and the substrate side terminal corresponding to the IC side second terminal is the shortest path connecting the IC side second terminal and the substrate side second terminal.
- the IC is attached to the IC. It may be placed in an uncovered position.
- the first lead terminal, the second lead terminal, the third lead terminal, and the fourth lead terminal are arranged at positions easily recognized by visual observation, and thus the measuring instrument
- the measurer who measures the potentials of these terminals by using has an effect that the probes of the measuring instrument can be easily applied to these terminals.
- a third element, which is a resistive element, and a fourth element, which is a resistive element, are provided.
- the first lead terminal is an IC of the first element via the third element and an internal wiring.
- the second lead terminal may be connected to one end on the side terminal side, and may be connected to one end on the IC side terminal side of the second element via the fourth element and an internal wiring.
- an effect of suppressing a reflected wave generated by a part of the AC component of the current flowing to the first element being reflected by the first lead terminal, and an AC component of the current flowing to the second element It has an effect of suppressing a reflected wave generated when a part is reflected by the second lead terminal.
- each of the third element and the fourth element may be a formed resistance element formed by processing a wiring.
- the third element and the fourth element can be formed in the wiring layer region where the wiring is formed.
- the IC current measurement device has a main surface, and at least one substrate side ground terminal for connecting to the ground wiring of the substrate, and one or more electrically connected to the substrate side ground terminal.
- An IC-side ground terminal, at least one of the IC-side ground terminals, the plurality of IC-side terminals, the first lead-out terminal, and the second lead-out terminal are disposed on the main surface; Assuming that the distance between at least one of the terminals and the first lead terminal is 1.5 mm or less, and the distance between at least one of the IC side ground terminals and the second lead terminal is 1.5 mm or less It is also good.
- the first lead terminal and at least one of the ground terminals are each 1.5 mm or less, so using a commercially available differential probe, a probe of a spectrum analyzer, etc. This has the effect that the potential difference between the potential of the first lead terminal and the ground potential can be measured relatively easily.
- the second lead terminal and at least one of the ground terminals are 1.5 mm or less each other, it is relatively easy to use the first differential probe, a spectrum analyzer probe, etc. The potential difference between the potential of the extraction terminal and the ground potential can be measured.
- the IC side first terminal is a terminal for connecting to the first power terminal of the IC
- the IC side second terminal is for connecting to the second power terminal of the IC.
- a third lead terminal may be provided that is a terminal and is electrically connected to one end on the substrate side terminal of the first element and one end on the substrate side terminal of the second element.
- the third lead terminal measures a potential for measuring the potential of one end of the first element on the substrate side and a potential of one end of the second element on the substrate side Since the terminals also serve as terminals for terminals, the number of terminals can be reduced compared to a configuration in which two different terminals are provided without using these terminals.
- the first element is an electromagnetic wave receiving element for receiving an electromagnetic wave generated by a current flowing between the IC side first terminal and a substrate side terminal corresponding to the IC side first terminal
- the second element may be an electromagnetic wave receiving element that receives an electromagnetic wave generated by a current flowing between the IC side second terminal and a substrate side terminal corresponding to the IC side second terminal.
- the IC-side first terminal, the substrate-side terminal corresponding to the IC-side first terminal, and the current path between the first element are physically in non-contact relation with each other. It can be configured, and the IC side second terminal, the substrate side terminal corresponding to the IC side second terminal, and the current path between the second element are physically in non-contact relation with each other. It can be configured.
- the second element is a coil connected between the second lead-out terminal and the fourth lead-out terminal, which is equal to or less than a predetermined distance for receiving an electromagnetic wave generated by a current
- the IC side second The distance from the current path between the terminal and the substrate terminal corresponding to the IC second terminal is generated by the current flowing between the IC second terminal and the substrate terminal corresponding to the IC second terminal. May be equal to or less than a predetermined distance for receiving an electromagnetic wave
- the predetermined distance means a mutual inductance between the current path to be measured and a potential difference that can be measured according to the variation of the magnetic field generated by the change in the current flowing to the current path to be measured.
- the first element and the second element can effectively receive the fluctuation of the magnetic field generated by the current to be measured. It has the effect that it can be made smaller.
- the second main surface may be rectangular.
- the IC current measurement adapter is mounted between the IC current measurement device and the substrate, and each of the plurality of substrate side terminals of the IC current measurement device and the above-mentioned
- An adapter for measuring an IC current through connection with each of a plurality of terminals of a substrate which is a substantially rectangular parallelepiped having a third main surface and a fourth main surface parallel to the third main surface, A plurality of first adapter terminals used to be respectively connected to a plurality of substrate side terminals are disposed on the third main surface, used to be respectively connected to a plurality of terminals of the substrate, and corresponding respectively
- a plurality of second adapter terminals connected to the first adapter terminal are disposed on the fourth main surface, and the third main surface has a width and a height respectively corresponding to the width and the height of the second main surface. Be smaller than And butterflies.
- the IC current measurement adapter By mounting the IC current measurement adapter having the above configuration between the IC current measurement device and the substrate, a gap is formed between the IC current measurement device and the substrate. As a result, even if the IC current measurement device can not be directly connected to the substrate due to the presence of the electronic components disposed on the main surface of the substrate, the IC between the IC current measurement device and the substrate can be obtained. By mounting the current measurement adapter, the IC current measurement device can be connected to the substrate through the IC current measurement adapter.
- the present invention can be used to measure the current flowing to the terminals of an IC.
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Abstract
Description
以下、本発明に係るIC電流測定用装置の一実施形態として、BGA(Ball Grid Array)パッケージによってパッケージングされた5×5の計25個の端子を備えるICの電源端子それぞれに流れる電流を測定するためのIC電流測定用装置について説明する。
図1は、IC101と基板102との間に装着された状態のIC電流測定用装置100の断面図である。
IC側端子のうち、電源端子でもグラウンド端子でもない端子のそれぞれは、直線状に配置された第1基板120aのコンタクトホールと、第2基板120bのコンタクトホールと、第3基板120cのコンタクトホールと、部品内蔵層110のビアと、第4基板130aのコンタクトホールと、第5基板130bのコンタクトホールと、第6基板130cのコンタクトホールとを介して、対応する基板側端子のそれぞれと接続される。
抵抗素子に電流が流れると、その抵抗素子の両端にその電流に応じた電位差が発生する。
測定された電流には、様々な周波数成分が含まれている。
図4(a)は、例えば電源端子であるIC側端子122(図2参照)に対応するIC端子(以下、IC電源端子Aという。)に流れる電流の周波数特性を示す図である。
<実施の形態2>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100の一部を変形した実施の形態2に係る第1変形IC電流測定用装置について説明する。
<実施の形態3>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態2に係る第1変形IC電流測定用装置500の一部を変形した実施の形態3に係る第2変形IC電流測定用装置について説明する。
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100の一部を変形した実施の形態4に係る第3変形IC電流測定用装置について説明する。
<実施の形態5>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100の一部を変形した実施の形態5に係る第4変形IC電流測定用装置について説明する。
<実施の形態6>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100の一部を変形した実施の形態6に係る第5変形IC電流測定用装置について説明する。
<実施の形態7>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100の一部を変形した実施の形態7に係る第6変形IC電流測定用装置について説明する。
<実施の形態8>
以下、本発明に係るIC電流測定用装置の一実施形態として、実施の形態1に係るIC電流測定用装置100(図1参照)の基板102側主表面に装着される嵩上げ基板について説明する。
<補足>
以上、本実施に係るIC電流測定用装置の一実施形態として、実施の形態1~実施の形態6として、6つのIC電流測定用装置の例に基づいて説明したが、以下のように変形することも可能であり、本発明は上述した実施の形態で示した通りのIC電流測定用装置に限られないことはもちろんである。
(1)実施の形態1において、IC電流測定用装置100は、BGAパッケージによってパッケージングされた5×5の計25個の端子を備えるIC101の端子に流れる電流を測定するためのものとして説明したが、測定対象のICは、必ずしもBGAパッケージによってパッケージングされたものに限定されるものではなく、例えばQFP(Quad Flat Pakage)といったBGAパッケージ以外の方法でパッケージングされたものであっても構わないし、また、必ずしも5×5の計25個と端子を備えるICに限定されるものではなく、例えば20×10の計100個の端子を備えるICであっても構わない。
(2)実施の形態1において、IC電流測定用装置100は、IC101の電源端子のそれぞれに流れる電流を測定するものであるとして説明したが、測定対象の端子は、必ずしも電源端子に限定されるものではなく、例えば、グラウンド端子、デジタル信号出力端子、デジタル信号入力端子、アナログ信号入力端子、アナログ信号出力等といった電源端子以外の端子であっても構わない。
(3)実施の形態1において、部品内蔵層110に含まれる抵抗素子は、抵抗値が1Ωであり、サイズが0.6mm×0.3mm×0.3mmのチップ抵抗であるとして説明したが、抵抗素子は、抵抗値が必ずしも1Ωに限定されるものではないし、必ずしもサイズが0.6mm×0.3mm×0.3mmに限定されるものでもないし、必ずしもチップ抵抗に限定されるものでもない。
(4)実施の形態1において、部品内蔵層110に含まれる抵抗素子は、部品内蔵層110のIC101側の主表面と基板102側の主表面とを貫通するものであるとして説明したが、測定対象の端子の配線経路上に配置されていれば、抵抗素子は、必ずしもIC101側の主表面と基板102側の主表面とを貫通している必要はない。
(5)実施の形態1において、IC電流測定用装置100は、IC101とはんだによって接続されるとして説明したが、IC側端子のそれぞれが、対応するIC101の端子のそれぞれと電気的に接続されていれば、必ずしもはんだによって接続されるものに限らない。
(6)実施の形態5において、部品内蔵層810に含まれる反射抑制用抵抗素子の抵抗値は100Ωであるとして説明したが、引出端子が解放端である場合において引出端子からの反射波を抑制することができる抵抗値、または、引出端子に外部の測定機器が接続された状態において測定端子からの反射波、もしくは、外部機器からの反射波を抑制することができる抵抗値であれば、反射抑制用抵抗素子の抵抗値は必ずしも100Ωに限定される必要はない。
(7)実施の形態5において、部品内蔵層810に含まれる反射抑制用抵抗素子は、サイズが0.6mm×0.3mm×0.3mmのチップ抵抗であるとして説明したが、反射抑制用抵抗素子は、必ずしもサイズが0.6mm×0.3mm×0.3mmに限定されるものでもないし、必ずしもチップ抵抗に限定されるものでもない。
(8)実施の形態6において、電磁波受信素子がコイルである例について説明したが、例えば、測定対象となる電流経路の近傍(例えば0.3mm)に、その電流経路と平行に配置された金属(例えば銅)配線といった、測定対象となる電流経路との間に相互インダクタンスを有し、測定対象となる電流経路に流れる電流が変化することによって発生する磁界の変動に応じて測定可能な電位差を生じるものであれば、必ずしもコイルである必要はない。
(9)実施の形態7において、配線層内に含まれる反射抑制用抵抗素子は、銅配線をレーザトリミング法でトリミングすることで形成される形成抵抗であるとして説明したが、配線を加工することで形成される抵抗であれば、必ずしも銅配線をレーザトリミング法でトリミングすることで形成される形成抵抗である必要はなく、例えば、銅配線をタングステン等の高抵抗金属に置き換える加工がなされることで形成される形成抵抗であっても構わない。
(10)以下、さらに本発明の一実施形態に係るIC電流測定用装置の構成及びその変形例と各効果について説明する。
101 IC
102 基板
110 部品内蔵層
111、112、114、116、117 ビア
113、115 抵抗素子
120 配線内蔵層
121~125 IC側端子
126~129 引出端子
130 配線内蔵層
131~135 基板側端子
140 第1グラウンドプレーン
141 第2グラウンドプレーン
148、149 バイパスコンデンサ
158、159 基板内配線経路
161~167、171~175 配線経路
180~184 IC101の端子
185~189 基板102の端子
190~199 はんだ
Claims (12)
- ICの端子に流れる電流を測定するために、当該ICと基板との間に装着されるIC電流測定用装置であって、
前記ICの複数の端子とそれぞれ接続するための複数のIC側端子と、
前記基板の複数の端子とそれぞれ接続するために用いられ、それぞれ対応するIC側端子と電気的に接続する複数の基板側端子と、
IC側第1端子と当該IC側第1端子に対応する基板側端子との間に流れる電流に応じて電位差を生じる第1素子と、
IC側第2端子と当該IC側第2端子に対応する基板側端子との間に流れる電流に応じて電位差を生じる第2素子と、
前記第1素子に生じる電位差を外部に出力するための第1引出端子と、
前記第2素子に生じる電位差を外部に出力するための第2引出端子とを備える
ことを特徴とするIC電流測定用装置。 - 前記第1素子は、前記IC側第1端子と当該IC側第1端子に対応する基板側端子との間に接続される抵抗素子であって、
前記第2素子は、前記IC側第2端子と当該IC側第2端子に対応する基板側端子との間に接続される抵抗素子であって、
前記第1引出端子は、前記第1素子のIC側端子側の一端と接続され、
前記第2引出端子は、前記第2素子のIC側端子側の一端と接続される
ことを特徴とする請求項1記載のIC電流測定用装置。 - 前記IC電流測定用装置は、第1主表面と、当該第1主表面と平行な第2主表面とを有し、
前記第1素子の基板側端子側の一端と内部の配線を介して接続される第3引出端子と、
前記第2素子の基板側端子側の一端と内部の配線を介して接続される第4引出端子とを備え、
前記複数のIC側端子は、前記第1主表面に配置され、
前記複数の基板側端子は、前記第2主表面に、対応するIC側端子と対向する位置に配置され、
前記第1素子は、前記IC側第1端子と当該IC側第1端子に対応する基板側端子との間に配置され、
前記第2素子は、前記IC側第2端子と当該IC側第2端子に対応する基板側端子との間に配置され、
前記第1引出端子は、前記第1素子のIC側端子側の一端と内部の配線を介して接続され、
前記第2引出端子は、前記第2素子のIC側端子側の一端と内部の配線を介して接続される
ことを特徴とする請求項2記載のIC電流測定用装置。 - 前記第1引出端子と前記第2引出端子と前記第3引出端子と前記第4引出端子とが、前記第1主表面のうち、前記ICに装着される場合において当該ICに覆われていない位置に配置されている
ことを特徴とする請求項3記載のIC電流測定用装置。 - 抵抗素子である第3素子と、
抵抗素子である第4素子とを備え、
前記第1引出端子は、前記第3素子と内部の配線とを介して前記第1素子のIC側端子側の一端と接続され、
前記第2引出端子は、前記第4素子と内部の配線とを介して前記第2素子のIC側端子側の一端と接続される
ことを特徴とする請求項2記載のIC電流測定用装置。 - 前記第3素子と前記第4素子とは、それぞれ、配線を加工することで形成される形成抵抗素子である
ことを特徴とする請求項5記載のIC電流測定用装置。 - 前記IC電流測定用装置は、主表面を有し、
前記基板のグラウンド配線と接続するための基板側グラウンド端子と、
前記基板側グラウンド端子と電気的に接続される1以上のIC側グラウンド端子とを備え、
前記IC側グラウンド端子のうちの少なくとも1つと前記複数のIC側端子と前記第1引出端子と前記第2引出端子とが前記主表面に配置され、
前記IC側グラウンド端子のうちの少なくとも1つと前記第1引出端子との距離が1.5mm以下であり、
前記IC側グラウンド端子のうちの少なくとも1つと前記第2引出端子との距離が1.5mm以下である
ことを特徴とする請求項2記載のIC電流測定用装置。 - 前記IC側第1端子は、前記ICの第1電源端子と接続するための端子であって、
前記IC側第2端子は、前記ICの第2電源端子と接続するための端子であって、
前記第1素子の基板側端子側の一端と、前記第2素子の基板側端子側の一端とに、電気的に接続する第3引出端子とを備える
ことを特徴とする請求項2記載のIC電流測定用装置。 - 前記第1素子は、前記IC側第1端子と当該IC側第1端子に対応する基板側端子との間に流れる電流によって発生する電磁波を受信する電磁波受信素子であって、
前記第2素子は、前記IC側第2端子と当該IC側第2端子に対応する基板側端子との間に流れる電流によって発生する電磁波を受信する電磁波受信素子である
ことを特徴とする請求項1記載のIC電流測定用装置。 - 第3引出端子と、
第4引出端子とを備え、
前記第1素子は、前記第1引出端子と前記第3引出端子との間に接続されるコイルであって、前記IC側第1端子と当該IC側第1端子に対応する基板端子との間の電流経路からの距離が、当該IC側第1端子と当該IC側第1端子に対応する基板側端子と間に流れる電流によって発生する電磁波を受信するための所定距離以下であり、
前記第2素子は、前記第2引出端子と前記第4引出端子との間に接続されるコイルであって、前記IC側第2端子と当該IC側第2端子に対応する基板端子との間の電流経路からの距離が、当該IC側第2端子と当該IC側第2端子に対応する基板側端子と間に流れる電流によって発生する電磁波を受信するための所定距離以下である
ことを特徴とする請求項8記載のIC電流測定用装置。 - 前記第2主表面は、矩形である
ことを特徴とする請求項3記載のIC電流測定用装置。 - 請求項11記載のIC電流測定用装置と基板との間に装着され、当該IC電流測定用装置の前記複数の基板側端子のそれぞれと、前記基板の複数の端子のそれぞれとの接続を介してなすIC電流測定用アダプタであって、
第3主表面と、当該第3主表面と平行な第4主表面とを有する略直方体であり、
前記複数の基板側端子とそれぞれ接続されるために用いられる複数の第1アダプタ端子が前記第3主表面に配置され、前記基板の複数の端子とそれぞれ接続されるために用いられ、それぞれ対応する前記第1アダプタ端子と接続する複数の第2アダプタ端子が前記第4主表面に配置され、
前記第3主表面は、幅と高さとのそれぞれが、前記第2主表面の幅と高さとのそれぞれよりも小さい
ことを特徴とするIC電流測定用アダプタ。
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- 2011-04-19 JP JP2012515720A patent/JP5770720B2/ja active Active
- 2011-04-19 US US13/382,690 patent/US8878559B2/en active Active
- 2011-04-19 WO PCT/JP2011/002274 patent/WO2011145269A1/ja active Application Filing
- 2011-04-19 KR KR1020117031107A patent/KR20130010822A/ko not_active Application Discontinuation
- 2011-04-19 CN CN201180002931.XA patent/CN102472792B/zh active Active
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KR20150047956A (ko) * | 2013-10-25 | 2015-05-06 | 가부시키가이샤 어드밴티스트 | 인터페이스 장치, 제조 방법 및 시험 장치 |
KR102035998B1 (ko) | 2013-10-25 | 2019-10-24 | 가부시키가이샤 어드밴티스트 | 인터페이스 장치, 제조 방법 및 시험 장치 |
Also Published As
Publication number | Publication date |
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CN102472792B (zh) | 2014-11-12 |
US8878559B2 (en) | 2014-11-04 |
KR20130010822A (ko) | 2013-01-29 |
JPWO2011145269A1 (ja) | 2013-07-22 |
US20120112737A1 (en) | 2012-05-10 |
JP5770720B2 (ja) | 2015-08-26 |
CN102472792A (zh) | 2012-05-23 |
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