WO2011096489A1 - シリコンウェーハ及びその製造方法、並びに、半導体デバイスの製造方法 - Google Patents
シリコンウェーハ及びその製造方法、並びに、半導体デバイスの製造方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 103
- 229910052710 silicon Inorganic materials 0.000 title claims description 79
- 239000010703 silicon Substances 0.000 title claims description 79
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims description 78
- 238000004519 manufacturing process Methods 0.000 title claims description 38
- 239000004065 semiconductor Substances 0.000 title claims description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 159
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 159
- 239000001301 oxygen Substances 0.000 claims abstract description 159
- 239000002244 precipitate Substances 0.000 claims abstract description 128
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 72
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052796 boron Inorganic materials 0.000 claims abstract description 37
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 36
- 235000012431 wafers Nutrition 0.000 claims description 214
- 238000010438 heat treatment Methods 0.000 claims description 94
- 238000011282 treatment Methods 0.000 claims description 75
- 238000002844 melting Methods 0.000 claims description 11
- 230000008018 melting Effects 0.000 claims description 11
- 239000013078 crystal Substances 0.000 claims description 9
- 238000001556 precipitation Methods 0.000 description 39
- 239000010410 layer Substances 0.000 description 25
- 230000008646 thermal stress Effects 0.000 description 11
- 238000004854 X-ray topography Methods 0.000 description 6
- 238000000137 annealing Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 230000000630 rising effect Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000005247 gettering Methods 0.000 description 4
- 239000002344 surface layer Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000005033 Fourier transform infrared spectroscopy Methods 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 2
- 238000000149 argon plasma sintering Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229910001385 heavy metal Inorganic materials 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000002798 spectrophotometry method Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
Definitions
- the present invention relates to a silicon wafer and a manufacturing method thereof, and more particularly, to a silicon wafer used for a device process including an LSA (Laser Spike Anneal) process and a manufacturing method thereof.
- the present invention also relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including LSA processing.
- a semiconductor device manufacturing process various heat treatments are performed on a silicon wafer.
- a source / drain region of a MOS transistor after ion implantation of a dopant into a silicon wafer, annealing for activating the dopant is performed.
- annealing for activating the dopant a method of heating the entire surface of the wafer using a lamp furnace or the like is generally used.
- the LSA process is performed by scanning the wafer with a laser beam having a beam diameter of about several millimeters.
- the region irradiated with the laser beam reaches a temperature of 1000 ° C. or higher and a melting point (1414 ° C.) or lower in the order of milliseconds or less, so that a steep impurity profile can be obtained.
- a steep temperature gradient is formed not only in the thickness direction of the wafer but also in the in-plane direction, so that a strong thermal stress is generated inside the wafer.
- dislocation may occur starting from oxygen precipitates.
- misalignment occurs before and after the occurrence of the dislocation, so that a so-called overlay error occurs in the photolithography process.
- Patent Document 1 discloses a method for preventing the occurrence of dislocation due to thermal stress by making carbon precipitates into a polyhedron instead of a plate by adding carbon to a silicon wafer.
- Patent Document 2 discloses a method in which light scattering defects are zero in a region having a depth of 25 ⁇ m to 100 ⁇ m from the surface layer of the silicon wafer, and a large amount of light scattering defects are included in a region having a depth of 100 ⁇ m.
- Patent Document 3 discloses a method for setting the size and density of oxygen precipitates during heat treatment and the thermal stress applied by the heat treatment within a predetermined range.
- an epitaxial wafer having an epitaxial layer formed on the surface.
- it is effective to contain nitrogen or boron in the wafer body at a high concentration.
- a wafer doped with nitrogen or boron at a high concentration is much easier to form oxygen precipitates in the device process than a normal wafer.
- nitrogen and boron have the effect of increasing the stability of the precipitation nuclei. Therefore, when such an epitaxial wafer is put into a device process, a plate-like fine precipitate is easily formed by a low-temperature treatment of about 750 ° C. included in the device process, followed by a heat treatment of about 1000 ° C. Then, fine precipitates grow and become large plate-like oxygen precipitates.
- Patent Document 1 describes that the shape of oxygen precipitates can be made into a polyhedron by adding carbon to a silicon wafer, but nitrogen and boron are doped at a high concentration like an epitaxial wafer. Whether it is effective in the wafer body is unknown. Moreover, as is apparent from the description of paragraph [0004], Patent Document 1 assumes that heat treatment is performed using a batch furnace or the like, and is strong in the wafer thickness direction and in-plane direction as in LSA processing. The case where thermal stress occurs is not assumed. For this reason, when LSA processing is performed on an epitaxial wafer doped with nitrogen or boron at a high concentration, it is considered difficult to prevent the occurrence of dislocation by the method described in Patent Document 1.
- Patent Documents 2 and 3 it is unclear whether or not the occurrence of dislocations can be prevented when the above-described epitaxial wafer is subjected to the LSA treatment, and it is probably impossible to prevent them.
- an object of the present invention is an epitaxial wafer having a wafer body doped with nitrogen or boron at a high concentration and a method for manufacturing the same, and the occurrence of dislocations even when the LSA treatment is performed in the device process.
- An object of the present invention is to provide a silicon wafer that can be prevented and a method of manufacturing the same.
- Another object of the present invention is to provide a method for manufacturing a semiconductor device using such a silicon wafer, which does not cause dislocation during the LSA process.
- Patent Document 1 is an invention that excludes plate-like oxygen precipitates, under what conditions LSA treatment should be performed on a silicon wafer that actually contains plate-like oxygen precipitates, Patent Document 1 Is unknown.
- Patent Document 2 assumes a flash lamp annealing apparatus as a rapid heating / cooling heat treatment apparatus, there is almost no temperature gradient in the in-plane direction of the wafer. For this reason, in the invention described in Patent Document 2, it is unclear whether or not it is effective when the LSA process in which a steep temperature gradient occurs in the in-plane direction is performed. Even if it is effective for the LSA process, it is possible to prevent the occurrence of dislocation by setting the LSA process for a silicon wafer containing plate-like oxygen precipitates. Is unknown.
- Patent Document 3 describes conditions for performing flash lamp annealing and spike lamp annealing, but as in Patent Document 2, it is unclear whether it is effective when LSA treatment is performed. Even if it is effective, it is unclear from Patent Document 3 how dislocations can be prevented by setting LSA treatment conditions for silicon wafers containing plate-like oxygen precipitates.
- Still another object of the present invention is a silicon wafer containing plate-like oxygen precipitates and a method for manufacturing the same, and it is possible to prevent the occurrence of dislocation even when the LSA treatment is performed in the device process.
- An object of the present invention is to provide a silicon wafer and a method for manufacturing the same.
- a silicon wafer according to one aspect of the present invention has a wafer body in which a nitrogen concentration is set to 1 ⁇ 10 12 atoms / cm 3 or more, or a specific resistance is set to 20 m ⁇ ⁇ cm or less by boron doping, and a surface of the wafer body.
- the wafer body is subjected to a heat treatment at 750 ° C. for 4 hours and then a heat treatment at 1000 ° C. for 4 hours, and thus a polyhedral oxygen precipitate rather than a plate-like oxygen precipitate. Is characterized by a dominant growth.
- the oxygen precipitate is the starting point.
- the occurrence of dislocation can be prevented.
- heat treatment is performed at 750 ° C. for 4 hours and at 1000 ° C. for 4 hours, the polyhedral oxygen precipitate grows more dominantly than the plate-like oxygen precipitate. This is because there are more types of precipitation nuclei that grow into polyhedral oxygen precipitates than precipitation nuclei that grow into granular oxygen precipitates.
- which type of precipitation nuclei is more contained cannot be analyzed by current analysis techniques unless the precipitation nuclei are actually grown by heat treatment.
- the silicon wafer manufacturing method according to the present invention is characterized by this point.
- the silicon wafer manufacturing method provides an epitaxial layer on the surface of a wafer body in which the nitrogen concentration is 1 ⁇ 10 12 atoms / cm 3 or more or the specific resistance is set to 20 m ⁇ ⁇ cm or less by boron doping. And a step of performing a heat treatment for 5 minutes or more at a temperature of 1050 ° C. or higher and a melting point or lower after forming the epitaxial layer and raising the temperature at a rate of 5 ° C./min or higher in a temperature range of at least 800 ° C. or higher. And.
- more precipitation nuclei of the type that grows into a polyhedron are formed by performing the above heat treatment, so that even when the device process undergoes various thermal histories, plate oxygen precipitation The proportion of things is very low. For this reason, even when the LSA treatment is performed, it is possible to prevent the occurrence of dislocations starting from oxygen precipitates.
- a semiconductor device manufacturing method is a semiconductor device manufacturing method including a wafer process for manufacturing a silicon wafer and a device process for forming a semiconductor device on the silicon wafer, wherein the wafer process has a nitrogen concentration. 1 ⁇ 10 12 atoms / cm 3 or more, or a step of forming an epitaxial layer on the surface of the wafer body whose specific resistance is set to 20 m ⁇ ⁇ cm or less by boron doping, and after forming the epitaxial layer, at least 800 ° C. or more And heating at a rate of 5 ° C./min or higher in a temperature range of 1050 ° C. or higher and a melting point of 1050 ° C.
- the device process includes LSA (Laser Spike Anneal)
- LSA Laser Spike Anneal
- the LSA process is included in the wafer body.
- T the maximum temperature reached is T (° C.)
- T ⁇ S 2 ⁇ 9 ⁇ 10 6 The process is performed under conditions that satisfy the following conditions.
- the diagonal length of the plate-like oxygen precipitates refers to the average value of the diagonal lengths of many plate-like oxygen precipitates contained in the wafer body.
- a silicon wafer according to another aspect of the present invention is a silicon wafer used in a device process including an LSA (Laser Spike Anneal) process, and a plate-like oxygen precipitate contained in the silicon wafer during the LSA process.
- LSA Laser Spike Anneal
- T ⁇ S 2 ⁇ 9 ⁇ 10 6 It is characterized by satisfying.
- a method for manufacturing a silicon wafer according to another aspect of the present invention is a method for manufacturing a silicon wafer used in a device process including an LSA (Laser Spike Anneal) process, and is included in the silicon wafer during the LSA process.
- LSA Laser Spike Anneal
- a silicon wafer according to still another aspect of the present invention is a silicon wafer used for a device process including LSA processing, and has a nitrogen concentration of 1 ⁇ 10 12 atoms / cm 3 or more, or has a specific resistance due to boron doping.
- a method for manufacturing a silicon wafer according to still another aspect of the present invention is a method for manufacturing a silicon wafer used in a device process including an LSA process, wherein the nitrogen concentration is 1 ⁇ 10 12 atoms by the Czochralski method. / cm 3 or more, or, specific resistance by boron dope is set below 20 m [Omega ⁇ cm, a step of initial oxygen concentration to cultivate configured silicon single crystal below 14 ⁇ 10 17 atoms / cm 3, the silicon single crystal Forming an epitaxial layer on the surface of the wafer body cut out from the substrate.
- the maximum temperature reached is about 1250 ° C. It is possible to prevent the occurrence of dislocation due to the general LSA treatment.
- a general heat treatment performed before the LSA treatment for example, a heat treatment that is held at a temperature of 750 ° C. or more for 3 hours or more and that is held at a temperature range of 1000 ° C. to 1050 ° C. for 1 hour or more. Including heat treatment.
- the initial oxygen concentration of the wafer body is preferably 12 ⁇ 10 17 atoms / cm 3 or less. According to this, even when the heat treatment is performed for a longer time before the LSA treatment, it is possible to prevent the occurrence of dislocation due to a general LSA treatment with a maximum temperature of about 1250 ° C. .
- a heat treatment including a heat treatment for 4 hours or more at a temperature of 750 ° C. or more and a treatment for holding for 2 hours or more in a temperature range of 1000 ° C. to 1050 ° C. can be given.
- a method for manufacturing a semiconductor device using an epitaxial wafer doped with nitrogen or boron at a high concentration and a method for manufacturing a semiconductor device that does not generate dislocations by LSA treatment. Can be provided.
- FIG. 1 is a schematic cross-sectional view showing the structure of a silicon wafer 10 according to a preferred embodiment of the present invention.
- the silicon wafer 10 includes a wafer body 11 and an epitaxial layer 12 formed on the surface thereof.
- the wafer main body 11 is single crystal silicon grown by the Czochralski method, and plays a role of ensuring the mechanical strength of the silicon wafer 10 and also serving as a heavy metal gettering source.
- the thickness of the wafer body 11 is not particularly limited as long as the mechanical strength is ensured, but is about 725 ⁇ m, for example.
- the wafer body 11 is preferably doped with nitrogen or boron.
- the concentration is preferably 1 ⁇ 10 12 atoms / cm 3 or more.
- the specific resistance of the wafer body 11 is preferably set to 20 m ⁇ ⁇ cm or less by boron doping. This is because sufficient gettering capability is given to the wafer body 11 if nitrogen or boron is doped at the above concentration.
- the upper limit of the concentration of nitrogen or boron is not particularly limited, but it is preferable to set nitrogen to 5 ⁇ 10 14 atoms / cm 3 or less and boron to 3 m ⁇ ⁇ cm or more in terms of specific resistance.
- the initial oxygen concentration of the wafer body 11 is preferably 7 ⁇ 10 17 atoms / cm 3 or more and 2.4 ⁇ 10 18 atoms / cm 3 or less. This is because if the oxygen concentration is less than 7 ⁇ 10 17 atoms / cm 3 , the formation density of oxygen precipitates necessary for gettering heavy metals such as Ni may be insufficient, and the oxygen concentration is 2 This is because it is difficult to form the defect-free epitaxial layer 12 when the thickness exceeds 0.4 ⁇ 10 18 atoms / cm 3 .
- the formation of oxygen precipitates is promoted by nitrogen doping or boron doping, so that the initial oxygen concentration of the wafer body 11 is 7 ⁇ 10 as long as the oxygen precipitates are formed by heat treatment. It may be less than 17 atoms / cm 3 .
- the oxygen concentrations described in this specification are all measured by Fourier transform infrared spectrophotometry (FT-IR) standardized by ASTM F-121 (1979).
- a heat treatment in which precipitation nuclei can grow before the LSA treatment for example, a heat treatment held at a temperature of 750 ° C. or higher for 3 hours or longer, and a temperature range of 1000 to 1050 ° C. for 1 hour or longer.
- the initial oxygen concentration of the wafer main body 11 is preferably set to 14 ⁇ 10 17 atoms / cm 3 or less.
- a heat treatment including a treatment for a longer time before the LSA treatment for example, a heat treatment for 4 hours or more at a temperature of 750 ° C. or more and a temperature range of 1000 ° C. to 1050 ° C. for 2 hours or more is performed.
- the initial oxygen concentration of the wafer body 11 is 12 ⁇ 10 17 atoms / cm 3 or less. This is because the size of the plate-like oxygen precipitate formed by the heat treatment is determined by the heat treatment conditions (temperature and time) and the initial oxygen concentration of the wafer body 11. Assuming the above general heat treatment, if the initial oxygen concentration of the wafer body 11 is set to 14 ⁇ 10 17 atoms / cm 3 or less, the size of the plate-like oxygen precipitate immediately before the LSA treatment is set to a predetermined value. The following can be suppressed.
- the initial oxygen concentration of the wafer body 11 is set to 12 ⁇ 10 17 atoms / cm 3 or less
- the size of the plate-like oxygen precipitate immediately before the LSA treatment is set. Can be kept below a predetermined value.
- the initial oxygen concentration can be adjusted by convection control of the silicon melt at the time of growing a silicon single crystal by the Czochralski method. The relationship between the size of the plate-like oxygen precipitate and the presence or absence of dislocation generation will be described later.
- a semiconductor device such as a MOS transistor cannot be directly formed on the wafer body 11.
- Semiconductor devices such as MOS transistors are formed in the epitaxial layer 12 on the wafer body 11.
- the specific resistance of the epitaxial layer 12 is normally set higher than the specific resistance of the wafer body 11.
- the film thickness of the epitaxial layer 12 is not particularly limited, and may be set to about 1 ⁇ m or more and 10 ⁇ m or less.
- the wafer body 11 has more polyhedral oxygen than plate oxygen precipitates. Precipitates grow predominantly.
- the plate-like oxygen precipitate is an oxygen precipitate mainly having the structure shown in FIG. 2, and its main surface 21 is along the [100] plane, the [010] plane, or the [001] plane.
- the size of the plate oxygen precipitate is defined by the diagonal length S.
- the polyhedral oxygen precipitate is an octahedral oxygen precipitate mainly having the structure shown in FIG. 3, and each surface 22 thereof is along the [111] plane.
- the size of the polyhedral oxygen precipitate is defined by the length S of one side.
- FIG. 4 is a flowchart for explaining the manufacturing method (wafer process) of the silicon wafer 10 according to the present embodiment.
- a wafer body 11 cut out from a silicon single crystal ingot is prepared (step S11), and its surface is mirror-polished (step S12).
- the silicon single crystal ingot is grown by the Czochralski method, and thereby, the oxygen eluted from the quartz crucible is contained in the wafer body 11 in supersaturation.
- the initial oxygen concentration contained in the wafer main body 11 is preferably set to 14 ⁇ 10 17 atoms / cm 3 or less, and more preferably set to 12 ⁇ 10 17 atoms / cm 3 or less.
- the epitaxial layer 12 is formed on the mirror-polished surface of the wafer body 11 (step S13).
- a type of precipitation nucleus that grows into polyhedral oxygen precipitates is formed (step S14).
- the heat treatment is performed by raising the temperature at a rate of 5 ° C./min or more in a temperature range of at least 800 ° C. and holding at a temperature of 1050 ° C. or more and a melting point or less for 5 minutes or more.
- oxygen contained in the wafer body 11 forms precipitation nuclei, but if the temperature at the time of formation of the precipitation nuclei is less than 1050 ° C., the type of precipitation nuclei that grows into plate-like oxygen precipitates is formed predominantly.
- precipitation nuclei are formed in the above temperature range, precipitation nuclei of the type that grow into polyhedral oxygen precipitates are formed predominantly. However, which type of precipitation nuclei cannot be determined by current technology unless the precipitation nuclei are actually grown.
- the time for holding at 1050 ° C. or more and the melting point or less is set to 5 minutes or more because if the holding time is less than 5 minutes, the type of precipitation nuclei that grow into polyhedral oxygen precipitates are not sufficiently formed.
- the holding time is preferably 2 hours or less. This is because even if the heat treatment is performed for more than 2 hours, the effect is not further improved, and if the holding time is more than 2 hours, the manufacturing cost of the wafer is greatly increased.
- the temperature rising rate in the temperature range of 800 ° C. or higher is set to 5 ° C./min or higher.
- the temperature range in which precipitation nuclei of the type that grows on the plate-like oxygen precipitates are predominantly formed is 800 ° C. or higher and 1050 ° C. This is because it is necessary to shorten the transit time in the lower temperature range. That is, when the temperature rising rate in the temperature region of 800 ° C. or higher is less than 5 ° C./min, a precipitation nucleus of a type that already grows into a plate-like oxygen precipitate when the holding temperature (1050 ° C. or higher and melting point or lower) is reached. Is formed, and even if it is maintained at 1050 ° C.
- the upper limit of the temperature rising rate is not particularly limited, but is preferably 10 ° C./min or less. This is because if the temperature is increased at a rate exceeding 10 ° C./min, the occurrence of slip dislocation may become remarkable due to an increase in thermal stress caused by the in-plane temperature difference of the wafer.
- the temperature range in which the temperature increase rate is set to 5 ° C./min or higher is not particularly limited as long as it is at least 800 ° C., but it is preferable to set the temperature increase rate to 5 ° C./min or higher in the temperature region of 700 ° C. or higher. According to this, it becomes possible to more effectively prevent the formation of precipitation nuclei of the type that grows into plate-like oxygen precipitates.
- the silicon wafer 10 according to the present embodiment is completed.
- the silicon wafer 10 manufactured by such a wafer process is put into a device process for forming a semiconductor device on the epitaxial layer 12.
- FIG. 5 is a flowchart showing a part of the device process.
- the device process includes various steps depending on the type of semiconductor device to be manufactured (logic device, memory device, etc.). As shown in FIG. 5, the temperature is raised to a temperature at which precipitation nuclei can grow.
- the heat treatment process (step S21) to be performed and the LSA treatment process (step S22) may be included. Examples of the heat treatment step shown in step S21 include an example of performing heat treatment at 850 ° C. for 30 minutes, 900 ° C. for 30 minutes, 1000 ° C. for 100 minutes, and 950 ° C. for 30 minutes in this order. In this case, the precipitation nuclei contained in the wafer main body 11 grow into oxygen precipitates by the heat treatment step shown in step S21.
- the oxygen precipitates to be formed include plate-like oxygen precipitates and polyhedral oxygen precipitates.
- the silicon wafer 10 according to the present embodiment is subjected to the heat treatment step (step S14) shown in FIG. 4 in the wafer process. Since the type of precipitation nuclei that grow into polyhedral oxygen precipitates are dominant, the polyhedral oxygen precipitates are dominant in the oxygen precipitates formed by the heat treatment step shown in step S21. When compared with the same volume, the polyhedral oxygen precipitate has a lower stress than the plate-like oxygen precipitate, and thus is unlikely to be a starting point of dislocation generation.
- step S21 After the polyhedral oxygen precipitates are formed by such a heat treatment step (step S21), when the LSA process (step S22) is performed, a strong thermal stress is applied to the wafer body 11, so that dislocation starts from the oxygen precipitates. May occur.
- the LSA process is performed by scanning the epitaxial layer 12 of the silicon wafer 10 with a laser beam having a beam diameter of about several millimeters while the silicon wafer 10 is initially heated to a temperature of about 400 ° C. to 600 ° C. As a result, the region irradiated with the laser light reaches a temperature of 1000 ° C. or higher and a melting point or lower in the order of milliseconds or less, so that a steep impurity profile can be obtained.
- the wafer main body 11 may contain plate oxygen precipitates to some extent, but since there are relatively few types of precipitation nuclei that grow into plate oxygen precipitates, it is assumed that plate oxygen precipitates are formed. However, the size is small and the formation density is sufficiently low.
- step S14 when the heat treatment in step S14 shown in FIG. 4 is omitted, the plate-like oxygen precipitates predominate in the oxygen precipitate formed by the heat treatment step shown in step S21.
- step S21 when the LSA process (step S22) is performed, a strong thermal stress is applied to the wafer body 11, so that the dislocation starts from the oxygen precipitates. May occur.
- the application target of the present invention is not limited to an epitaxial wafer.
- Example 1 A plurality of 300 mm diameter polished wafers having an interstitial oxygen concentration of 12.5 ⁇ 10 17 atoms / cm 3 were prepared. These wafers were subjected to various heat treatments to form oxygen precipitates having different sizes and shapes. The size and form of the precipitates were specified by measuring and observing another sample subjected to the same heat treatment with a transmission electron microscope (TEM). Table 1 shows the size and form of precipitates present in the depth region of 50 ⁇ m or less from the surface layer of the wafer.
- TEM transmission electron microscope
- Example 2 A 300 mm epitaxial wafer having an epitaxial layer formed on a nitrogen-doped wafer body and a 300 mm epitaxial wafer having an epitaxial layer formed on a boron-doped wafer body were prepared.
- the doping amount is as shown in Table 2.
- the interstitial oxygen concentration of the wafer body in each sample is 11.5 to 13.6 ⁇ 10 17 atoms / cm 3 .
- precipitation nuclei were grown by subjecting each sample to heat treatment at 850 ° C. for 30 minutes, 900 ° C. for 30 minutes, 1000 ° C. for 100 minutes, and 950 ° C. for 30 minutes.
- heat treatment imitates the heat treatment applied in the manufacturing process of the advanced logic device.
- T ⁇ S 2 > 9 ⁇ 10 6 LSA treatment was performed under the following conditions. After the LSA treatment, the form of oxygen precipitates was observed using a transmission electron microscope (TEM), and the presence or absence of dislocation was examined using an X-ray topography apparatus.
- TEM transmission electron microscope
- Example 3 A 300 mm epitaxial wafer having an epitaxial layer formed on a nitrogen-doped wafer body and a 300 mm epitaxial wafer having an epitaxial layer formed on a boron-doped wafer body were prepared.
- the doping amount is as shown in Table 3.
- the interstitial oxygen concentration of the wafer body in each sample is 11.5 to 13.6 ⁇ 10 17 atoms / cm 3 .
- precipitation nuclei were grown by subjecting each sample to heat treatment at 850 ° C. for 30 minutes, 900 ° C. for 30 minutes, 1000 ° C. for 100 minutes, and 950 ° C. for 30 minutes.
- T ⁇ S 2 > 9 ⁇ 10 6 LSA treatment was performed under the following conditions. After the LSA treatment, the form of oxygen precipitates was observed using a transmission electron microscope (TEM), and the presence or absence of dislocation was examined using an X-ray topography apparatus.
- TEM transmission electron microscope
- Example 4 A 300 mm epitaxial wafer having an epitaxial layer formed on a nitrogen-doped wafer body and a 300 mm epitaxial wafer having an epitaxial layer formed on a boron-doped wafer body were prepared.
- the doping amount is as shown in Table 4.
- the interstitial oxygen concentration of the wafer body in each sample is 11.5 to 13.6 ⁇ 10 17 atoms / cm 3 .
- precipitation nuclei were grown by subjecting each sample to heat treatment at 850 ° C. for 30 minutes, 900 ° C. for 30 minutes, 1000 ° C. for 100 minutes, and 950 ° C. for 30 minutes.
- T ⁇ S 2 > 9 ⁇ 10 6 LSA treatment was performed under the following conditions. After the LSA treatment, the form of oxygen precipitates was observed using a transmission electron microscope (TEM), and the presence or absence of dislocation was examined using an X-ray topography apparatus.
- TEM transmission electron microscope
- Example 5 A 300 mm epitaxial wafer having an epitaxial layer formed on a nitrogen-doped wafer body and a 300 mm epitaxial wafer having an epitaxial layer formed on a boron-doped wafer body were prepared. The dope amount was different for each sample. The interstitial oxygen concentration of the wafer body in each sample is 11.5 to 13.6 ⁇ 10 17 atoms / cm 3 .
- T ⁇ S 2 > 9 ⁇ 10 6 LSA treatment was performed under the following conditions. After the LSA treatment, the form of oxygen precipitates was observed using a transmission electron microscope (TEM), and the presence or absence of dislocation was examined using an X-ray topography apparatus.
- TEM transmission electron microscope
- dislocations are generated by LSA treatment in a silicon wafer having a nitrogen concentration of 1 ⁇ 10 12 atoms / cm 3 or more, or a specific resistance by boron doping of 20 m ⁇ ⁇ cm or less, and the nitrogen concentration is 1 ⁇ 10 12. It has been demonstrated that dislocations do not occur even when the LSA treatment is applied to a silicon wafer having a specific resistance of less than atoms / cm 3 or more than 20 m ⁇ ⁇ cm by boron doping.
- Example 6 An epitaxial wafer having an epitaxial film formed on the surface of the wafer body having a nitrogen concentration of 3 to 6 ⁇ 10 13 atoms / cm 3 , and an epitaxial film on the surface of the wafer body having a specific resistance of 6 to 8 m ⁇ ⁇ cm by boron doping. A plurality of formed epitaxial wafers were prepared. The initial oxygen concentration of each wafer is as shown in Table 5.
- heat treatment A heat treatment
- 900 ° C. for 30 minutes 1000 ° C. for 100 minutes
- 950 ° C. for 30 minutes Precipitation nuclei were grown.
- the remaining sample is subjected to heat treatment (heat treatment B) for 45 minutes at 750 ° C., 30 minutes at 900 ° C., 120 minutes at 1050 ° C., and 45 minutes at 950 ° C. Grown up.
- heat treatment B heat treatment for 45 minutes at 750 ° C.
- 30 minutes at 900 ° C. 120 minutes at 1050 ° C.
- 45 minutes at 950 ° C. Grown up.
- each sample was subjected to LSA treatment under the condition that the maximum temperature T was 1250 ° C.
- the size of the plate-like oxygen precipitate existing in the depth region of 50 ⁇ m or less from the surface layer of the wafer body is observed using a transmission electron microscope (TEM), and the dislocation is performed using an X-ray topography apparatus. The presence or absence of occurrence was examined.
- TEM transmission electron microscope
- dislocation did not occur in the sample 78 having an initial oxygen concentration of 13.0 ⁇ 10 17 atoms / cm 3 , whereas the initial oxygen concentration was 13.6. Dislocation occurred in Sample 79, which was ⁇ 10 17 atoms / cm 3 . Further, among the boron-doped epitaxial wafers subjected to the heat treatment B, dislocation did not occur in the sample 83 having an initial oxygen concentration of 12.0 ⁇ 10 17 atoms / cm 3 , whereas the initial oxygen concentration was 12.6. Dislocation occurred in Sample 84, which was ⁇ 10 17 atoms / cm 3 .
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Abstract
Description
T×S2≦9×106
を満たす条件で行うことを特徴とする。
T×S2≦9×106
を満たすことを特徴とする。
T×S2≦9×106
を満たすことを特徴とする。
T×S2≦9×106
を満たす条件でLSA処理を行えば、板状酸素析出物を起点とした転位の発生はほとんど起こらない。上記の式が示す値(=9×106)がしきい値となる理由については明らかではないが、追って説明する多くの実験データによって裏付けられている。
T×S2≦9×106
を満たす条件でLSA処理を行えば、板状酸素析出物を起点とした転位の発生はほとんど起こらない。
格子間酸素濃度が12.5×1017atoms/cm3である直径300mmのポリッシュウェーハを複数枚準備した。これらウェーハに種々の熱処理を施し、サイズ及び形態の互いに異なる酸素析出物を形成した。析出物のサイズ及び形態は、同じ熱処理を施した別サンプルを透過電子顕微鏡(TEM)にて測定、観察することにより特定した。ウェーハの表層から50μm以下の深さ領域に存在する析出物のサイズ及び形態は、表1に示すとおりである。
T×S2≦9×106
を満たす条件でLSA処理を行えば、板状酸素析出物を起点とした転位の発生が生じないことが実証された。
窒素ドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハと、ボロンドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハを準備した。ドープ量は表2に示すとおりである。また、各サンプルにおけるウェーハ本体の格子間酸素濃度は11.5~13.6×1017atoms/cm3である。
T×S2>9×106
となる条件でLSA処理を行った。そして、LSA処理後、透過電子顕微鏡(TEM)を用いて酸素析出物の形態を観察するとともに、X線トポグラフィー装置を用いて転位発生の有無を調べた。
窒素ドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハと、ボロンドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハを準備した。ドープ量は表3に示すとおりである。また、各サンプルにおけるウェーハ本体の格子間酸素濃度は11.5~13.6×1017atoms/cm3である。
T×S2>9×106
となる条件でLSA処理を行った。そして、LSA処理後、透過電子顕微鏡(TEM)を用いて酸素析出物の形態を観察するとともに、X線トポグラフィー装置を用いて転位発生の有無を調べた。
窒素ドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハと、ボロンドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハを準備した。ドープ量は表4に示すとおりである。また、各サンプルにおけるウェーハ本体の格子間酸素濃度は11.5~13.6×1017atoms/cm3である。
T×S2>9×106
となる条件でLSA処理を行った。そして、LSA処理後、透過電子顕微鏡(TEM)を用いて酸素析出物の形態を観察するとともに、X線トポグラフィー装置を用いて転位発生の有無を調べた。
窒素ドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハと、ボロンドープされたウェーハ本体にエピタキシャル層が形成された300mmのエピタキシャルウェーハを準備した。ドープ量はサンプルごとに異なる値とした。また、各サンプルにおけるウェーハ本体の格子間酸素濃度は11.5~13.6×1017atoms/cm3である。
T×S2>9×106
となる条件でLSA処理を行った。そして、LSA処理後、透過電子顕微鏡(TEM)を用いて酸素析出物の形態を観察するとともに、X線トポグラフィー装置を用いて転位発生の有無を調べた。
窒素濃度が3~6×1013atoms/cm3であるウェーハ本体の表面にエピタキシャル膜が形成されたエピタキシャルウェーハと、ボロンドープによる比抵抗が6~8mΩ・cmであるウェーハ本体の表面にエピタキシャル膜が形成されたエピタキシャルウェーハをそれぞれ複数枚準備した。各ウェーハの初期酸素濃度は、表5に示す通りである。
11 ウェーハ本体
12 エピタキシャル層
21 板状酸素析出物の主面
22 多面体酸素析出物の表面
Claims (10)
- 窒素濃度が1×1012atoms/cm3以上、又は、ボロンドープによって比抵抗が20mΩ・cm以下に設定されたウェーハ本体と、前記ウェーハ本体の表面に設けられたエピタキシャル層とを備え、
前記ウェーハ本体は、750℃で4時間の熱処理を行った後、1000℃で4時間の熱処理を行った場合に、板状酸素析出物よりも多面体酸素析出物が優勢に成長することを特徴とするシリコンウェーハ。 - 前記シリコンウェーハはLSA(Laser Spike Anneal)処理を含むデバイスプロセスに供せられるシリコンウェーハであって、
前記LSA処理時において前記ウェーハ本体に含まれる板状酸素析出物の対角線長をS(nm)、前記LSA処理における最高到達温度をT(℃)とした場合、
T×S2≦9×106
を満たすことを特徴とする請求項1に記載のシリコンウェーハ。 - 前記ウェーハ本体の初期酸素濃度が14×1017atoms/cm3以下であることを特徴とする請求項1に記載のシリコンウェーハ。
- 前記ウェーハ本体の初期酸素濃度が12×1017atoms/cm3以下であることを特徴とする請求項3に記載のシリコンウェーハ。
- 窒素濃度が1×1012atoms/cm3以上、又は、ボロンドープによって比抵抗が20mΩ・cm以下に設定されたウェーハ本体の表面にエピタキシャル層を形成する工程と、
前記エピタキシャル層を形成した後、少なくとも800℃以上の温度領域において5℃/min以上のレートで昇温し、1050℃以上融点以下の温度で5分以上の熱処理を行う工程と、を備えることを特徴とするシリコンウェーハの製造方法。 - 前記シリコンウェーハはLSA(Laser Spike Anneal)処理を含むデバイスプロセスに供せられるシリコンウェーハであって、
前記LSA処理時において前記ウェーハ本体に含まれる板状酸素析出物の対角線長をS(nm)、前記LSA処理における最高到達温度をT(℃)とした場合、
T×S2≦9×106
を満たすことを特徴とする請求項5に記載のシリコンウェーハの製造方法。 - チョクラルスキー法によって初期酸素濃度が14×1017atoms/cm3以下に設定されたシリコン単結晶を育成し、前記シリコン単結晶から前記ウェーハ本体を切り出すことを特徴とする請求項5に記載のシリコンウェーハの製造方法。
- 前記シリコン単結晶を育成する工程においては、初期酸素濃度を12×1017atoms/cm3以下に設定することを特徴とする請求項7に記載のシリコンウェーハの製造方法。
- 前記シリコンウェーハはLSA(Laser Spike Anneal)処理を含むデバイスプロセスに供せられるシリコンウェーハであって、
前記デバイスプロセスにおいては、LSA処理の前に、750℃以上の温度で4時間以上保持される熱処理であって、1000℃から1050℃の温度範囲で2時間以上保持される処理を含む熱処理が行われることを特徴とする請求項7に記載のシリコンウェーハの製造方法。 - シリコンウェーハを製造するウェーハプロセスと、前記シリコンウェーハに半導体デバイスを形成するデバイスプロセスとを備える半導体デバイスの製造方法であって、
前記ウェーハプロセスは、
窒素濃度が1×1012atoms/cm3以上、又は、ボロンドープによって比抵抗が20mΩ・cm以下に設定されたウェーハ本体の表面にエピタキシャル層を形成する工程と、
前記エピタキシャル層を形成した後、少なくとも800℃以上の温度領域において5℃/min以上のレートで昇温し、1050℃以上融点以下の温度で5分以上の熱処理を行う工程と、を含み、
前記デバイスプロセスは、LSA(Laser Spike Anneal)処理を行う工程を含み、
前記LSA処理は、前記ウェーハ本体に含まれる板状酸素析出物の対角線長をS(nm)、最高到達温度をT(℃)とした場合、
T×S2≦9×106
を満たす条件で行うことを特徴とする半導体デバイスの製造方法。
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11150119A (ja) * | 1997-11-14 | 1999-06-02 | Sumitomo Sitix Corp | シリコン半導体基板の熱処理方法とその装置 |
WO2006003812A1 (ja) * | 2004-06-30 | 2006-01-12 | Sumitomo Mitsubishi Silicon Corporation | シリコンウェーハの製造方法及びこの方法により製造されたシリコンウェーハ |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH10150048A (ja) | 1996-11-15 | 1998-06-02 | Sumitomo Sitix Corp | 半導体基板 |
KR100588098B1 (ko) * | 1998-08-31 | 2006-06-09 | 신에쯔 한도타이 가부시키가이샤 | 실리콘 단결정 웨이퍼, 에피택셜 실리콘 웨이퍼와 그제조방법 |
EP1087041B1 (en) * | 1999-03-16 | 2009-01-07 | Shin-Etsu Handotai Co., Ltd | Production method for silicon wafer and silicon wafer |
JP3988307B2 (ja) * | 1999-03-26 | 2007-10-10 | 株式会社Sumco | シリコン単結晶、シリコンウェーハ及びエピタキシャルウェーハ |
JP2006003812A (ja) | 2004-06-21 | 2006-01-05 | Fuji Photo Film Co Ltd | 印刷版の作製方法および装置 |
KR100798585B1 (ko) * | 2004-06-30 | 2008-01-28 | 가부시키가이샤 섬코 | 실리콘 웨이퍼의 제조 방법 및 이 방법에 의해 제조된실리콘 웨이퍼 |
JP2006054350A (ja) * | 2004-08-12 | 2006-02-23 | Komatsu Electronic Metals Co Ltd | 窒素ドープシリコンウェーハとその製造方法 |
JP4183093B2 (ja) * | 2005-09-12 | 2008-11-19 | コバレントマテリアル株式会社 | シリコンウエハの製造方法 |
JP5119677B2 (ja) | 2007-02-16 | 2013-01-16 | 株式会社Sumco | シリコンウェーハ及びその製造方法 |
US20080292523A1 (en) * | 2007-05-23 | 2008-11-27 | Sumco Corporation | Silicon single crystal wafer and the production method |
US20090146181A1 (en) * | 2007-12-07 | 2009-06-11 | Chartered Semiconductor Manufacturing Ltd. | Integrated circuit system employing diffused source/drain extensions |
-
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11150119A (ja) * | 1997-11-14 | 1999-06-02 | Sumitomo Sitix Corp | シリコン半導体基板の熱処理方法とその装置 |
WO2006003812A1 (ja) * | 2004-06-30 | 2006-01-12 | Sumitomo Mitsubishi Silicon Corporation | シリコンウェーハの製造方法及びこの方法により製造されたシリコンウェーハ |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014160784A (ja) * | 2013-02-21 | 2014-09-04 | Sumco Corp | エピタキシャルシリコンウェーハ |
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