WO2011058803A1 - Circuit de compensation de la distorsion - Google Patents

Circuit de compensation de la distorsion Download PDF

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Publication number
WO2011058803A1
WO2011058803A1 PCT/JP2010/064615 JP2010064615W WO2011058803A1 WO 2011058803 A1 WO2011058803 A1 WO 2011058803A1 JP 2010064615 W JP2010064615 W JP 2010064615W WO 2011058803 A1 WO2011058803 A1 WO 2011058803A1
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WO
WIPO (PCT)
Prior art keywords
signal
distortion compensation
absolute value
predistortion
output
Prior art date
Application number
PCT/JP2010/064615
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English (en)
Japanese (ja)
Inventor
俊秀 桑原
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日本電気株式会社
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Filing date
Publication date
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Publication of WO2011058803A1 publication Critical patent/WO2011058803A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3209—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the amplifier comprising means for compensating memory effects
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3224—Predistortion being done for compensating memory effects
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3233—Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion

Definitions

  • the present invention relates to a distortion compensation circuit that compensates for distortion of a transmitted radio signal, and more particularly to a distortion compensation circuit using a predistortion system.
  • modulation systems such as W-CDMA (Wideband-Code Division Multiple Access) and WiMAX (Worldwide Interoperability) which have been developed rapidly as communication methods for realizing high-speed wireless transmission in recent years, high peak power is generated. . Therefore, these modulation schemes are disadvantageous in comparison with other modulation schemes in terms of distortion characteristics and power utilization efficiency of the transmission amplifier.
  • a circuit combining a distortion compensation circuit and a high efficiency amplifier may be used.
  • FIG. 1 is a diagram showing an example of a distortion compensation circuit using a predistortion method in combination with a generally used high efficiency amplifier.
  • the distortion compensation circuit shown in FIG. 1 includes an instantaneous amplitude calculator 101, an LUT 102, a multiplier 103, a memory 104, a frequency modulator 105, a DAC 106, a transmission mixer 107, a signal generator 108, An amplifier 109, a reception mixer 110, an ADC 111, a frequency demodulator 112, a memory 113, and a DSP 114 are provided.
  • the instantaneous amplitude calculator 101 calculates the instantaneous amplitude of the input transmission baseband signal. In addition, the instantaneous amplitude calculation unit 101 outputs the calculated instantaneous amplitude to the LUT 102.
  • Multiplier 103 reads a coefficient corresponding to the instantaneous amplitude output from instantaneous amplitude calculator 101 from LUT 102, and outputs a predistortion signal obtained by multiplying the read coefficient and the transmission baseband signal to frequency modulator 105. 3 multiplication unit.
  • the memory 104 stores a transmission baseband signal.
  • the frequency modulator 105 modulates the frequency of the predistortion signal output from the multiplication unit 103. Further, the frequency modulator 105 outputs a signal whose frequency is modulated to the DAC 106.
  • the DAC 106 is a digital-analog converter that converts the signal output from the frequency modulator 105 from a digital signal to an analog signal. Further, the DAC 106 outputs the converted analog signal to the transmission mixer 107.
  • the transmission mixer 107 converts the signal output from the DAC 106 into a radio (RF) signal. At this time, the transmission mixer 107 uses the LO signal output from the signal generator 108 to convert it to an RF signal. The transmission mixer 107 outputs the converted RF signal to the amplifier 109.
  • RF radio
  • the signal generator 108 generates signals to be output to the transmission mixer 107 and the reception mixer 110.
  • the amplifier 109 amplifies the signal output from the transmission mixer 107 and transmits it to the wireless section as an RF signal.
  • the reception mixer 110 converts a part of the RF signal transmitted from the amplifier 109 using the signal output from the signal generation unit 108. Reception mixer 110 outputs the converted signal to ADC 111.
  • the ADC 111 is an analog-digital converter that converts the signal output from the reception mixer 110 from an analog signal to a digital signal. Further, the ADC 111 outputs the converted digital signal to the frequency demodulator 112.
  • the frequency demodulator 112 demodulates the frequency of the digital signal output from the ADC 111. Thus, the transmission baseband signal is restored. Further, the frequency demodulator 112 writes the signal demodulated in frequency into the memory 113.
  • the memory 113 stores the signal written by the frequency demodulator 112.
  • the DSP 114 reads the transmission baseband signal stored in the memory 104 and the signal stored in the memory 113. Further, the DSP 114 compares the signals read from the memory 104 and the memory 113 with each other. Further, the DSP 114 rewrites the coefficient stored in the LUT 102 so that the signal read from the memory 104 and the signal read from the memory 113 have the same waveform (spectrum).
  • FIG. 2 is a diagram for explaining signal waveforms (spectrums) at each point before distortion compensation is performed in the distortion compensation circuit shown in FIG.
  • FIG. 2 shows a case where a modulated wave having a bandwidth (BW) is input as a transmission baseband signal. Observation points (input points or output points) of each spectrum are shown surrounded by a broken-line circle.
  • the distortion compensation coefficient stored in the LUT 102 is “1”, which is an initial value
  • the input point of the multiplier 103, the output point of the multiplier 103, the output point of the DAC 106, and the transmission mixer 107 The spectrum at the output point is the same as the input signal.
  • a distortion component is added to the signal by the amplifier 109, and the RF signal is distorted at the output point of the amplifier 109.
  • the receiving side only monitors the output of the amplifier 109 as it is. Therefore, the spectrum at the input point of the reception mixer 110, the output point of the reception mixer 110, and the output point of the frequency demodulator 112 are the same as the spectrum at the output point of the amplifier 109.
  • the DSP 114 compares the spectrum of the signal at the input point of the multiplier 103 with the spectrum of the signal at the output point of the frequency demodulator 112. As a result of this comparison, the DSP 114 calculates and calculates a coefficient for bringing the spectrum of the signal (RF signal) at the output point of the amplifier 109 closer to the spectrum of the original transmission baseband signal that is the signal at the input point of the multiplier 103. The coefficients are written to the LUT 102. Specifically, the DSP 114 calculates a coefficient by which the original transmission baseband signal is multiplied so that the spectrum of the signal at the output point of the amplifier 109 approaches the spectrum of the original transmission baseband signal.
  • the comparison and update of the coefficients by the DSP 114 are repeated until the spectrum of the original transmission baseband signal and the spectrum of the signal at the output point of the amplifier 109 are the same.
  • the coefficients converge when the spectrum of the original transmission baseband signal and the spectrum of the signal at the output point of the amplifier 109 become the same.
  • FIG. 3 is a diagram for explaining a signal waveform (spectrum) at each point after the distortion compensation coefficient converges in the distortion compensation circuit shown in FIG.
  • FIG. 3 shows a case where a modulated wave having a bandwidth (BW) is input as a transmission baseband signal. Observation points (input points or output points) of each spectrum are shown surrounded by a broken-line circle.
  • a signal without distortion is also monitored on the receiving side (the input point of the receiving mixer 110, the output point of the receiving mixer 110, and the output point of the frequency demodulator 112). Therefore, as a result of the spectrum comparison in the DSP 114, it can be determined that there is no need to update the distortion compensation coefficient stored in the LUT 102. If the distortion component still remains in the output of the amplifier 109, the coefficient of the LUT 102 is further updated by the waveform comparison by the DSP 114. This is because the output waveform of the amplifier 109 and the original transmission baseband signal are updated. Repeat until the waveforms are the same.
  • a technique is disclosed in which the level of a predistortion signal is detected, a coefficient corresponding to the detected level is delayed, and signal distortion is compensated using time differentiation of an output through a lookup table (for example, , See Patent Document 1).
  • the distortion compensation circuit of the type that multiplies the original signal by the distortion compensation coefficient corresponding to the instantaneous amplitude of the input waveform as described above, the distortion amount of the amplifier seems to be correlated with the time differentiation of the input amplitude. If such terms are included, there is a problem that they cannot be compensated.
  • An object of the present invention is to provide a distortion compensation circuit that solves the above-described problems.
  • the distortion compensation circuit of the present invention is A distortion compensation circuit using a predistortion method, It has a memory effect cancellation circuit in the previous stage of the frequency modulator that modulates the frequency of the predistortion signal,
  • the memory effect cancel circuit is An absolute value calculation unit for calculating an absolute value of the predistortion signal;
  • a time differentiation unit for calculating a time differential value obtained by time-differentiating the absolute value calculated by the absolute value calculation unit;
  • a first multiplier that multiplies a time derivative calculated by the time derivative and a preset parameter and outputs the result;
  • An adder that adds 1 to the value output by the first multiplier and outputs the result;
  • a second multiplier that multiplies the value output from the adder with the predistortion signal and outputs the product to the frequency modulator;
  • the distortion compensation method of the present invention is A distortion compensation method for compensating for distortion of an input signal, Calculate the instantaneous amplitude of the input transmission signal, Multiplying the transmission signal by a coefficient corresponding to the instantaneous amplitude; Using the transmission signal multiplied by the coefficient as a predistortion signal, the absolute value of the predistortion signal is calculated, Calculating a time differential value obtained by differentiating the absolute value with respect to time, Multiplying the time derivative by a preset parameter, and adding 1 further, The predistortion signal is corrected by multiplying the value obtained by adding 1 to the predistortion signal.
  • the accuracy of distortion compensation can be increased with low cost.
  • FIG. 2 is a diagram for explaining a signal waveform (spectrum) at each point before distortion compensation is performed in the distortion compensation circuit shown in FIG. 1.
  • FIG. 2 is a diagram for explaining a signal waveform (spectrum) at each point after a distortion compensation coefficient converges in the distortion compensation circuit shown in FIG. 1.
  • FIG. 5 is a diagram showing an example of an internal configuration of a memory effect cancel circuit shown in FIG. 4.
  • FIG. 5 is a diagram for explaining an operation when the amplifier shown in FIG. 4 is an FET.
  • FIG. 4 is a diagram showing an embodiment of the distortion compensation circuit of the present invention.
  • the distortion compensation circuit in this embodiment includes an instantaneous amplitude calculation unit 101, an LUT 102, a multiplication unit 103, a memory 104, a frequency modulator 105, a DAC 106, a transmission mixer 107, and a signal generator.
  • a unit 108, an amplifier 109, a reception mixer 110, an ADC 111, a frequency demodulator 112, a memory 113, a DSP 114, and a memory effect cancellation circuit 115 are provided.
  • Instantaneous amplitude calculator 101, LUT 102, multiplier 103 (third multiplier), memory 104, frequency modulator 105, DAC 106, transmission mixer 107, signal generator 108, amplifier 109, reception mixer 110, ADC 111, frequency demodulator 112, the memory 113, and the DSP 114 are the same as those shown in FIG.
  • the memory effect cancel circuit 115 is connected between the multiplier 103 and the frequency modulator 105, corrects the predistortion signal output from the multiplier 103, and outputs the corrected signal to the frequency modulator 105.
  • the multiplication unit 103 outputs a predistortion signal to the memory effect cancellation circuit 115.
  • the frequency modulator 105 modulates the frequency of the predistortion signal output from the memory effect cancel circuit 115.
  • FIG. 5 is a diagram showing an example of the internal configuration of the memory effect cancel circuit 115 shown in FIG.
  • the memory effect cancellation circuit 115 shown in FIG. 4 includes an absolute value calculation unit 201, a time differentiation unit 202, a multiplication unit 203, an addition unit 204, and a multiplication unit 205. Yes.
  • the absolute value calculation unit 201 calculates the absolute value of the predistortion signal output from the multiplication unit 103. That is, the absolute value calculation unit 201 calculates the signal amplitude of the predistortion signal. Further, the absolute value calculation unit 201 outputs the calculated absolute value (signal amplitude) of the predistortion signal to the time differentiation unit 202.
  • the time differentiation unit 202 calculates a time differential value obtained by time-differentiating the absolute value (signal amplitude) output from the absolute value calculation unit 201. That is, the time differentiator 202 calculates the amount of time change of the signal amplitude value output from the absolute value calculator 201. Further, the time differentiation unit 202 outputs the calculated time differentiation value to the multiplication unit 203.
  • the multiplication unit 203 is a first multiplication unit that multiplies the time differential value output from the time differentiation unit 202 by a parameter P (complex number) set from the outside of the distortion compensation circuit. This parameter P may be set in advance.
  • the multiplication unit 203 outputs the multiplication result (first multiplication value) to the addition unit 204.
  • the addition unit 204 adds 1 to the first multiplication value output from the multiplication unit 203. Further, the addition unit 204 outputs the value of (first multiplication value + 1) to the multiplication unit 205.
  • the multiplication unit 205 is a second multiplication unit that multiplies the value of (first multiplication value + 1) output from the addition unit 204 and the predistortion signal output from the multiplication unit 103. Further, the multiplication unit 205 outputs a corrected predistortion signal that is a result of multiplication to the frequency modulator 105.
  • the instantaneous amplitude calculation unit 101 calculates the instantaneous amplitude of the transmission baseband signal.
  • the calculated instantaneous amplitude value is output from the instantaneous amplitude calculation unit 101 to the LUT 102.
  • the transmission baseband signal is stored in the memory 104.
  • a coefficient (distortion compensation coefficient) corresponding to the value of the instantaneous amplitude output from the instantaneous amplitude calculation unit 101 is read from the LUT 102 by the multiplication unit 103. Then, the multiplication unit 103 multiplies the read coefficient and the transmission baseband signal. Note that the multiplier 103 is a complex multiplier. The result of multiplication is a predistortion signal.
  • the predistortion signal is input to the absolute value calculation unit 201 in the memory effect cancellation circuit 115, and the absolute value calculation unit 201 calculates the absolute value (signal amplitude) of the predistortion signal.
  • the calculated signal amplitude is output from the absolute value calculation unit 201 to the time differentiation unit 202.
  • the time differentiation unit 202 time-differentiates the signal amplitude, thereby calculating a time change amount of the signal amplitude as a time differential value. Then, the calculated time differential value is output from the time differential unit 202 to the multiplication unit 203.
  • the multiplication unit 203 multiplies the time differential value output from the time differentiation unit 202 by the parameter P, and the multiplication value is output from the multiplication unit 203 to the addition unit 204.
  • the addition unit 204 adds 1 to the multiplication value output from the multiplication unit 203. Then, the multiplication value obtained by adding 1 is output from the addition unit 204 to the multiplication unit 205.
  • the multiplication value added with 1 When the multiplication value added with 1 is input to the multiplication unit 205, the multiplication value added with 1 and the predistortion signal output from the multiplication unit 103 are multiplied by the multiplication unit 205.
  • the multiplied value is output from the multiplication unit 205 to the frequency modulator 105 as a corrected predistortion signal.
  • the frequency of the corrected predistortion signal output from the multiplier 205 is modulated by the frequency modulator 105, and the modulated signal is output from the frequency modulator 105 to the DAC 106.
  • the signal output from the frequency modulator 105 is digital-analog converted from a digital signal to an analog signal by the DAC 106. Up to here is the signal processing unit using digital signals. Then, the converted analog signal is output to the transmission mixer 107 as an IF analog signal.
  • the signal output from the DAC 106 is converted into an RF signal by the transmission mixer 107.
  • the converted RF signal is output from the transmission mixer 107 to the amplifier 109, amplified by the amplifier 109, and transmitted to the radio section.
  • a part of the RF signal transmitted from the amplifier 109 is converted by the reception mixer 110 using the LO signal generated by the signal generation unit 108 and output to the ADC 111.
  • the signal output from the reception mixer 110 is converted from analog to digital by the ADC 111 and output to the frequency demodulator 112.
  • the digital signal output from the ADC 111 is frequency demodulated by the frequency demodulator 112. As a result, the RF signal is returned to the transmission baseband signal.
  • the frequency demodulated signal is written into the memory 113 by the frequency demodulator 112.
  • the transmission baseband signal stored in the memory 104 and the signal stored in the memory 113 are read out by the DSP 114 and both are compared with each other.
  • the coefficients stored in the LUT 102 are rewritten by the DSP 114 so that the signal read from the memory 104 and the signal read from the memory 113 have the same waveform (spectrum).
  • the above operation realizes an adaptive predistortion type distortion compensation circuit.
  • FIG. 6 is a diagram for explaining the operation when the amplifier 109 shown in FIG. 4 is an FET (Field Effect Transistor).
  • FET Field Effect Transistor
  • the FET 301 shown in FIG. 6 is supplied with the power supply voltage VD 0 from the power supply 303.
  • the inductance of the circuit from the power source 303 to the FET 301 is not 0, and even if it is very small, it is considered to have a series inductance of the LD. That is, as shown in FIG. 6, an equivalent circuit can be considered in which an inductor 302 having an inductance LD is connected.
  • VD the voltage at the drain end of the FET 301
  • a current ID flows through the FET 301.
  • VD is calculated using (Formula 1).
  • VD VD0 ⁇ (dID / dt) ⁇ LD (Formula 1)
  • ID is approximately proportional to the output voltage or input voltage of the FET 301. If the input voltage changes over time, the ID also changes over time according to the input voltage.
  • the RF signal actually output from the amplifier 109 is obtained by modulating the LO signal with the transmission baseband signal. Therefore, when the transmission baseband signal is x (t), the time derivative (d
  • VD VD0 ⁇ P (dx / dt) (Formula 2)
  • P is a constant determined by LD and the relationship between input amplitude and current.
  • the amplifier 109 operates in a state where the power supply voltage is shaken. If the RF output voltage does not change with respect to fluctuations in the power supply voltage, there is no problem, but generally the RF output voltage is affected. If the amplification factor of the amplifier 109 is A, the output voltage Vout is calculated using (Equation 3) if there is no fluctuation due to the power supply voltage.
  • Vout Vin ⁇ A ⁇ (1-Q (dx / dt)) (Formula 4)
  • Q b ⁇ P.
  • the value of Q (dx / dt) is more than 1. If the value is sufficiently small, a corrected Vin ′ as shown in (Equation 5) may be generated and given as an input to the amplifier 109.
  • Vin ′ Vin ⁇ (1 + Q (dx / dt)) (Formula 5)
  • the memory effect cancel circuit 115 shown in FIG. 5 realizes these.
  • the distortion compensation when there is a correlation between the time differentiation of the input amplitude and the distortion generated by the amplifier, the distortion compensation has an effect of suppressing them by adjusting the parameter while observing the output of the amplifier. It becomes a circuit.
  • the circuit since it is assumed that there is a simple first-order correlation between the time derivative of the input amplitude and the amount of distortion, the circuit is simple and small in scale, and distortion compensation is performed at a relatively low cost. Can be expected to improve the accuracy of
  • the distortion compensation circuit of the present invention can be mounted on a wireless communication apparatus having a function of transmitting a wireless signal.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un circuit d'annulation de l'effet de mémoire (115), implanté en amont d'un modulateur de fréquence (105) dans le but de moduler la fréquence d'un signal de pré-distorsion. Le circuit d'annulation de l'effet de mémoire (115) calcule la valeur absolue du signal de pré-distorsion, différentie dans le temps la valeur absolue calculée afin d'obtenir une valeur dérivée par rapport au temps, multiplie la valeur dérivée par rapport au temps ainsi calculée par un paramètre prédéterminé, ajoute 1 au produit, multiplie la somme par le signal de pré-distorsion et délivre le résultat au modulateur de fréquence (105).
PCT/JP2010/064615 2009-11-10 2010-08-27 Circuit de compensation de la distorsion WO2011058803A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009256924 2009-11-10
JP2009-256924 2009-11-10

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WO2011058803A1 true WO2011058803A1 (fr) 2011-05-19

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005101908A (ja) * 2003-09-25 2005-04-14 Hitachi Kokusai Electric Inc プリディストーション方式歪補償機能付き増幅器

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005101908A (ja) * 2003-09-25 2005-04-14 Hitachi Kokusai Electric Inc プリディストーション方式歪補償機能付き増幅器

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