Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
• • H10W90/00—
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
  • H10H20/8506—Containers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/85—Packages
  • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls

Definitions

• An optoelectronic semiconductor component is specified.
• An object to be solved is to specify a particularly compact semiconductor component.
• the optoelectronic semiconductor component comprises a first carrier.
• the carrier has an upper side and a lower side opposite the upper side.
• the first carrier may be a carrier plate of electrically conductive material, for example a metal, which serves as electrical contact surface for the semiconductor component.
• the first carrier may also be formed with a base body of electrically insulating material, for example a ceramic.
• the main body can then at the
• Top and / or the underside be provided with connection points and tracks.
• the first carrier has a first and a second region. That is to say, the first carrier is subdivided into regions, the regions differing with regard to at least one physical property, for example their thickness in the vertical direction. "Thickness” means here the extent of each of the two areas, where “vertical” is a direction perpendicular to one
• Main extension plane of the first carrier means.
• area is any three-dimensional structure that at least locally forms and forms the support.
• first together with the second area forms the first carrier.
• the first and second areas preferably merge directly into one another, so that neither a gap nor an interruption forms between the first and the second area.
• the first carrier is formed integrally and / or the first and the second region are formed with the same material.
• the first region has a greater thickness in the vertical direction than the second region.
• At least one optoelectronic semiconductor chip is arranged on the top side on the first carrier.
• the optoelectronic semiconductor chip may, for example, be a luminescence diode chip.
• the luminescence diode chip can be a luminescent or laser diode chip which emits radiation in the range from ultraviolet to infrared light. Preferably emits the
• Luminescence diode chip light in the visible or ultraviolet range of the spectrum of electromagnetic radiation.
• the optoelectronic semiconductor chip can also be a radiation-receiving chip, for example a photodiode.
• the at least one optoelectronic semiconductor chip is arranged, for example, in the first region on the upper side.
• the optoelectronic semiconductor component has at least one, for example exactly one, electronic component, which is arranged in the second region on the underside of the first carrier.
• the first area projects beyond the second area at the bottom in the vertical direction.
• This may mean that the upper side of the first carrier is a plane without elevations or depressions and thus "even", while the underside has an elevation, for example in the form of a step, due to the projecting of the second region through the first region.
• the carrier is subdivided into at least two regions in a lateral direction, the carrier having a greater thickness in the first region in the vertical direction than in the second region.
• the at least one electronic component is electrically conductively connected to the at least one optoelectronic semiconductor chip.
• the first carrier itself is electrically conductive or an electrical contact between the electronic component and the optoelectronic semiconductor chip is produced by means of electrical conductor tracks and contact terminals.
• the semiconductor component comprises a first carrier which has an upper side and an underside opposite the upper side of the first carrier, wherein the first carrier has a first and a second region.
• the optoelectronic Semiconductor device at least one optoelectronic semiconductor chip, which is arranged on the upper side on the first carrier.
• the optoelectronic semiconductor component has at least one electronic component which is arranged in the second region on the underside of the first carrier.
• the first region has a greater thickness in the vertical direction than the second region, wherein on the underside the first region projects beyond the second region in the vertical direction and the at least one electronic component is electrically conductively connected to the at least one optoelectronic semiconductor chip.
• the optoelectronic semiconductor component described here is based inter alia on the recognition that an attachment of an electronic component on the same
• an upper surface of a carrier in addition to, for example, a semiconductor chip is space consuming, since then the top must be large enough so that both components, the optoelectronic semiconductor chip and the electronic component can be mounted together on the top.
• the optoelectronic semiconductor device described here makes use of the idea to use a carrier having a first and a second region, wherein the first region has a greater thickness in vertical Direction than the second area and at the bottom of the second area in dominated by vertical direction.
• An electronic component is then arranged on the underside in the second region of the first carrier, wherein at the same time an optoelectronic semiconductor chip is arranged on the upper side of the carrier.
• Optoelectronic semiconductor chip and electronic component are thus located on opposite sides of the carrier.
• the placement of the electronic component on one of the upper side, and thus also the semiconductor chip, on the opposite side advantageously makes it possible to reduce at least the lateral extent of the carrier or of the optoelectronic semiconductor component.
• the underside designed for mounting the electronic component, to which the at least one electronic component is attached can serve as electrical contact marking for the semiconductor component. That is, for example, the second area or the electronic part itself may serve as a cathode mark.
• the at least one electronic component does not project beyond the first carrier in the vertical direction. This may mean that the first region projects beyond the electronic component or that the at least one electronic component terminates flush with the first region in the lateral direction.
• the fact that the at least one electronic component does not project beyond the first carrier in the vertical direction keeps the vertical extent of the component as low as possible, since in this case the thickness of the first area together with the vertical extent of the at least one optoelectronic semiconductor chip simultaneously the maximum vertical Expansion of the entire semiconductor device may be.
• the underside in the first region can then form an assembly or contact surface for the semiconductor component.
• the second region is formed by an undercut in the first carrier.
• "Undercut” in this context means a peripheral recess in the first carrier, which is freely accessible from the outside and is bounded by at least two side surfaces of the first carrier.
• the undercut is introduced into the first carrier by means of etching, stamping, stamping, sawing, milling or another form of material removal.
• etching stamping, stamping, sawing, milling or another form of material removal.
• Undercut increases the thickness in the vertical direction, starting from the second region in the direction of the first region "suddenly", for example in the form of a step. " suddenly” means in this context that the underside in the lateral direction, ie parallel to
• Main extension plane of the first carrier from one point to the next predeterminable has a change in the vertical extent. It is also possible that the second area is formed by a plurality of undercuts, which then form a stepped stair structure.
• the second region is provided by a
• the recess is a recess in the carrier, which has an opening and is freely accessible from the bottom. Furthermore, the recess has For example, a bottom surface and at least one side surface. Bottom and side surfaces are formed by the carrier. The bottom surface may be located on the opposite side of the opening of the recess. The opening and the bottom surface are interconnected by the side surface. Also in this case, it is possible that instead of just one recess a plurality of recesses of different dimensions are introduced into the first carrier, which then each form step-shaped projections on which, for example, an electronic component is attached in each case.
• the second region surrounds the first region on at least three sides. It is also possible for the second area to completely surround the first area, for example in the shape of a frame. For example, an undercut forming the second region extends along the edge of the first carrier on three sides.
• the optoelectronic semiconductor chip and the electronic component are each electrically conductively connected to a further carrier by means of a bonding wire.
• the further carrier may be formed of the same or different materials as the first carrier.
• the further carrier may have the same geometric features, for example with regard to the division into a first and a second region.
• the further carrier, as well as the first carrier is formed by a first and a second region, in which case too, the first region is the second region in the vertical direction at the bottom surmounted.
• the or another electronic component can then be arranged in the second region on the underside of the further carrier.
• the at least one optoelectronic semiconductor chip is laterally surrounded by a housing body.
• the housing body then covers at least in places the upper side of the first and / or the further carrier.
• the housing body surrounds the optoelectronic semiconductor chip in a circular, oval or rectangular manner.
• the housing body completely covers the surface of the first and / or second carrier except for a chip mounting area.
• the housing body may be formed with a duroplastic or thermoplastic material, such as an epoxy, or may be formed with a ceramic material or consist of such. It is also possible that the housing body is formed with a silicone or other, for example rubber-like, materials or mixtures of said materials.
• the housing body reshapes the at least one electronic component at least in places.
• “formed” means that the housing body is in direct contact with the electronic component, which encloses the electronic component at least in places and thus forms neither a gap nor an interruption between the housing body and the electronic component.
• the electronic component through the housing body from the outside
• the vertical extent of the housing body above the top of the first carrier in addition to the vertical extent of the optoelectronic semiconductor chip no longer additionally include the vertical extent of the electronic component and a possible Bondking ist.
• a housing body can be realized, which has a small lateral extent by the reduction of the top of the first carrier.
• the housing body does not project beyond the first region on the underside in the vertical direction. If the electronic component does not protrude beyond the first region, then it is conceivable that the housing body does not project beyond the first region. It is also possible that the
• the housing body mechanically connects the first carrier to the further carrier. This may mean that in addition to the first carrier and the other carrier is covered at least in places on its upper or lower side and the side surfaces with the housing body and the housing body so a mechanical
• such a device which is particularly stable against, for example, external mechanical action and so the first carrier and the other carrier are stabilized in position to each other.
• the housing body may be electrically insulating between the two carriers.
• the electronic component contains or is a protection circuit against damage due to electrostatic charging.
• the electronic component may be an ESD (electrostatic discharge) protective element.
• the ESD protection element is suitable for deriving voltage peaks which occur, for example, in the reverse direction of the optoelectronic semiconductor chip.
• the ESD protection element is, for example, one of the following components: varistor, LED chip, Zener diode, resistor. The ESD protection element is then connected in parallel or antiparallel to the optoelectronic semiconductor chip.
• the electronic component is a light-emitting diode chip, then it is anti-parallel to the optoelectronic semiconductor chip interconnected. This LED chip can then also be used for generating radiation.
• the at least one electronic component contains a drive circuit for the at least one optoelectronic semiconductor chip.
• the optoelectronic semiconductor chip can be controlled, for example, with regard to brightness and heat development.
• FIGS. 1a, 1b, 2a, 2b, 2c, 2d and 2e show schematic views of exemplary embodiments of an optoelectronic semiconductor component described here.
• FIG. 1a shows, in a schematic sectional view along a section line AA, an exemplary embodiment of an optoelectronic semiconductor component 100 described here.
• the first carrier IA has an upper side IIA and an underside 12A opposite the upper side IIA. Furthermore, the first carrier IA has a first area Bl and a second area B2.
• the second region B2 is formed by an undercut 5A, the first region Bl having a thickness D1 and the second region B2 having a thickness D2.
• the undercut 5A is through two
• Component 3 are thus located on opposite sides of the carrier IA.
• the thickness D 1 of the first region B 1 is greater than the added thickness D 2 of the second region B 2 and the vertical extent of the electronic component 3.
• FIG. 1 b shows a schematic sectional view of a further exemplary embodiment according to an optoelectronic semiconductor component 100 described here, in which the second region B 2 is formed by a recess 13.
• the recess 13 is laterally bounded in each case by three side surfaces of the carrier IA.
• the electronic component 3 is attached on a bottom surface of the recess 13, the electronic component 3 is attached.
• the recess 13 provides the electronic component protection against external influences such as mechanical stress.
• the second area B 2 borders the first area B 1 on three sides.
• the carrier IA is a metallic carrier strip, for example made of copper, through which the semiconductor chip 2 is electrically contacted.
• the optoelectronic semiconductor chip 2 is electrically conductively contacted by a bonding wire contact 21 with another carrier IB.
• the further carrier IB may likewise be a metallic carrier strip, for example copper.
• the first carrier IA and / or the further carrier IB are formed from a ceramic material, in which case the optoelectronic semiconductor chip 2 is electrically contacted by means of conductor tracks and contact points applied to the carriers IA and IB. Supports IA and IB are further electrically isolated from each other.
• the carrier IB also has an underside 12B and an undercut 5B introduced via the second carrier IB.
• the undercut 5B is introduced into the carrier IB by means of an etching process.
• the electronic component 3 is electrically conductively contacted with the further carrier IB, wherein the undercut 5B serves as a contact region for the bonding wire contact 31.
• the electronic component 3 is a component which has an ESD protection circuit.
• FIG. 2b shows the exemplary embodiment according to FIGS. 1a and 2a in a schematic perspective plan view. Compared to the semiconductor device 100 shown in FIG. 1 a, the semiconductor device 100 is now provided with a
• Housing body 4 is provided.
• the housing body circumscribes the semiconductor chip 2 in a circle and covers all exposed areas of the upper sides IIA and IIB of the supports IA and IB.
• the Housing body 4 mechanically interconnects the two supports IA and IB.
• the housing body 4 ensures electrical insulation of the two carriers IA and IB.
• the housing body 4 is formed with a duroplastic or thermoplastic material, for example an epoxy. It is also possible that the housing body 4 may be formed with or consist of a ceramic material.
• Figure 2c shows in a schematic perspective
• Figures 2d and 2e show further schematic side and bottom views of the embodiment according to the figures Ia and 2a, 2b and 2c.

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Citations (8)

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• 2009
  • 2009-06-04 DE DE102009023854.9A patent/DE102009023854B4/de active Active
• 2010
  • 2010-05-05 KR KR1020127000258A patent/KR20120032512A/ko not_active Withdrawn
  • 2010-05-05 EP EP10716549.0A patent/EP2438613B1/de active Active
  • 2010-05-05 US US13/375,813 patent/US8482025B2/en active Active
  • 2010-05-05 JP JP2012513524A patent/JP2012529164A/ja active Pending
  • 2010-05-05 WO PCT/EP2010/056118 patent/WO2010139518A1/de not_active Ceased
  • 2010-05-05 CN CN201080024683.4A patent/CN102460696B/zh active Active

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