WO2010086914A1 - 映像信号処理装置、映像信号処理システム及び映像信号処理方法 - Google Patents
映像信号処理装置、映像信号処理システム及び映像信号処理方法 Download PDFInfo
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- WO2010086914A1 WO2010086914A1 PCT/JP2009/003363 JP2009003363W WO2010086914A1 WO 2010086914 A1 WO2010086914 A1 WO 2010086914A1 JP 2009003363 W JP2009003363 W JP 2009003363W WO 2010086914 A1 WO2010086914 A1 WO 2010086914A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
- G09G5/008—Clock recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/08—Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/12—Use of DVI or HDMI protocol in interfaces along the display data pipeline
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- the present invention mainly relates to a video processing signal device for transmitting digital video / audio signals and a process automatic setting method in the video processing.
- a serial number is connected to the host CPU.
- a video signal processing device connected via an I2C bus for transmission, and transmitting a number of setting parameters corresponding to the video signal format from the host CPU to the video signal processing device.
- the apparatus performs video / audio signal transmission processing using the set parameters.
- HDMI High Definition Multimedia Interface
- a video / audio signal is input from a video signal source, for example.
- a clock with a video input clock multiplied by 1.25 or 1.5 in order to support transmission such as an audio signal encoded to the HDMI standard or a DEEPCOLOR that expands the bit width of the transmitted video / audio data.
- a clock generator for example, when the video signal source DE (data enable) is not supplied from the video signal source, it is necessary to generate it in its own HDMI transmission system.
- the host CPU sets a large number of setting parameters corresponding to the input video signal format at a low speed of, for example, about 100 kbps to 400 kbps and serial transmission.
- the signal is input to the HDMI transmission system via the bus, and video signal processing parameters are set therein, and the operation of the clock generation circuit is controlled.
- FIG. 200 An example of such an operation is shown in FIG. The figure shows the operation performed by the host CPU until the video is output.
- the host CPU performs a clock based on the video signal format of the video signal input from the video signal source.
- Set the parameters for the generator These parameters depend on the configuration of the clock generator, but the host CPU usually needs to be set repeatedly about several tens of times.
- the clock setting is completed, as indicated by reference numeral 201, the host CPU waits for the oscillation stabilization of the clock signal in the PLL circuit (Phase-locked loop) in the clock generation unit. To wait for a predetermined time. After that, when the predetermined time elapses, the host CPU repeatedly sets a number of video signal processing parameters for the video signal processing unit as indicated by reference numeral 202. Then, the video signal processing unit is instructed to reset, and a series of operations is completed.
- PLL circuit Phase-locked loop
- the host CPU and the signal transmission system are connected via the I2C bus in order to reduce the number of pins of the chip. Since it is necessary to access repeatedly about ten times, the processing time in the host CPU is increased, and the processing is complicated, resulting in a problem of delay in image output.
- Patent Document 1 when a video / audio signal to be transmitted is input to the video signal processing device, the input video / audio signal is measured in the video signal processing device and the video is processed. Describes a technology that automatically sets parameters in a short time without having to set a large number of parameters from the host CPU by detecting the signal format and detecting a large number of parameters according to the captured video signal format. ing.
- Patent Document 1 requires a signal measurement circuit and a parameter detection circuit, which increases the circuit scale and has a drawback that it cannot cope with transmission of a signal in a newly standardized video signal format.
- the present invention takes the above points into consideration, and its purpose is to reduce the number of times set from the host CPU and to easily cope with the addition of a new standardized video signal format. It is an object of the present invention to provide a video signal processing apparatus that can satisfactorily set a large number of parameters corresponding to the video signal format in a signal processing unit.
- a storage unit for receiving and storing a large number of parameters from the host CPU is added, and a large number of parameters stored in the storage unit are signal-processed.
- a configuration is employed in which an automatic parameter setting unit is set for the unit and the clock generator.
- the video signal processing apparatus includes a video signal processing apparatus including a signal processing unit that receives a video signal from a video signal source and performs predetermined processing on the received video signal.
- a storage unit that stores a plurality of parameters for performing the predetermined processing corresponding to the video signal format, and a parameter automatic setting unit that reads the plurality of parameters stored in the storage unit and sets the parameters in the signal processing unit; It is provided with.
- the present invention includes a clock generation unit that generates a clock signal corresponding to the video signal format of the received video signal, and the storage unit converts the video signal format of the received video signal into the video signal format.
- a plurality of parameters for generating a corresponding clock signal is also stored, and the parameter automatic setting unit reads the plurality of parameters for generating the clock signal stored in the storage unit and sets them in the clock generation unit It is characterized by that.
- the present invention is characterized in that, in the video signal processing device, the video signal processing unit performs predetermined processing on a video signal received in accordance with the HDMI standard.
- the video signal processing system of the present invention includes the video signal processing device and a host CPU connected to the video signal processing device and outputting and storing the plurality of parameters in a storage unit of the video signal processing device. It is characterized by that.
- the present invention is characterized in that, in the video signal processing system, the video signal processing device and the host CPU are connected by a serial bus.
- the present invention is characterized in that, in the video signal processing system, the host CPU outputs and stores the plurality of parameters to the storage unit when the load is small.
- the present invention is characterized in that, in the video signal processing system, when the load on the host CPU is small, the power is turned on.
- the host CPU outputs and stores the plurality of parameters to the storage unit, and then instructs the parameter automatic setting unit to start automatic parameter setting. It is characterized by that.
- the storage unit includes a nonvolatile memory.
- the present invention is characterized in that, in the video signal processing apparatus, the storage unit includes a storage table, and the storage table has one surface.
- the present invention is characterized in that, in the video signal processing apparatus, the storage unit includes a storage table, and the storage table has multiple sides.
- the present invention is characterized in that, in the video signal processing system, the address space of the host CPU used when writing parameters to the storage unit is mapped for all addresses of the storage unit.
- the storage unit includes a multi-sided storage table, and the address space of the host CPU used when writing parameters to the storage unit is the multi-sided storage table. One address is mapped.
- the host CPU in the video signal processing system, can directly set the parameter in the signal processing unit without using the parameter automatic setting unit, and write the parameter to the storage unit.
- the address space of the host CPU to be used is also used as the address space when setting the parameters directly in the signal processing unit.
- the present invention is characterized in that, in the video signal processing device, the storage unit has a fixed parameter table that stores and holds parameters when the video signal format of the received video signal is a known video signal format. To do.
- the present invention is characterized in that, in the video signal processing device, the parameter set in the signal processing unit is selected to be stored in the fixed parameter table or in an area other than the fixed parameter table.
- a common parameter among parameters corresponding to the plurality of video signal formats is the fixed parameter. It is stored in a table.
- values of a plurality of parameters stored in the fixed parameter table are read, only some of the read parameters are rewritten to other values, and after the rewriting All parameters including these parameters are stored in an area of a storage unit other than the fixed parameter table.
- a plurality of parameters for performing predetermined processing corresponding to the video signal format of the video signal are read from the storage unit, and the plurality of read Are set in a signal processing unit that performs the predetermined processing.
- the parameter automatic setting unit reads various parameters from the storage unit and automatically sets them in the signal processing unit, so that the number of times of setting from the host CPU connected to the video signal processing apparatus as a set device can be reduced. .
- the load on the host CPU is reduced, and the time until video output is effectively shortened.
- FIG. 1 is a diagram illustrating an overall configuration of an HDMI transmission system including a video signal processing device according to a first embodiment of the present invention.
- FIG. 2 is a diagram showing a procedure for setting a number of parameters by the host CPU included in the HDMI transmission system.
- FIG. 3 is a diagram illustrating the main configuration of the video signal processing apparatus according to the second embodiment of the present invention.
- FIG. 4 is a diagram showing a configuration in which the entire area of the storage table is mapped to the address space of the host CPU in the video signal processing apparatus according to the third embodiment of the present invention.
- FIG. 5 is a diagram showing a configuration in which only one surface of the storage table is mapped to the address space of the host CPU in the video signal processing apparatus according to the fourth embodiment of the present invention.
- FIG. 1 is a diagram illustrating an overall configuration of an HDMI transmission system including a video signal processing device according to a first embodiment of the present invention.
- FIG. 2 is a diagram showing a procedure for setting a number of parameters by the host
- FIG. 6 is a diagram showing a configuration in which a manually set address and a storage table address are shared in the address space of the host CPU in the video signal processing apparatus according to the fifth embodiment of the present invention.
- FIG. 7 is a diagram showing a video signal processing apparatus according to the sixth embodiment of the present invention.
- FIG. 8 is a diagram showing a video signal processing apparatus according to a seventh embodiment of the present invention.
- FIG. 9 is a diagram showing a method of reading a fixed table value and correcting and writing it to a storage table in the video signal processing apparatus according to the eighth embodiment of the present invention.
- FIG. 10 is a diagram showing a procedure for setting a number of parameters by a conventional host CPU.
- HDMI transmission system is described as an example, but the present invention is not particularly limited to the HDMI transmission system.
- FIG. 1 shows an HDMI transmission system having a video signal processing apparatus according to a first embodiment of the present invention.
- FIG. 1 shows a configuration in which a host CPU 300, a video signal source (video signal source) 301, and a video signal processing device 302 are set as a set device to construct an HDMI signal transmission system (video signal processing system) as a whole. Illustrated.
- the video signal processing device 302 includes a register control unit 303, a clock generation unit 304, and a video signal processing unit (signal processing unit) 305. Further, an automatic setting control unit 306 important in the present invention is mounted in the register control unit 303, and a storage table 307 is connected to the register control unit 303.
- the clock generator 304 and the video signal processor 305 need a number of parameters corresponding to the video signal format in order to process the video / audio signal input from the video signal source 301 according to the video signal format. .
- These parameters include a video control signal DE (data enable).
- the host CPU 300 stores a large number of these parameters in the storage table (storage unit) 307 in advance via the register control unit 303, and an automatic setting control unit (parameter automatic A setting unit) 306 acquires setting parameters from the storage table 307, sets the acquired parameters to the clock generation unit 304 and the video signal processing unit 305, and sets a PLL circuit ( Waits for oscillation stabilization of the clock signal at (not shown).
- Video / audio signals (video / audio data data, horizontal synchronization signal Hsync, vertical synchronization signal Vsync, and clock signal Clock) stored in the video signal source 301 is preliminarily stored in the host CPU 300 through specification / waveform observation.
- the host CPU 300 grasps the video signal format of the video / audio signal input to the video signal processing device 302 and grasps a number of parameters corresponding to the video signal format.
- the video signal source 301 is set as a set device with the video signal processing device 302.
- the video signal processing device 302 can be incorporated as a different set device such as a DVD player, a recorder, or a digital camera. Of course.
- FIG. 2 shows operations performed by the host CPU 300 until the image is displayed.
- the host CPU 300 sets parameters 400 to be set in the storage table 307 when the set device is initialized, such as when the power is turned on. In this embodiment, the power is turned on, but the parameter setting time is not particularly specified.
- the load on the host CPU 300 of the set device that is, the HDMI signal transmission system
- the parameters may be written into the storage table 307 at a convenient timing such as a small timing.
- the storage table 307 is composed of, for example, a RAM or a flip-flop, but the type of storage element is not limited.
- the host CPU 300 After the power is turned on, the host CPU 300 performs the storage table use setting 401 for the register control unit 303 to enable the function of the automatic setting control unit 306. Then, by notifying the automatic setting start 402, the automatic setting control unit 306 reads the clock setting parameter stored in advance from the storage table 307 and performs clock setting for the clock generation unit 304.
- the automatic setting control unit 306 reads the signal processing parameters for the video signal processing unit 305 from the storage table 307 and sets these signal processing parameters in the video signal processing unit 305.
- the automatic setting control unit 306 resets the video signal processing unit 305 to complete the setting.
- the host CPU 300 completes all the settings by the interrupt issued from the automatic setting control unit 306 or the host CPU 300 checking the automatic setting control unit 306 by polling. To figure out.
- the host CPU 300 needs to access the register control unit 303 only twice, and it takes tens of times as in the conventional configuration. As compared with the above, the processing time of the host CPU 300 is greatly shortened. Moreover, after the power is turned on, that is, after many parameters are set in the storage table 307, video / audio signals having different video signal formats are randomly read from the video signal source 301, and the video signal format is dynamically changed. When the video signal format is switched, the host CPU 300 needs to access the register control unit 303 only twice each time the video signal format is switched. There is no need to repeatedly access the control unit 303 several tens of times, and the processing time of the host CPU 300 is further reduced.
- the storage table 307 is composed of a nonvolatile memory (such as a flash memory, regardless of the type), the parameter value is retained even if the power is turned off once stored, so the video signal format to be used is fixed. In some cases, once writing is performed, it is not necessary to write parameters later when the power is turned on, and the load on the host CPU 300 is further reduced.
- a nonvolatile memory such as a flash memory, regardless of the type
- FIG. 3 shows a second embodiment of the present invention.
- a use surface control unit 501 and a selector 502 are newly added to the automatic setting control unit 500, and m storage tables 510 to 51m are prepared.
- the host CPU notifies the used surface control unit 501 in the automatic setting control unit 500 of the surface to be used through the register control unit 509.
- the use surface control unit 501 controls the selector 502 to store the parameters corresponding to the currently input video signal format in the storage tables 510 to 51m in which the parameters are previously written. Lets you select a table as input. Then, parameters are transferred from the selected storage table to the parameter processing unit 503, and these parameters are set to the clock generation unit and the video signal processing unit at appropriate timing.
- the storage tables 510 to 51m have a multi-side structure, so that frequently used video signals are used. In the case of the format, it is not necessary to rewrite and change parameters, and it is not necessary to frequently set parameters in the storage tables 510 to 51m.
- video / audio signals of a new standard video signal format are additionally stored in several types of video signal sources 301
- other storage tables store parameters of the existing video signal format in some storage tables.
- FIG. 4 shows a third embodiment of the present invention.
- This figure shows a method in which parameters are written in advance in a storage table provided in the video signal processing apparatus, and is an example of a method of mapping the entire surface up to m storage tables in the host address space.
- m 1.
- a register area when the host CPU directly sets parameters in the clock generation unit 304 and the video signal processing unit 305 as in the past (in contrast to the automatic parameter setting by the automatic setting control unit 306 of the present invention, , That is, “manual setting”), that is, if there are n parameters from address 0 to n ⁇ 1 for the manual setting register area 600, the address of parameter 1 in the register area 601 of the storage table 1 is n
- the address of parameter n is 2n-1.
- the address of parameter 1 in the register area 602 of the storage table 2 is address 2n, and the address of parameter n is address 3n-1. That is, the address of parameter 1 in the register area 603 of the storage table m is m x n, and the address of parameter n is (m + 1) x n -1.
- the above method is useful when the host address space has a margin, because the structure becomes simple, and the parameters written in the storage table can be easily read out.
- FIG. 5 shows a fourth embodiment of the present invention.
- This figure shows a method for writing parameters in advance in a storage table provided in the video signal processing apparatus, and is an example of a method for mapping only one storage area to the host address space.
- the address of parameter 1 in the storage parameter register area 701 is n address, and the address of parameter n is 2n ⁇ 1. It becomes an address.
- the address 2n of the storage control register area 702 is set as a storage surface setting area, and the address 2n + 1 is set as a write permission area.
- the selector 703 selects the storage table m 704, and the value written in the storage parameter register area 701 is set in the storage table m 704.
- the above method is useful when there is no room in the host address space.
- FIG. 6 shows a fifth embodiment of the present invention.
- This figure shows a method in which parameters are written in advance in a storage table provided in the video signal processing apparatus, and is an example of a method of using both a manually set area and a storage area as a host address space.
- n parameters from 0 to n ⁇ 1 are mapped to the parameter setting register area 800. Also, a storage control register area 801 is prepared.
- the selector 802 selects and uses the manual setting area 803.
- the parameter to be written to the parameter register area 800 is written from the host CPU. Thereafter, “m” is set in the storage surface setting area at address n in the storage control register area 801, and write permission is set at address n + 1. As a result, the selector 802 selects the storage table m 804, and the parameter value written in the parameter setting register area 800 is set in the storage table m 804.
- the above method is useful when there is no room in the host address space.
- FIG. 7 shows a sixth embodiment of the present invention.
- This figure shows a configuration in which a use surface control unit 901 and a selector 902 are prepared in the automatic setting control unit 900 in the register control unit 920, and a fixed table 911 is prepared in addition to the storage table 910.
- the fixed table 911 is a non-rewritable table such as a ROM or a wire-logic. If the video signal format is known, it is possible to put parameter values in a fixed table in advance.
- the host CPU selects the storage table m 910 by controlling the selector 902 from the use surface control unit 901.
- the parameter processing unit 903 reads the parameters set in the storage table m
- the host CPU controls the selector 902 from the usage surface control unit 901 to select the fixed table n 911.
- the parameter processing unit 903 reads the parameters stored in the fixed table n 911 and can automatically set the clock generation unit and the video signal processing unit corresponding to a known video format. .
- a fixed table 911 is stored, and parameters of a known video signal format are stored in the fixed table 911. Therefore, it is not necessary to initialize these parameters from the host CPU when the power is turned on. It is possible to further reduce the load.
- the fixed table 911 is a smaller circuit than a storage element such as a RAM, it is possible to further reduce the load on the host CPU and the circuit scale.
- FIG. 8 shows a seventh embodiment of the present invention.
- This figure shows a configuration in which a usage parameter control unit 1002 is provided in the automatic setting control unit 1000 and fixed parameters 1 1003 to a 1004 are prepared in the register control unit 1010.
- the fixed parameters 1-1003 to a1004 are non-rewritable parameters such as ROM and Wire Logic. These fixed parameters 1 to 1003 to a to 1004 store parameter values common to all video signal formats or parameter values common to some video signal formats.
- the use parameter control unit 1002 is preset to use the fixed parameter 1 to 1003 when the parameter x is called from the parameter processing unit 1001, and uses the fixed parameter a to 1004 when the parameter y is called from the parameter processing unit 1001. It is preset when used.
- the use parameter control unit 1002 determines that the read request is for the parameter x, and the fixed parameter The value of 1 1003 is read and transferred to the parameter processing unit 1001 to complete the processing.
- m and n are variable, and the values of m and n are not limited. It can also be implemented with a configuration without a fixed table.
- FIG. 9 shows an eighth embodiment of the present invention.
- This figure illustrates a method of calling each parameter of the fixed table a ⁇ 1104, rewriting only a part of the parameters, and writing all parameters including the rewritten parameter to the storage table m ⁇ 1103.
- storage table is not specifically limited, Arbitrary combinations are possible.
- the selector 1102 is set to select the fixed table a ⁇ 1104, and each parameter value of the fixed table a ⁇ 1104 is read into the parameter setting register area 1100.
- the host CPU When the reading is completed, the host CPU first changes the parameters n ⁇ 1 and n at addresses n ⁇ 2 and n ⁇ 1 to desired values. Parameter n-1 is written to the desired value, and then the parameter n at the host address n-1 is written to the desired value.
- the selector 1102 is set to select the storage table m ⁇ ⁇ ⁇ ⁇ 1103, and all the parameters including the parameters after the rewriting are set. Write to storage table m 1103.
- the host CPU sets the parameter value in the storage table m to 1103.
- the load on the host CPU can be further reduced.
- the present invention can provide necessary parameters to a signal processing unit and a clock generation unit with a simple circuit configuration for newly added video signal formats such as super high-definition video and 3D video in the future. Therefore, the load on the host CPU on the set device side can be reduced, and as a result, it is useful as a video processing apparatus or the like that can shorten the image output time.
- Video signal source (video signal source) 302 Video signal processing device 303 Register control unit 304 Clock generation unit 305 Video signal processing unit (signal processing unit) 306 Automatic setting control unit (parameter automatic setting unit) 307 Storage table (storage unit) 500 Automatic Setting Control Unit 501 Used Surface Control Unit 502 Used Surface Switching Selector 503 Parameter Processing Unit 900 Automatic Setting Control Unit 901 Used Surface Control Unit 902 Used Surface Switching Selector 903 Parameter Processing Unit 1000 Automatic Setting Control Unit 1001 Parameter Processing Unit 1002 Usage Parameters Control unit 1102 Use surface switching selector
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Abstract
Description
図1は本発明の第1の実施形態の映像信号処理装置を持つHDMI伝送システムを示す。
図3は本発明の第2の実施形態を示す。
図4は本発明の第3の実施形態を示す。
図5は本発明の第4の実施形態を示す。
図6は本発明の第5の実施形態を示す。
図7は本発明の第6の実施形態を示す。
図8は本発明の第7の実施形態を示す。
図9は本発明の第8の実施形態を示す。
301 ビデオ信号源(映像信号源)
302 映像信号処理装置
303 レジスタ制御部
304 クロック生成部
305 ビデオ信号処理部(信号処理部)
306 自動設定制御部(パラメータ自動設定部)
307 記憶テーブル(記憶部)
500 自動設定制御部
501 使用面制御部
502 使用面切り替えセレクタ
503 パラメータ処理部
900 自動設定制御部
901 使用面制御部
902 使用面切り替えセレクタ
903 パラメータ処理部
1000 自動設定制御部
1001 パラメータ処理部
1002 使用パラメータ制御部
1102 使用面切り替えセレクタ
Claims (19)
- 映像信号源から映像信号を受け、受けた映像信号に対して所定処理を行う信号処理部を備えた映像信号処理装置において、
前記受けた映像信号の映像信号フォーマットに対応して前記所定処理を行うための複数のパラメータを記憶する記憶部と、
前記記憶部に記憶された複数のパラメータを読み出して前記信号処理部に設定するパラメータ自動設定部とを備えた
ことを特徴とする映像信号処理装置。 - 前記請求項1記載の映像信号処理装置において、
前記受けた映像信号の映像信号フォーマットに対応したクロック信号を生成するクロック生成部を有し、
前記記憶部は、前記受けた映像信号の映像信号フォーマットに対応したクロック信号を生成するための複数のパラメータをも記憶し、
前記パラメータ自動設定部は、前記記憶部に記憶された前記クロック信号生成用の複数のパラメータを読み出して前記クロック生成部に設定する
ことを特徴とする映像信号処理装置。 - 前記請求項1又は2記載の映像信号処理装置において、
前記映像信号処理部は、HDMI規格に従って受けた映像信号に対して所定処理を行う
ことを特徴とする映像信号処理装置。 - 前記請求項1~3の何れか1項に記載の映像信号処理装置と、
前記映像信号処理装置に接続され、前記映像信号処理装置の記憶部に前記複数のパラメータを出力して記憶させるホストCPUとを備えた
ことを特徴とする映像信号処理システム。 - 前記請求項4記載の映像信号処理システムにおいて、
前記映像信号処理装置とホストCPUとは、シリアルバスで接続される
ことを特徴とする映像信号処理システム。 - 前記請求項4記載の映像信号処理システムにおいて、
前記ホストCPUは、その負荷が小さいときに、前記記憶部に対して前記複数のパラメータを出力して記憶させる
ことを特徴とする映像信号処理システム。 - 前記請求項6記載の映像信号処理システムにおいて、
前記ホストCPUの負荷が小さいときは、電源投入時である
ことを特徴とする映像信号処理システム。 - 前記請求項6又は7記載の映像信号処理システムにおいて、
前記ホストCPUは、前記記憶部に対して前記複数のパラメータを出力して記憶させた後、前記パラメータ自動設定部にパラメータの自動設定の開始を指示する
ことを特徴とする映像信号処理システム。 - 前記請求項1記載の映像信号処理装置において、
前記記憶部は、不揮発性メモリを含む
ことを特徴とする映像信号処理装置。 - 前記請求項1記載の映像信号処理装置において、
前記記憶部は、記憶テーブルを含み、前記記憶テーブルは1面存在する
ことを特徴とする映像信号処理装置。 - 前記請求項1記載の映像信号処理装置において、
前記記憶部は、記憶テーブルを含み、前記記憶テーブルは多面存在する
ことを特徴とする映像信号処理装置。 - 前記請求項4記載の映像信号処理システムにおいて、
前記記憶部へのパラメータ書き込みの際に使用するホストCPUのアドレス空間は、前記記憶部の全アドレス分がマッピングされている
ことを特徴とする映像信号処理システム。 - 前記請求項4記載の映像信号処理システムにおいて、
前記記憶部は多面分の記憶テーブルを含み、
前記記憶部へのパラメータ書き込みの際に使用するホストCPUのアドレス空間は、前記多面分の記憶テーブルのうち1面分のアドレスがマッピングされている
ことを特徴とする映像信号処理システム。 - 前記請求項4記載の映像信号処理システムにおいて、
前記ホストCPUは、パラメータ自動設定部を使用せず、前記パラメータを直接に前記信号処理部に設定可能であり、
前記記憶部へのパラメータ書き込みの際に使用するホストCPUのアドレス空間は、前記パラメータを直接に前記信号処理部に設定する際のアドレス空間が兼用される
ことを特徴とする映像信号処理システム。 - 前記請求項1記載の映像信号処理装置において、
前記記憶部は、前記受けた映像信号の映像信号フォーマットが既知の映像信号フォーマットである場合のパラメータを記憶し保持する固定パラメータテーブルを持つ
ことを特徴とする映像信号処理装置。 - 前記請求項15記載の映像信号処理装置において、
前記信号処理部に設定するパラメータを前記固定パラメータテーブルか、この固定パラメータテーブル以外の領域に記憶させるかを選択する
ことを特徴とする映像信号処理装置。 - 前記請求項15記載の映像信号処理装置において、
前記映像信号源の各映像信号の映像信号フォーマットが複数種類あるとき、その複数種類の映像信号フォーマットに対応するパラメータ間で共通のパラメータは、前記固定パラメータテーブルに記憶される
ことを特徴とする映像信号処理装置。 - 前記請求項15記載の映像信号処理装置において、
前記固定パラメータテーブルに記憶された複数のパラメータの値を読み出し、その読み出した複数のパラメータのうち一部のパラメータのみを他の値に書き換え、その書き換え後のパラメータを含む全パラメータを前記固定パラメータテーブル以外の記憶部の領域に記憶する
ことを特徴とする映像信号処理装置。 - 映像信号源から映像信号を受けた後、
前記映像信号の映像信号フォーマットに対応して所定処理を行うための複数のパラメータを記憶部から読み出し、
前記読み出した複数のパラメータを前記所定処理を行う信号処理部に設定する
ことを特徴とする映像信号処理方法。
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JP2007221309A (ja) * | 2006-02-15 | 2007-08-30 | Orion Denki Kk | 映像表示装置 |
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