WO2010047474A4 - Circuit integre de commande de source qui active une interface de donnees a paire multiple, et systeme de commande de panneau d'affichage comportant le circuit integre de commande de source - Google Patents

Circuit integre de commande de source qui active une interface de donnees a paire multiple, et systeme de commande de panneau d'affichage comportant le circuit integre de commande de source Download PDF

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Publication number
WO2010047474A4
WO2010047474A4 PCT/KR2009/005364 KR2009005364W WO2010047474A4 WO 2010047474 A4 WO2010047474 A4 WO 2010047474A4 KR 2009005364 W KR2009005364 W KR 2009005364W WO 2010047474 A4 WO2010047474 A4 WO 2010047474A4
Authority
WO
WIPO (PCT)
Prior art keywords
data
source driver
driver integrated
integrated circuit
pairs
Prior art date
Application number
PCT/KR2009/005364
Other languages
English (en)
Korean (ko)
Other versions
WO2010047474A2 (fr
WO2010047474A3 (fr
Inventor
서정일
김언영
나준호
김대성
Original Assignee
(주)실리콘웍스
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by (주)실리콘웍스 filed Critical (주)실리콘웍스
Publication of WO2010047474A2 publication Critical patent/WO2010047474A2/fr
Publication of WO2010047474A3 publication Critical patent/WO2010047474A3/fr
Publication of WO2010047474A4 publication Critical patent/WO2010047474A4/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit

Definitions

  • the present invention relates to a source driver integrated circuit for driving a display panel, and more particularly to a source driver integrated circuit capable of a multi-pair data interface and a display panel driving system including the integrated circuit.
  • the source driver integrated circuit transmits the video data received from the timing controller to the display panel.
  • the logical value of the image data transmitted / received by the noise component introduced due to the electrical characteristics of the transmission line may be altered.
  • the source driver integrated circuit processes the difference video data received from the timing control circuit, converts the processed difference video data into the first video data, and transmits the first video data to the display panel.
  • one source driver integrated circuit drives a plurality of pixels of the display panel, so that the number of source driver integrated circuits to be used is determined according to the size of the display panel.
  • 1 is an embodiment of a display panel drive system having a source driver integrated circuit for driving M pixels.
  • FIG. 2 is an embodiment of a display panel drive system including a source driver integrated circuit for driving N pixels.
  • one source driver integrated circuit 120, 130 drives M (M is an integer) number of pixels, so that the timing control circuit 110 also supplies M differential video data To driver integrated circuits (120, 130).
  • the timing control circuit 210 since one source driver integrated circuit 220 and 230 drive N (N is an integer) number of pixels, the timing control circuit 210 also outputs N pairs of differential video data to the source driver IC 220, and 230, respectively.
  • the internal structure of the source driver integrated circuits 120 and 130 shown in FIG. is designed differently from the internal structure of the source driver integrated circuits 220 and 230.
  • the source driver ICs 120 and 130 shown in FIG. 1 are all designed to receive M differential motion video data
  • the input terminal is designed to receive the difference video data of the video data. Therefore, although the functions are the same, the two types of source driver integrated circuits can not be used in a compatible manner due to the difference in internal structure.
  • Another object of the present invention is to provide a source driver integrated circuit capable of driving a display panel irrespective of the number of differential video data pairs output from a timing control circuit.
  • a display panel drive system including a timing control circuit for outputting M (M is an integer) pairs of data and N (N is an integer smaller than M) And a driver block including a plurality of source driver integrated circuits for receiving the N pairs of data and driving the display panel.
  • a source driver integrated circuit including M (M is an integer) pair of serial data and N (N is an integer smaller than M)
  • M is an integer
  • N is an integer smaller than M
  • a parallel multiport serializer for receiving the M pairs of serial data and the N pairs of serial data and converting the parallel data into M ⁇ K bits of parallel data
  • a data sorting circuit for sorting and outputting the data.
  • a source driver integrated circuit including M (M is an integer) pair of serial data and N (N is an integer smaller than M) A serial-to-parallel converter for receiving the M pairs of serial data and the N pairs of serial data and converting the parallel data into M ⁇ K bits of parallel data or N ⁇ K bits of parallel data, And arranging the M ⁇ K bits of parallel data and the N ⁇ K bits of parallel data and outputting them as M ⁇ K bits of parallel data.
  • the present invention is advantageous in that the source driver integrated circuit capable of processing M differential motion video data can simultaneously process the motion video data of less than M pairs, .
  • 1 is an embodiment of a display panel drive system having a source driver integrated circuit for driving M pixels.
  • FIG. 2 is an embodiment of a display panel drive system including a source driver integrated circuit for driving N pixels.
  • FIG. 3 is a block diagram of a display panel driving system according to an embodiment of the present invention.
  • FIG. 4 is an embodiment of a source driver integrated circuit according to the present invention.
  • FIG 5 is another embodiment of a source driver integrated circuit according to the present invention.
  • FIG. 3 is a block diagram of a display panel driving system according to an embodiment of the present invention.
  • the display panel driving system 300 can process not only the moving image data of M (M is an integer) pairs but also the moving image data of N (N is an integer) pairs smaller than M.
  • the timing control circuit 310 may output the M pieces of differential motion picture data to the source driver integrated circuits 320 and 330, and in some cases, the N pieces of differential motion data to the source driver integrated circuits 320 and 330, As shown in FIG.
  • the source driver integrated circuit is used in common regardless of the number of pairs of the differential video data output from the timing control circuit 310.
  • the source driver integrated circuits 320 and 330 capable of processing the multi-phase difference moving picture data will be described with reference to FIGS. 4 and 5.
  • FIG. 4 The source driver integrated circuits 320 and 330 capable of processing the multi-phase difference moving picture data will be described with reference to FIGS. 4 and 5.
  • FIG. 4 The source driver integrated circuits 320 and 330 capable of processing the multi-phase difference moving picture data will be described with reference to FIGS. 4 and 5.
  • FIG. 4 is an embodiment of a source driver integrated circuit according to the present invention.
  • the source driver integrated circuit 400 includes a multi-paired serial-to-parallel converter 410 and a data alignment circuit 420.
  • the multi-pair serial-to-parallel converter 410 converts not only the M differential pairs of the serial differential data but also the N differential pairs of the serial differential data into the parallel differential data of M ⁇ K (K is an integer) bits.
  • the data sorting circuit 420 sorts M ⁇ K bits of parallel differential data.
  • K is the number of bits of image data representing one pixel.
  • FIG 5 is another embodiment of a source driver integrated circuit according to the present invention.
  • the source driver integrated circuit 500 includes a serial-to-parallel converter 510 and a multi-pair data alignment circuit 520.
  • the serial-to-parallel converter 510 converts the M differential pairs of serial differential data into M ⁇ K bits of parallel differential data and the N pairs of serial differential data of less than M into N ⁇ K bits of parallel differential data.
  • the multi-pair data sorting circuit 520 arranges not only the M ⁇ K-bit parallel differential data but also the N ⁇ K-bit parallel differential data into the M ⁇ K-bit parallel differential data.
  • K is the number of bits of image data representing one pixel.
  • the source driver integrated circuit according to the present invention shown in FIG. 4 and FIG. 5 can process the highest moving picture data of the M pairs, and when less moving picture data of a pair is input than the M, Processing is performed in one of the functional blocks of the circuit so that the subsequent functional blocks can process it irrespective of the number of pairs of the received moving picture data.
  • the above-described pre-processing is performed in the multiply serial-to-parallel converter 410, and in the case of the source driver integrated circuit 500 shown in Fig. 5, (520).
  • the source driver integrated circuits shown in Figs. 4 and 5 are not made up of only the serial-to-parallel converter or the data sorting circuit as described above, but there are more functional blocks. However, this portion is not only well known to those skilled in the art, but also does not affect the operation of the present invention. For this reason, this portion has not been added to or described in the drawings, but the technical idea of the present invention is not a problem.
  • the source driver integrated circuit according to the present invention is advantageous in that it can be used for general purposes regardless of a pair of received moving picture data, thereby shortening the design convenience and the development period.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

L'invention concerne un système de commande panneau d'affichage et des circuits intégrés (CI) de commande de source pour commander un panneau d'affichage, indépendamment de la quantité de données d'images différentielles par paire produite à partir d'un circuit de commande de synchronisation. Le système de commande de panneau d'affichage selon l'invention comprend un bloc de commande qui comporte: le circuit de commande de synchronisation qui produit M données par paire (M étant un entier) et N données par paire (N étant un entier inférieur à M), et la pluralité de CI de commande de source qui reçoit Les M et N données par paire pour commander un panneau d'affichage. Le CI de commande de source reçoivent les M ou N données sérielles par paire et produit les données parallèles de MxK bits (K étant un entier). En outre, les CI de commande de source comprennent: des convertisseurs série-parallèle à paire multiple qui reçoivent les M ou N données sérielles par paire et convertissent les données sérielles reçues en données parallèles, et un circuit d'agencement des données qui dispose et produit les données parallèles de MxK bits.
PCT/KR2009/005364 2008-10-20 2009-09-21 Circuit integre de commande de source qui active une interface de donnees a paire multiple, et systeme de commande de panneau d'affichage comportant le circuit integre de commande de source WO2010047474A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2008-0102494 2008-10-20
KR1020080102494A KR100986042B1 (ko) 2008-10-20 2008-10-20 멀티 페어 데이터 인터페이스가 가능한 소스 드라이버 집적회로 및 상기 소스 드라이버 집적회로를 구비하는 디스플레이 패널 구동시스템

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WO2010047474A2 WO2010047474A2 (fr) 2010-04-29
WO2010047474A3 WO2010047474A3 (fr) 2010-08-05
WO2010047474A4 true WO2010047474A4 (fr) 2010-09-23

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PCT/KR2009/005364 WO2010047474A2 (fr) 2008-10-20 2009-09-21 Circuit integre de commande de source qui active une interface de donnees a paire multiple, et systeme de commande de panneau d'affichage comportant le circuit integre de commande de source

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KR (1) KR100986042B1 (fr)
TW (1) TW201017636A (fr)
WO (1) WO2010047474A2 (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101058518B1 (ko) * 2010-07-23 2011-08-23 주식회사 더즈텍 데이터 심볼 락킹 장치 및 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4422799A (en) * 1998-06-04 1999-12-20 Silicon Image, Inc. Display module driving system and digital to analog converter for driving display
KR100987669B1 (ko) * 2003-06-24 2010-10-13 엘지디스플레이 주식회사 액정표시장치의 데이터 구동장치
TWI261796B (en) * 2005-05-23 2006-09-11 Sunplus Technology Co Ltd Control circuit and method for liquid crystal display
KR100653158B1 (ko) * 2006-04-25 2006-12-04 주식회사 아나패스 클록 신호가 임베딩된 멀티 레벨 시그널링을 사용하는디스플레이, 타이밍 제어부 및 컬럼 구동 집적회로

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KR20100043454A (ko) 2010-04-29
WO2010047474A2 (fr) 2010-04-29
WO2010047474A3 (fr) 2010-08-05
TW201017636A (en) 2010-05-01
KR100986042B1 (ko) 2010-10-07

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