201017636 六、發明說明： 【發明所屬之技術領域】 本發明涉及服驅動顯示©板_極,積體電路，尤其涉及可介 接多對資料之源極羅動器積體電路及具有該積體電路之顯示面板駆動系 統0 【先前技術】 源極驅動器積體電路用於將時序控制器所接收的影像資料傳送至顯示 面板。當影像資料透過-傳輸線傳送時，由於傳輸線的電氣特性所引起的 雜訊成分，會改變傳送和接收之影像資料的邏輯值。 参 為了處理這個問題’在目前研發的顯示面板驅動系統中，替代傳送影 像資料’影像請轉換為透過二傳輪線傳送和接收的差分影像資料信號， 從而當影體料作為單-資料錢傳送和接㈣可抑制可關起的傳送和 接收的錯誤。因此，驅動-個像素的差分影像龍透過二傳輸線傳送至 極驅動器積體電路。 、 源極驅動^積體電路處辦序控儀所傳賴差分影像資料，轉換為 原始影像資料’然後將轉換_像資料傳送至顯示面板…般而言，由於 一個源極驅動器積體電路驅動顯示面板的複數個像素，源極驅動器積體電 路的使用數目視顯示面板的尺寸而決定。 % _第1圖為顯示具有用於驅動Μ個像素的源極驅動器積體電路的傳統顯 示面板的圖式。 ” 第2圖為顯示具有用於驅動]^個像素的源極驅動器積體電路的另一傳 統顯示面板的圖式。 參考第1圖，由於一個源極驅動器積體電路120和13〇驅動熥個⑽係 為一整數)的像素’因此時序控制器110將Μ對的差分影像資料傳送至源極 驅動器積體電路120和130。 ’、 參考第2圖’由於一個源極驅動器積體電路22〇和23〇驅動ν個讲係 為一整數)的像素，因此時序控制器210將Ν對的差分影像資料傳送至源極 驅動器積體電路220和230。 ' 4 201017636 因為一時序控制器11〇和21〇分別輸出M對和N對的差分影像資料， 第1圖中所示的源極驅動器積體電路12〇和13〇的内部構造設計為與第2 圖中所示的源極驅動器積體電路22〇和23〇的内部構造不同。也就是說， 第1圖中所示的源極驅動器積體電路12〇和13〇的輸入端子設計為每一個 接收Μ對的差分影像資料，而第2圖中所示的源極驅動器積體電路22〇和 230的輸入端子設計為每一個接收Ν對的差分影像資料◎因此，當二種源 極驅動器積體電路執行相同的功能時，由於二者的内部構造彼此不同，所 以無法相容使用。 由於這個原因，導致的不方便是源極驅動器積體電路應視時序控制器 所輸出的差分影像資料對的數目而定，來更新設計。201017636 VI. Description of the Invention: [Technical Field] The present invention relates to a device driving display panel, an integrated circuit, and more particularly to a source card integrated circuit capable of interfacing multiple pairs of data and having the integrated body The display panel of the circuit is tilting the system 0 [Prior Art] The source driver integrated circuit is used to transmit the image data received by the timing controller to the display panel. When image data is transmitted through the transmission line, the noise component caused by the electrical characteristics of the transmission line changes the logical value of the transmitted and received image data. In order to deal with this problem, 'in the currently developed display panel drive system, instead of transmitting image data' image, please convert it into differential image data signal transmitted and received through the second transmission line, so that when the shadow material is transmitted as a single-data And (4) can suppress the transmission and reception errors that can be turned off. Therefore, the differential image driving the pixel is transmitted to the driver circuit of the driver through the second transmission line. The source driver is integrated with the differential image data transmitted by the sequence controller, converted into the original image data, and then the converted image data is transmitted to the display panel. Generally, a source driver is driven by the integrated circuit. The number of pixels of the display driver integrated circuit is determined by the size of the display panel. % _ Fig. 1 is a diagram showing a conventional display panel having a source driver integrated circuit for driving one pixel. Fig. 2 is a view showing another conventional display panel having a source driver integrated circuit for driving pixels. Referring to Fig. 1, a source driver integrated circuit 120 and 13 are driven. The pixel (10) is an integer). Therefore, the timing controller 110 transmits the differential image data of the pair to the source driver integrated circuits 120 and 130. ', refer to FIG. 2' because of a source driver integrated circuit 22 〇 and 23〇 drive ν speakers to an integer), so the timing controller 210 transmits the differential image data of the pair to the source driver integrated circuits 220 and 230. ' 4 201017636 Because a timing controller 11〇 And 21 〇 output differential image data of M pairs and N pairs, respectively, and the internal structure of the source driver integrated circuits 12 〇 and 13 所示 shown in FIG. 1 is designed to be combined with the source driver shown in FIG. 2 . The internal structures of the body circuits 22A and 23B are different. That is, the input terminals of the source driver integrated circuits 12A and 13A shown in FIG. 1 are designed to receive differential image data for each pair, and Source drive shown in Figure 2 The input terminals of the integrated circuit circuits 22A and 230 are designed to receive differential image data of each pair. Therefore, when the two kinds of source driver integrated circuits perform the same function, since the internal structures of the two are different from each other, Incompatible with this. For this reason, the inconvenience is that the source driver integrated circuit should update the design depending on the number of differential image data pairs output by the timing controller.
【發明内容】 β β因此，本發明係為了解決先前技術中出現的問題，並且本發明的目的 疋提供一種顯示面板驅動系統，可驅動顯示面板而與時序控制電路所輸出 的差分影像資料對數目無關。 本發明的另一目的是提供一種源極驅動器積體電路可驅動顯示面板 而與時序控制電路所輸出的差分影像資料對數目無關。 板。為了達到第一個目的，依據本發明的一個特點，係提供有一種顯示面 Ν驅動系統，包括一時序控制器，配置以輸出厘對(]^係為一整數)資料和 對，為小於^1的一整數)資料；以及一驅動方塊，具有用於接收該Μ 、資料或該Ν對資料的複數個源極驅動器積體電路，並且驅動一顯示面板。 為了達到第二個目的，依據本發明的另一特點，係提供有一種源極驅 Μ器積體電路’用於接收Μ對(Μ係為一整數)串列資料和Ν對(Ν係為小於 驅2整數)串列資料並輸出ΜχΚ位元(κ係為一整數)的並列資料該源極 器積體電路包括一多對串列至並列轉換器，配置以接收該Μ對串列資 Ν對串列資料，並將該等資料轉換為ΜχΚ位元的並列資料；以及 賢料排列電路’配置以排列並輸出該ΜχΚ位元的並列資料。 為了達到第二個目的，依據本發明的另一特點，係提供有一種源極驅 Μ器，體電路’用於接收Μ對(Μ係為一整數)串列資料和Ν對(Ν係為小於 的一整數)串列資料並輸出ΜχΚ位元(κ係為一整數)的並列資料，該源極 201017636 驅動器積體電路包括-㈣至並嶋㈣，配置以接㈣M對串列 的並列齡以及-多對細刚路，配置以排·跳Γ元 料和該NxK位元的麵資料，並輸出ΜχΚ位元賴射^ 】資 對於本發明額外的優點、目的和特職在隨後的描述巾闡明，以 分内容將從描述中顯而易見，或可透過實施本發_瞭㈣卜本發° 的和其他優點將透過特別在描述中所指出的結構和在此的 及所附圖式訓來實現和獲得。 【實施方式】 參 現在參考圖式而更加詳細地描述本發明的實施例。無論如何，相同的 參考標號在圖式中自始至終地使用並代表· #中相同或類似的部分。 第3圖為顯示依照本發明實施例之顯示面板驅動系統的圖式。 參考=3圖，顯示面板驅動系統3〇〇不僅可處理…對如係為一整數) 差分影像資料’還可處理N對(N係為-整數)，小於M對的差分影像資料。 即疋’時序控制器310可輪出μ對的差分影像資料至源極媒動器積體電路 320和330，以及可為輸出ν對的差分影像資料至源極驅動器積體電路320 和330的情況。因此，可共同地使用源極驅動器積體電路32〇和33〇而與 時序控制器310所輸出的差分影像資料對的數目無關。 這是因為源極驅動器積體電路320和330可處理差分影像資料對，而 零與對的數目無關。 這種可處理多對差分影像資料的源極驅動器積體電路320和330以下 將參考第4圖和第5圖來描述。 第4圖為顯示依照本發明另一實施例之源極驅動器積體電路的圖式。 參考第4圖，源極驅動器積體電路4〇〇包括多對串列至並列轉換器41〇 和資料排列電路420。 多對串列至並列轉換器410不僅將Μ對串列差分資料而且將ν對，小 於Μ對的串列差分資料轉換為ΜχΚ位元(Κ係為一整數)的並列差分資料。 資料排列電路420排列ΜχΚ位元的並列差分資料。此處，Κ係為代表一個 像素的影像資料之位元數。 201017636 第5圖為顯示依照本發明另一實施例之源極驅動器積體電路的圖式。 參考第5圖，源極驅動器積體電路500包括串列至並列轉換器51〇和 多對資料排列電路520。 串列至並列轉換器510將Μ對串列差分資料轉換為MxK位元的並列 差分資料，並將N對，小於Μ對的串列差分資料轉換為NxK位元的並列 差分資料。多對資料排列電路520不僅將MxK位元的並列差分資料，而且 將ΝχΚ位元的並列差分資料排列為MxK的並列差分資料。此處，κ係為 代表一個像素的影像資料之位元數。 、一 第4圖和第5圖中所示的依據本發明之源極驅動器積體電路4〇〇和5〇〇 可處理最多Μ對的差分影像資料。如果輸入某個數目小於Μ對的差分影像 資料，則差分影像資料透過串列至並列轉換器的任意一個功能方塊或^料 排列電路而初步處理，從而隨後的魏方塊可處理差分影像資料，而與對 的數目無關。 ' 在第4 @中所示的源極驅動器積體電路棚的情況中，係由多對串列 至並列轉換器41G來執行初步處理，而在第5圖中所示的源極驅動器積體 電路50G的情況下’係由多對資料排列電路52〇來執行初步處理。SUMMARY OF THE INVENTION Therefore, the present invention is to solve the problems occurring in the prior art, and an object of the present invention is to provide a display panel driving system capable of driving a display panel and the number of differential image data outputted by the timing control circuit. Nothing. Another object of the present invention is to provide a source driver integrated circuit that can drive a display panel regardless of the number of differential image data output by the timing control circuit. board. In order to achieve the first object, in accordance with a feature of the present invention, there is provided a display panel driving system comprising a timing controller configured to output a pair of data (ie an integer) data and pairs, less than ^ An integer data of 1; and a drive block having a plurality of source driver integrated circuits for receiving the data, the data or the data, and driving a display panel. In order to achieve the second object, in accordance with another feature of the present invention, there is provided a source driver integrated circuit 'for receiving a pair of data (an integer) and a pair of data (Ν is Parallel data less than the drive 2 integer) serial data and output ΜχΚ bit (the κ system is an integer) The source integrated circuit includes a plurality of pairs of serial to parallel converters configured to receive the Μ pair of strings串 aligning the data and converting the data into parallel data of the ; bit; and arranging the circuit to configure and output the parallel data of the ΜχΚ bit. In order to achieve the second object, in accordance with another feature of the present invention, there is provided a source driver for receiving a pair of data and a pair of pairs (Ν is an integer). An integer less than an integer) and a parallel data of the ΜχΚ bit (the κ system is an integer), the source 201017636 driver integrated circuit including - (four) to parallel (four), configured to connect (four) M pairs of the parallel age And - a plurality of pairs of thin steel roads, configured with row and flea elements and surface data of the NxK bits, and outputting the ΜχΚ 赖 赖 ^ 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于 对于The towel clarifies that the content will be apparent from the description, or may be implemented by the implementation of the present invention and other advantages will be achieved by the structure specified in the description and the teachings herein. obtain. [Embodiment] Embodiments of the present invention will be described in more detail with reference to the drawings. In any case, the same reference numbers are used throughout the drawings and represent the same or similar parts in the #. Fig. 3 is a view showing a display panel driving system in accordance with an embodiment of the present invention. Referring to the =3 diagram, the display panel drive system 3〇〇 can not only process... the pair is an integer. The differential image data can also process N pairs (N is an integer) and is smaller than the differential image data of the M pair. That is, the timing controller 310 can rotate the differential image data of the μ pair to the source actuator integrated circuits 320 and 330, and the differential image data of the output ν pair to the source driver integrated circuits 320 and 330. Happening. Therefore, the source driver integrated circuits 32A and 33〇 can be used in common regardless of the number of differential image data pairs outputted by the timing controller 310. This is because the source driver integrated circuits 320 and 330 can process differential image data pairs, and zero is independent of the number of pairs. The source driver integrated circuits 320 and 330 which can process a plurality of pairs of differential image data will be described below with reference to Figs. 4 and 5. Fig. 4 is a view showing a source driver integrated circuit in accordance with another embodiment of the present invention. Referring to Fig. 4, the source driver integrated circuit 4A includes a plurality of pairs of serial to parallel converters 41A and a data arrangement circuit 420. The multi-pair serial-to-parallel converter 410 converts not only the serial differential data but also the ν pair, the parallel differential data smaller than the Μ pair into the parallel differential data of the ΜχΚ bit (Κ is an integer). The data arrangement circuit 420 arranges the parallel difference data of the bits. Here, the Κ is the number of bits of image data representing one pixel. 201017636 FIG. 5 is a diagram showing a source driver integrated circuit in accordance with another embodiment of the present invention. Referring to Fig. 5, the source driver integrated circuit 500 includes a serial-to-parallel converter 51A and a plurality of pairs of data arrangement circuits 520. The tandem-to-parallel converter 510 converts the tandem differential data into parallel differential data of MxK bits, and converts the N pairs, the serial differential data smaller than the tangent pairs into the parallel differential data of the NxK bits. The multi-pair data arrangement circuit 520 not only arranges the parallel difference data of the MxK bits, but also arranges the parallel difference data of the ΝχΚ bits into the parallel difference data of MxK. Here, κ is the number of bits of image data representing one pixel. The source driver integrated circuits 4A and 5A according to the present invention shown in Figs. 4 and 5 can process the most differential image data of the pair. If a certain amount of differential image data is input, the differential image data is initially processed through any functional block or data arrangement circuit of the serial to parallel converter, so that the subsequent Wei block can process the differential image data, and It has nothing to do with the number of pairs. In the case of the source driver integrated circuit shed shown in the fourth @, the preliminary processing is performed by the plurality of pairs of serial to parallel converters 41G, and the source driver integrated body shown in Fig. 5 In the case of the circuit 50G, the preliminary processing is performed by the plurality of pairs of data arrangement circuits 52A.
第4圖和第5圖中所示的源極驅動器積體電路4〇〇和5〇〇不僅由上述 串列至並列轉換器和資料排列電路所組成並包括附加的功能方塊。缺而， 這些附加的魏方塊騎本領域具有通常知識的技術人員而言係為習知技 而不影響本發明的。耻，附加的功能方塊不進行解釋說明，而 本發明的麟概念即使不使_加魏方塊也可實現。 =上所，*於依據本發_源極驅動^積體電路可制地使用，而 =1=職辦喊目無關，㈣可提供輯上驗利並可縮 短研發時間。 動器明顯瞭解’由於用於處理M對差分影像資料的源極驅 ί數對的差分影像資料，其中數目小於M，而不需重 本發明所提供的優點 本發明可在视離自身_職況下具體 以上所述者僅為肋解釋本發明之較佳實補，並非企^以對本發明作 201017636 ’是以’凡有在_之發明精神下所作有關本發明之任 >飾或變更’音仍應包括在本發明意圖保護之範疇。 【圖式簡單說明】 :曰=附圖式其中提供關於本發明實施例的進一步理解並且結合與構成本 說月窃的°卩伤’說明本發明的實施例並且與描述一同提供對於本發明實 施例之原則的解釋。其中： 第1圖為顯示具有用於驅動M個像素的源極驅動器積體電路的 示面板的圖式； ’ ”The source driver integrated circuits 4A and 5A shown in Figs. 4 and 5 are composed not only of the above-described serial to parallel converter and data arrangement circuits but also include additional functional blocks. In the absence of these additional blocks, it will be apparent to those skilled in the art having ordinary skill in the art without departing from the invention. Shame, the additional functional blocks are not explained, and the lining concept of the present invention can be realized even without the _ plus square. =上上, * In accordance with the hair _ source drive ^ integrated circuit can be used in the system, and =1 = job hunting has nothing to do, (4) can provide a combination of profit and shorten development time. The actuator clearly understands that 'the differential image data used to process the source-drive pairs of the differential image data, the number of which is less than M, without the advantages provided by the present invention. In the above, the above description is only for the ribs to explain the preferred embodiment of the present invention, and it is not intended to make the present invention 201017636 'is any of the inventions made under the spirit of the invention. 'Sound should still be included in the scope of the intention of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS: 曰 = 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 An explanation of the principles of the example. Wherein: Figure 1 is a diagram showing a display panel having a source driver integrated circuit for driving M pixels; ’
第2圖為顯示具有用於驅動N個像素的源極驅動器積體電路的另一傳 統顯示面板的圖式； 第3圖為顯示依照本發明實施例之顯示面板驅動系統的圖式； 第4圖為顯示依照本發明另一實施例之源極驅動器積體電路的圖式； 以及 第5圖為顯示依照本發明另一實施例之源極驅動器積體電路的圖式。 【主要元件符號說明】 110時序控制器 120源極驅動器積體電路 130源極驅動器積體電路 210時序控制器 220源極驅動器積體電路 230源極驅動器積體電路 3〇〇顯示面板驅動系統 310時序控制器 320源極驅動器積體電路 330源極驅動器積體電路 400源極驅動器積體電路 41〇多對串列至並列轉換器 420資料排列電路 8 201017636 500源極驅動器積體電路 510串列至並列轉換器 520多對資料排列電路2 is a view showing another conventional display panel having a source driver integrated circuit for driving N pixels; FIG. 3 is a view showing a display panel driving system according to an embodiment of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5 is a view showing a source driver integrated circuit in accordance with another embodiment of the present invention; and FIG. 5 is a view showing a source driver integrated circuit in accordance with another embodiment of the present invention. [Major component symbol description] 110 timing controller 120 source driver integrated circuit 130 source driver integrated circuit 210 timing controller 220 source driver integrated circuit 230 source driver integrated circuit 3 〇〇 display panel driving system 310 Timing controller 320 source driver integrated circuit 330 source driver integrated circuit 400 source driver integrated circuit 41 〇 multiple pairs of serial to parallel converter 420 data arrangement circuit 8 201017636 500 source driver integrated circuit 510 series To parallel converter 520 pairs of data arrangement circuits