WO2009076810A1 - 半导体功率模块及其散热方法 - Google Patents

半导体功率模块及其散热方法 Download PDF

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Publication number
WO2009076810A1
WO2009076810A1 PCT/CN2008/072469 CN2008072469W WO2009076810A1 WO 2009076810 A1 WO2009076810 A1 WO 2009076810A1 CN 2008072469 W CN2008072469 W CN 2008072469W WO 2009076810 A1 WO2009076810 A1 WO 2009076810A1
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Prior art keywords
base layer
thickness
copper
aluminum
power module
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PCT/CN2008/072469
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English (en)
French (fr)
Inventor
Xiaobao Wang
Shanqi Zhao
Lifeng Liu
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Macmic Science & Technology Co., Ltd
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Publication of WO2009076810A1 publication Critical patent/WO2009076810A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3675Cooling facilitated by shape of device characterised by the shape of the housing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4846Connecting portions with multiple bonds on the same bonding area
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/13Discrete devices, e.g. 3 terminal devices
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
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    • H01L2924/13Discrete devices, e.g. 3 terminal devices
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    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/19107Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to semiconductor technology, and in particular, to a semiconductor power module and a heat dissipation method thereof.
  • semiconductor power modules include various frequency converters, choppers and various switching power supplies, which are widely used in communications, industrial, medical, household appliances, lighting, transportation, semiconductor production equipment, military and aviation fields.
  • the main product structure of the semiconductor power module includes a thick film ceramic chip spliced semiconductor power module, a ceramized ceramic substrate spliced semiconductor power module, a non-insulated spliced semiconductor power module, and a crimped semiconductor power module.
  • These applications are standard and non-standard form factor semiconductor modules.
  • These semiconductor modules have a backplane that can be used to hold individual semiconductor or metal-coated ceramic substrates, electrodes, and injectable elastomeric protective adhesives and epoxy.
  • a carrier such as a resin, and sometimes a conductor of a semiconductor power module.
  • the base of the semiconductor module is currently made of a copper base plate to utilize the sturdiness of the copper material.
  • copper has the characteristics of large heat fusion, low specific heat and fast heat absorption compared with aluminum.
  • the heat generated by the semiconductor chip can be quickly absorbed by the copper base plate, but the copper base plate is smaller than the aluminum material, and the heat escape speed is slow, so that the heat in the module cannot be dissipated in time, so it is necessary to
  • the module is mounted on a heat sink for heat dissipation.
  • the mounting of the semiconductor module on the heat sink requires a gap between the thermal grease filling module and the heat sink, which not only increases the thermal resistance, but also reduces the heat dissipation capability. Therefore, under the same volume condition, the working capacity of the semiconductor module cannot be further increased.
  • the thickness of the bottom plate of the semiconductor power module is increased with the increase of the area of the bottom plate of the semiconductor module. Increasing the thickness of the bottom plate mainly solves the requirements of thermal stress deformation and installation strength during the splicing process. Therefore, when the number of semiconductor modules produced is huge, it is required A large amount of copper, and with the rising price of copper, the cost of semiconductor modules is also increasing. Summary of the invention
  • the semiconductor power module of the invention can quickly and thermally dissipate heat and dissipate heat, and can increase the working capacity of the semiconductor module and reduce the manufacturing cost.
  • the present invention provides a semiconductor power module including: a bottom plate, a cermet substrate, a semiconductor chip, a conductive connecting member, an electrode, and a case; the cermet substrate is connected to the bottom plate, The semiconductor chip is connected to the cermet substrate or the substrate, the conductive connector is connected to the semiconductor chip and the cermet substrate, and the electrode is connected to the conductive connector or the cermet substrate, and the housing is connected On the bottom plate, wherein the bottom plate comprises a copper base layer and an aluminum base layer in which a solid phase is composited at a lower portion of the copper base layer.
  • the aluminum base layer 12 may have a thickness greater than the thickness of the copper base layer 11. 5 ⁇ The thickness of the copper base layer 11 is 0.5 times or more.
  • the present invention also provides a heat dissipation method for a semiconductor power module.
  • the heat generated in the operation of the semiconductor chip is absorbed by the copper base layer on the upper portion of the bottom plate, and then heat is dissipated by the solid phase composite in the aluminum base layer at the lower portion of the copper base layer.
  • the bottom plate of the semiconductor power module of the invention adopts a copper base layer and a copper-aluminum composite plate composed of an aluminum base layer which is solid-phase composited in the lower part of the copper base layer, and can combine the advantages of copper material and aluminum material in heat exchange.
  • the thermal conductivity of copper is 1.9 times that of aluminum
  • the copper base layer on the upper portion of the bottom plate can instantaneously absorb the heat of the semiconductor chip, and the copper base layer transfers heat to the lower aluminum base layer through the copper-aluminum layer bonded between the two metal atoms, and During the heat transfer process, there is no increase in thermal resistance at the copper-aluminum interface; and the specific heat of aluminum is 2.3 times that of copper, and the aluminum base layer can quickly dissipate the heat absorbed by the copper base layer, thereby providing rapid heat dissipation and thus effective
  • the thermal stress of the semiconductor chip in long-term work is reduced, and the reliability of the operation of the semiconductor chip is improved.
  • the thermal resistance between the semiconductor chip and the heat sink is smaller, and the heat dissipation efficiency is greatly improved, so that the semiconductor module can be reduced in volume under the same semiconductor module operating capacity.
  • the weight of copper is three times that of aluminum, which also greatly reduces the weight of the module and reduces the cost.
  • FIG. 1 is a schematic structural view of a semiconductor power module having a diode chip
  • FIG. 2 is a schematic structural view of a semiconductor power module having an insulated gate bipolar transistor (IGBT);
  • FIG. 3 is a schematic top view of the structure of FIG.
  • FIG. 4 is a schematic structural view of a semiconductor power module of a spliced thyristor chip
  • FIG. 5 is a schematic diagram of a semiconductor power module having a fast recovery diode (FRD) chip; and FIG. 6 is a top plan view of FIG.
  • FDD fast recovery diode
  • the present invention provides a semiconductor power module, as shown in FIGS. 1 to 6, the semiconductor power module includes a bottom plate 1, a cermet substrate 5, a semiconductor chip 3, a conductive connecting member 4, an electrode 6, and a housing 2;
  • the ceramic substrate 5 is connected to the substrate 1, and the semiconductor chip 3 is connected thereto.
  • the conductive connector 4 is connected to the semiconductor chip 3 and the cermet substrate 5, and the electrode 6 is connected to the conductive connector 4 or to the cermet substrate 5, the shell
  • the body 2 is connected to the bottom plate 1; wherein
  • the base plate 1 includes a copper base layer 11 and an aluminum base layer 12 having a solid phase composited to the lower portion of the copper base layer.
  • the thickness of the aluminum base layer 12 may be greater than the thickness of the copper base layer 11. 5 ⁇ The thickness of the copper base layer 11 is 0.5 times or more.
  • the bottom plate 1 is a copper-aluminum composite plate composed of a copper base layer and an aluminum base layer which is solid-phase composited in the lower part of the copper base layer, and can combine the advantages of heat exchange between the copper material and the aluminum material, and can instantaneously absorb the semiconductor through the copper base layer.
  • the heat of the chip quickly dissipates the heat absorbed by the copper base layer through the aluminum base layer, thereby rapidly dissipating heat, thereby effectively reducing the thermal stress of the semiconductor chip in long-term operation and improving the operational reliability of the semiconductor chip.
  • the thermal resistance between the semiconductor chip and the heat sink is smaller, and the heat dissipation efficiency is greatly improved, so that the semiconductor module can be reduced in size under the same semiconductor module operating capacity.
  • the weight of copper is three times that of aluminum, which also greatly reduces the weight of the module and reduces the cost.
  • the electrode 6 can be connected to the semiconductor chip 3 via the conductive connecting member 4. As shown in Figs. 5 and 6, the electrode 6 is connected to the cermet substrate 5.
  • the housing 2 can be bonded to the base plate 1, or the housing 2 can be directly engaged with the base plate 1.
  • the copper base layer 11 and the aluminum base layer 12 are pressed at a certain heating temperature and a heating speed, and the copper, aluminum metal activates and diffuses the atoms under heating, and under the action of an external force, the lattice of the solid metal Displacement and plastic deformation occurs, so that the two metal joint interfaces are in close contact and joint, and the copper-aluminum two-metal solid phase composite is realized.
  • the thickness of the aluminum base layer 12 may be greater than the thickness of the copper base layer 11.
  • the thickness of the aluminum base layer 12 is 0.5 times or more, and the thickness of the aluminum base layer 12 is generally 1 to 100 times the thickness of the copper base layer 11.
  • the thickness of the aluminum base layer 12 is copper.
  • the thickness of the base layer 11 is 5 to 15 times. However, it is not limited to the above size, and can also be set according to actual needs.
  • the aluminum base layer 12 on the bottom plate 1 may be a plate-like layer in which the solid phase is laminated on the lower portion of the copper base layer 11.
  • the aluminum base layer 12 includes a plate-like layer in which a solid phase is laminated on the lower portion of the copper base layer 11 and two regions extending downward along the plate-like layer and having a gap therebetween. Or more than two fins;
  • the aluminum base layer 12 may be two or more fins which are laminated by a solid phase in the lower portion of the copper base layer 11 and extending downward.
  • the semiconductor power module can be quickly absorbed by the copper base layer 11 of the bottom plate 1 of the bottom portion, and then rapidly dissipated by the solid phase recombination in the aluminum base layer 12 at the lower portion of the copper base layer 11 to improve the heat dissipation efficiency.
  • the semiconductor chip 3 adopts a diode chip, and the semiconductor chip 3 and the metal-clad substrate 5 with the upper and lower molybdenum sheets or the dies are respectively connected to the fixed position of the bottom plate 1 by using the brazing material, and the conductive connection is performed.
  • the two ends of the connecting bridge are respectively connected to the upper surface of the semiconductor chip 3 and the upper surface of the cermet substrate 5, and the electrode 6 is connected to the conductive connecting member 4 at the upper end of the cermet substrate 5.
  • the conductive connecting member 4 is a connecting bridge through which the semiconductor chip 3 is connected to the electrode 6.
  • the bottom plate 1 is composed of a copper base layer 11 and an aluminum base layer 12 having a solid phase composited on the lower portion of the copper base layer 11.
  • the thickness of the copper base layer 11 is 2.8 mm, or the thickness of the copper base layer 11 is 0.4 mm, and the thickness of the aluminum base layer is 40 ⁇ . Further, the thickness of the copper base layer 11 is 10 irnn, and the thickness of the aluminum base layer 12 is 5 ⁇ . However, it is not limited to the above size, and the thickness can be set as required.
  • the casing 2 is attached to the bottom plate 1, and the bottom plate 1 and the casing 2 are sealed with silicone rubber, and a soft elastic rubber is injected to protect the semiconductor chip.
  • the structure can also be used for a semiconductor power module in which a thyristor chip is attached to the substrate 1.
  • FIG. 2 and 3 show the structure of a semiconductor power module with an insulated gate bipolar transistor (IGBT).
  • the semiconductor chip 3 is an insulated gate bipolar transistor chip, and the semiconductor chip 3 is connected to the cermet substrate 5, and the cermet substrate 5 is directly bonded with a copper-clad ceramic substrate.
  • DBC Direct Bonded Copper
  • the conductive connector 4 is a thick aluminum wire, which is bonded to the semiconductor chip 3 by a thick aluminum wire bonding technique
  • the upper surface is connected to the surface electrode region of the DBC-coated cermet substrate;
  • the electrode 6 is connected to the DBC-coated cermet substrate, and the conductive connecting member 4, that is, the thick aluminum wire is connected to the upper surface of the semiconductor chip 3, the DBC-coated cermet substrate
  • the copper base layer 11 on the bottom plate 1 is connected to each other, and the lower portion of the copper base layer 11 has a solid phase composite aluminum base layer 12.
  • the thickness of the copper base layer 11 is 1 mm, and the thickness of the aluminum base layer 12 is 10 mm; or the thickness of the copper base layer 11 is the same as the thickness of the aluminum base layer 12, and is not limited thereto.
  • the housing 2 is connected to the bottom plate 1.
  • the bottom plate 1 and the housing 2 are sealed with silicone rubber, and the soft elastic rubber is filled to protect the semiconductor chip 3.
  • the heat generated in the operation of the semiconductor chip 3 passes through the bottom plate 1.
  • the copper base layer 11 absorbs and is quickly dissipated through the aluminum base layer 12.
  • Such semiconductor power modules also have semiconductor power modules such as MOSFET chips.
  • the 4 is a semiconductor power module structure of a spliced thyristor semiconductor chip.
  • the semiconductor chip 3 is connected to the cermet substrate 5 by using a thyristor chip.
  • the conductive connector 4 is connected by a connecting bridge, and one end of the connecting bridge is connected to the semiconductor chip 3 through an upper molybdenum plate.
  • the other end of the connecting bridge is connected to the cermet substrate 5, and the upper surface of the semiconductor chip 3 is connected to the surface electrode region of the cermet substrate 5 through the connecting bridge, and the electrode 6 and the cermet
  • the electrode regions of the substrate 5 are connected, and the cermet substrate 5 is bonded to the copper base layer 11 of the substrate 1, and the copper substrate 11 is solid-phase composited with the aluminum substrate 12.
  • the thickness of the copper base layer 11 may be 5 mm, and the thickness of the aluminum base layer 12 may be 15 mm; or a copper base layer
  • the thickness of 11 may be 5 mm, and the thickness of the aluminum base layer 12 may be 25 mm, but is not limited thereto.
  • the casing 2 is fixed to the bottom plate 1, and the bottom plate 1 and the casing 2 are sealed with silicone rubber, and a soft elastic rubber is injected to protect the semiconductor chip 3.
  • a soft elastic rubber is injected to protect the semiconductor chip 3.
  • Figures 5 and 6 show the structure of a semiconductor power module for a fast recovery diode (FRD) chip.
  • the semiconductor chip 3 is a fast recovery diode (FRD) chip, and the semiconductor chip 3 is connected to the metal-clad substrate 5.
  • the metal-clad substrate 5 also uses a DBC cermet substrate, and the conductive connector 4 is an aluminum wire.
  • the upper surface of the semiconductor chip 3 is connected to the surface electrode region of the cermet substrate 5 by an aluminum wire bonding technique, and the electrode 6 is connected to the cermet substrate 5, and the conductive connecting member 4 is an aluminum wire.
  • the upper surface of the semiconductor chip 3 is connected, and the cermet-coated ceramic substrate 5 is connected to the copper base layer 11 of the bottom plate 1, and the lower portion of the copper base layer 11 has a solid phase composite aluminum base layer 12.
  • the thickness of the copper base layer 11 is 1, and the thickness of the aluminum base layer 12 is 15, but is not limited thereto.
  • the aluminum base layer 12 has a warp structure.
  • the thickness of the aluminum base layer 12 is 50 mm, and when the thickness of the aluminum base layer 12 is 100 mm or longer, an optimum heat dissipation effect can be attained.
  • the housing 2 is connected to the bottom plate 1.
  • the bottom plate 1 and the housing 2 are sealed with silicone rubber, and the soft elastic rubber is filled to protect the semiconductor chip 3.
  • the heat generated in the operation of the semiconductor chip 3 passes through the bottom plate 1.
  • the copper base layer 11 is quickly inhaled and quickly dissipated through the aluminum base layer 12.
  • semiconductor power modules also include semiconductor power modules such as MOSFET semiconductor chips, POWER ICs, CPUs, A semiconductor module composed of digital integrated circuits.
  • the semiconductor power module of the invention can achieve high efficiency, material saving, small volume, light weight, low cost and high promotion value due to the integration of copper and aluminum composite.
  • the semiconductor power module of the present invention may be a thick film ceramic chip spliced semiconductor power module, a DBC substrate spliced semiconductor power module, a non-insulated spliced semiconductor power module, a crimped semiconductor power module, or the like.
  • the invention also provides a heat dissipation method for a semiconductor power module, the method comprising: absorbing heat in the operation of the semiconductor chip through the copper base layer of the bottom plate, and then dissipating heat through the solid phase composite on the aluminum base layer in the lower portion of the copper base layer.
  • the thickness and structure of the copper base layer and the aluminum base layer are as described in the first embodiment, and are not described herein again.
  • the bottom plate of the semiconductor power module of the present invention employs a copper base layer and a copper-aluminum composite plate in which the solid phase is laminated on the aluminum base layer at the lower portion of the copper base layer, the advantages of heat exchange between the copper material and the aluminum material can be gathered.
  • the copper base layer can be used as a splicing carrier for the semiconductor chip and the metal-clad substrate, and the thermal conductivity of the copper is 1.9 times that of the aluminum, so that the copper base layer on the upper portion of the bottom plate can absorb the semiconductor instantaneously.
  • the copper base layer transfers the heat to the lower aluminum base layer through the copper-aluminum layer combined between the two metal atoms, and the heat transfer between the copper and aluminum interfaces does not increase the thermal resistance; and the specific heat of the aluminum is copper. Double, the aluminum base layer can quickly dissipate the heat absorbed by the copper base layer, which plays a role of rapid heat dissipation, effectively reduces the thermal stress of the semiconductor chip in long-term work, and improves the reliability of the semiconductor chip.
  • the thermal resistance between the semiconductor chip and the heat sink is smaller.
  • the heat dissipation efficiency is greatly improved, so that the semiconductor module can be reduced in volume under the same working capacity of the semiconductor module.
  • the weight of copper is three times that of aluminum, which also greatly reduces the weight of the module and reduces the cost.

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Description

半导体功率模块及其散热方法 技术领域 本发明涉及半导体技术, 特别涉及一种半导体功率模块及其散热方法。 背景技术 半导体功率模块主要应用类别有各种变频器、 斩波器及各种开关电源, 广泛用于通讯、工业、 医疗、家用电器、照明、交通运输、半导体生产设备、 军事和航空等领域。
半导体功率模块的主要产品结构有, 厚膜陶瓷片悍接式半导体功率模 块、覆金属陶瓷基板悍接式半导体功率模块、非绝缘悍接式半导体功率模块、 压接式半导体功率模块等。这些应用产品均为标准外形尺寸和非标准外形尺 寸半导体模块产品,这些半导体模块产品均有一个底板, 该底板即可作为固 定各半导体芯片或覆金属陶瓷基板、电极以及灌注弹性保护胶和环氧树脂等 的载体, 而且有时又可作为半导体功率模块的一个导电体。
为便于半导体芯片及电极的连接, 目前半导体模块的底座均采用铜底 板, 以利用铜材质的可悍性。众所周知,铜材质与铝材质相比,具有热熔大、 比热小、 吸热快的特点。半导体功率模块在工作过程中, 半导体芯片产生的 热量能通过铜底板迅速吸收,但铜底板与铝材相比比热小,热逃逸速度较慢, 不能及时将模块内的热量散出, 故需将模块安装在散热器上进行散热。
但半导体模块安装在散热器上需要有导热硅脂填充模块与散热器之间 的空隙,不仅增加了热阻,而且也降低了散热能力。因此在同体积的条件下, 无法进一步增加半导体模块的工作容量。另一方面半导体功率模块的底板厚 度是随半导体模块底板面积的增大而增厚,增加底板厚度主要解决悍接过程 中热应力变形和安装强度要求。 因此, 当半导体模块生产数量巨大时, 需要 大量的铜材,而随着铜材价格的不断上涨,使得半导体模块成本也不断增加。 发明内容
本发明的目的是提供一种半导体功率模块及其散热方法。通过本发明使 得半导体功率模块吸热和散热迅速,且体积小,能增加半导体模块工作容量, 降低制造成本。
为达到上述目的,本发明提供一种半导体功率模块, 该半导体功率模块 包括: 底板、 覆金属陶瓷基板、 半导体芯片、 导电连接件、 电极以及壳体; 该覆金属陶瓷基板连接在该底板上,该半导体芯片连接在该覆金属陶瓷基板 或该底板上,该导电连接件连接该半导体芯片和该覆金属陶瓷基板,该电极 与该导电连接件或与该覆金属陶瓷基板连接,该壳体连接在该底板上,其中, 该底板包括铜基层和固相复合在该铜基层下部的铝基层。
该铝基层 12厚度可大于该铜基层 11的厚度。 如该铝基层 12的厚度是 该铜基层 11厚度的 0. 5倍以上。
为达到上述目的,本发明还提供一种半导体功率模块的散热方法,半导 体芯片工作中产生的热量通过底板上部的铜基层吸收,再通过固相复合在铜 基层下部的铝基层散热。
本发明的有益效果在于:
本发明半导体功率模块的底板采用铜基层和固相复合在铜基层下部的 铝基层构成的铜铝复合板, 能集铜材和铝材在换热方面的优点。因为铜的导 热系数是铝的 1. 9倍,故底板上部的铜基层能瞬间吸收该半导体芯片的热量, 铜基层通过两金属原子间结合的铜铝层将热量传递给下部的铝基层,且热量 的传递过程中铜铝界面没有热阻增加; 且铝的比热是铜的 2. 3倍, 铝基层能 迅速将铜基层所吸收的热量散发, 因此, 起到快速散热作用, 从而可有效地 降低了半导体芯片在长期工作中的热应力, 提高了半导体芯片工作可靠性。 此外,通过采用铜铝固相复合底板,使得半导体芯片与散热器之间的热 阻更小, 散热效率大大提高, 故在相同半导体模块工作容量的情况下, 能减 小半导体模块体积。 而且在同样体积的情况下, 铜的重量是铝的 3倍, 也大 大减少模块的重量, 降低成本。 附图说明
此处所说明的附图用来提供对本发明的进一步理解,构成本申请的一部 分, 并不构成对本发明的限定。 在附图中
图 1是具有二极管芯片的半导体功率模块结构示意图;
图 2是具有绝缘栅双极型晶体管(IGBT)的半导体功率模块结构示意图; 图 3是图 2去掉壳体的俯视结构示意图;
图 4是悍接式晶闸管芯片的半导体功率模块结构示意图;
图 5是具有快恢复二极管 (FRD) 芯片的半导体功率模块示意图; 图 6是图 5的俯视结构示意图。
其中: 1―—底板, 2一—壳体, 3―—半导体芯片, 4―—导电连接件, 5一一覆金属陶瓷基板, 6—一电极。 具体实施方式 为使本发明的目的、技术方案和优点更加清楚明白,下面结合实施方式 和附图, 对本发明做进一步详细说明。在此, 本发明的示意性实施方式及其 说明用于解释本发明, 但并不作为对本发明的限定。
实施例一
本发明提供一种半导体功率模块, 如图 1〜6所示, 该半导体功率模块 包括底板 1、 覆金属陶瓷基板 5、 半导体芯片 3、 导电连接件 4、 电极 6以及 壳体 2; 该覆金属陶瓷基板 5连接在该底板 1上, 该半导体芯片 3连接在该 覆金属陶瓷基板 5或该底板 1上,该导电连接件 4连接该半导体芯片 3和该 覆金属陶瓷基板 5, 该电极 6与该导电连接件 4或与该覆金属陶瓷基板 5连 接, 该壳体 2连接在该底板 1上; 其中,
该底板 1包括铜基层 11和固相复合在该铜基层下部的铝基层 12。
在本实施例中, 该铝基层 12厚度可大于该铜基层 11的厚度。例如, 该 铝基层 12的厚度是该铜基层 11厚度的 0. 5倍以上。
由上述可知, 该底板 1采用铜基层和固相复合在铜基层下部的铝基层构 成的铜铝复合板, 能集铜材和铝材在换热方面的优点,可通过铜基层瞬间吸 收该半导体芯片的热量,通过铝基层迅速将铜基层所吸收的热量散发,因此, 起到快速散热作用, 从而可有效地降低了半导体芯片在长期工作中的热应 力, 提高了半导体芯片工作可靠性。
此外,通过采用铜铝固相复合底板,使得半导体芯片与散热器之间的热 阻更小, 散热效率大大提高, 故在相同半导体模块工作容量的情况下, 能减 小半导体模块体积。 而且在同样体积的情况下, 铜的重量是铝的 3倍, 也大 大减少模块的重量, 降低成本。
在本实施例中, 如图 2、 3所示, 该电极 6可通过导电连接件 4与半导 体芯片 3连接。 如图 5、 6所示, 该电极 6与该覆金属陶瓷基板 5连接。
在本实施例中,该壳体 2可粘接在底板 1上,或该壳体 2直接卡接在该 底板 1上。
在本实施例中,该铜基层 11和铝基层 12是在一定加热温度以及加热速 度下压制,铜、铝金属在加热条件下使得原子活化并扩散,并在外力作用下, 固态金属的晶格错位而转移产生塑性变形, 使两金属接合界面紧密接触接 合, 实现铜铝两金属固相复合。
因此在传热过程中铜铝接合界面没有热阻的增加,达到快速吸热和迅速 散热的目的。在相同体积的半导体功率模块下, 能提高半导体功率模块的工 作容量。
在本实施例中, 该铝基层 12的厚度可大于铜基层 11的厚度。例如, 该 铝基层 12的厚度是铜基层 11的厚度的 0. 5倍以上,一般该铝基层 12的厚 度可为铜基层 11的厚度的 1〜100倍, 最好铝基层 12的厚度是铜基层 11 的厚度的 5〜15倍。 但不限于上述大小, 还可根据实际需要进行设置。
在本实施例中, 如图 1至图 4所示, 该底板 1上的铝基层 12可以是固 相复合在铜基层 11下部的板状层。
在本实施例中, 如图 5和图 6所示, 该铝基层 12包括固相复合在铜基 层 11下部的板状层和沿板状层向下延伸、 且相互之间具有空隙的两个或两 个以上翅片;
此外,该铝基层 12还可以是由固相复合在铜基层 11下部并向下延伸的 两个或两个以上翅片。
由上述可知, 该半导体功率模块可通过底部的底板 1的铜基层 11快速 吸收,再通过固相复合在铜基层 11下部的铝基层 12迅速散热,来提高散热 效率。
图 1是具有二极管半导体芯片的半导体功率模块的结构。 如图 1所示, 该半导体芯片 3采用二极管芯片,可用钎悍料将带有上下钼片或裸片的半导 体芯片 3和覆金属陶瓷基板 5分别悍接到底板 1的固定位置上,导电连接件 4即连接桥两端分别与半导体芯片 3上表面和覆金属陶瓷基板 5上表面悍 接, 电极 6与覆金属陶瓷基板 5上端的导电连接件 4悍接。
如图 1所示, 该导电连接件 4采用连接桥, 通过该连接桥将半导体芯片 3与电极 6连接。
该底板 1由铜基层 11和固相复合在铜基层 11下部的铝基层 12构成, 铜基层 11的厚度是 0. 4mm,铝基层 12的厚度是 2. 8mm; 或铜基层 11的厚度 是 0. 4mm, 铝基层厚度是 40讓。 此外, 铜基层 11的厚度是 lOirnn, 而铝基层 12的厚度是 5謹。 但不限于上述大小, 还可以根据要求设定厚度。
该壳体 2连接在底板 1上, 该底板 1与该壳体 2之间用硅橡胶密封,灌 注软弹性胶来保护半导体芯片。该结构同样也可用于晶闸管芯片悍接在该底 板 1上的半导体功率模块。
图 2、 3是具有绝缘栅双极型晶体管(IGBT)的半导体功率模块的结构。 如图 2、 3所示, 该半导体芯片 3采用绝缘栅双极型晶体管芯片, 该半导体 芯片 3悍接在覆金属陶瓷基板 5上,该覆金属陶瓷基板 5采用直接键合的覆 铜陶瓷基板 (DBC: Direct Bonded Copper), 如 Cu- A 1203 (AIN) - Cu直接 键合的覆金属陶瓷基板; 该导电连接件 4 为粗铝丝, 通过粗铝丝键合技术 将该半导体芯片 3的上表面与 DBC覆金属陶瓷基板表面电极区连接;该电极 6与 DBC覆金属陶瓷基板悍接, 通过该导电连接件 4即粗铝丝与半导体芯片 3的上表面连接, 该 DBC覆金属陶瓷基板与该底板 1上的铜基层 11悍接, 铜基层 11的下部具有固相复合的铝基层 12。
其中, 该铜基层 11的厚度是 lmm, 铝基层 12的厚度是 10mm; 或铜基层 11的厚度与铝基层 12的厚度相同, 均为 1讓, 但不限于此。
该壳体 2连接在该底板 1上,该底板 1与壳体 2之间用硅橡胶密封,灌 注软弹性胶来保护该半导体芯片 3, 该半导体芯片 3工作中所产生的热量通 过该底板 1的铜基层 11吸收, 而通过铝基层 12迅速散出。 此类半导体功 率模块还有如 M0SFET芯片等组成的半导体功率模块。
图 4是悍接式晶闸管半导体芯片的半导体功率模块结构。该半导体芯片 3采用晶闸管芯片, 该半导体芯片 3悍接在该覆金属陶瓷基板 5上, 该导电 连接件 4采用连接桥, 该连接桥的一端通过上钼片与该半导体芯片 3悍接, 该连接桥的另一端与该覆金属陶瓷基板 5悍接,通过该连接桥将该半导体芯 片 3的上表面与该覆金属陶瓷基板 5的表面电极区连接,该电极 6则与该覆 金属陶瓷基板 5的电极区连接,该覆金属陶瓷基板 5悍接在底板 1的铜基层 11上, 而该铜基层 11固相复合有铝基层 12。
该铜基层 11的厚度可是 5mm, 铝基层 12的厚度可是 15mm; 或铜基层
11的厚度可是 5mm, 而该铝基层 12的厚度可是 25mm, 但不限于此。
该壳体 2固定在底板 1上, 该底板 1与该壳体 2之间用硅橡胶密封,灌 注软弹性胶来保护该半导体芯片 3。 同样也适用于二极管半导体芯片直接悍 接在该覆金属陶瓷基板 5的结构。
图 5、 6是快恢复二极管(FRD)芯片的半导体功率模块结构。 该半导体 芯片 3采用快恢复二极管 (FRD) 芯片, 该半导体芯片 3悍接在该覆金属陶 瓷基板 5上,该覆金属陶瓷基板 5也采用 DBC金属陶瓷基板,该导电连接件 4为铝丝, 通过铝丝键合技术将该半导体芯片 3的上表面与该覆金属陶瓷基 板 5表面电极区连接,而该电极 6与该覆金属陶瓷基板 5悍接,通过该导电 连接件 4即铝丝与半导体芯片 3的上表面连接,该覆金属陶瓷基板 5与该底 板 1的铜基层 11悍接, 该铜基层 11的下部具有固相复合的铝基层 12。
该铜基层 11的厚度是 1讓, 该铝基层 12的厚度是 15讓, 但不限于此。 如图 5所示, 该铝基层 12采用翘片结构。当该铝基层 12采用翅片结构 时, 该铝基层 12的厚度是 50mm, 当该铝基层 12的厚度是 100mm或更长时, 可达到最佳的散热效果。
该壳体 2连接在该底板 1上,该底板 1与壳体 2之间用硅橡胶密封,灌 注软弹性胶来保护该半导体芯片 3, 该半导体芯片 3工作中所产生的热量通 过底板 1的铜基层 11快速吸入,而通过铝基层 12迅速散出。此类半导体功 率模块还有如 M0SFET半导体芯片等组成的半导体功率模块, POWER IC、 CPU, 数字集成电路组成的半导体模块。
本发明的半导体功率模块由于将铜铝复合一体化, 能达到高效、 节材、 体积小、 重量轻、 成本低、 具有极高推广价值。
由上述可知,本发明的半导体功率模块可为厚膜陶瓷片悍接式半导体功 率模块、 DBC基板悍接式半导体功率模块、 非绝缘悍接式半导体功率模块、 压接式半导体功率模块等。
实施例二
本发明还提供一种半导体功率模块的散热方法, 该方法包括: 半导体芯 片工作中的热量通过底板的铜基层吸收,再通过固相复合在该铜基层下部的 铝基层散热。
其中, 该铜基层和铝基层的厚度和结构如实施例一中所述, 此处不再 赘述。
由上述实施例可知,由于本发明的半导体功率模块的底板采用铜基层和 固相复合在铜基层下部的铝基层构成的铜铝复合板,能集铜材和铝材在换热 方面的优点。
因为铜的导热系数为 1386KJ / (M. H. K), 比热为 93卡 / (千克 X °C ), 铝的导热系数为 735KJ / (M. H. K), 比热为 217卡 / (千克 X °C ), 因此, 可 利用铜基层的可悍性作为与该半导体芯片和覆金属陶瓷基板的悍接载体,而 且铜的导热系数是铝的 1. 9倍, 故底板上部的铜基层能瞬间吸收该半导体芯 片的热量,铜基层通过两金属原子间结合的铜铝层将热量传递给下部的铝基 层,且热量的传递过程中铜铝界面没有热阻增加;而铝的比热是铜的 2. 3倍, 铝基层能迅速将铜基层所吸收的热量散发,起到快速散热作用,有效地降低 了半导体芯片在长期工作中的热应力, 提高了半导体芯片工作可靠性。
由于采用铜铝固相复合底板, 因半导体芯片与散热器之间的热阻更小, 散热效率大大提高,故在相同半导体模块工作容量的情况下, 能减小半导体 模块体积。而且在同样体积的情况下, 铜的重量是铝的 3倍, 也大大减少模 块的重量, 降低成本。
以上所述的具体实施方式,对本发明的目的、技术方案和有益效果进行 了进一步详细说明,所应理解的是, 以上所述仅为本发明的具体实施方式而 已, 并不用于限定本发明的保护范围, 凡在本发明的精神和原则之内, 所做 的任何修改、 等同替换、 改进等, 均应包含在本发明的保护范围之内。

Claims

权 利 要 求 书
1.一种半导体功率模块, 所述半导体功率模块包括底板 (1)、覆金属陶 瓷基板(5)、 半导体芯片(3)、 导电连接件(4)、 电极(6) 以及壳体(2); 所述覆金属陶瓷基板 (5) 连接在所述底板 (1) 上, 所述半导体芯片 (3) 连接在所述覆金属陶瓷基板(5)或所述底板(1)上, 所述导电连接件(4) 连接所述半导体芯片 (3) 和所述覆金属陶瓷基板 (5), 所述电极 (6) 与 所述导电连接件 (4) 或与所述覆金属陶瓷基板 (5) 连接, 所述壳体 (2) 连接在所述底板 (1) 上, 其特征在于:
所述的底板(1)包括铜基层 (11)和固相复合在铜基层 (11)下部的 铝基层 (12)。
2.根据权利要求 1所述的半导体功率模块, 其特征在于, 所述铝基层 (12) 的厚度大于所述铜基层 (11) 的厚度。
3.根据权利要求 2所述的半导体功率模块, 其特征在于, 所述铝基层 (12) 的厚度是铜基层 (11) 厚度的 0.5倍以上。
4.根据权利要求 2所述的半导体功率模块, 其特征在于: 所述的铝基层
(12) 的厚度是铜基层 (11) 的厚度的 1〜100倍。
5.根据权利要求 2所述的半导体功率模块, 其特征在于: 所述的铝基层 (12) 的厚度是铜基层 (11) 的厚度的 5〜15倍。
6.根据权利要求 1所述的半导体功率模块, 其特征在于: 所述的铝基层 (12) 包括固相复合在铜基层 (11) 下部的板状层。
7.根据权利要求 1所述的半导体功率模块, 其特征在于: 所述的铝基层 (12) 包括固相复合在铜基层 (11) 下部的板状层和沿板状层向下延伸、 且相互之间具有空隙的两个或两个以上翅片。
8.根据权利要求 1所述的半导体功率模块, 其特征在于: 所述的铝基层 ( 12) 包括间隔固相复合在铜基层 (11 ) 下部并向下延伸的两个或两个以 上翅片。
9.一种半导体功率模块的散热方法, 其特征在于, 所述方法包括: 半导体芯片工作中的热量通过底板的铜基层吸收,再通过固相复合在铜 基层下部的铝基层散热。
10.根据权利要求 9所述的方法, 其特征在于, 所述铝基层 (12) 的厚 度大于所述铜基层 (11 ) 的厚度。
11.根据权利要求 10所述的方法, 其特征在于, 所述铝基层(12) 的厚 度是铜基层 (11 ) 厚度的 0. 5倍以上。
12.根据权利要求 10所述的方法, 其特征在于: 所述的铝基层(12) 的 厚度是铜基层 (11 ) 的厚度的 1〜100倍。
13.根据权利要求 10所述的方法, 其特征在于: 所述的铝基层(12) 的 厚度是铜基层 (11 ) 的厚度的 5〜15倍。
PCT/CN2008/072469 2007-12-14 2008-09-23 半导体功率模块及其散热方法 WO2009076810A1 (zh)

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Publication number Priority date Publication date Assignee Title
CN101179055B (zh) * 2007-12-14 2010-10-06 江苏宏微科技有限公司 半导体功率模块及其散热方法
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CN102064160A (zh) * 2010-11-11 2011-05-18 嘉兴斯达微电子有限公司 一种包含特殊功率端子的功率模块
CN102254889A (zh) * 2011-07-05 2011-11-23 启东市捷捷微电子有限公司 一种大功率半导体器件及其封装方法
CN102427070A (zh) * 2011-12-14 2012-04-25 深圳市威怡电气有限公司 功率模块
CN102637611A (zh) * 2012-04-27 2012-08-15 昆山晨伊半导体有限公司 一种aap功率模块的制造方法
CN103426840B (zh) * 2012-05-18 2016-12-14 上海拜骋电器有限公司 具有续流二极管的开关装置
CN103252548B (zh) * 2013-05-20 2016-03-23 临海市志鼎电子科技有限公司 一种功率半导体模块一次性焊接法
CN105450040B (zh) * 2014-08-28 2018-11-06 株洲南车时代电气股份有限公司 一种标准化功率模块单元
CN104867889A (zh) * 2015-05-06 2015-08-26 嘉兴斯达微电子有限公司 一种带有热管系统的功率模块
CN205491579U (zh) * 2015-11-30 2016-08-17 比亚迪股份有限公司 Igbt散热模组以及具有其的igbt模组
CN105633041A (zh) * 2016-03-14 2016-06-01 江苏捷捷微电子股份有限公司 一种大功率可控硅封装结构及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1565774A (zh) * 2003-07-03 2005-01-19 富骅企业股份有限公司 一种适用于散热器底板的异质金属压铸方法
CN1755918A (zh) * 2004-09-28 2006-04-05 三菱电机株式会社 半导体器件
CN101179055A (zh) * 2007-12-14 2008-05-14 江苏宏微科技有限公司 半导体功率模块及其散热方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1466202A (zh) * 2002-12-03 2004-01-07 黄蕙仙 铝铜接合散热片及其制造方法
CN100499118C (zh) * 2005-03-28 2009-06-10 陈兴忠 大电流三相整流电力电子器件模块
CN201146183Y (zh) * 2007-12-14 2008-11-05 江苏宏微科技有限公司 半导体功率模块

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1565774A (zh) * 2003-07-03 2005-01-19 富骅企业股份有限公司 一种适用于散热器底板的异质金属压铸方法
CN1755918A (zh) * 2004-09-28 2006-04-05 三菱电机株式会社 半导体器件
CN101179055A (zh) * 2007-12-14 2008-05-14 江苏宏微科技有限公司 半导体功率模块及其散热方法

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