WO2009011113A1 - 電流制限素子とそれを用いたメモリ装置およびその製造方法 - Google Patents

電流制限素子とそれを用いたメモリ装置およびその製造方法 Download PDF

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Publication number
WO2009011113A1
WO2009011113A1 PCT/JP2008/001867 JP2008001867W WO2009011113A1 WO 2009011113 A1 WO2009011113 A1 WO 2009011113A1 JP 2008001867 W JP2008001867 W JP 2008001867W WO 2009011113 A1 WO2009011113 A1 WO 2009011113A1
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WO
WIPO (PCT)
Prior art keywords
current limiting
limiting element
memory device
barrier
layer
Prior art date
Application number
PCT/JP2008/001867
Other languages
English (en)
French (fr)
Inventor
Takeshi Takagi
Takumi Mikawa
Koji Arita
Mitsuteru Iijima
Takashi Okada
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to JP2009523536A priority Critical patent/JP5072967B2/ja
Priority to CN2008800250264A priority patent/CN101755338B/zh
Priority to US12/669,174 priority patent/US8295123B2/en
Publication of WO2009011113A1 publication Critical patent/WO2009011113A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
    • H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

電流制限素子（１０）において、第１の電極層（１２）と第２の電極層（１３）とで挟まれた障壁層（１１）の厚み方向の中央部（１４）の障壁高さΦＡが、第１の電極層（１２）および第２の電極層（１３）との電極界面（１７）付近の障壁高さΦＢよりも大きく形成されている。なお、障壁層（１１）は、例えば障壁層（１１ａ）、（１１ｂ）、（１１ｃ）の３層構造で構成され、障壁層（１１ａ）、（１１ｂ）、（１１ｃ）は、例えばＳｉＮｘ２、ＳｉＮｘ１、ＳｉＮｘ１（ただし、Ｘ１＜Ｘ２とする）のＳｉＮ層で形成されている。したがって、障壁高さの形状が段階的に変化し、中央部１４が高くなっている。
PCT/JP2008/001867 2007-07-18 2008-07-11 電流制限素子とそれを用いたメモリ装置およびその製造方法 WO2009011113A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009523536A JP5072967B2 (ja) 2007-07-18 2008-07-11 電流制限素子とそれを用いたメモリ装置およびその製造方法
CN2008800250264A CN101755338B (zh) 2007-07-18 2008-07-11 电流限制元件和使用它的存储器装置
US12/669,174 US8295123B2 (en) 2007-07-18 2008-07-11 Current rectifying element, memory device incorporating current rectifying element, and fabrication method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007186622 2007-07-18
JP2007-186622 2007-07-18

Publications (1)

Publication Number Publication Date
WO2009011113A1 true WO2009011113A1 (ja) 2009-01-22

Family

ID=40259459

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/001867 WO2009011113A1 (ja) 2007-07-18 2008-07-11 電流制限素子とそれを用いたメモリ装置およびその製造方法

Country Status (4)

Country Link
US (1) US8295123B2 (ja)
JP (1) JP5072967B2 (ja)
CN (1) CN101755338B (ja)
WO (1) WO2009011113A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011090758A (ja) * 2009-09-25 2011-05-06 Sharp Corp 不揮発性半導体記憶装置
JP2012533195A (ja) * 2009-07-13 2012-12-20 シーゲイト テクノロジー エルエルシー 非オーム選択層を有する不揮発性メモリセル
US8422268B2 (en) 2008-07-11 2013-04-16 Panasonic Corporation Current control element, memory element, and fabrication method thereof
US8995171B2 (en) 2012-04-04 2015-03-31 Panasonic Intellectual Property Management Co., Ltd. Designing method of non-volatile memory device, manufacturing method of non-volatile memory device, and non-volatile memory device

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JP5313405B2 (ja) * 2010-09-17 2013-10-09 パナソニック株式会社 電流制御素子及びこれを用いた不揮発性記憶素子
US8546944B2 (en) * 2010-12-22 2013-10-01 Intel Corporation Multilayer dielectric memory device
CN102610749B (zh) * 2011-01-25 2014-01-29 中国科学院微电子研究所 阻变型随机存储单元及存储器
CN104205343A (zh) 2012-04-26 2014-12-10 惠普发展公司，有限责任合伙企业 可定制的非线性电器件
US9019744B2 (en) * 2012-12-27 2015-04-28 Intermolecular, Inc. Barrier design for steering elements
US20150179934A1 (en) * 2013-12-20 2015-06-25 Intermolecular, Inc. ZrOx/STO/ZrOx Based Selector Element

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JPH05501481A (ja) * 1990-03-20 1993-03-18 富士通株式会社 誘電体材料よりなる電流チャネルを有する電子装置
JPH05347422A (ja) * 1992-06-16 1993-12-27 Fujitsu Ltd 二安定ダイオード
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JPH05501481A (ja) * 1990-03-20 1993-03-18 富士通株式会社 誘電体材料よりなる電流チャネルを有する電子装置
JPH05347422A (ja) * 1992-06-16 1993-12-27 Fujitsu Ltd 二安定ダイオード
JPH0618937A (ja) * 1992-07-06 1994-01-28 Nec Corp 非線形抵抗素子
JPH09129757A (ja) * 1995-10-27 1997-05-16 Nkk Corp 不揮発性半導体メモリ装置およびその製造方法
US6753561B1 (en) * 2002-08-02 2004-06-22 Unity Semiconductor Corporation Cross point memory array using multiple thin films
JP2005317787A (ja) * 2004-04-28 2005-11-10 Matsushita Electric Ind Co Ltd スイッチング素子およびそれを用いたアレイ型機能素子
WO2006075574A1 (ja) * 2005-01-14 2006-07-20 Matsushita Electric Industrial Co., Ltd. 抵抗変化素子とその製造方法
JP2006203098A (ja) * 2005-01-24 2006-08-03 Sharp Corp 不揮発性半導体記憶装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8422268B2 (en) 2008-07-11 2013-04-16 Panasonic Corporation Current control element, memory element, and fabrication method thereof
JP2012533195A (ja) * 2009-07-13 2012-12-20 シーゲイト テクノロジー エルエルシー 非オーム選択層を有する不揮発性メモリセル
JP2011090758A (ja) * 2009-09-25 2011-05-06 Sharp Corp 不揮発性半導体記憶装置
US8995171B2 (en) 2012-04-04 2015-03-31 Panasonic Intellectual Property Management Co., Ltd. Designing method of non-volatile memory device, manufacturing method of non-volatile memory device, and non-volatile memory device

Also Published As

Publication number Publication date
CN101755338B (zh) 2012-10-10
CN101755338A (zh) 2010-06-23
JP5072967B2 (ja) 2012-11-14
US8295123B2 (en) 2012-10-23
US20100193760A1 (en) 2010-08-05
JPWO2009011113A1 (ja) 2010-09-16

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