WO2008156140A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- WO2008156140A1 WO2008156140A1 PCT/JP2008/061246 JP2008061246W WO2008156140A1 WO 2008156140 A1 WO2008156140 A1 WO 2008156140A1 JP 2008061246 W JP2008061246 W JP 2008061246W WO 2008156140 A1 WO2008156140 A1 WO 2008156140A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulating film
- gate insulating
- semiconductor layer
- region
- drain region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
- H10D84/0179—Manufacturing their gate conductors the gate conductors having different shapes or dimensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0181—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0191—Manufacturing their doped wells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
- H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
- H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
- H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
本発明の半導体装置は、半導体層と、前記半導体層の表層部に形成されるソース領域と、前記半導体層の表層部に前記ソース領域と間隔を空けて形成されるドレイン領域と、前記半導体層の表面上において、前記ソース領域と前記ドレイン領域との間に対向する領域に形成されるゲート絶縁膜と、前記ゲート絶縁膜上に形成されるゲート電極と、前記ドレイン領域と前記ゲート絶縁膜との間に介在され、前記ドレイン領域と前記ゲート絶縁膜とを非接触状態に分離するためのドレイン-ゲート分離部とを備えている。
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/452,169 US8513766B2 (en) | 2007-06-19 | 2008-06-19 | Semiconductor device having a drain-gate isolation portion |
| US13/941,458 US8878294B2 (en) | 2007-06-19 | 2013-07-13 | Semiconductor device having a drain-gate isolation portion |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007161493A JP5172223B2 (ja) | 2007-06-19 | 2007-06-19 | 半導体装置 |
| JP2007-161493 | 2007-06-19 |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/452,169 A-371-Of-International US8513766B2 (en) | 2007-06-19 | 2008-06-19 | Semiconductor device having a drain-gate isolation portion |
| US13/941,458 Continuation US8878294B2 (en) | 2007-06-19 | 2013-07-13 | Semiconductor device having a drain-gate isolation portion |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2008156140A1 true WO2008156140A1 (ja) | 2008-12-24 |
Family
ID=40156298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/061246 Ceased WO2008156140A1 (ja) | 2007-06-19 | 2008-06-19 | 半導体装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US8513766B2 (ja) |
| JP (1) | JP5172223B2 (ja) |
| WO (1) | WO2008156140A1 (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2023518495A (ja) * | 2020-07-20 | 2023-05-01 | 無錫華潤上華科技有限公司 | 半導体デバイスの製造方法、半導体デバイス |
| JP2023118092A (ja) * | 2022-02-11 | 2023-08-24 | イーメモリー テクノロジー インコーポレイテッド | 抵抗変化型メモリセルおよび関連するセルアレイ構造 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5448788B2 (ja) | 2009-12-22 | 2014-03-19 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2014207361A (ja) * | 2013-04-15 | 2014-10-30 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| US20150048875A1 (en) * | 2013-08-19 | 2015-02-19 | Ememory Technology Inc. | High voltage power control system |
| TWI888692B (zh) * | 2022-01-10 | 2025-07-01 | 聯華電子股份有限公司 | 半導體裝置及其製作方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005045147A (ja) * | 2003-07-25 | 2005-02-17 | Seiko Epson Corp | 半導体装置およびその製造方法 |
| JP2006210584A (ja) * | 2005-01-27 | 2006-08-10 | Seiko Epson Corp | 半導体装置およびその製造方法 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3063051B2 (ja) * | 1995-01-31 | 2000-07-12 | 三洋電機株式会社 | 半導体装置の製造方法 |
| JPH09312399A (ja) * | 1995-07-14 | 1997-12-02 | Seiko Instr Inc | 半導体装置とその製造方法 |
| EP0915508A1 (en) * | 1997-10-10 | 1999-05-12 | STMicroelectronics S.r.l. | Integrated circuit with highly efficient junction insulation |
| JP3298483B2 (ja) | 1997-12-24 | 2002-07-02 | 日本電気株式会社 | 高耐圧mosfetの製造方法 |
| US6172401B1 (en) * | 1998-06-30 | 2001-01-09 | Intel Corporation | Transistor device configurations for high voltage applications and improved device performance |
| JP3743486B2 (ja) * | 1999-06-23 | 2006-02-08 | セイコーエプソン株式会社 | 不揮発性メモリトランジスタを含む半導体装置の製造方法 |
| US6548874B1 (en) | 1999-10-27 | 2003-04-15 | Texas Instruments Incorporated | Higher voltage transistors for sub micron CMOS processes |
| JP4138601B2 (ja) * | 2003-07-14 | 2008-08-27 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| JP2005251973A (ja) * | 2004-03-04 | 2005-09-15 | Fujitsu Ltd | 半導体装置の製造方法と半導体装置 |
| US7301185B2 (en) * | 2004-11-29 | 2007-11-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage |
| JP2006237341A (ja) * | 2005-02-25 | 2006-09-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
| US7375408B2 (en) * | 2005-10-11 | 2008-05-20 | United Microelectronics Corp. | Fabricating method of a high voltage metal oxide semiconductor device |
-
2007
- 2007-06-19 JP JP2007161493A patent/JP5172223B2/ja not_active Expired - Fee Related
-
2008
- 2008-06-19 WO PCT/JP2008/061246 patent/WO2008156140A1/ja not_active Ceased
- 2008-06-19 US US12/452,169 patent/US8513766B2/en not_active Expired - Fee Related
-
2013
- 2013-07-13 US US13/941,458 patent/US8878294B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005045147A (ja) * | 2003-07-25 | 2005-02-17 | Seiko Epson Corp | 半導体装置およびその製造方法 |
| JP2006210584A (ja) * | 2005-01-27 | 2006-08-10 | Seiko Epson Corp | 半導体装置およびその製造方法 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2023518495A (ja) * | 2020-07-20 | 2023-05-01 | 無錫華潤上華科技有限公司 | 半導体デバイスの製造方法、半導体デバイス |
| JP7589257B2 (ja) | 2020-07-20 | 2024-11-25 | 無錫華潤上華科技有限公司 | 半導体デバイスの製造方法、半導体デバイス |
| US12593465B2 (en) | 2020-07-20 | 2026-03-31 | Csmc Technologies Fab2 Co., Ltd. | Method for manufacturing semiconductor device, and semiconductor device |
| JP2023118092A (ja) * | 2022-02-11 | 2023-08-24 | イーメモリー テクノロジー インコーポレイテッド | 抵抗変化型メモリセルおよび関連するセルアレイ構造 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20100102387A1 (en) | 2010-04-29 |
| US20130292765A1 (en) | 2013-11-07 |
| US8878294B2 (en) | 2014-11-04 |
| JP2009004441A (ja) | 2009-01-08 |
| US8513766B2 (en) | 2013-08-20 |
| JP5172223B2 (ja) | 2013-03-27 |
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