WO2008123139A1 - 抵抗記憶素子 - Google Patents

抵抗記憶素子 Download PDF

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Publication number
WO2008123139A1
WO2008123139A1 PCT/JP2008/055272 JP2008055272W WO2008123139A1 WO 2008123139 A1 WO2008123139 A1 WO 2008123139A1 JP 2008055272 W JP2008055272 W JP 2008055272W WO 2008123139 A1 WO2008123139 A1 WO 2008123139A1
Authority
WO
WIPO (PCT)
Prior art keywords
memory element
resistance memory
base material
relatively high
resistance
Prior art date
Application number
PCT/JP2008/055272
Other languages
English (en)
French (fr)
Inventor
Sakyo Hirose
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Priority to JP2009509072A priority Critical patent/JP5012891B2/ja
Publication of WO2008123139A1 publication Critical patent/WO2008123139A1/ja
Priority to US12/567,373 priority patent/US8093682B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
    • H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
    • H01C17/06506—Precursor compositions therefor, e.g. pastes, inks, glass frits
    • H01C17/06513—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component
    • H01C17/06533—Precursor compositions therefor, e.g. pastes, inks, glass frits characterised by the resistive component composed of oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/1006—Thick film varistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/021—Formation of switching materials, e.g. deposition of layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Abstract

　スイッチング電圧が比較的高く、かつ比較的高い抵抗変化率を実現できる、抵抗記憶素子を提供する。 　素体（２）と、素体（２）の少なくとも一部を介して対向する対向電極（３，４）とを備え、素体（２）は、一般式：{（Ｓｒ１－ｘＭｘ）１－ｙＡｙ}（Ｔｉ１－ｚＢｚ）Ｏ３（Ｍは、ＢａおよびＣａの少なくとも一方。Ａは、Ｙおよび希土類元素から選ばれる少なくとも１種の元素。Ｂは、ＮｂおよびＴａの少なくとも一方。）で表され、かつ、０＜ｘ≦０．５のとき、０．００１≦ｙ＋ｚ≦０．０２（ただし、０≦ｙ≦０．０２、０≦ｚ≦０．０２）、０．５＜ｘ≦０．８のとき、０．００３≦ｙ＋ｚ≦０．０２（ただし、０≦ｙ≦０．０２、０≦ｚ≦０．０２）、および０．８＜ｘ≦１．０のとき、０．００５≦ｙ＋ｚ≦０．０１（ただし、０≦ｙ≦０．０２、０≦ｚ≦０．０２）という条件を満たす半導体セラミックからなる。
PCT/JP2008/055272 2007-03-26 2008-03-21 抵抗記憶素子 WO2008123139A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009509072A JP5012891B2 (ja) 2007-03-26 2008-03-21 抵抗記憶素子
US12/567,373 US8093682B2 (en) 2007-03-26 2009-09-25 Resistance memory element

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-078272 2007-03-26
JP2007078272 2007-03-26
JP2007-227549 2007-09-03
JP2007227549 2007-09-03

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/567,373 Continuation US8093682B2 (en) 2007-03-26 2009-09-25 Resistance memory element

Publications (1)

Publication Number Publication Date
WO2008123139A1 true WO2008123139A1 (ja) 2008-10-16

Family

ID=39830636

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/055272 WO2008123139A1 (ja) 2007-03-26 2008-03-21 抵抗記憶素子

Country Status (3)

Country Link
US (1) US8093682B2 (ja)
JP (1) JP5012891B2 (ja)
WO (1) WO2008123139A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8462539B2 (en) 2009-02-20 2013-06-11 Murata Manufacturing Co., Ltd. Resistive memory element and use thereof
US8542520B2 (en) 2009-02-20 2013-09-24 Murata Manufacturing Co., Ltd. Resistive memory element and use thereof
JP2016128927A (ja) * 2016-02-15 2016-07-14 デクセリアルズ株式会社 積層薄膜、及び積層薄膜の製造方法
JP2016224443A (ja) * 2015-05-27 2016-12-28 デクセリアルズ株式会社 積層薄膜、及び積層薄膜の製造方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8866121B2 (en) 2011-07-29 2014-10-21 Sandisk 3D Llc Current-limiting layer and a current-reducing layer in a memory device
US8659001B2 (en) 2011-09-01 2014-02-25 Sandisk 3D Llc Defect gradient to boost nonvolatile memory performance
US8637413B2 (en) 2011-12-02 2014-01-28 Sandisk 3D Llc Nonvolatile resistive memory element with a passivated switching layer
US8698119B2 (en) 2012-01-19 2014-04-15 Sandisk 3D Llc Nonvolatile memory device using a tunnel oxide as a current limiter element
US8686386B2 (en) 2012-02-17 2014-04-01 Sandisk 3D Llc Nonvolatile memory device using a varistor as a current limiter element
JP5877445B2 (ja) * 2012-02-21 2016-03-08 株式会社村田製作所 抵抗スイッチングデバイスおよびその製造方法
KR101639958B1 (ko) * 2012-07-10 2016-07-14 엠파이어 테크놀로지 디벨롭먼트 엘엘씨 소셜 네트워크 한정 오퍼 분배
US20140241031A1 (en) 2013-02-28 2014-08-28 Sandisk 3D Llc Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same

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JP2006019444A (ja) * 2004-06-30 2006-01-19 Sharp Corp 可変抵抗素子の駆動方法及び記憶装置
JP2006196516A (ja) * 2005-01-11 2006-07-27 Sharp Corp 半導体記憶装置の製造方法
JP2006279042A (ja) * 2005-03-28 2006-10-12 Samsung Electronics Co Ltd 抵抗メモリセル、その形成方法及びこれを利用した抵抗メモリ配列
WO2007007606A1 (ja) * 2005-07-11 2007-01-18 Sharp Kabushiki Kaisha 可変抵抗素子
JP2007027537A (ja) * 2005-07-20 2007-02-01 Sharp Corp 可変抵抗素子を備えた半導体記憶装置

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JP2727626B2 (ja) 1989-02-16 1998-03-11 松下電器産業株式会社 セラミックコンデンサ及びその製造方法
JPH0536931A (ja) 1991-07-26 1993-02-12 Olympus Optical Co Ltd メモリ素子及びその製造方法
EP0739019B1 (en) * 1994-10-19 2003-12-03 TDK Corporation Multilayer ceramic chip capacitor
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JP2002050536A (ja) * 2000-07-31 2002-02-15 Murata Mfg Co Ltd 耐還元性誘電体セラミックおよび積層セラミックコンデンサ
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JP4575837B2 (ja) 2005-05-19 2010-11-04 シャープ株式会社 不揮発性記憶素子及びその製造方法
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Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006019444A (ja) * 2004-06-30 2006-01-19 Sharp Corp 可変抵抗素子の駆動方法及び記憶装置
JP2006196516A (ja) * 2005-01-11 2006-07-27 Sharp Corp 半導体記憶装置の製造方法
JP2006279042A (ja) * 2005-03-28 2006-10-12 Samsung Electronics Co Ltd 抵抗メモリセル、その形成方法及びこれを利用した抵抗メモリ配列
WO2007007606A1 (ja) * 2005-07-11 2007-01-18 Sharp Kabushiki Kaisha 可変抵抗素子
JP2007027537A (ja) * 2005-07-20 2007-02-01 Sharp Corp 可変抵抗素子を備えた半導体記憶装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8462539B2 (en) 2009-02-20 2013-06-11 Murata Manufacturing Co., Ltd. Resistive memory element and use thereof
US8542520B2 (en) 2009-02-20 2013-09-24 Murata Manufacturing Co., Ltd. Resistive memory element and use thereof
JP2016224443A (ja) * 2015-05-27 2016-12-28 デクセリアルズ株式会社 積層薄膜、及び積層薄膜の製造方法
US10752808B2 (en) 2015-05-27 2020-08-25 Dexerials Corporation Laminated thin film and method for manufacturing the same
JP2016128927A (ja) * 2016-02-15 2016-07-14 デクセリアルズ株式会社 積層薄膜、及び積層薄膜の製造方法

Also Published As

Publication number Publication date
JP5012891B2 (ja) 2012-08-29
JPWO2008123139A1 (ja) 2010-07-15
US20100001254A1 (en) 2010-01-07
US8093682B2 (en) 2012-01-10

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