WO2008108195A1 - ドライバ回路 - Google Patents

ドライバ回路 Download PDF

Info

Publication number
WO2008108195A1
WO2008108195A1 PCT/JP2008/053149 JP2008053149W WO2008108195A1 WO 2008108195 A1 WO2008108195 A1 WO 2008108195A1 JP 2008053149 W JP2008053149 W JP 2008053149W WO 2008108195 A1 WO2008108195 A1 WO 2008108195A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
driver
output signal
outputs
sub
Prior art date
Application number
PCT/JP2008/053149
Other languages
English (en)
French (fr)
Inventor
Naoki Matsumoto
Takashi Sekino
Takayuki Nakamura
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Publication of WO2008108195A1 publication Critical patent/WO2008108195A1/ja
Priority to US12/584,456 priority Critical patent/US7990177B2/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
    • G01R31/318357—Simulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/12—Shaping pulses by steepening leading or trailing edges
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising
    • H04B3/14—Control of transmission; Equalising characterised by the equalising network used
    • H04B3/143—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers
    • H04B3/144—Control of transmission; Equalising characterised by the equalising network used using amplitude-frequency equalisers fixed equalizers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/40—Artificial lines; Networks simulating a line of certain length
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H04L25/0286—Provision of wave shaping within the driver

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

　入力信号に応じて、伝送損失を受けた信号を模擬した模擬信号を出力するドライバ回路１０において、入力信号が入力され、入力信号と同一波形の信号を出力信号として出力するメインドライバ１８と、入力信号が入力され、入力信号を反転した波形の信号を出力信号として出力するサブドライバ２０と、サブドライバ２０の出力信号が入力され、サブドライバ２０の出力信号の高域を強調した信号を出力信号として出力する高域強調回路２２と、メインドライバ１８の出力信号と高域強調回路２２の出力信号とを加算した模擬信号を出力する加算回路２４とを有している。
PCT/JP2008/053149 2007-03-07 2008-02-25 ドライバ回路 WO2008108195A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/584,456 US7990177B2 (en) 2007-03-07 2009-09-04 Driver circuit for producing signal simulating transmission loss

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007056983A JP2008219718A (ja) 2007-03-07 2007-03-07 ドライバ回路
JP2007-056983 2007-03-07

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/584,456 Continuation US7990177B2 (en) 2007-03-07 2009-09-04 Driver circuit for producing signal simulating transmission loss

Publications (1)

Publication Number Publication Date
WO2008108195A1 true WO2008108195A1 (ja) 2008-09-12

Family

ID=39738088

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/053149 WO2008108195A1 (ja) 2007-03-07 2008-02-25 ドライバ回路

Country Status (5)

Country Link
US (1) US7990177B2 (ja)
JP (1) JP2008219718A (ja)
KR (1) KR20090121305A (ja)
TW (1) TWI399949B (ja)
WO (1) WO2008108195A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012044396A (ja) * 2010-08-18 2012-03-01 Fujitsu Ltd 駆動回路および光送信装置
US11043979B2 (en) 2017-08-08 2021-06-22 Sony Semiconductor Solutions Corporation Transmission device and communication system

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211620A (ja) * 2007-02-27 2008-09-11 Advantest Corp ドライバ回路
US20100158515A1 (en) * 2008-12-19 2010-06-24 Advantest Corporation Transmission system and test apparatus
WO2010095378A1 (ja) * 2009-02-18 2010-08-26 株式会社アドバンテスト 出力装置および試験装置
US8705601B2 (en) * 2010-08-30 2014-04-22 Tektronix, Inc. Apparatus and method for varying inter symbol interference and bandwidth extension pre-emphasis on a high speed digital signal
US9148130B1 (en) * 2012-05-10 2015-09-29 Cadence Design Systems, Inc. System and method for boosting a selective portion of a drive signal for chip-to-chip transmission
JP6036210B2 (ja) * 2012-11-19 2016-11-30 富士通株式会社 エンファシス信号生成回路
JP6340799B2 (ja) * 2014-01-21 2018-06-13 富士通株式会社 エンファシス信号生成回路
US11125817B2 (en) * 2019-10-14 2021-09-21 Analog Devices, Inc. Compound pin driver
US11686773B1 (en) 2022-01-25 2023-06-27 Analog Devices, Inc. Path loss compensation for comparator

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10190747A (ja) * 1996-12-25 1998-07-21 Advantest Corp 信号伝送方式及び伝送線路駆動回路
JP2002544489A (ja) * 1999-05-10 2002-12-24 テラダイン・インコーポレーテッド 伝送路損失補償を備えたドライバ
WO2006129491A1 (ja) * 2005-06-01 2006-12-07 Advantest Corporation ジッタ発生回路
JP2006345532A (ja) * 2005-06-09 2006-12-21 Agilent Technol Inc 信号整形回路
WO2007049674A1 (ja) * 2005-10-28 2007-05-03 Advantest Corporation ドライバ回路、試験装置及び調整方法
WO2007116765A1 (ja) * 2006-03-30 2007-10-18 Advantest Corporation 試験装置および試験方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003309461A (ja) * 2002-04-15 2003-10-31 Nec Electronics Corp 出力バッファ回路
US7664170B2 (en) * 2002-07-22 2010-02-16 Broadcom Corporation Bit stream linear equalizer with AGC loop

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10190747A (ja) * 1996-12-25 1998-07-21 Advantest Corp 信号伝送方式及び伝送線路駆動回路
JP2002544489A (ja) * 1999-05-10 2002-12-24 テラダイン・インコーポレーテッド 伝送路損失補償を備えたドライバ
WO2006129491A1 (ja) * 2005-06-01 2006-12-07 Advantest Corporation ジッタ発生回路
JP2006345532A (ja) * 2005-06-09 2006-12-21 Agilent Technol Inc 信号整形回路
WO2007049674A1 (ja) * 2005-10-28 2007-05-03 Advantest Corporation ドライバ回路、試験装置及び調整方法
WO2007116765A1 (ja) * 2006-03-30 2007-10-18 Advantest Corporation 試験装置および試験方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012044396A (ja) * 2010-08-18 2012-03-01 Fujitsu Ltd 駆動回路および光送信装置
US11043979B2 (en) 2017-08-08 2021-06-22 Sony Semiconductor Solutions Corporation Transmission device and communication system

Also Published As

Publication number Publication date
TW200849906A (en) 2008-12-16
JP2008219718A (ja) 2008-09-18
US7990177B2 (en) 2011-08-02
TWI399949B (zh) 2013-06-21
US20100109788A1 (en) 2010-05-06
KR20090121305A (ko) 2009-11-25

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