WO2008108172A1 - 多層配線基板 - Google Patents
多層配線基板 Download PDFInfo
- Publication number
- WO2008108172A1 WO2008108172A1 PCT/JP2008/052849 JP2008052849W WO2008108172A1 WO 2008108172 A1 WO2008108172 A1 WO 2008108172A1 JP 2008052849 W JP2008052849 W JP 2008052849W WO 2008108172 A1 WO2008108172 A1 WO 2008108172A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- multilayer wiring
- wiring substrate
- conductor pattern
- via hole
- substrate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009502508A JP4905550B2 (ja) | 2007-03-01 | 2008-02-20 | 多層配線基板 |
EP08711655.4A EP2129201B1 (en) | 2007-03-01 | 2008-02-20 | Multilayer wiring substrate |
US12/542,736 US8541694B2 (en) | 2007-03-01 | 2009-08-18 | Multilayer wiring board |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007052114 | 2007-03-01 | ||
JP2007-052114 | 2007-03-01 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/542,736 Continuation US8541694B2 (en) | 2007-03-01 | 2009-08-18 | Multilayer wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008108172A1 true WO2008108172A1 (ja) | 2008-09-12 |
Family
ID=39738069
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/052849 WO2008108172A1 (ja) | 2007-03-01 | 2008-02-20 | 多層配線基板 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8541694B2 (ja) |
EP (1) | EP2129201B1 (ja) |
JP (1) | JP4905550B2 (ja) |
WO (1) | WO2008108172A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104284531A (zh) * | 2013-07-04 | 2015-01-14 | 株式会社村田制作所 | 多层布线基板的制造方法、及具备利用该方法制造出的多层布线基板的探针卡、以及多层布线基板 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101070022B1 (ko) * | 2009-09-16 | 2011-10-04 | 삼성전기주식회사 | 다층 세라믹 회로 기판, 다층 세라믹 회로 기판 제조방법 및 이를 이용한 전자 디바이스 모듈 |
US9635761B2 (en) * | 2013-07-15 | 2017-04-25 | Massachusetts Institute Of Technology | Sleeved coaxial printed circuit board vias |
US10249943B2 (en) | 2014-06-18 | 2019-04-02 | Massachusetts Institute Of Technology | Printed circuit board assembly with foam dielectric material |
US10950929B2 (en) | 2016-07-14 | 2021-03-16 | Massachusetts Institute Of Technology | Foam radiator |
CN113165982B (zh) * | 2018-12-21 | 2022-12-27 | 株式会社村田制作所 | 层叠体和电子部件 |
JP7307161B2 (ja) * | 2019-05-29 | 2023-07-11 | 京セラ株式会社 | 電子素子実装用基板、電子装置、および電子モジュール |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000315864A (ja) | 1999-03-03 | 2000-11-14 | Murata Mfg Co Ltd | セラミック多層基板の製造方法 |
JP2001160681A (ja) * | 1999-12-02 | 2001-06-12 | Murata Mfg Co Ltd | 多層セラミック基板およびその製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4487993A (en) * | 1981-04-01 | 1984-12-11 | General Electric Company | High density electronic circuits having very narrow conductors |
JPS5852900A (ja) * | 1981-09-24 | 1983-03-29 | 株式会社日立製作所 | セラミツク多層配線板の製造方法 |
FR2556503B1 (fr) * | 1983-12-08 | 1986-12-12 | Eurofarad | Substrat d'interconnexion en alumine pour composant electronique |
US4910643A (en) * | 1988-06-06 | 1990-03-20 | General Electric Company | Thick film, multi-layer, ceramic interconnected circuit board |
JP4201436B2 (ja) * | 1999-07-14 | 2008-12-24 | 日東電工株式会社 | 多層配線基板の製造方法 |
TW569424B (en) * | 2000-03-17 | 2004-01-01 | Matsushita Electric Ind Co Ltd | Module with embedded electric elements and the manufacturing method thereof |
JP4696443B2 (ja) * | 2003-09-19 | 2011-06-08 | 株式会社村田製作所 | 多層セラミック基板の製造方法 |
JP4867276B2 (ja) * | 2005-10-14 | 2012-02-01 | 株式会社村田製作所 | セラミック基板の製造方法 |
-
2008
- 2008-02-20 EP EP08711655.4A patent/EP2129201B1/en active Active
- 2008-02-20 JP JP2009502508A patent/JP4905550B2/ja active Active
- 2008-02-20 WO PCT/JP2008/052849 patent/WO2008108172A1/ja active Application Filing
-
2009
- 2009-08-18 US US12/542,736 patent/US8541694B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000315864A (ja) | 1999-03-03 | 2000-11-14 | Murata Mfg Co Ltd | セラミック多層基板の製造方法 |
JP2001160681A (ja) * | 1999-12-02 | 2001-06-12 | Murata Mfg Co Ltd | 多層セラミック基板およびその製造方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP2129201A4 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104284531A (zh) * | 2013-07-04 | 2015-01-14 | 株式会社村田制作所 | 多层布线基板的制造方法、及具备利用该方法制造出的多层布线基板的探针卡、以及多层布线基板 |
US9523709B2 (en) | 2013-07-04 | 2016-12-20 | Murata Manufcaturing Co., Ltd. | Method of manufacturing multilayer wiring board, probe card including multilayer wiring board manufactured by the method, and multilayer wiring board |
Also Published As
Publication number | Publication date |
---|---|
EP2129201A1 (en) | 2009-12-02 |
JPWO2008108172A1 (ja) | 2010-06-10 |
JP4905550B2 (ja) | 2012-03-28 |
EP2129201B1 (en) | 2017-04-12 |
US20090294167A1 (en) | 2009-12-03 |
US8541694B2 (en) | 2013-09-24 |
EP2129201A4 (en) | 2010-12-22 |
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