WO2007105282A1 - Amplificateur a gain variable - Google Patents

Amplificateur a gain variable Download PDF

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Publication number
WO2007105282A1
WO2007105282A1 PCT/JP2006/304796 JP2006304796W WO2007105282A1 WO 2007105282 A1 WO2007105282 A1 WO 2007105282A1 JP 2006304796 W JP2006304796 W JP 2006304796W WO 2007105282 A1 WO2007105282 A1 WO 2007105282A1
Authority
WO
WIPO (PCT)
Prior art keywords
differential
signal
phase
variable gain
amplifier
Prior art date
Application number
PCT/JP2006/304796
Other languages
English (en)
Japanese (ja)
Inventor
Tomoyuki Arai
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2006/304796 priority Critical patent/WO2007105282A1/fr
Priority to JP2008504936A priority patent/JPWO2007105282A1/ja
Publication of WO2007105282A1 publication Critical patent/WO2007105282A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H03F3/45188—Non-folded cascode stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
    • H03G1/0029—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier using FETs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45052—Indexing scheme relating to differential amplifiers the cascode stage of the cascode differential amplifier being controlled by a controlling signal, which controlling signal can also be the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45302—Indexing scheme relating to differential amplifiers the common gate stage of a cascode dif amp being controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45311—Indexing scheme relating to differential amplifiers the common gate stage of a cascode dif amp being implemented by multiple transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45361—Indexing scheme relating to differential amplifiers the AAC comprising multiple transistors parallel coupled at their drains only, e.g. in a cascode dif amp, only those forming the composite common source transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45364—Indexing scheme relating to differential amplifiers the AAC comprising multiple transistors parallel coupled at their gates and sources only, e.g. in a cascode dif amp, only those forming the composite common source transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45366—Indexing scheme relating to differential amplifiers the AAC comprising multiple transistors parallel coupled at their gates only, e.g. in a cascode dif amp, only those forming the composite common source transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45396—Indexing scheme relating to differential amplifiers the AAC comprising one or more switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45544—Indexing scheme relating to differential amplifiers the IC comprising one or more capacitors, e.g. coupling capacitors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45616—Indexing scheme relating to differential amplifiers the IC comprising more than one switch, which are not cross coupled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45638—Indexing scheme relating to differential amplifiers the LC comprising one or more coils
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45726—Indexing scheme relating to differential amplifiers the LC comprising more than one switch, which are not cross coupled

Definitions

  • the present invention relates to an amplifier gain control method, and more particularly to a gain control method of a differential amplifier.
  • FIG. 1 is an explanatory diagram of a conventional example of such a gain control method.
  • an attenuator is provided on the input side of the amplifier, and a method of controlling the input power itself to the amplifier has been taken.
  • the gain control of the amplifier itself as the second method includes a method of controlling the bias voltage of the gate and a method of controlling the substantial gate width by the transistor size, for example, the number of parallel transistors.
  • FIG. 2 is an explanatory diagram of a conventional example of a gain control method based on such transistor size control.
  • a cascode differential amplifier composed of four transistors 10, 11, 12, and 13 is basically arranged in parallel. Then, the positive-phase differential input signal IN is supplied to the gate via the capacitor 19 from the input terminal 7 to which the positive-phase differential input signal is applied.
  • Switches 14 to 14 are provided.
  • the four transistors 13 and 13 are connected to 13 through the capacitor 20 from the input terminal 8 of the negative-phase differential signal INX, and the four transistors 11 are also connected to the gate of 11 the negative-phase differential input signal a d a d
  • the negative-phase differential amplification signal is output from the output terminal 16.
  • the power supply voltage VDD is connected to the output terminals 15 and 16 via loads 17 and 18, respectively.
  • the capacitors 19 and 20 are for operating the differential amplifier with respect to the high frequency input, and are not necessary when the low frequency operation is also performed.
  • Switches 14 to 14 each have four transistors 12 force 12 and transistor aaad
  • the format is
  • FIG. 3 is an explanatory diagram of a gain control method of the amplifier in the conventional example of FIG. In the figure, 14 and 14 of the 4 switches are switched to the opposite side compared to Figure 2.
  • Patent Document 1 as a conventional technique related to gain control of such an amplifier, a plurality of FETs having different threshold voltages are connected in parallel, and a gate bias voltage supplied from an external force is changed to operate an FET that operates.
  • a technique for providing a high-efficiency amplifier by controlling the number is disclosed, it is impossible to solve the problem that the input impedance of the amplifier changes even if such a conventional technique is used. I helped.
  • Patent Document 1 Japanese Patent No. 3235580 “High Efficiency Amplifier”
  • An object of the present invention is to make it possible to control the gain of an amplifier that does not change the input impedance, for example, a differential amplifier.
  • the variable gain amplifier of the present invention corresponds to each of a plurality of differential amplifiers connected in parallel and the plurality of differential amplifiers, and includes a normal phase signal and a negative phase signal in order to change the gain of the entire amplifier.
  • a plurality of signal switching means for switching, and two outputs of each of the plurality of signal switching means are connected to input terminals of a plurality of differential amplifiers, for example, an input terminal of a positive-phase differential input signal and a negative-phase differential input Connected to signal input terminal to differential amplifier This signal gives either a positive-phase differential signal or a negative-phase differential signal as the input signal.
  • variable gain amplifier of the present invention similarly includes a plurality of differential amplifiers and a plurality of signal switching means, and each of the four outputs of the plurality of signal switching means has two force gains.
  • Phase differential signal output terminal and negative phase differential signal output terminal are respectively connected, and the two output terminals are respectively connected to an amplified positive phase differential signal or amplified negative phase difference by a differential amplifier as an input to the signal switching means.
  • FIG. 1 is an explanatory diagram of a conventional example of an amplifier gain control method.
  • FIG. 2 is a circuit diagram of a conventional example of gain control by control of transistor size.
  • FIG. 3 is an explanatory diagram of a gain control method in the conventional example of FIG. 2.
  • FIG. 4A is a principle configuration block diagram of a variable gain amplifier according to the first embodiment.
  • FIG. 4B is a block diagram showing the principle configuration of the variable gain amplifier according to the second embodiment.
  • FIG. 5 is an explanatory diagram of a gain control method in the present invention.
  • FIG. 6 is a circuit diagram of a first embodiment of a variable gain amplifier.
  • FIG. 7 is an explanatory diagram of a gain control method in the circuit of FIG.
  • FIG. 8 is a circuit diagram in the case of including a gain-fixed amplifier in the first embodiment.
  • FIG. 9A is an explanatory diagram of an example (part 1) of a combination of a variable gain amplifier according to the present invention and a single-phase differential signal conversion circuit.
  • FIG. 9B is an explanatory diagram of an example (part 2) of combination of the variable gain amplifier of the present invention and the single-phase differential signal conversion circuit.
  • FIG. 10 is a circuit diagram of a second embodiment of the variable gain amplifier. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 4 is a block diagram showing the principle configuration of the variable gain amplifier according to the present invention.
  • FIG. 6A corresponds to the first embodiment described later, and B corresponds to the second embodiment.
  • A includes a plurality of differential amplifiers 22, 22 ... connected in parallel, and positive-phase differential input signals and negative-phase differential input signals to the amplifiers.
  • Switching means 23, 23, for example, the positive phase input of differential amplifier 22
  • the differential amplifier 22 When a positive phase differential input signal is applied to the terminal and a negative phase differential input signal is applied to the negative phase input terminal, the differential amplifier 22 operates normally.
  • the negative phase differential input signal is input to the positive phase input terminal of the differential amplifier 22 and the negative phase input terminal.
  • the positive-phase differential terminal is connected to the positive-phase input terminal of all the differential amplifiers 22, 22
  • the gain of the amplifier as a whole is / J, compared to the case where a negative-phase differential input signal is applied to the input signal and negative-phase input terminal.
  • Each switching means for example 24, is configured with two 1-input, 2-output switches.
  • each signal can be connected to either the positive phase output terminal or the negative phase output terminal of the entire amplifier. Therefore, for example, the switching means 24 connects the positive phase differential amplified signal output from the differential amplifier 22 to the negative phase output terminal, and a a
  • switching means 24 When connecting the positive-phase differential amplification signal of the corresponding differential amplifier to the positive-phase output terminal and the negative-phase differential amplification signal to the negative-phase output terminal, switching means 24
  • the gain of a is also smaller than when a positive-phase differential amplification signal is connected to the positive-phase output terminal and a negative-phase differential amplification signal is connected to the negative-phase output terminal.
  • FIG. 5 is an explanatory diagram of a gain control method in the present embodiment.
  • gain control is performed by amplifier phase control for controlling the phase of an input signal to the amplifier instead of the input power control and the gain control of the amplifier itself described in the conventional example of FIG.
  • FIG. 6 is a circuit diagram of a first embodiment of the variable gain amplifier of the present invention.
  • Fig. 2 shows the same figure.
  • the transistors 10 to 10 the 11 power 11, and the input terminals 7 and 8 to which the input signal is given to the gate are connected.
  • a positive-phase differential input signal applied to the input terminal 7 and a negative-phase differential input signal applied to the input terminal 8 are respectively connected to one end of each of the switch 27 force, 27, 28 force, and 28.
  • the present invention a d a d
  • the signal switching means in claim 2 of the present invention includes, for example, the switch 27 and the switch.
  • FIG. 7 is an explanatory diagram of the gain control method in the first embodiment of FIG. In the figure, four of the 27 switches 27 out of 27 are only 27, and 28 out of 28 forces 28.
  • a d c a d c is switched in the opposite direction to each of the other three switches, so that transistor 10. , 11, 12, and 13 only, the input is completely out of phase with the other differential amplifiers.
  • switch 27
  • the phases of the input signals to some of the differential amplifiers are reversed, so that As a result, the positive phase differential input signal and the negative phase differential input signal are mixed, and the gain of the entire amplifier is controlled. Since there is no differential amplifier compared to the conventional example in Fig. 2, there is no change in the input impedance of the amplifier as a whole, and matching with the impedance of the previous circuit can be maintained. It is possible to maintain linearity as an amplifier within the gain control range.
  • the gate width of the transistors constituting the differential amplifiers connected in parallel is changed to, for example, 4, 8, 16, 32 m, and the gate length is 0. 24 If it is constant, the force that can output 2 or 16 steps of output.For example, when the positive-phase differential signal or the negative-phase differential signal is input to all four parallel transistors, the absolute value of the gain is the same. The gain is controlled in 8 steps. The operation of the switch itself is completely free in FIG. 6. For example, in the case where both switches 27 and 28 in FIG. 7 give a negative-phase differential input signal to the gates of transistors 10 and 11, respectively, an amplifier is used. Since the overall balance is lost, the corresponding two switches, eg 27 and 28, are switched in conjunction.
  • FIG. 8 is a configuration example of a variable gain amplifier when the gain of one of the four differential amplifiers is constant in the first embodiment.
  • both switches 27 and 28 on the outside in FIG. 6 are removed, and transistors 10, 11, 12, and 13 are used to configure a a a a a a a
  • the gain of the resulting differential amplifier is fixed, and the gain of the entire amplifier is controlled by switching the remaining three switches 27 to 27 and 28 to 28, respectively.
  • a variable gain amplifier for an input single phase signal and a variable gain amplifier for an output single phase signal are configured by combining a variable gain differential amplifier and a single phase differential signal conversion circuit.
  • Figure 9 is a block diagram of the basic configuration.
  • a single-phase-to-differential signal conversion circuit 31 is connected in front of the variable gain differential amplifier 30, and an amplified differential signal with variable gain can be output with respect to the input of the single phase signal.
  • the differential single-phase signal conversion circuit 32 is connected to the subsequent stage of the variable gain differential amplifier 30, and a single-phase signal with variable gain can be output with respect to the input differential signal.
  • the configuration of the single-phase differential signal conversion circuit is well known, and detailed description thereof is omitted.
  • FIG. 10 is a circuit diagram of a second embodiment of the variable gain amplifier.
  • a switch for switching between a positive-phase differential signal and a negative-phase differential signal is provided on the output end side of each differential amplifier.
  • the signal switching means in claim 3 corresponds to a combination of the switch 35 and the switch 36, for example.
  • the embodiment has been described by taking the cascode type as an example of the differential amplifier.
  • a pair of a positive phase differential input and a negative phase differential input are provided.
  • a single differential amplifier based on these transistors.
  • the switching switch described in the above embodiments can be realized by using a known technique such as an SPDT (single pole double 'slow) switch composed of four transistors. Detailed explanation is omitted.
  • switching between a positive phase differential signal and a negative phase differential signal is performed on the input side or output side of a plurality of variable amplifiers connected in parallel. This makes it possible to control the gain of the amplifier without changing the input impedance of the amplifier, which greatly contributes to improving the practicality of the variable gain amplifier.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

Selon l'invention, le gain d'un amplificateur, par exemple d'un amplificateur différentiel, est régulé sans variation de l'impédance d'entrée. Un amplificateur à gain variable comprend une pluralité d'amplificateurs différentiels reliés en parallèle et une pluralité de moyens de commutation de signal correspondant respectivement aux amplificateurs différentiels afin de commuter un signal différentiel de phase positive et un signal différentiel de phase négative. Deux sorties provenant de chaque moyen de commutation de signal sont reliées à la borne d'entrée de phase positive et à la borne d'entrée de phase négative de chaque amplificateur différentiel et, soit le signal différentiel de phase positive, soit le signal différentiel de phase négative est fourni en tant que signal d'entrée.
PCT/JP2006/304796 2006-03-10 2006-03-10 Amplificateur a gain variable WO2007105282A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2006/304796 WO2007105282A1 (fr) 2006-03-10 2006-03-10 Amplificateur a gain variable
JP2008504936A JPWO2007105282A1 (ja) 2006-03-10 2006-03-10 ゲイン可変増幅器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/304796 WO2007105282A1 (fr) 2006-03-10 2006-03-10 Amplificateur a gain variable

Publications (1)

Publication Number Publication Date
WO2007105282A1 true WO2007105282A1 (fr) 2007-09-20

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WO (1) WO2007105282A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009089225A (ja) * 2007-10-02 2009-04-23 Toshiba Corp 利得可変増幅装置
WO2010082235A1 (fr) * 2009-01-13 2010-07-22 パナソニック株式会社 Amplificateur à gain variable et appareil de réception de signal haute fréquence le comprenant
JP2012527191A (ja) * 2009-05-13 2012-11-01 クゥアルコム・インコーポレイテッド 切り替え可能な入力ペア演算増幅器
JP2013048467A (ja) * 2008-03-21 2013-03-07 Qualcomm Inc 段階的利得ミキサ
JP2015050740A (ja) * 2013-09-04 2015-03-16 三菱電機株式会社 可変利得増幅器
US10693231B2 (en) 2017-09-11 2020-06-23 Qualcomm Incorporated Transmit/receive switching circuit
EP3823163A1 (fr) * 2019-11-12 2021-05-19 Imec VZW Amplificateur à gain variable et à commande numérique
EP3826177A4 (fr) * 2018-08-10 2021-08-04 Mitsubishi Electric Corporation Amplificateur à gain variable
EP4258548A4 (fr) * 2020-12-30 2024-02-21 Huawei Tech Co Ltd Amplificateur opérationnel, circuit d'attaque, puce d'interface et dispositif électronique

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6264109A (ja) * 1985-09-17 1987-03-23 Toshiba Corp 利得制御増幅器
JPH06197035A (ja) * 1992-12-24 1994-07-15 Alps Electric Co Ltd 利得切換回路
JPH11177357A (ja) * 1997-12-10 1999-07-02 Fujitsu Ltd 利得可変増幅回路
JPH11317635A (ja) * 1997-10-16 1999-11-16 Toshiba Corp 可変利得増幅器およびアナログマルチプレクサ
JP2005026760A (ja) * 2003-06-30 2005-01-27 Fujitsu Ltd タイミング信号発生回路および信号受信回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3425426B2 (ja) * 2000-01-31 2003-07-14 松下電器産業株式会社 トランスコンダクタおよびフィルタ回路

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6264109A (ja) * 1985-09-17 1987-03-23 Toshiba Corp 利得制御増幅器
JPH06197035A (ja) * 1992-12-24 1994-07-15 Alps Electric Co Ltd 利得切換回路
JPH11317635A (ja) * 1997-10-16 1999-11-16 Toshiba Corp 可変利得増幅器およびアナログマルチプレクサ
JPH11177357A (ja) * 1997-12-10 1999-07-02 Fujitsu Ltd 利得可変増幅回路
JP2005026760A (ja) * 2003-06-30 2005-01-27 Fujitsu Ltd タイミング信号発生回路および信号受信回路

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009089225A (ja) * 2007-10-02 2009-04-23 Toshiba Corp 利得可変増幅装置
JP2013048467A (ja) * 2008-03-21 2013-03-07 Qualcomm Inc 段階的利得ミキサ
WO2010082235A1 (fr) * 2009-01-13 2010-07-22 パナソニック株式会社 Amplificateur à gain variable et appareil de réception de signal haute fréquence le comprenant
US8081033B2 (en) 2009-01-13 2011-12-20 Panasonic Corporation Variable gain amplifier and high-frequency signal receiving apparatus comprising the same
JP5296809B2 (ja) * 2009-01-13 2013-09-25 パナソニック株式会社 可変利得増幅器およびそれを備えた高周波信号受信装置
JP2012527191A (ja) * 2009-05-13 2012-11-01 クゥアルコム・インコーポレイテッド 切り替え可能な入力ペア演算増幅器
JP2015050740A (ja) * 2013-09-04 2015-03-16 三菱電機株式会社 可変利得増幅器
US10693231B2 (en) 2017-09-11 2020-06-23 Qualcomm Incorporated Transmit/receive switching circuit
US10910714B2 (en) 2017-09-11 2021-02-02 Qualcomm Incorporated Configurable power combiner and splitter
EP3826177A4 (fr) * 2018-08-10 2021-08-04 Mitsubishi Electric Corporation Amplificateur à gain variable
EP3823163A1 (fr) * 2019-11-12 2021-05-19 Imec VZW Amplificateur à gain variable et à commande numérique
US11621685B2 (en) 2019-11-12 2023-04-04 Imec Vzw Digitally controlled variable gain amplifier
EP4258548A4 (fr) * 2020-12-30 2024-02-21 Huawei Tech Co Ltd Amplificateur opérationnel, circuit d'attaque, puce d'interface et dispositif électronique

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