WO2007099902A1 - Ecran plat - Google Patents

Ecran plat Download PDF

Info

Publication number
WO2007099902A1
WO2007099902A1 PCT/JP2007/053505 JP2007053505W WO2007099902A1 WO 2007099902 A1 WO2007099902 A1 WO 2007099902A1 JP 2007053505 W JP2007053505 W JP 2007053505W WO 2007099902 A1 WO2007099902 A1 WO 2007099902A1
Authority
WO
WIPO (PCT)
Prior art keywords
sealing member
display device
glass
flat display
substrate
Prior art date
Application number
PCT/JP2007/053505
Other languages
English (en)
Japanese (ja)
Inventor
Koji Akiyama
Masaki Nishinaka
Akinobu Miyazaki
Original Assignee
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co., Ltd. filed Critical Matsushita Electric Industrial Co., Ltd.
Priority to EP07714937A priority Critical patent/EP1990822A4/fr
Priority to JP2008502762A priority patent/JP4508282B2/ja
Priority to CN2007800008459A priority patent/CN101341569B/zh
Publication of WO2007099902A1 publication Critical patent/WO2007099902A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J17/00—Gas-filled discharge tubes with solid cathode
    • H01J17/02—Details
    • H01J17/18—Seals between parts of vessels; Seals for leading-in conductors; Leading-in conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J17/00—Gas-filled discharge tubes with solid cathode
    • H01J17/02—Details
    • H01J17/18—Seals between parts of vessels; Seals for leading-in conductors; Leading-in conductors
    • H01J17/183—Seals between parts of vessel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J11/00—Gas-filled discharge tubes with alternating current induction of the discharge, e.g. alternating current plasma display panels [AC-PDP]; Gas-filled discharge tubes without any main electrode inside the vessel; Gas-filled discharge tubes with at least one main electrode outside the vessel
    • H01J11/20—Constructional details
    • H01J11/48—Sealing, e.g. seals specially adapted for leading-in conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
    • H01J29/86—Vessels; Containers; Vacuum locks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J31/00—Cathode ray tubes; Electron beam tubes
    • H01J31/08—Cathode ray tubes; Electron beam tubes having a screen on or from which an image or pattern is formed, picked up, converted, or stored
    • H01J31/10—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes
    • H01J31/12—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes with luminescent screen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J31/00—Cathode ray tubes; Electron beam tubes
    • H01J31/08—Cathode ray tubes; Electron beam tubes having a screen on or from which an image or pattern is formed, picked up, converted, or stored
    • H01J31/10—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes
    • H01J31/12—Image or pattern display tubes, i.e. having electrical input and optical output; Flying-spot tubes for scanning purposes with luminescent screen
    • H01J31/123—Flat display tubes
    • H01J31/125—Flat display tubes provided with control means permitting the electron beam to reach selected parts of the screen, e.g. digital selection
    • H01J31/127—Flat display tubes provided with control means permitting the electron beam to reach selected parts of the screen, e.g. digital selection using large area or array sources, i.e. essentially a source for each pixel group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J5/00—Details relating to vessels or to leading-in conductors common to two or more basic types of discharge tubes or lamps
    • H01J5/20—Seals between parts of vessels

Definitions

  • the present invention relates to a flat panel display represented by a field emission display (hereinafter abbreviated as “FED”) and a plasma display panel (hereinafter abbreviated as “PDP”).
  • FED field emission display
  • PDP plasma display panel
  • Frit glass is used as a material for bonding inorganic materials such as glass, ceramics, and metals.
  • inorganic materials such as glass, ceramics, and metals.
  • the inside of the panel is kept at a reduced pressure or high vacuum, so a strong adhesion strength is required for the frit glass as a sealing member. Is done.
  • the frit glass seals the periphery of the panel and plays a role in preventing outside air from entering the panel. If the adhesion strength of the frit glass is weak, cracks may occur at the interface between the frit glass and the glass substrate due to vibration or drop impact during transportation, and air may enter the panel and part of the panel may not light up. If it is terrible, it may not light up at all. In the case of FED with a high vacuum inside the panel, the latter is often the case.
  • the PDP is composed of a front substrate and a rear substrate.
  • the front substrate covers a display electrode composed of a glass substrate of sodium borosilicate glass by a float process, a striped transparent electrode formed on one main surface of the glass substrate, and a bus electrode.
  • the dielectric layer functions as a capacitor, and a protective layer made of magnesium oxide (MgO) formed on the dielectric layer.
  • the back substrate is also a glass substrate, a striped data electrode formed on one main surface of the glass substrate, an insulator layer covering the data electrode, a plurality of insulating layers formed on the insulator layer, and
  • the barrier ribs divide the discharge space so as to form discharge cells, and the phosphor layers that emit light in red, green, and blue colors formed between the barrier ribs.
  • the front substrate and the rear substrate face each other with their electrode formation surfaces facing each other and hermetically seal the periphery with a sealing member, and also discharge Ne—Xe discharge gas into the discharge space partitioned by the barrier ribs.
  • a sealing member By sealing with a pressure of 53 kPa to 80 kPa (400 Torr to 600 Torr), the panel It is configured.
  • a video signal voltage is selectively applied to a display electrode to cause discharge, and ultraviolet rays generated by the discharge excite the phosphor layers of the respective colors to cause red, green, Color image display is realized by emitting blue light.
  • Low melting point glass is mainly used for the members constituting this PDP, and these members are formed by repeating printing and firing processes. Since this is a manufacturing process by repeated printing and firing, the softer point of the low-melting glass used is the one that is formed earlier as the member is formed in a later step. It is adjusted to be lower. Thus, when forming a plurality of low melting glass members in order, it is necessary to adjust the softening point in a wide temperature range, and lead glass has been used in many PDPs because it is easy.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2004-238273
  • the flat display device of the present invention has a pair of glass substrates that contain silicon as a component and are arranged to face each other with a gap between them, and a sealing member that is arranged at the periphery of the glass substrate.
  • the sealing member is made of a material containing bismuth as a component, and an intermediate layer made of a material having a lower silicon content than the glass substrate is provided on the bonding surface between the glass substrate and the sealing member.
  • FIG. 1 is a perspective view showing the structure of a PDP as a flat display device according to Embodiment 1 of the present invention.
  • FIG. 2 is a perspective view showing an appearance of a PDP as a flat display device in Embodiment 1 of the present invention.
  • FIG. 3 is a cross-sectional view showing the main structure of a PDP as a flat display device in Embodiment 1 of the present invention.
  • FIG. 4 is a cross-sectional view showing a main part structure of a PDP as a flat display device according to Embodiment 2 of the present invention.
  • FIG. 5 is a cross-sectional view showing the main structure of a PDP as a flat display device in Embodiment 3 of the present invention.
  • FIG. 6 is a cross-sectional view showing the main structure of a PDP as a flat display device in Embodiment 4 of the present invention.
  • FIG. 7 is a cross-sectional view showing the main structure of a PDP in another example as a flat display device according to Embodiment 4 of the present invention.
  • FIG. 8 is a cross-sectional view showing the main structure of a PDP of another example as a flat display device according to Embodiment 4 of the present invention.
  • FIG. 9 is a perspective view showing the appearance of a display device using electron-emitting devices as a flat display device in Embodiment 5 of the present invention.
  • FIG. 10 is a cross-sectional view showing a main part structure of a display device using an electron-emitting device as a flat display device in a fifth embodiment of the present invention.
  • FIG. 1 is a perspective view showing the structure of the PDP
  • FIG. 2 is a perspective view showing the appearance of the PDP.
  • FIG. 3 is a cross-sectional view showing the main structure of the PDP cut along line 3-3 in FIG.
  • the PDP is configured by arranging a pair of front substrate 1 and rear substrate 2 made of glass to face each other with a gap so as to form a discharge space 93 therebetween.
  • the front substrate 1 includes a scan electrode 5 and a sustain electrode that constitute display electrodes on the glass substrate 4.
  • a plurality of pairs 6 are formed in parallel with each other. These scanning electrode 5 and sustaining electrode 6 are usually energized with a transparent conductive film such as ITO Nessa (SnO) and the transparent conductive film.
  • a transparent conductive film such as ITO Nessa (SnO) and the transparent conductive film.
  • a dielectric layer 7 is formed over almost the entire surface of the glass substrate 4 so as to cover the scan electrodes 5 and the sustain electrodes 6, and a protective layer 98 is formed on the dielectric layer 7. .
  • the dielectric layer 7 has a thickness of 30 ⁇ m to 50 ⁇ m
  • the protective layer 98 has a thickness of 0.5 ⁇ m to 2 ⁇ m.
  • a paste containing a dielectric glass powder is applied by a printing method and baked.
  • the materials used include bismuth-based materials (Bi_Zn_B_Si_O-based), zinc boric acid-based materials (Zn_B_Si-0), and lead-based materials (Pb-B-Si-O).
  • the protective layer 98 is for protecting the dielectric layer 7 from damage due to electric discharge, and is composed of a polycrystalline MgO (magnesium oxide) film having excellent sputter resistance.
  • the film is formed by a general thin film formation method such as an electron beam evaporation method, a CVD method, or a sputtering method.
  • a black light shielding layer 9 is formed between the display electrodes composed of the scanning electrodes 5 and the sustain electrodes 6.
  • the back substrate 2 is provided with a plurality of data electrodes 12 covered with an insulating layer 11 on a glass substrate 90.
  • a grid-like or stripe-like partition wall 13 is provided to partition the discharge space 93 so that a plurality of discharge cells are formed.
  • the thickness of the insulator layer 11 is 5111 to 20111.
  • the insulator layer 11 is formed by the same material and the same process as the dielectric layer 7 on the front substrate 1 side.
  • phosphor layers 14 of three colors (red, green, and blue) for color display are formed between the barrier ribs 13 on the surface of the insulating layer 11 and the side surfaces of the barrier ribs 13.
  • the discharge electrodes 93 and the data electrodes 12 are disposed to face each other so that the stray electrodes 5 and the sustain electrodes 6 and the data electrodes 12 are orthogonal to each other. Then, the discharge space 93 is sealed by the sealing member 16 formed in the peripheral portion 15 of the front substrate 1 and the rear substrate 2, and a mixed gas of, for example, neon (Ne) and xenon (Xe) is released as the discharge gas. It is enclosed in electrical space 93. In this way, the PDP is configured.
  • the discharge space 93 is sealed by the sealing member 16 as follows. First, bismuth
  • a paste is prepared by kneading glass frit powder containing (Bi) as a main component, resin and solvent. This paste is applied to the peripheral portion 15 of the back substrate 2 or the front substrate 1 by screen printing or injection. Then, after heating to such an extent that the resin component can be removed, the front substrate 1 and the back substrate 2 are overlapped and heated to a temperature at which the glass powder softens and bonded.
  • the resin used in the paste for forming the sealing member 16 is acrylic resin, ethyl cellulose, nitrocellulose, or the like, and isoamyl acetate, terpineol, or the like is used as the solvent.
  • the Bi content in the Bi-containing sealing member 16 is 50 to 80 wtt because of the limitation of the process that the previously formed member is not affected as described above. It is desirable to set to / o .
  • the sealing member 16 also contains silicon (Si) and oxygen (O) in order to maintain the properties of the glass.
  • boron (B), zinc (Zn), Elements such as aluminum (A1) are mixed as appropriate.
  • glass or ceramics having a high soft spot composed of an Al—Si—MgO-based material called a filler within a range of 5 to 20 wt% by weight is used. Powder is also mixed.
  • the glass substrate 4, 90 of the front substrate 1 and the back substrate 2 and the bonding surface between the sealing member 16 are made of silicon from the glass substrate 4, 90.
  • An intermediate layer made of a material with low content is provided. That is, as shown in FIG. 3, on the bonding surface between the glass substrate 4 and the sealing member 16 of the front substrate 1, a dielectric layer 7 made of low-melting glass as an intermediate layer and a protective layer 98 made of crystalline oxide film force. And exist.
  • an insulating layer 11 made of low-melting glass exists as an intermediate layer on the bonding surface between the glass substrate 90 and the sealing member 16 of the back substrate 2. That is, the intermediate layer is formed on the entire surface of the glass substrates 4 and 90.
  • the present inventors produced a PDP according to Embodiment 1 of the present invention having the above-described configuration and a comparative PDP in which the sealing member 16 is in direct contact with the glass substrates 4 and 90. Then, after packing these PDPs, a drop impact test was conducted to drop them and cover the impact. The number of test samples was 30 or more in each PDP. As a result of this drop impact test, the PDP in Embodiment 1 of the present invention showed no abnormality in the sealing member 16. However, some comparative PDPs had cracks at the interface between the sealing member 16 and the glass substrates 4 and 90.
  • the inventors of the present invention used the sealing member 16 and the glass substrate 4 for the PDP in Embodiment 1 of the present invention and the comparative PDP.
  • the cross section near the interface with 90 was observed with a transmission electron microscope (TEM).
  • the inventors analyzed the composition in the sealing member 16 by an energy dispersive X-ray spectroscopy (EDS) method.
  • EDS energy dispersive X-ray spectroscopy
  • Si does not diffuse into the sealing member 16 at the interface between the sealing member 16 and the protective layer 98, and the PDP insulates from the sealing member 16 At the interface with the body layer 11, it was reduced to about lOnm.
  • Si contained in the glass substrates 4 and 90 in the sealing member 16 is in the region from the interface between both the glass substrates 4 and 90 and the sealing member 16 to lOOnm. It was found that it diffused inward.
  • This factor is considered to be the reason why the strength of the sealing member 16 is reduced in the comparative PDP as follows. That is, when the diffusion of Si into the sealing member 16 containing Bi increases, the hardness of the sealing member 16 tends to increase. Therefore, in the comparative PDP in which the Si content near the interface is large, it is assumed that the sealing member 16 near the interface becomes hard and brittle. That is, in order to increase the reliability of the sealing member 16 containing Bi, it is important to prevent the diffusion of Si into the sealing member 16.
  • the protective layer 98 serving as an intermediate layer having a low Si content may be added with Si as a dopant in order to control the electron emission characteristics of MgO. Although there is at most 1% or less. Therefore, since the protective layer 98 is a layer having a low Si content, Si does not diffuse from the protective layer 98 into the sealing member 16. Similarly, since the insulator layer 11 is a glass material, it contains Si, but the Si content is usually a glass substrate whose main component is Si (usually within a range of 20 to 30 wt%). Since the content is less than half of 4, 90, it is considered that the diffusion into the sealing member 16 is small.
  • the insulator layer 11 has a thickness of 5 to 20 xm
  • the protective layer 98 has a thickness of 0.5 ⁇ m to 2 ⁇ m. I think it was hot.
  • the material constituting the PDP is diverted as an intermediate layer that prevents Si from diffusing into the bonding interface between the sealing member 16 and the glass substrates 4 and 90, and the process of providing a separate intermediate layer is included. It is possible to realize the simplification of the manufacturing process without need.
  • an intermediate layer made of a material having a lower silicon content than the glass substrates 4 and 90 may be separately provided on the joint surface between the glass substrates 4 and 90 and the sealing member 16. From the above analysis results, the thickness needs to be 0.1 lxm (100 nm) or more.
  • FIG. 4 is a cross-sectional view showing the main structure of the PDP as the flat display device according to Embodiment 2 of the present invention.
  • the PDP in the second embodiment is different from the PDP in the first embodiment in that the protective layer 98 is not formed in the peripheral portion 15 where the sealing member 16 is formed, as shown in FIG.
  • the dielectric layer 7 is present as an intermediate layer on the bonding surface between the glass substrate 4 and the sealing member 16 of the front substrate 1, and the bonding surface between the glass substrate 90 and the sealing member 16 on the rear substrate 2 is present. Is a structure in which the insulator layer 11 exists as an intermediate layer.
  • the force for examining the diffusion state of Si into the sealing member 16 at both interfaces between the sealing member 16 and the dielectric layer 7 and the insulator layer 11 is 10 nm or less. Met.
  • the dielectric layer 7 since it is a glass material, the force of containing Si, the content of Si is usually less than half the content of a glass substrate containing Si as a main component, so It seems that there was little diffusion. As shown in FIG.
  • the dielectric layer 7 and the insulating layer 11 may be formed in multiple layers having different material compositions, in which case the sealing member The closer to 16, the more effective it is to reduce the Si content. With such a configuration, it is possible to further provide a flat display device with high sealing portion strength and excellent reliability.
  • FIG. 5 is a cross-sectional view showing a main structure of a PDP as a flat display device according to Embodiment 3 of the present invention.
  • the PDP in the third embodiment is different from the PDP in the first embodiment in that the protective layer 98 and the insulator layer 11 are not formed in the peripheral portion 15 where the sealing member 16 is formed, as shown in FIG. It is.
  • the dielectric layer 7 is present as an intermediate layer on the joint surface between the glass substrate 4 and the sealing member 16 of the front substrate 1. That is, the intermediate layer is formed on at least one of the two joint surfaces of the glass substrates 4 and 90 with the sealing member 16.
  • Embodiment 3 of the present invention was also inferior to the panel in Embodiment 1 as a result of a drop strength test similar to that in Embodiment 1.
  • the results corresponded to a situation where defects occurred at a rate of about 1 or 2 units per 10,000 units in the actual transportation test, and there was no problem in practical use.
  • FIG. 6 is a cross-sectional view showing the main structure of the PDP as the flat display device in the fourth embodiment of the present invention.
  • the difference between the PDP in the fourth embodiment and the PDP in the first embodiment is that 50% of the area where the sealing member 16 is formed on the glass substrates 4 and 90 in the peripheral portion 15 where the sealing member 16 is formed.
  • the dielectric layer 7, the insulator layer 11, and the sealing member 16 are formed so that the dielectric layer 7 and the insulator layer 11 as intermediate layers exist.
  • FIG. 7 is a cross-sectional view showing the main structure of a PDP of another example as a flat display device in Embodiment 4 of the present invention.
  • FIG. 8 is a cross-sectional view showing the main structure of another example of the PDP cut along line 8-8 in FIG. It should be noted that the stray electrode 5, the sustain electrode 6, and the light shielding layer 9 The illustration is omitted.
  • another example of the PDP is characterized in that the peripheral portion 15 that forms the sealing member 16 has an area 50 where the sealing member 16 on the glass substrate 4 is formed.
  • the dielectric layer 7 and the sealing member 16 are formed so that the dielectric layer 7 as an intermediate layer exists in an amount of at least%.
  • the protective layer 98 as an intermediate layer is also formed in the region where the sealing member 16 on the glass substrate 4 is formed.
  • the characteristics of the PDP in another example are as follows. That is, the dielectric layer 7, the insulator layer 11, and the sealing member 16 are formed so that the dielectric layer 7 and the insulator layer 11 as intermediate layers exist in 50% or more. Further, the protective layer 98 as an intermediate layer is also formed in the region where the sealing member 16 on the glass substrate 4 is formed.
  • the dielectric layer 7, the insulating layer 11, and the sealing member 16 formed between the glass substrates 4 and 90 have adhesion strength of a level that is not problematic. I understood that That is, as a result of the same drop strength test as in the first embodiment, a practically satisfactory adhesion strength was obtained in an actual transport test.
  • FIG. 9 is a perspective view showing the appearance of a display device using electron-emitting devices.
  • FIG. 10 is a cross-sectional view showing the main structure of the display device using the electron-emitting device cut along line 10-10 in FIG.
  • a front substrate 21 and a rear substrate 22 made of glass are arranged to face each other so as to form a vacuum space 23 therebetween. It is made up of things.
  • the front substrate 21 is formed on the glass substrate 24 with ITO Nessa (SnO).
  • the anode electrode 25 and the phosphor layer 26 made of a transparent conductive film such as 2 are sequentially laminated.
  • the back substrate 22 is provided with a cathode electrode 28 made of a metal thin film on a glass substrate 27.
  • An electron-emitting device array 29 (in this case, an example using a Spindt type cold cathode) is formed thereon.
  • These front substrate 21 and rear substrate 22 are disposed opposite to each other and bonded together by a sealing portion 31 formed in the peripheral portion 30 of the panel. It is.
  • the sealing portion 31 is provided with a frame 32 made of a glass base material having the same characteristics as the glass substrate in order to secure the distance (up to several mm) between the front substrate 21 and the rear substrate 22. Between the glass substrates 24 and 27, a sealing member 33 containing Bi is formed.
  • At least the thickness between the glass substrates 24 and 27 and the sealing member 33 is made of a low melting point glass having a lower Si content than the glass substrates 24 and 27.
  • An intermediate layer 34 of 0.1 ⁇ m or more is formed.
  • a display device using an electron-emitting device without the intermediate layer 34 as shown in FIG. 9 was produced. Then, a drop strength test similar to that of Embodiment 1 was performed, and in the comparative example, a leak occurred due to a crack entering the interface portion between the sealing member 33 and the glass substrate 24 or the glass substrate 27. . However, the display device using the electron-emitting device as the flat display device according to the fifth embodiment of the present invention did not leak.
  • cold cathode system and the structure of the display device are not limited to those described above, and may include a dull electrode.
  • the flat display device of the present invention can provide a flat display device with high reliability with a strong sealing portion.
  • the present invention is useful for improving the reliability of a flat display device.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Gas-Filled Discharge Tubes (AREA)
  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)

Abstract

La présente invention concerne un écran plat comprenant deux substrats en verre disposés l'un face à l'autre avec un espace intermédiaire et contenant du silicium, et un élément de scellement disposé dans les parties périphériques des deux substrats en verre. L'élément de scellement se compose d'un matériau contenant du bismuth et une couche de protection ou une couche d'isolation, qui sert de couche intermédiaire et qui se compose d'un matériau dont la teneur en silicium est inférieure à celle des substrats en verre, est disposée au niveau d'une interface de joint entre les substrats et l'élément de scellement. On peut ainsi obtenir un écran plat doté d'une résistance élevée au niveau de la partie jointe et d'une excellente fiabilité.
PCT/JP2007/053505 2006-02-28 2007-02-26 Ecran plat WO2007099902A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP07714937A EP1990822A4 (fr) 2006-02-28 2007-02-26 Ecran plat
JP2008502762A JP4508282B2 (ja) 2006-02-28 2007-02-26 プラズマディスプレイパネル
CN2007800008459A CN101341569B (zh) 2006-02-28 2007-02-26 平面型显示装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006051733 2006-02-28
JP2006-051733 2006-02-28

Publications (1)

Publication Number Publication Date
WO2007099902A1 true WO2007099902A1 (fr) 2007-09-07

Family

ID=38459009

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/053505 WO2007099902A1 (fr) 2006-02-28 2007-02-26 Ecran plat

Country Status (5)

Country Link
EP (1) EP1990822A4 (fr)
JP (1) JP4508282B2 (fr)
KR (1) KR100947142B1 (fr)
CN (1) CN101341569B (fr)
WO (1) WO2007099902A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2120251A1 (fr) * 2008-03-10 2009-11-18 Panasonic Corporation Écran à plasma

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004238273A (ja) 2002-03-29 2004-08-26 Matsushita Electric Ind Co Ltd ビスマス系ガラス組成物、ならびにそれを封着部材として用いた磁気ヘッドおよびプラズマディスプレイパネル
JP2005174856A (ja) * 2003-12-15 2005-06-30 Toshiba Corp シール材、およびシール材を用いた画像表示装置
JP2005314136A (ja) * 2004-04-27 2005-11-10 Matsushita Electric Ind Co Ltd 気密封止用封着材料およびガラスペースト組成物

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3547461B2 (ja) * 1993-08-24 2004-07-28 富士通株式会社 プラズマディスプレイパネル及びその製造方法
JP4557314B2 (ja) * 1996-02-15 2010-10-06 旭硝子株式会社 封着用組成物および封着用低融点ガラス
JPH10283936A (ja) * 1997-03-31 1998-10-23 Mitsubishi Electric Corp 気体放電表示装置
JPH10275563A (ja) * 1997-03-31 1998-10-13 Mitsubishi Electric Corp プラズマディスプレイパネル
JPH1140064A (ja) * 1997-07-25 1999-02-12 Hitachi Ltd ガス放電型表示パネルおよびそれを用いた表示装置
US6255239B1 (en) * 1998-12-04 2001-07-03 Cerdec Corporation Lead-free alkali metal-free glass compositions
JP2001189136A (ja) * 1999-10-19 2001-07-10 Matsushita Electric Ind Co Ltd プラズマディスプレイ表示装置とその製造方法
JP2003128434A (ja) * 2001-10-19 2003-05-08 Matsushita Electric Ind Co Ltd プラズマディスプレイパネルおよびその製造方法ならびにガラス組成物
JP2004284934A (ja) * 2002-04-24 2004-10-14 Central Glass Co Ltd 無鉛低融点ガラス
CN1180999C (zh) * 2002-09-26 2004-12-22 北京亚康特种玻璃有限责任公司 一种电子元件封接玻璃
US7102287B2 (en) * 2002-11-18 2006-09-05 Matsushita Electric Industrial Co., Ltd. Plasma display panel and manufacturing method therefor
JP4737709B2 (ja) * 2004-03-22 2011-08-03 日本電気硝子株式会社 ディスプレイ基板用ガラスの製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004238273A (ja) 2002-03-29 2004-08-26 Matsushita Electric Ind Co Ltd ビスマス系ガラス組成物、ならびにそれを封着部材として用いた磁気ヘッドおよびプラズマディスプレイパネル
JP2005174856A (ja) * 2003-12-15 2005-06-30 Toshiba Corp シール材、およびシール材を用いた画像表示装置
JP2005314136A (ja) * 2004-04-27 2005-11-10 Matsushita Electric Ind Co Ltd 気密封止用封着材料およびガラスペースト組成物

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1990822A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2120251A1 (fr) * 2008-03-10 2009-11-18 Panasonic Corporation Écran à plasma
EP2120251A4 (fr) * 2008-03-10 2010-05-05 Panasonic Corp Écran à plasma

Also Published As

Publication number Publication date
CN101341569B (zh) 2010-04-14
CN101341569A (zh) 2009-01-07
KR20080077155A (ko) 2008-08-21
EP1990822A4 (fr) 2010-03-03
KR100947142B1 (ko) 2010-03-12
EP1990822A1 (fr) 2008-11-12
JP4508282B2 (ja) 2010-07-21
JPWO2007099902A1 (ja) 2009-07-16

Similar Documents

Publication Publication Date Title
US7911142B2 (en) Electron emission thin-film, plasma display panel and methods for manufacturing
KR100254479B1 (ko) 플라즈마 디스플레이판넬 및 그 제조방법
EP1933355B1 (fr) Panneau d'affichage a plasma
US20090066215A1 (en) Plasma display panel and manufacturing method therefor
US7583026B2 (en) Plasma display panel having a protective layer preventing an increase in firing voltage
JP2008251318A (ja) プラズマディスプレイパネル
US8072142B2 (en) Plasma display panel with improved light transmittance
US7385351B2 (en) Plasma display panel having a sealing layer and method of fabricating the same
WO2007040121A1 (fr) Afficheur a plasma
JP2003022755A (ja) プラズマディスプレイパネル用基板、その製造方法、その保護膜成膜装置、およびプラズマディスプレイパネル
WO2007099902A1 (fr) Ecran plat
KR100878935B1 (ko) 플라즈마 디스플레이 패널
JP3442059B2 (ja) 電子放出性薄膜およびこれを用いたプラズマディスプレイパネルならびにこれらの製造方法
JP2007109479A (ja) プラズマディスプレイパネル
JPH09199037A (ja) Ａｃ型プラズマディスプレイパネル
US20100181908A1 (en) Flat display
JP2004214049A (ja) ガス放電パネルおよびその製造方法
EP2037480A1 (fr) Panneau d'affichage à plasma et son procédé de fabrication
EP2083436A1 (fr) Panneau d'affichage à plasma
KR100226863B1 (ko) 칼라 플라즈마 디스플레이 패널(colorplasmadisplaypanel) 및 그 제조방법
US8179041B2 (en) Plasma display panel
JP4760178B2 (ja) プラズマディスプレイパネル
JPH11144627A (ja) 放電表示装置
JP2007109480A (ja) プラズマディスプレイパネル
JP2007257982A (ja) プラズマディスプレイパネル

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200780000845.9

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2008502762

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2007714937

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 1020087013811

Country of ref document: KR

NENP Non-entry into the national phase

Ref country code: DE