WO2006043350A1 - Process for producing stacked ceramic electronic component and composite laminate - Google Patents

Process for producing stacked ceramic electronic component and composite laminate Download PDF

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Publication number
WO2006043350A1
WO2006043350A1 PCT/JP2005/009132 JP2005009132W WO2006043350A1 WO 2006043350 A1 WO2006043350 A1 WO 2006043350A1 JP 2005009132 W JP2005009132 W JP 2005009132W WO 2006043350 A1 WO2006043350 A1 WO 2006043350A1
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WO
WIPO (PCT)
Prior art keywords
ceramic
core
conductor
electronic component
green sheet
Prior art date
Application number
PCT/JP2005/009132
Other languages
French (fr)
Japanese (ja)
Inventor
Ryuichiro Wada
Tetsuya Ikeda
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Priority to CN2005800353816A priority Critical patent/CN101040354B/en
Priority to JP2006542240A priority patent/JP4375402B2/en
Publication of WO2006043350A1 publication Critical patent/WO2006043350A1/en
Priority to US11/735,577 priority patent/US7607216B2/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • H01F41/046Printed circuit coils structurally combined with ferromagnetic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08Magnetic details
    • H05K2201/083Magnetic materials
    • H05K2201/086Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09763Printed component having superposed conductors, but integrated in one circuit layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49069Data storage inductor or core
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49071Electromagnet, transformer or inductor by winding or coiling
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49073Electromagnet, transformer or inductor by assembling coil and core
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Definitions

  • the present invention relates to a method for producing a multilayer ceramic electronic component incorporating a coiled conductor, and a composite laminate prepared for producing such a multilayer ceramic electronic component. .
  • a coiled conductor made of an unsintered conductive paste film formed around the core and an unsintered outer layer mainly composed of an unsintered nonmagnetic material surrounding the unsintered core and coiled conductor A method comprising the steps of first producing an unsintered laminated body comprising a portion and firing the entire unsintered laminated body simultaneously is described.
  • Patent Document 1 Japanese Patent Laid-Open No. 11-260642
  • Patent Document 2 JP 2000-150239 A
  • an object of the present invention is to provide a method for manufacturing a multilayer ceramic electronic component that can solve the above-described problems.
  • Another object of the present invention is to provide a composite laminate prepared for producing the above-described multilayer ceramic electronic component.
  • the present invention is first directed to a method for manufacturing a multilayer ceramic electronic component incorporating an inductor element.
  • the manufacturing method of the multilayer ceramic electronic component according to the present invention is characterized by having the following configuration in order to solve the technical problem described above.
  • the method for manufacturing a multilayer ceramic electronic component according to the present invention includes a core made of a magnetic ceramic sintered body, a coiled conductor formed around the core, and a core and a coiled conductor between the layers. At least two unsintered ceramic layers that are stacked with the sandwiched between them and a specific unsintered ceramic layer, and is not sintered at the sintering temperature of the unsintered ceramic layer. It comprises a step of producing a composite laminate comprising a shrinkage suppression layer containing an inorganic material powder, and a step of firing the composite laminate at a temperature at which the unsintered ceramic layer sinters.
  • the step of producing the composite laminate described above includes a step of preparing a core, a step of preparing a plurality of ceramic green sheets to be an unsintered ceramic layer, and a first of the first ceramic Darin sheet. Forming a first conductor pattern to be a part of a coiled conductor on the main surface of the second ceramic sheet and a second part to be the other part of the coiled conductor on the first main surface of the second ceramic green sheet.
  • the first main surface of the first ceramic clean sheet and the first main surface of the second ceramic green sheet face each other with the core interposed, and the first The first ceramic green sheet and the second ceramic green sheet are overlapped so that the end of the conductor pattern and the end of the second conductor pattern are in contact with each other to form a conductor extending in a coil shape. It is preferable to provide a step of bringing.
  • the step of superimposing the first ceramic green sheet and the second ceramic green sheet includes a first conductor pattern on the first main surface of the first ceramic green sheet. After placing the core so that the end of the It is preferable that the second ceramic green sheet is superposed on the first ceramic green sheet.
  • the step of producing the composite laminate includes the steps of forming the second main surface and the second ceramic green sheet facing the first main surface of the first ceramic green sheet. It is preferable that the method further includes a step of forming a shrinkage suppression layer on each of the second main surfaces facing the first main surface.
  • each of the first and second conductor patterns preferably includes a plurality of strip-shaped conductor portions, whereby the number of turns of the coil-shaped conductor is preferably plural. .
  • the core may have any shape such as a flat plate shape, a cylindrical shape, an elliptical column shape, or a donut shape.
  • the shrinkage suppression layer can be disposed at any location of the composite laminate.
  • the shrinkage suppression layer is disposed so as to form the outermost layer of the composite laminate, it is preferable to further include a step of removing the shrinkage suppression layer after the firing step.
  • the shrinkage suppression layer is disposed along a specific interface between the unsintered ceramic layers, the shrinkage suppression layer is solidified by infiltration of a part of the material contained in the unsintered ceramic layer in the firing process. It is preferable to be done. Even in this case, the shrinkage suppression layer may be further arranged so as to form the outermost layer of the composite laminate as described above.
  • the composite laminate is a first shield having a magnetic ceramic sintered body force arranged along an interface between specific unsintered ceramic layers so as to sandwich the core and the coiled conductor in the lamination direction. It is preferable to further provide a plate.
  • the composite laminate has a second magnetic ceramic sintered body force that is disposed so as to sandwich the core and the coil conductor at the interface between the unsintered ceramic layers where the core and the coiled conductor are located. It is more preferable to further provide the shield plate.
  • the multilayer ceramic electronic component manufactured by the manufacturing method according to the present invention is a multilayer ceramic electronic component having a plurality of combined functions including an inductor function, even if it is a single function element providing an inductor function. It may be a substrate.
  • the unsintered ceramic layer is It is preferred that the main component is a low-temperature sintered ceramic material or a magnetic material. In the latter case, the unsintered ceramic layer is mainly composed of a low-temperature sintered ceramic material. It is preferable.
  • the present invention is also directed to a composite multilayer body prepared for manufacturing a multilayer ceramic electronic component incorporating an inductor element.
  • the composite laminate according to the present invention was laminated with a core having a magnetic ceramic sintered body strength, a coiled conductor formed around the core, and a core and the coiled conductor sandwiched between layers. At least two unsintered ceramic layers, and a shrinkage suppression layer including an inorganic material powder disposed so as to be in contact with a particular unsintered ceramic layer and not substantially sintered at the sintering temperature of the unsintered ceramic layer; It is characterized by having.
  • a multilayer ceramic electronic component is manufactured.
  • the coiled conductors are respectively formed on the mutually opposing main surfaces of the first and second unsintered ceramic layers sandwiching the core and the coiled conductor.
  • the first and second conductive patterns are provided. These first and second conductor patterns are in a state where their respective end portions are in contact with each other so as to form a conductor extending in a coil shape.
  • the composite laminate to be fired includes a core made of a magnetic ceramic sintered body. Therefore, in the firing step, the core, the coiled conductor, and the unsintered ceramic layer There is virtually no diffusion of material between each of these. As a result, it is possible to maintain the original material characteristics possessed by the core that also has the strength of a magnetic ceramic sintered body. Therefore, in the obtained multilayer ceramic electronic component, the inductor element configured with the core and the coiled conductor can give the characteristics as designed.
  • the composite laminate includes a core having a sintered body strength and an unsintered ceramic layer.
  • the unsintered ceramic layer tends to shrink relatively large. Due to the difference in shrinkage from the unsintered ceramic layer, a relatively large internal stress is generated in the composite laminate, which may cause warping, undulation, or cracking after firing. Conceivable.
  • the composite laminate is an unsintered ceramic layer. Is provided with a shrinkage suppression layer for suppressing the shrinkage of the green ceramic layer so that the shrinkage in the principal surface direction of the unsintered ceramic layer does not substantially occur. Cracks occur, and multilayer ceramic electronic components can be manufactured with high yield.
  • the composite laminate since the non-sintered ceramic layer and the shrinkage suppression layer other than the core are in an unsintered state, the composite laminate without forming the cavity in advance.
  • the core can be built in. This eliminates the need for relatively complicated processes for forming the cavity and inserting the core into the cavity.
  • the magnetic permeability of the core incorporated in the composite laminate can be arbitrarily selected. Therefore, the inductance can be controlled not only by changing the number of turns of the coiled conductor but also by changing the magnetic permeability, and the inductance given by the inductor element can be controlled over a wide range.
  • cores having different magnetic permeability can be built in the same plane in the multilayer ceramic electronic component. For this reason, it is not necessary to form wiring conductors for connecting between the coil-shaped conductors provided in relation to each core between a plurality of ceramic layers, so that the load imposed on the wiring conductors can be reduced and safety can be reduced.
  • the specified characteristics can be ensured, so that it can be applied to large current applications such as power supplies, and the multilayer ceramic electronic components can be made low-profile.
  • a via-hole conductor is provided on a specific ceramic green sheet. Child forming a conductor extending in a coil shape Nag and You can. Therefore, a process requiring a relatively high cost for providing the via-hole conductor is not required, and the manufacturing cost of the multilayer ceramic electronic component
  • the coiled conductor formed around the core can be formed in close contact with the core. For this reason, the generated magnetic flux can be completely confined, and the inflection point of the magnetic field can be suppressed. Therefore, a low-loss inductor element can be realized.
  • each of the first and second conductor patterns includes a plurality of strip-shaped conductor portions
  • the number of turns of the coil-shaped conductor can be easily increased.
  • the arrangement pitch of the plurality of strip-shaped conductor portions can be narrowed without being restricted by the dimensions required for the via-hole conductor.
  • this band-shaped conductor part force S is formed by screen printing
  • the arrangement pitch of the band-shaped conductor parts depends only on the printability of screen printing, so the pitch should be narrowed to 30 / zm, for example. Can do.
  • the process power for superposing the first ceramic green sheet and the second ceramic green sheet is the first of the first ceramic green sheet.
  • the second ceramic green sheet is overlaid on the first ceramic green sheet while interposing the core
  • the composite laminate is disposed along the interface between specific unsintered ceramic layers so as to sandwich the core and the coiled conductor in the lamination direction.
  • the shrinkage suppression effect of the first shield plate can be exhibited.
  • the inductor element force composed of a core and a coiled conductor can confine magnetic lines of force that develop in the stacking direction, so that it is placed around it. For example, it is possible to shield elements that are easily affected by a magnetic field, such as a transformer, and to reduce loss.
  • the magnetic composite ceramic is disposed so as to sandwich the core and the coiled conductor at the interface between the unsintered ceramic layers where the core and the coiled conductor are located. If the second shield plate having a sintered body strength is further provided, the confinement state of the magnetic field lines becomes more complete, and the loss of the inductor element can be further reduced.
  • FIG. 1 is a cross-sectional view showing an inductor element 1 as a first example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
  • FIG. 2 shows a first ceramic green sheet 8 prepared for manufacturing the inductor element 1 shown in FIG. 1, wherein (a) is a plan view and (b) Is a cross-sectional view along line B-B in (a).
  • FIG. 3 shows a state in which the core 2 is arranged on the first ceramic green sheet 8 shown in FIG. 2, (a) is a plan view, and (b) is a view of (a). It is sectional drawing which follows line BB.
  • FIG. 4 shows a second ceramic green sheet 16 prepared for manufacturing the inductor element 1 shown in FIG. 1, wherein (a) is a plan view and (b) FIG. 4 is a sectional view taken along line BB in (a).
  • FIG. 5 shows a composite laminate 24 obtained by superimposing the structure shown in FIG. 3 and the structure shown in FIG. 4.
  • (a) is a plan view.
  • (b) is a sectional view taken along line BB in (a).
  • FIG. 6 is a cross-sectional view showing an inductor element 27 as a second example of the multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
  • FIG. 7 is a cross-sectional view showing an inductor element 28 as a third example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
  • FIG. 8 is a perspective view showing a core 2a used in place of the core 2 provided in each of the inductor elements 1, 27 and 28 shown in FIGS. 1, 6 and 7, respectively.
  • FIG. 9 is a perspective view showing a core 2b used in place of the core 2 provided in each of the inductor elements 1, 27 and 28 shown in FIGS. 1, 6 and 7, respectively.
  • FIG. 10 shows a first example prepared for producing the composite multilayer body 37 shown in FIG. 13 prepared for obtaining an inductor element as a fourth example of a multilayer ceramic electronic component.
  • FIG. 3 shows a ceramic green sheet 38, which corresponds to FIG. 2 (a).
  • FIG. 11 is a view corresponding to FIG. 3 (a), showing a state where the core 46 is arranged on the ceramic green sheet 38 shown in FIG. 10.
  • FIG. 12 is a view corresponding to FIG. 4 (a), showing a second ceramic green sheet 47 prepared for producing the composite laminate 37 shown in FIG. 13.
  • FIG. 13 is a view corresponding to FIG. 5 (a), showing a composite laminate 37 obtained by superimposing the structure shown in FIG. 11 and the structure shown in FIG. 12. .
  • FIG. 14 is a cross-sectional view showing ceramic green sheets 57b to 63b and shrinkage suppression green sheets 71b and 72b prepared for producing the composite laminate 56 shown in FIG. 15 separately from each other.
  • FIG. 15 is a cross-sectional view showing a composite laminate 56 obtained by laminating ceramic green sheets 57b to 63b and shrinkage suppression green sheets 71b and 72b shown in FIG.
  • FIG. 16 is a cross-sectional view showing a multilayer ceramic substrate 55 obtained by firing the composite laminate 56 shown in FIG.
  • FIG. 17 is a cross-sectional view showing a state in which surface-mounted components 75 to 77 are mounted on multilayer ceramic substrate 55 shown in FIG.
  • FIG. 18 is a cross-sectional view showing a composite laminate 78 produced to obtain a multilayer ceramic substrate as a sixth example of the multilayer ceramic electronic component.
  • FIG. 19 is a cross-sectional view showing a multilayer ceramic substrate 80 as a seventh example of the multilayer ceramic electronic component.
  • FIG. 1 is a cross-sectional view showing an inductor element 1 as a first example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
  • an inductor element 1 includes a core 2 having a magnetic ceramic sintered body force such as a plate-like ferrite, a coiled conductor 3 formed around the core 2, and a core between layers. 2 and two ceramic layers 4 and 5 laminated with a coiled conductor 3 sandwiched therebetween.
  • a core 2 having a magnetic ceramic sintered body force such as a plate-like ferrite
  • a coiled conductor 3 formed around the core 2
  • FIGS. 2 to 5 shows a plan view, and (b) shows a sectional view taken along line BB in (a).
  • a first ceramic green sheet 8 to be the ceramic layer 4 is prepared.
  • the first ceramic green sheet 8 is preferably composed mainly of a low-temperature sintered ceramic material, for example, a slurry obtained by dispersing a mixed powder consisting of alumina powder and borosilicate glass powder in an organic vehicle. It is produced by forming a sheet into a sheet by the casting method.
  • the first ceramic green sheet 8 is mainly made of the low-temperature sintered ceramic material as described above. In addition to the component, it may be composed mainly of a magnetic material such as ferrite.
  • the first conductor pattern 10 which is a part of the coiled conductor 3 described above is formed.
  • the first conductor pattern 10 is formed by screen printing a conductive paste.
  • the first conductor pattern 10 includes a plurality of strip-like conductor portions 11 that are parallel to each other! The number of the strip-like conductor portions 11 is selected in consideration of a desired inductance. Further, the line Z space of the strip-shaped conductor portion 11 is also selected in the range of 30 to 2000 ⁇ m in consideration of a desired inductance.
  • the first conductor pattern 10 also has input / output end portions 12 and 13 connected to the strip-shaped conductor portion 11 located at the end portion.
  • the input / output end portions 12 and 13 are formed so as to reach the edge of the first ceramic green sheet 8.
  • a shrinkage suppression layer 15 is formed on the second main surface 14 facing the first main surface 9 of the first ceramic green sheet 8.
  • the shrinkage suppression layer 15 includes an inorganic material powder such as alumina powder that does not substantially sinter at the sintering temperature of the first ceramic green sheet 8, and includes, for example, alumina powder in an organic vehicle. It is formed from a slurry obtained by dispersing.
  • the shrinkage suppression layer 15 is formed by stacking a green sheet obtained by forming the above-mentioned slurry into a sheet shape by a casting method on the second main surface 14 of the first ceramic green sheet 8.
  • the slurry may be formed by applying the slurry onto the second main surface 14 of the second ceramic green sheet 8.
  • a flat core 2 having a thickness of, for example, 50 to 300 m is prepared.
  • the core 2 is composed of, for example, a magnetic ceramic sintered body such as ferrite, and the firing temperature for obtaining this is higher than the firing temperature of the composite laminate described later.
  • a magnetic ceramic sintered body such as ferrite
  • the core 2 is disposed on the first main surface 9 of the first ceramic green sheet 8. At this time, the core 2 is aligned so that the end portions of the first conductor pattern 10, more specifically, the end portions of each of the plurality of strip-like conductor portions 11 are exposed. Core 2 At this stage, it is preferable that the first ceramic green sheet 8 is temporarily fixed with an adhesive or the like so that no positional deviation occurs.
  • a second ceramic green sheet 16 is prepared.
  • the second ceramic green sheet 16 is to be the ceramic layer 5 shown in FIG. 1, and on the first main surface (the surface facing downward in FIG. 4) 17, other than the coiled conductor 3.
  • a second conductor pattern 18 is formed.
  • the second conductor pattern 18 includes a plurality of strip-shaped conductor portions 19 that are parallel to each other.
  • a shrinkage suppression layer 21 is formed on the second main surface 20 facing the first main surface 17 of the second ceramic green sheet 16.
  • the first ceramic green sheet 8 and the first conductor described above are used. This is substantially the same as in the case of the pattern 10 and the shrinkage suppression layer 15.
  • the structure shown in FIG. 3 and the structure shown in FIG. 4 are overlapped. More specifically, with the core 2 interposed, the first main surface 9 of the first ceramic green sheet 8 and the first main surface 17 of the second ceramic green sheet 16 face each other, and the first The first ceramic green sheet 8 and the second ceramic so that the end of the second conductor pattern 10 and the end of the second conductor pattern 18 are in contact with each other to form a coil-shaped conductor. Green sheet 16 is overlaid.
  • each end portion of the plurality of strip-shaped conductor portions 11 included in the first conductor pattern 10 is in contact with each end portion of the corresponding strip-shaped conductor portion 19 included in the second conductor pattern 18, and A coil-like conductor having a number of turns is formed.
  • a composite laminate 24 as shown in Fig. 5 is obtained.
  • the first and second ceramic green sheets 8 and 16 described above form first and second unsintered ceramic layers, respectively.
  • the reference numerals “8” and “16” indicating the first and second ceramic green sheets are used to indicate the first and second unsintered ceramic layers, respectively. Will also be used.
  • the composite laminate 24 is laminated with the core 2 having magnetic ceramic sintered body strength, the coiled conductor 3 formed around the core 2, and the coil 2 and the coiled conductor 3 sandwiched between the layers.
  • the first and second unsintered ceramic layers 8 and 16 and the shrinkage suppression layers 15 and 21 disposed so as to be in contact with the unsintered ceramic layers 8 and 16, respectively.
  • the core 2 has a sintered body force, and therefore, diffusion of material between the core 2 and the coiled conductor 3 and each of the unsintered ceramic layers 8 and 16 occurs. Virtually does not occur. Therefore, the original material characteristics of the magnetic ceramic sintered body possessed by the core 2 can be maintained.
  • the shrinkage suppression layers 15 and 21 act so as to suppress the shrinkage of the unsintered ceramic layers 8 and 16, and thus the obtained inductor element 1 is warped, swelled or cracked.
  • the inductor element 1 can be manufactured with a very high yield.
  • the shrinkage suppression layers 15 and 21 forming the outermost layer are not sintered in the above-described firing step, they can be easily removed.
  • the shrinkage suppression layers 15 and 21 are formed relatively thin, and in the firing step, a part of the material contained in the unsintered ceramic layers 8 and 16 is permeated into the shrinkage suppression layers 15 and 21, and the shrinkage suppression layer 15 And 21 may be solidified. In this case, the shrinkage suppression layers 15 and 21 are left in the inductor element 1 as a product. Further, the shrinkage suppression layer may be formed along the interface between each of the unsintered ceramic layers 8 and 16 and the coiled conductor 13, for example. In addition, only one of the shrinkage suppression layers 15 and 21 forming the outermost layer may be formed.
  • external terminal electrodes electrically connected to the input / output end portions 12 and 13 of the coil conductor 3 are provided on the outer surface of the inductor element 1. It is formed.
  • FIGS. 6 and 7 show inductor elements 27 and 28 as second and third examples of multilayer ceramic electronic components manufactured by applying the manufacturing method according to the present invention, respectively.
  • FIG. Corresponds to the elements shown in Figure 1 in Figures 6 and 7. The same reference numerals are given to the elements to be repeated, and the duplicate description is omitted.
  • the shield plates 31 and 32 having the magnetic ceramic sintered body force so as to sandwich the core 2 and the coil conductor 3 in the laminating direction are provided with ceramic layers 4 and 29, respectively. And the interface between the ceramic layers 5 and 30.
  • the core 2 and Shield plates 33 and 34 having magnetic ceramic sintered body strength are arranged so as to sandwich the coiled conductor 3.
  • the composite laminate produced to manufacture such inductor elements 27 and 28 includes a green ceramic layer that should be ceramic layers 4, 5, 29, and 30, and has a magnetic ceramic layer.
  • the shield plates 31 to 34 having a sintered body strength are arranged along the interface between these unsintered ceramic layers.
  • the composite laminates manufactured to manufacture the inductor elements 27 and 28, respectively do not have the shield plates 31 and 32 that have a relatively large and large magnetic ceramic sintered body strength. Since it is disposed along a specific interface between the sintered ceramic layers, in the sintering process, in addition to the shrinkage suppression effect by the shrinkage suppression layer, the shrinkage suppression effect by the shield plates 31 and 32 can be exhibited.
  • the loss can be reduced by the effect of confinement of the magnetic lines of force by the shield plates 31 and 32.
  • the effect of confining the magnetic lines of force by the shield plates 33 and 34 can be further exhibited, so that the loss can be further reduced.
  • FIG. 6 may be modified so as to include only one of the shield plates 31 and 32.
  • the inductor element 28 shown in FIG. 7 may be changed so as to have only one of the shield plates 31 to 34.
  • FIG. 8 and FIG. 9 are perspective views showing alternative examples of the core 2 provided in each of the inductor elements 1, 27 and 28 described above.
  • the core 2a shown in FIG. 8 has a cylindrical shape with a circular cross section. Use of such a core 2a has an advantage that the loss in the coiled conductor 3 can be reduced because there is no concentration of magnetic flux.
  • the core 2b shown in FIG. 9 has an elliptic cylinder shape with an elliptical cross section. According to such a core 2b, the same effect as in the case of the core 2a described above can be expected, and the handling property is better than that of the cylindrical core 2a. It can be expected that the shrinkage behavior can be easily matched with the other.
  • FIG. 10 to FIG. 13 are diagrams sequentially showing the manufacturing process of the composite laminate 37 produced to obtain the inductor element as the fourth example of the multilayer ceramic electronic component of interest to the present invention.
  • FIGS. 10, 11, 12, and 13 are plan views corresponding to FIGS. 2 (a), 3 (a), 4 (a), and 5 (a), respectively.
  • a first ceramic green sheet 38 to be a ceramic layer is prepared.
  • a first conductor pattern 40 that is a part of a coiled conductor is formed.
  • the first conductor pattern 40 includes a plurality of strip-like conductor portions 41 arranged in an arc shape.
  • the first conductor pattern 40 includes input / output end portions 42 and 43. The input / output end portions 42 and 43 are formed so as to reach the edge of the first ceramic green sheet 38.
  • a shrinkage suppression layer 45 is formed on a second main surface (a surface facing downward in FIG. 10) 44 that faces the first main surface 39 of the first ceramic green sheet 38. .
  • the shrinkage suppression layer 45 is in a position hidden under the first ceramic green sheet 38.
  • a donut-shaped core 46 is prepared.
  • the core 46 also has a magnetic ceramic sintered body force such as ferrite.
  • the cross-sectional shape of the core 46 may be rectangular, or other shapes such as a circle and an ellipse.
  • the core 46 force is disposed on the first main surface 39 of the first ceramic green sheet 38.
  • the core 46 is aligned so that the end portions of the first conductor pattern 40, more specifically, the end portions of the plurality of strip-like conductor portions 41 are exposed.
  • a second ceramic green sheet 47 to be a ceramic layer is prepared.
  • a second conductor pattern 49 serving as the other part of the coiled conductor is formed.
  • the second conductor pattern 49 includes a plurality of strip-like conductor portions 50 arranged in an arc shape.
  • a shrinkage suppression layer 52 is formed on a second main surface (a surface facing upward in FIG. 12) 51 facing the first main surface 48 of the second ceramic green sheet 47. .
  • the second ceramic green sheet 47 is in a position hidden under the shrinkage suppression layer 52.
  • the structure shown in FIG. 11 and the structure shown in FIG. 12 are overlapped. More specifically, with the core 46 interposed, the first main surface 39 of the first ceramic green sheet 38 and the first main surface 48 of the second ceramic green sheet 47 face each other and the first The first ceramic green sheet 38 and the second ceramic so that the end of the conductor pattern 40 and the end of the second conductor pattern 49 are in contact with each other to form a conductor extending in a coil shape. Green sheet 47 is overlaid.
  • each end of the plurality of strip-shaped conductor portions 41 provided in the first conductor pattern 40 is in contact with each end of the corresponding strip-shaped conductor portion 50 provided in the second conductor pattern 49.
  • a coiled conductor 53 constituting a coil-shaped conductor having a plurality of turns is formed so as to extend along the donut-shaped core 46 as a whole.
  • the present invention has been described with respect to a method for manufacturing an inductor element as a single-function element having an inductor function
  • the present invention is a multilayer ceramic substrate having a plurality of functions including an inductor function. This method can also be applied.
  • an embodiment when the present invention is applied to a method for manufacturing a multilayer ceramic substrate will be described.
  • 14 to 16 are cross-sectional views for explaining a method for manufacturing a multilayer ceramic substrate 55 as a fifth example of the multilayer ceramic electronic component.
  • the composite laminate 56 shown in FIG. 15 is produced.
  • the composite laminate 56 is disassembled into elements as shown in FIG. 14 in the stage before lamination.
  • the above-described manufacturing method for the inductor element 1 and the like can be basically applied unless otherwise specified.
  • the multilayer ceramic substrate 55 includes a plurality of ceramic layers 57 to 63. Further, the multilayer ceramic substrate 55 serves as a wiring conductor along a specific interface between each of several external conductor films 64 and 65 formed on one and the other main surfaces thereof and ceramic layers 57 to 63, respectively. And several via-conductors 66 provided so as to penetrate through a specific one of the ceramic layers 57 to 63. These wiring conductors constitute a passive element such as a capacitor or an inductor by at least a part thereof.
  • the multilayer ceramic substrate 55 includes an inductor element 70 including a flat core 68 and a coil conductor 69 formed around the core 68.
  • Inductor element 70 is disposed between ceramic layers 60 and 61.
  • the inductor element 70 has substantially the same structure as the inductor element 1 or the like as a single function element described above.
  • the composite laminate 56 shown in FIG. 15 includes unsintered ceramic layers 57a to 63a corresponding to the ceramic layers 57 to 63, respectively. I have. In relation to each of these unsintered ceramic layers 57a to 63a, outer conductor films 64 and 65, an inner conductor film 66 and a via-hole conductor 67 are provided.
  • an inductor element 70 including a core 68 and a coiled conductor 69 is disposed between the unsintered ceramic layers 60a and 61a. Further, shrinkage suppression layers 71 and 72 are disposed so as to form the outermost layer of the composite laminate 56.
  • ceramic green sheets 57b to 63b respectively corresponding to the unsintered ceramic layers 57a to 63a are prepared as shown in FIG.
  • Shrinkage suppression green sheets 7 lb and 72b corresponding to the shrinkage suppression layers 71 and 72, respectively, are prepared.
  • a flat core 68 having magnetic ceramic sintered body strength is prepared.
  • a specific one of the ceramic green sheets 57b to 63b is provided with a via-hole conductor 67. Further, the inner conductor film 66 is formed on each upper main surface of the ceramic green sheets 57b to 60b positioned below the core 68, and the ceramic green sheets 61b to 63b positioned above the core 68. Are formed on each lower main surface. Note that at least a part of the inner conductor film 66 formed on the upper main surface of the ceramic green sheet 60b may be formed on the lower main surface of the ceramic green sheet 61b.
  • An external conductor film 64 is formed on the upper main surface of the shrinkage suppression green sheet 71b, and an external conductor film 65 is formed on the lower main surface of the shrinkage suppression green sheet 72b.
  • These outer conductor films 64 and 65 are forces that are transferred to the ceramic green sheets 57b and 63b, respectively, in the subsequent process.
  • the reason for forming the green sheets 71b and 72b is to avoid the complexity of forming the ceramic film 57b and 63b in such a manner that the conductor films are aligned with each other on both main surfaces.
  • a first conductor pattern 73 that is a part of the coil-shaped conductor 69 is formed on the upper main surface of the ceramic green sheet 60b, and a coil is formed on the lower main surface of the ceramic green sheet 61b.
  • a second conductor pattern 74 which is the other part of the shaped conductor 69 is formed.
  • ceramic green sheets 57b-60b are sequentially laminated on shrinkage-suppressing green sheet 71b, and the obtained laminate is pressed in the laminating direction at a pressure of 20-150 MPa, for example.
  • the core 68 is disposed on the ceramic green sheet 60b. At this time, the core 68 is aligned so that the end portion of the first conductor pattern 73 is exposed. The core 68 is temporarily fixed to the ceramic green sheet 60b with an adhesive or the like.
  • ceramic green sheets 63b to 61b are sequentially laminated on the shrinkage-suppressing green sheet 72b, and the obtained laminated body is pressed in the lamination direction at a pressure of 20 to 150 MPa, for example.
  • a stack body including a shrinkage suppression green sheet 71b, ceramic green sheets 57b to 60b, and a core 68, and a shrinkage suppression green sheet 72b and ceramic green so that the ceramic green sheets 60b and 61b described above face each other.
  • Laminates with sheets 6 lb to 63b are stacked and the whole is pressed in the laminating direction, for example at a pressure of 20 to 200 MPa.
  • a firing step is performed in which the composite laminate 56 is fired at a temperature and a predetermined atmosphere at which the unsintered ceramic layers 57a to 63a are sintered. Then, after firing, the shrinkage suppression layers 71 and 72 are removed, whereby the multilayer ceramic substrate 55 shown in FIG. 16 is obtained.
  • a pressure of about 50 to about LOOOkPa is applied to the composite laminate 56 in the stacking direction, a multilayer ceramic substrate 55 with better flatness can be obtained.
  • the outer conductor films 64 and 65 are plated as necessary.
  • FIG. 17 shows a state in which the surface mount components 75 to 77 are mounted on the multilayer ceramic substrate 55 shown in FIG.
  • the surface-mounted components 75 to 77 are surface-mounted on the multilayer ceramic substrate 55 by being electrically connected to the external conductor film 65 by soldering or the like.
  • FIG. 18 is a cross-sectional view showing a composite laminate 78 produced to obtain a multilayer ceramic substrate as a sixth example of the multilayer ceramic electronic component.
  • the composite laminate 78 shown in FIG. 18 has many elements in common with the composite laminate 56 shown in FIG. 15. Therefore, in FIG. 18, the elements corresponding to the elements shown in FIG. The same reference numerals are assigned, and duplicate descriptions are omitted.
  • the composite laminate 78 shown in FIG. 18 is characterized in that a shrinkage suppression layer 79 is disposed along the interface between the unsintered ceramic layers 57a to 63a.
  • a shrinkage suppression layer 79 is disposed along the interface between the unsintered ceramic layers 57a to 63a.
  • the shrinkage suppression layer 79 is disposed along all interfaces, the force S disposed along all interfaces between the unsintered ceramic layers 57a-63a. You don't have to.
  • a shrinkage suppression layer that forms outermost layers such as the shrinkage suppression layers 71 and 72 shown in FIG. 15 may be further formed.
  • FIG. 19 is a cross-sectional view showing a multilayer ceramic substrate 80 as a seventh example of the multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention. Since the multilayer ceramic substrate 80 shown in FIG. 19 includes many elements in common with the multilayer ceramic substrate 55 shown in FIG. 16, the elements corresponding to the elements shown in FIG. The same reference numerals are attached, and duplicate descriptions are omitted.
  • a multilayer ceramic substrate 80 shown in FIG. 19 is characterized by having a configuration substantially the same as that of the inductor element 28 shown in FIG.
  • the magnetic ceramic sintering strength is also increased along the interface between the ceramic layers 59 and 60 and the interface between the ceramic layers 61 and 62 so that the core 68 and the coiled conductor 69 are sandwiched in the stacking direction.
  • the first shield plates 81 and 82 are disposed, and the core 68 and the coiled conductor 69 are sandwiched between the core 68 and the coiled conductor 69 at the interface between the ceramic layers 60 and 61.
  • Two shield plates 83 and 84 are arranged. [0104] These shield plates 81 to 84 perform substantially the same functions as the shield plates 31 to 34 shown in FIG.
  • the composite laminate produced to obtain the multilayer ceramic substrate 80 has shield plates 81 to 84 formed of unsintered ceramic layers as in the case of the inductor element 28 shown in FIG. It has a structure arranged at a specific interface.
  • the coiled conductor provided in association with the core can be variously modified with respect to its form and the like. Further, the form of the wiring conductor in the multilayer ceramic substrate can be variously changed as necessary.
  • the arrangement of the inductor elements in the multilayer ceramic substrate can be variously changed, and two or more inductor elements may be incorporated in one multilayer ceramic substrate. In this case, even if the inductor elements are arranged along the interface between different ceramic layers in the multilayer ceramic substrate, they should be arranged along the interface between the same ceramic layers.

Abstract

This invention provides a stacked ceramic electronic component which can solve a problem that, when a stacked ceramic electronic component with a built-in inductor element, such as a multilayer ceramic substrate, is produced, the incorporation of an unsintered core to be provided in the inductor element causes diffusion of a material and does not sometimes provide inherent properties. In a composite laminate (56) which provides a contemplated multilayer ceramic substrate upon firing, a core (68) formed of a magnetic ceramic sinter is incorporated. In order to reduce the difference in shrinkage behavior during firing between this core (68) and an unsintered ceramic layer (57a to 63a), shrinkage suppression layers (71 and 72)containing an inorganic material powder which is not substantially sintered at the sintering temperature of the unsintered ceramic layer (57a to 63a) is provided in a composite laminate (56).

Description

明 細 書  Specification
積層型セラミック電子部品の製造方法および複合積層体  Multilayer ceramic electronic component manufacturing method and composite laminate
技術分野  Technical field
[0001] この発明は、コイル状導体を内蔵する積層型セラミック電子部品の製造方法、およ びこのような積層型セラミック電子部品を製造するために用意される複合積層体に関 するものである。  TECHNICAL FIELD [0001] The present invention relates to a method for producing a multilayer ceramic electronic component incorporating a coiled conductor, and a composite laminate prepared for producing such a multilayer ceramic electronic component. .
背景技術  Background art
[0002] この発明にとって興味ある積層型セラミック電子部品として、たとえば特開平 11— 2 60642号公報 (特許文献 1)および特開 2000— 150239号公報 (特許文献 2)に記 載されるように、インダクタ素子を内蔵するものがある。これら特許文献 1および 2では 、インダクタ素子を内蔵する積層型セラミック電子部品を製造するため、コアとなるベ き未焼結の磁性体材料を主成分とする未焼結コアと、未焼結コアの周囲に形成され る未焼結の導電性ペースト膜からなるコイル状導体と、これら未焼結コアおよびコィ ル状導体を取り囲む未焼結の非磁性体材料を主成分とする未焼結外層部とを備え る、未焼結の積層体をまず作製し、この未焼結積層体全体を同時に焼成する、各ェ 程を備える方法が記載されて 、る。  [0002] As multilayer ceramic electronic components that are of interest to the present invention, as described in, for example, JP-A-11-260642 (Patent Document 1) and JP-A-2000-150239 (Patent Document 2), Some have built-in inductor elements. In these Patent Documents 1 and 2, in order to manufacture a multilayer ceramic electronic component with a built-in inductor element, an unsintered core composed mainly of an unsintered magnetic material and a non-sintered core are required. A coiled conductor made of an unsintered conductive paste film formed around the core and an unsintered outer layer mainly composed of an unsintered nonmagnetic material surrounding the unsintered core and coiled conductor A method comprising the steps of first producing an unsintered laminated body comprising a portion and firing the entire unsintered laminated body simultaneously is described.
[0003] しカゝしながら、上述の特許文献 1および 2に記載された積層型セラミック電子部品の 製造方法に備える上述の焼成工程では、異種材料を同時に焼成することになるので 、たとえば、コイル状導体となる導電性ペースト膜に含まれる材料 (たとえば Agなど) 力 Sコア中に拡散したり、未焼結コアに含まれる材料 (たとえば Fe、 Niなど)が外層部 中に拡散することがある。このように、コア、コイル状導体および外層部の間で材料の 拡散が進むと、各々の本来の特性を獲得することが困難になり、たとえばインダクタ 素子としての所望の特性が、得られた積層型セラミック電子部品において得られない ことがある。  However, in the above-described firing step provided for the manufacturing method of the multilayer ceramic electronic component described in Patent Documents 1 and 2 described above, different materials are fired at the same time. The material contained in the conductive paste film that becomes a conductor (for example, Ag) Force may diffuse into the S core, or the material contained in the unsintered core (eg, Fe, Ni, etc.) may diffuse into the outer layer is there. As described above, when the diffusion of the material progresses between the core, the coiled conductor, and the outer layer portion, it becomes difficult to obtain the original characteristics of each, and for example, desired characteristics as an inductor element can be obtained. May not be obtained for type ceramic electronic components.
特許文献 1:特開平 11― 260642号公報  Patent Document 1: Japanese Patent Laid-Open No. 11-260642
特許文献 2:特開 2000— 150239号公報  Patent Document 2: JP 2000-150239 A
発明の開示 発明が解決しょうとする課題 Disclosure of the invention Problems to be solved by the invention
[0004] そこで、この発明の目的は、上述したような問題を解決し得る、積層型セラミック電 子部品の製造方法を提供しょうとすることである。  Accordingly, an object of the present invention is to provide a method for manufacturing a multilayer ceramic electronic component that can solve the above-described problems.
[0005] この発明の他の目的は、上述した積層型セラミック電子部品を製造するために用意 される複合積層体を提供しょうとすることである。 [0005] Another object of the present invention is to provide a composite laminate prepared for producing the above-described multilayer ceramic electronic component.
課題を解決するための手段  Means for solving the problem
[0006] この発明は、インダクタ素子を内蔵する積層型セラミック電子部品を製造する方法 にまず向けられる。この発明に係る積層型セラミック電子部品の製造方法は、前述し た技術的課題を解決するため、次のような構成を備えることを特徴としている。  The present invention is first directed to a method for manufacturing a multilayer ceramic electronic component incorporating an inductor element. The manufacturing method of the multilayer ceramic electronic component according to the present invention is characterized by having the following configuration in order to solve the technical problem described above.
[0007] すなわち、この発明に係る積層型セラミック電子部品の製造方法は、磁性体セラミツ ク焼結体からなるコアと、コアの周囲に形成されるコイル状導体と、層間にコアおよび コイル状導体を挟んだ状態で積層された少なくとも 2層の未焼結セラミック層と、特定 の未焼結セラミック層に接するように配置されかつ未焼結セラミック層の焼結温度で は実質的に焼結しない無機材料粉末を含む収縮抑制層とを備える、複合積層体を 作製する工程と、この複合積層体を未焼結セラミック層が焼結する温度で焼成する 工程とを備えることを特徴として ヽる。  That is, the method for manufacturing a multilayer ceramic electronic component according to the present invention includes a core made of a magnetic ceramic sintered body, a coiled conductor formed around the core, and a core and a coiled conductor between the layers. At least two unsintered ceramic layers that are stacked with the sandwiched between them and a specific unsintered ceramic layer, and is not sintered at the sintering temperature of the unsintered ceramic layer. It comprises a step of producing a composite laminate comprising a shrinkage suppression layer containing an inorganic material powder, and a step of firing the composite laminate at a temperature at which the unsintered ceramic layer sinters.
[0008] 上述した複合積層体を作製する工程は、コアを用意する工程と、未焼結セラミック 層となるべき複数枚のセラミックグリーンシートを用意する工程と、第 1のセラミックダリ ーンシートの第 1の主面上に、コイル状導体の一部となる第 1の導体パターンを形成 する工程と、第 2のセラミックグリーンシートの第 1の主面上に、コイル状導体の他部と なる第 2の導体パターンを形成する工程と、コアを介在させながら第 1のセラミックダリ ーンシートの第 1の主面と第 2のセラミックグリーンシートの第 1の主面とが互いに向き 合 、、かつ第 1の導体パターンの端部と第 2の導体パターンの端部とが互いに接して コイル状に延びる導体を形成する状態となるように、第 1のセラミックグリーンシートと 第 2のセラミックグリーンシートとを重ね合わせる工程とを備えることが好ましい。  [0008] The step of producing the composite laminate described above includes a step of preparing a core, a step of preparing a plurality of ceramic green sheets to be an unsintered ceramic layer, and a first of the first ceramic Darin sheet. Forming a first conductor pattern to be a part of a coiled conductor on the main surface of the second ceramic sheet and a second part to be the other part of the coiled conductor on the first main surface of the second ceramic green sheet. The first main surface of the first ceramic clean sheet and the first main surface of the second ceramic green sheet face each other with the core interposed, and the first The first ceramic green sheet and the second ceramic green sheet are overlapped so that the end of the conductor pattern and the end of the second conductor pattern are in contact with each other to form a conductor extending in a coil shape. It is preferable to provide a step of bringing.
[0009] 上述の好ましい実施態様において、第 1のセラミックグリーンシートと第 2のセラミック グリーンシートとを重ね合わせる工程は、第 1のセラミックグリーンシートの第 1の主面 上に、第 1の導体パターンの端部が露出するように、コアを配置した後、コアを介在さ せながら第 1のセラミックグリーンシート上に第 2のセラミックグリーンシートを重ね合わ せるように実施されることが好ま 、。 [0009] In the above-described preferred embodiment, the step of superimposing the first ceramic green sheet and the second ceramic green sheet includes a first conductor pattern on the first main surface of the first ceramic green sheet. After placing the core so that the end of the It is preferable that the second ceramic green sheet is superposed on the first ceramic green sheet.
[0010] また、この好ましい実施態様において、複合積層体を作製する工程は、第 1のセラミ ックグリーンシートの第 1の主面に対向する第 2の主面および第 2のセラミックグリーン シートの第 1の主面に対向する第 2の主面の各々上に、収縮抑制層を形成する工程 をさらに備えることが好まし 、。 [0010] Further, in this preferred embodiment, the step of producing the composite laminate includes the steps of forming the second main surface and the second ceramic green sheet facing the first main surface of the first ceramic green sheet. It is preferable that the method further includes a step of forming a shrinkage suppression layer on each of the second main surfaces facing the first main surface.
[0011] また、この好ましい実施態様において、第 1および第 2の導体パターンの各々は複 数個の帯状導体部分を備え、それによつて、コイル状導体のターン数が複数とされる ことが好ましい。 [0011] Further, in this preferred embodiment, each of the first and second conductor patterns preferably includes a plurality of strip-shaped conductor portions, whereby the number of turns of the coil-shaped conductor is preferably plural. .
[0012] この発明に係る積層型セラミック電子部品の製造方法において、コアとしては、平 板状、円柱状、楕円柱状またはドーナツ状などの任意の形状のものを用いることがで きる。  [0012] In the method for manufacturing a multilayer ceramic electronic component according to the present invention, the core may have any shape such as a flat plate shape, a cylindrical shape, an elliptical column shape, or a donut shape.
[0013] 収縮抑制層は、複合積層体の任意の場所に配置することができる。収縮抑制層が 、複合積層体の最外層を形成するように配置される場合、焼成工程の後、収縮抑制 層を除去する工程をさらに備えることが好ましい。収縮抑制層が、未焼結セラミック層 間の特定の界面に沿って配置される場合、焼成工程において、収縮抑制層が、未焼 結セラミック層に含まれる材料の一部が浸透することによって固化されることが好まし い。なお、この場合であっても、収縮抑制層が、前述したように、複合積層体の最外 層を形成するようにさらに配置されて 、てもよ 、。  [0013] The shrinkage suppression layer can be disposed at any location of the composite laminate. When the shrinkage suppression layer is disposed so as to form the outermost layer of the composite laminate, it is preferable to further include a step of removing the shrinkage suppression layer after the firing step. When the shrinkage suppression layer is disposed along a specific interface between the unsintered ceramic layers, the shrinkage suppression layer is solidified by infiltration of a part of the material contained in the unsintered ceramic layer in the firing process. It is preferable to be done. Even in this case, the shrinkage suppression layer may be further arranged so as to form the outermost layer of the composite laminate as described above.
[0014] 複合積層体は、コアおよびコイル状導体を積層方向に挟むように、特定の未焼結 セラミック層間の界面に沿って配置される、磁性体セラミック焼結体力 なる第 1のシ 一ルド板をさらに備えることが好ましい。この場合において、複合積層体は、コアおよ びコイル状導体が位置する未焼結セラミック層間の界面において、コアおよびコイル 導体を挟むように配置される、磁性体セラミック焼結体力もなる第 2のシールド板をさ らに備えることがより好ましい。  [0014] The composite laminate is a first shield having a magnetic ceramic sintered body force arranged along an interface between specific unsintered ceramic layers so as to sandwich the core and the coiled conductor in the lamination direction. It is preferable to further provide a plate. In this case, the composite laminate has a second magnetic ceramic sintered body force that is disposed so as to sandwich the core and the coil conductor at the interface between the unsintered ceramic layers where the core and the coiled conductor are located. It is more preferable to further provide the shield plate.
[0015] この発明に係る製造方法によって製造される積層型セラミック電子部品は、インダク タ機能を与える単機能素子であっても、インダクタ機能を含む複合された複数個の機 能を有する、多層セラミック基板であってもよい。前者の場合、未焼結セラミック層は、 低温焼結セラミック材料または磁性材料を主成分とするものであることが好ましぐ他 方、後者の場合には、未焼結セラミック層は、低温焼結セラミック材料を主成分とする ものであることが好ましい。 [0015] The multilayer ceramic electronic component manufactured by the manufacturing method according to the present invention is a multilayer ceramic electronic component having a plurality of combined functions including an inductor function, even if it is a single function element providing an inductor function. It may be a substrate. In the former case, the unsintered ceramic layer is It is preferred that the main component is a low-temperature sintered ceramic material or a magnetic material. In the latter case, the unsintered ceramic layer is mainly composed of a low-temperature sintered ceramic material. It is preferable.
[0016] この発明は、また、インダクタ素子を内蔵する積層型セラミック電子部品を製造する ために用意される複合積層体にも向けられる。  The present invention is also directed to a composite multilayer body prepared for manufacturing a multilayer ceramic electronic component incorporating an inductor element.
[0017] この発明に係る複合積層体は、磁性体セラミック焼結体力 なるコアと、コアの周囲 に形成されるコイル状導体と、層間にコアおよびコイル状導体を挟んだ状態で積層さ れた少なくとも 2層の未焼結セラミック層と、特定の未焼結セラミック層に接するように 配置されかつ未焼結セラミック層の焼結温度では実質的に焼結しない無機材料粉末 を含む収縮抑制層とを備えることを特徴としている。この複合積層体を焼成する工程 を経て、積層型セラミック電子部品が製造される。  [0017] The composite laminate according to the present invention was laminated with a core having a magnetic ceramic sintered body strength, a coiled conductor formed around the core, and a core and the coiled conductor sandwiched between layers. At least two unsintered ceramic layers, and a shrinkage suppression layer including an inorganic material powder disposed so as to be in contact with a particular unsintered ceramic layer and not substantially sintered at the sintering temperature of the unsintered ceramic layer; It is characterized by having. Through the step of firing the composite laminate, a multilayer ceramic electronic component is manufactured.
[0018] この発明に係る複合積層体にお!ヽて、コイル状導体は、コアおよびコイル状導体を 挟む第 1および第 2の未焼結セラミック層の各々の互いに向き合う主面上にそれぞれ 形成された第 1および第 2の導体パターンを備えることが好ましい。これら第 1および 第 2の導体パターンは、コイル状に延びる導体を形成するように、各々の端部が互い に接する状態となっている。  [0018] In the composite laminate according to the present invention, the coiled conductors are respectively formed on the mutually opposing main surfaces of the first and second unsintered ceramic layers sandwiching the core and the coiled conductor. Preferably, the first and second conductive patterns are provided. These first and second conductor patterns are in a state where their respective end portions are in contact with each other so as to form a conductor extending in a coil shape.
発明の効果  The invention's effect
[0019] この発明によれば、焼成されるべき複合積層体には、磁性体セラミック焼結体から なるコアを備えているので、焼成工程において、このコアとコイル状導体および未焼 結セラミック層の各々との間で、材料の拡散が実質的に生じない。その結果、磁性体 セラミック焼結体力もなるコアが有する本来の材料特性を維持することができる。した がって、得られた積層型セラミック電子部品において、コアおよびコイル状導体をもつ て構成されるインダクタ素子は、設計どおりの特性を与えることが可能となる。  [0019] According to the present invention, the composite laminate to be fired includes a core made of a magnetic ceramic sintered body. Therefore, in the firing step, the core, the coiled conductor, and the unsintered ceramic layer There is virtually no diffusion of material between each of these. As a result, it is possible to maintain the original material characteristics possessed by the core that also has the strength of a magnetic ceramic sintered body. Therefore, in the obtained multilayer ceramic electronic component, the inductor element configured with the core and the coiled conductor can give the characteristics as designed.
[0020] また、複合積層体は、焼結体力もなるコアと未焼結セラミック層とを備え、焼成工程 において、未焼結セラミック層には、比較的大きく収縮する傾向があるため、コアと未 焼結セラミック層との間での収縮量の差によって、複合積層体に比較的大きな内部 応力が生じることになり、焼成後において、反りやうねりが生じたり、割れが生じたりす ることが考えられる。しカゝしながら、この発明では、複合積層体は、未焼結セラミック層 の収縮を抑制するための収縮抑制層を備えているので、未焼結セラミック層の主面 方向での収縮が実質的に生じないようにされ、したがって、上述のような反り、うねりま たは割れが生じに《なり、高い歩留まりをもって、積層型セラミック電子部品を製造 することができる。 [0020] In addition, the composite laminate includes a core having a sintered body strength and an unsintered ceramic layer. In the firing step, the unsintered ceramic layer tends to shrink relatively large. Due to the difference in shrinkage from the unsintered ceramic layer, a relatively large internal stress is generated in the composite laminate, which may cause warping, undulation, or cracking after firing. Conceivable. However, in this invention, the composite laminate is an unsintered ceramic layer. Is provided with a shrinkage suppression layer for suppressing the shrinkage of the green ceramic layer so that the shrinkage in the principal surface direction of the unsintered ceramic layer does not substantially occur. Cracks occur, and multilayer ceramic electronic components can be manufactured with high yield.
[0021] また、この発明によれば、複合積層体において、コア以外の未焼結セラミック層およ び収縮抑制層は、未焼結状態であるので、キヤビティを予め形成することなぐ複合 積層体においてコアを内蔵させることができる。したがって、キヤビティの形成、キヤビ ティ内へのコアの挿入などを行なうための比較的複雑な工程を不要とすることができ [0021] Further, according to the present invention, in the composite laminate, since the non-sintered ceramic layer and the shrinkage suppression layer other than the core are in an unsintered state, the composite laminate without forming the cavity in advance. The core can be built in. This eliminates the need for relatively complicated processes for forming the cavity and inserting the core into the cavity.
、工程の簡略ィ匕による低コストィ匕を期待することができる。 Therefore, a low cost due to the simplification of the process can be expected.
[0022] また、この発明によれば、複合積層体に内蔵されるコアの透磁率を任意に選択する ことができる。そのため、インダクタンスの制御は、コイル状導体のターン数の変更の みならず、透磁率の変更によっても行なうことができ、インダクタ素子が与えるインダク タンスを広範囲に制御することができる。  [0022] Further, according to the present invention, the magnetic permeability of the core incorporated in the composite laminate can be arbitrarily selected. Therefore, the inductance can be controlled not only by changing the number of turns of the coiled conductor but also by changing the magnetic permeability, and the inductance given by the inductor element can be controlled over a wide range.
[0023] また、この発明によれば、積層型セラミック電子部品における同一平面内に互いに 異なる透磁率を持つコアを内蔵することができる。そのため、各コアに関連して設けら れるコイル状導体間を接続するための配線導体を、複数のセラミック層間にわたつて 形成する必要がないため、配線導体においてもたらされる負荷を低減でき、かつ安 定した特性を確保でき、そのため、電源用途などの大電流用途への適用も可能にな り、また、積層型セラミック電子部品の低背化を図ることが可能になる。  [0023] Further, according to the present invention, cores having different magnetic permeability can be built in the same plane in the multilayer ceramic electronic component. For this reason, it is not necessary to form wiring conductors for connecting between the coil-shaped conductors provided in relation to each core between a plurality of ceramic layers, so that the load imposed on the wiring conductors can be reduced and safety can be reduced. The specified characteristics can be ensured, so that it can be applied to large current applications such as power supplies, and the multilayer ceramic electronic components can be made low-profile.
[0024] この発明において、複合積層体を作製するため、第 1のセラミックグリーンシートの 第 1の主面上に、コイル状導体の一部となる第 1の導体パターンを形成する工程と、 第 2のセラミックグリーンシートの第 1の主面上に、コイル状導体の他部となる第 2の導 体パターンを形成する工程と、コアを介在させながら第 1のセラミックグリーンシートの 第 1の主面と第 2のセラミックグリーンシートの第 1の主面とが互いに向き合い、かつ第 1の導体パターンの端部と第 2の導体パターンの端部とが互いに接してコイル状に延 びる導体を形成する状態となるように、第 1のセラミックグリーンシートと第 2のセラミツ クグリーンシートとを重ね合わせる工程とを実施するようにすれば、ビアホール導体を 特定のセラミックグリーンシートに設けることなぐコイル状に延びる導体を形成するこ とができる。そのため、ビアホール導体を設けるための比較的高いコストを必要とする 工程が不要となり、積層型セラミック電子部品の製造コストを低減することができる。 [0024] In the present invention, in order to produce a composite laminate, a step of forming a first conductor pattern to be a part of a coiled conductor on the first main surface of the first ceramic green sheet; Forming a second conductor pattern as the other part of the coiled conductor on the first main surface of the ceramic green sheet of 2 and the first main surface of the first ceramic green sheet with the core interposed And the first main surface of the second ceramic green sheet face each other, and the end of the first conductor pattern and the end of the second conductor pattern are in contact with each other to form a conductor extending in a coil shape If the first ceramic green sheet and the second ceramic green sheet are overlapped with each other so as to be in a state of being provided, a via-hole conductor is provided on a specific ceramic green sheet. Child forming a conductor extending in a coil shape Nag and You can. Therefore, a process requiring a relatively high cost for providing the via-hole conductor is not required, and the manufacturing cost of the multilayer ceramic electronic component can be reduced.
[0025] 上述したように複合積層体が作製されるとき、コアの周囲に形成されるコイル状導 体は、コアに密着して形成されることができる。そのため、発生する磁束を完全に閉じ 込めることができ、かつ磁界の変極点も抑えることができる。したがって、低損失のィ ンダクタ素子を実現することができる。  [0025] When the composite laminate is manufactured as described above, the coiled conductor formed around the core can be formed in close contact with the core. For this reason, the generated magnetic flux can be completely confined, and the inflection point of the magnetic field can be suppressed. Therefore, a low-loss inductor element can be realized.
[0026] 上述の実施態様において、第 1および第 2の導体パターンの各々が複数個の帯状 導体部分を備えていると、コイル状導体のターン数を容易に複数とすることができる。 このとき、ビアホール導体が必要とする寸法の制約を受けずに、複数個の帯状導体 部分の配列ピッチを狭くすることができる。この帯状導体部分力 Sスクリーン印刷によつ て形成される場合には、帯状導体部分の配列ピッチは、スクリーン印刷の印刷性の みに依存するため、たとえば 30 /z mにまで狭ピッチ化することができる。その結果、コ ィル状導体の小型化、ひいては積層型セラミック電子部品の小型化を図ることができ る。  In the above-described embodiment, when each of the first and second conductor patterns includes a plurality of strip-shaped conductor portions, the number of turns of the coil-shaped conductor can be easily increased. At this time, the arrangement pitch of the plurality of strip-shaped conductor portions can be narrowed without being restricted by the dimensions required for the via-hole conductor. When this band-shaped conductor part force S is formed by screen printing, the arrangement pitch of the band-shaped conductor parts depends only on the printability of screen printing, so the pitch should be narrowed to 30 / zm, for example. Can do. As a result, it is possible to reduce the size of the coil-like conductor and, consequently, the size of the multilayer ceramic electronic component.
[0027] また、上述の実施態様に従って複合積層体を作製する場合において、第 1のセラミ ックグリーンシートと第 2のセラミックグリーンシートとを重ね合わせる工程力 第 1のセ ラミックグリーンシートの第 1の主面上に、第 1の導体パターンの端部が露出するよう に、コアを配置した後、コアを介在させながら第 1のセラミックグリーンシート上に第 2 のセラミックグリーンシートを重ね合わせるように実施されると、複合積層体は、そこに 備える各要素を、積層方向の一方端側から順次積み重ねることによって作製されるこ とができるので、複雑な工程を適用することなぐ複合積層体を作製することができる  [0027] In the case of producing a composite laminate according to the above-described embodiment, the process power for superposing the first ceramic green sheet and the second ceramic green sheet is the first of the first ceramic green sheet. After arranging the core so that the end of the first conductor pattern is exposed on the main surface of the first ceramic sheet, the second ceramic green sheet is overlaid on the first ceramic green sheet while interposing the core When implemented, a composite laminate can be made by stacking each element provided there from one end side in the stacking direction, making it possible to produce a composite laminate without applying complicated processes. can do
[0028] この発明において、複合積層体が、コアおよびコイル状導体を積層方向に挟むよう に、特定の未焼結セラミック層間の界面に沿って配置される、磁性体セラミック焼結 体力もなる第 1のシールド板をさらに備えていると、焼成工程において、収縮抑制層 による収縮抑制効果に加えて、第 1のシールド板による収縮抑制効果を発揮させるこ とができる。また、コアおよびコイル状導体をもって構成されるインダクタ素子力ゝら積層 方向に展開する磁力線を閉じ込めることができるため、その周囲に配置される、たと えばトランス等の磁場の影響を受けやすい素子へのシールドを行なうとともに、損失 を低減することができる。 [0028] In the present invention, the composite laminate is disposed along the interface between specific unsintered ceramic layers so as to sandwich the core and the coiled conductor in the lamination direction. If the first shield plate is further provided, in the firing step, in addition to the shrinkage suppression effect of the shrinkage suppression layer, the shrinkage suppression effect of the first shield plate can be exhibited. In addition, the inductor element force composed of a core and a coiled conductor can confine magnetic lines of force that develop in the stacking direction, so that it is placed around it. For example, it is possible to shield elements that are easily affected by a magnetic field, such as a transformer, and to reduce loss.
[0029] 上述の場合にぉ 、て、複合積層体が、コアおよびコイル状導体が位置する未焼結 セラミック層間の界面において、コアおよびコイル状導体を挟むように配置される、磁 性体セラミック焼結体力 なる第 2のシールド板をさらに備えていると、磁力線の閉じ 込め状態がより完全となり、インダクタ素子の損失をより低減することができる。  [0029] In the above-described case, the magnetic composite ceramic is disposed so as to sandwich the core and the coiled conductor at the interface between the unsintered ceramic layers where the core and the coiled conductor are located. If the second shield plate having a sintered body strength is further provided, the confinement state of the magnetic field lines becomes more complete, and the loss of the inductor element can be further reduced.
図面の簡単な説明  Brief Description of Drawings
[0030] [図 1]図 1は、この発明に係る製造方法を適用して製造された積層型セラミック電子部 品の第 1の例としてのインダクタ素子 1を示す断面図である。  FIG. 1 is a cross-sectional view showing an inductor element 1 as a first example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
[図 2]図 2は、図 1に示したインダクタ素子 1を製造するために用意される第 1のセラミ ックグリーンシート 8を示すもので、(a)は平面図であり、 (b)は(a)の線 B— Bに沿う断 面図である。  [FIG. 2] FIG. 2 shows a first ceramic green sheet 8 prepared for manufacturing the inductor element 1 shown in FIG. 1, wherein (a) is a plan view and (b) Is a cross-sectional view along line B-B in (a).
[図 3]図 3は、図 2に示した第 1のセラミックグリーンシート 8上にコア 2を配置した状態 を示すもので、(a)は平面図であり、(b)は (a)の線 B— Bに沿う断面図である。  [FIG. 3] FIG. 3 shows a state in which the core 2 is arranged on the first ceramic green sheet 8 shown in FIG. 2, (a) is a plan view, and (b) is a view of (a). It is sectional drawing which follows line BB.
[図 4]図 4は、図 1に示したインダクタ素子 1を製造するために用意される第 2のセラミ ックグリーンシート 16を示すもので、(a)は平面図であり、(b)は(a)の線 B— Bに沿う 断面図である。  [FIG. 4] FIG. 4 shows a second ceramic green sheet 16 prepared for manufacturing the inductor element 1 shown in FIG. 1, wherein (a) is a plan view and (b) FIG. 4 is a sectional view taken along line BB in (a).
[図 5]図 5は、図 3に示した構造物と図 4に示した構造物とを重ね合わせて得られた複 合積層体 24を示すもので、 (a)は平面図であり、 (b)は(a)の線 B— Bに沿う断面図 である。  [FIG. 5] FIG. 5 shows a composite laminate 24 obtained by superimposing the structure shown in FIG. 3 and the structure shown in FIG. 4. (a) is a plan view. (b) is a sectional view taken along line BB in (a).
[図 6]図 6は、この発明に係る製造方法を適用して製造された積層型セラミック電子部 品の第 2の例としてのインダクタ素子 27を示す断面図である。  FIG. 6 is a cross-sectional view showing an inductor element 27 as a second example of the multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
[図 7]図 7は、この発明に係る製造方法を適用して製造された積層型セラミック電子部 品の第 3の例としてのインダクタ素子 28を示す断面図である。  FIG. 7 is a cross-sectional view showing an inductor element 28 as a third example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
[図 8]図 8は、図 1、図 6および図 7にそれぞれ示したインダクタ素子 1、 27および 28の 各々に備えるコア 2に代えて用いられるコア 2aを示す斜視図である。  FIG. 8 is a perspective view showing a core 2a used in place of the core 2 provided in each of the inductor elements 1, 27 and 28 shown in FIGS. 1, 6 and 7, respectively.
[図 9]図 9は、図 1、図 6および図 7にそれぞれ示したインダクタ素子 1、 27および 28の 各々に備えるコア 2に代えて用いられるコア 2bを示す斜視図である。 [図 10]図 10は、積層型セラミック電子部品の第 4の例としてのインダクタ素子を得るた めに用意される図 13に示した複合積層体 37を作製するために用意される第 1のセラ ミックグリーンシート 38を示し、図 2 (a)に相当する図である。 FIG. 9 is a perspective view showing a core 2b used in place of the core 2 provided in each of the inductor elements 1, 27 and 28 shown in FIGS. 1, 6 and 7, respectively. [FIG. 10] FIG. 10 shows a first example prepared for producing the composite multilayer body 37 shown in FIG. 13 prepared for obtaining an inductor element as a fourth example of a multilayer ceramic electronic component. FIG. 3 shows a ceramic green sheet 38, which corresponds to FIG. 2 (a).
[図 11]図 11は、図 10に示したセラミックグリーンシート 38上にコア 46を配置した状態 を示す、図 3 (a)に相当する図である。  FIG. 11 is a view corresponding to FIG. 3 (a), showing a state where the core 46 is arranged on the ceramic green sheet 38 shown in FIG. 10.
[図 12]図 12は、図 13に示した複合積層体 37を作製するために用意される第 2のセラ ミックグリーンシート 47を示す、図 4 (a)に相当する図である。  FIG. 12 is a view corresponding to FIG. 4 (a), showing a second ceramic green sheet 47 prepared for producing the composite laminate 37 shown in FIG. 13.
[図 13]図 13は、図 11に示した構造物と図 12に示した構造物とを重ね合わせて得ら れた複合積層体 37を示す、図 5 (a)に相当する図である。 FIG. 13 is a view corresponding to FIG. 5 (a), showing a composite laminate 37 obtained by superimposing the structure shown in FIG. 11 and the structure shown in FIG. 12. .
[図 14]図 14は、図 15に示した複合積層体 56を作製するために用意されるセラミック グリーンシート 57b〜63bならびに収縮抑制グリーンシート 71bおよび 72bを互いに 分離して示す断面図である。  14 is a cross-sectional view showing ceramic green sheets 57b to 63b and shrinkage suppression green sheets 71b and 72b prepared for producing the composite laminate 56 shown in FIG. 15 separately from each other.
[図 15]図 15は、図 14に示したセラミックグリーンシート 57b〜63bならびに収縮抑制 グリーンシート 71bおよび 72bを積層して得られた複合積層体 56を示す断面図であ る。  FIG. 15 is a cross-sectional view showing a composite laminate 56 obtained by laminating ceramic green sheets 57b to 63b and shrinkage suppression green sheets 71b and 72b shown in FIG.
[図 16]図 16は、図 15に示した複合積層体 56を焼成することによって得られた多層セ ラミック基板 55を示す断面図である。  FIG. 16 is a cross-sectional view showing a multilayer ceramic substrate 55 obtained by firing the composite laminate 56 shown in FIG.
[図 17]図 17は、図 16に示した多層セラミック基板 55に表面実装部品 75〜77を搭載 した状態を示す断面図である。  FIG. 17 is a cross-sectional view showing a state in which surface-mounted components 75 to 77 are mounted on multilayer ceramic substrate 55 shown in FIG.
[図 18]図 18は、積層型セラミック電子部品の第 6の例としての多層セラミック基板を得 るために作製される複合積層体 78を示す断面図である。  FIG. 18 is a cross-sectional view showing a composite laminate 78 produced to obtain a multilayer ceramic substrate as a sixth example of the multilayer ceramic electronic component.
[図 19]図 19は、積層型セラミック電子部品の第 7の例としての多層セラミック基板 80 を示す断面図である。  FIG. 19 is a cross-sectional view showing a multilayer ceramic substrate 80 as a seventh example of the multilayer ceramic electronic component.
符号の説明 Explanation of symbols
1, 27, 28, 70 インダクタ素子  1, 27, 28, 70 Inductor element
2, 2a, 2b, 46, 68 コア  2, 2a, 2b, 46, 68 cores
3, 53, 69 コイル状導体  3, 53, 69 Coiled conductor
4, 5, 29, 30, 57〜63 セラミック層 8, 16 セラミックグリーンシートまたは未焼結セラミック層 4, 5, 29, 30, 57-63 Ceramic layer 8, 16 Ceramic green sheet or green ceramic layer
9, 17, 39, 48 第 1の主面  9, 17, 39, 48 First main surface
10, 40, 73 第 1の導体パターン  10, 40, 73 First conductor pattern
11, 19, 41, 50 帯状導体部分  11, 19, 41, 50 Strip conductor
14, 20, 44, 51 第 2の主面  14, 20, 44, 51 Second main surface
15, 21, 45, 52, 71, 72, 79 収縮抑制層  15, 21, 45, 52, 71, 72, 79 Shrinkage inhibiting layer
18, 49, 74 第 2の導体パターン  18, 49, 74 Second conductor pattern
24, 37, 56, 78 複合積層体  24, 37, 56, 78 Composite laminate
31〜34, 81〜84 シールド板  31 ~ 34, 81 ~ 84 Shield plate
55, 80 多層セラミック基板  55, 80 multilayer ceramic substrate
57a〜63a 未焼結セラミック層  57a ~ 63a Unsintered ceramic layer
57b〜63b セラミックグリーンシート  57b ~ 63b ceramic green sheet
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0032] 図 1は、この発明に係る製造方法を適用して製造された積層型セラミック電子部品 の第 1の例としてのインダクタ素子 1を示す断面図である。 FIG. 1 is a cross-sectional view showing an inductor element 1 as a first example of a multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention.
[0033] 図 1を参照して、インダクタ素子 1は、平板状のフェライトのような磁性体セラミック焼 結体力 なるコア 2と、コア 2の周囲に形成されるコイル状導体 3と、層間にコア 2およ びコイル状導体 3を挟んだ状態で積層された 2層のセラミック層 4および 5とを備えて いる。このようなインダクタ素子 1は、図 2ないし図 5を参照して説明する製造方法によ つて製造されたものである。 Referring to FIG. 1, an inductor element 1 includes a core 2 having a magnetic ceramic sintered body force such as a plate-like ferrite, a coiled conductor 3 formed around the core 2, and a core between layers. 2 and two ceramic layers 4 and 5 laminated with a coiled conductor 3 sandwiched therebetween. Such an inductor element 1 is manufactured by the manufacturing method described with reference to FIGS.
[0034] 図 2ないし図 5の各々において、(a)は平面図を示し、(b)は(a)の線 B— Bに沿う断 面図を示している。 In each of FIGS. 2 to 5, (a) shows a plan view, and (b) shows a sectional view taken along line BB in (a).
[0035] まず、図 2に示すように、セラミック層 4となるべき第 1のセラミックグリーンシート 8が 用意される。第 1のセラミックグリーンシート 8は、低温焼結セラミック材料を主成分と することが好ましぐたとえば、有機ビヒクル中にアルミナ粉末およびホウ珪酸ガラス粉 末力 なる混合粉末を分散させて得られたスラリーをキャスティング法によってシート 状に成形することによって作製される。  First, as shown in FIG. 2, a first ceramic green sheet 8 to be the ceramic layer 4 is prepared. The first ceramic green sheet 8 is preferably composed mainly of a low-temperature sintered ceramic material, for example, a slurry obtained by dispersing a mixed powder consisting of alumina powder and borosilicate glass powder in an organic vehicle. It is produced by forming a sheet into a sheet by the casting method.
[0036] なお、第 1のセラミックグリーンシート 8は、上述のような低温焼結セラミック材料を主 成分とするもののほか、たとえばフェライトのような磁性材料を主成分とするものであ つてもよい。 [0036] The first ceramic green sheet 8 is mainly made of the low-temperature sintered ceramic material as described above. In addition to the component, it may be composed mainly of a magnetic material such as ferrite.
[0037] 第 1のセラミックグリーンシート 8の第 1の主面 9上には、前述したコイル状導体 3の 一部となる第 1の導体パターン 10が形成される。第 1の導体パターン 10は、導電性 ペーストをスクリーン印刷することによって形成される。第 1の導体パターン 10は、互 いに平行な複数個の帯状導体部分 11を備えて!/ヽる。これら帯状導体部分 11の数は 、所望のインダクタンスを考慮して選ばれる。また、帯状導体部分 11のライン Zスぺ ースについても、 30〜2000 μ mの範囲から所望のインダクタンスを考慮して選ばれ る。  [0037] On the first main surface 9 of the first ceramic green sheet 8, the first conductor pattern 10 which is a part of the coiled conductor 3 described above is formed. The first conductor pattern 10 is formed by screen printing a conductive paste. The first conductor pattern 10 includes a plurality of strip-like conductor portions 11 that are parallel to each other! The number of the strip-like conductor portions 11 is selected in consideration of a desired inductance. Further, the line Z space of the strip-shaped conductor portion 11 is also selected in the range of 30 to 2000 μm in consideration of a desired inductance.
[0038] 第 1の導体パターン 10は、また、端部に位置する帯状導体部分 11に接続される入 出力端部分 12および 13を有している。入出力端部分 12および 13は、第 1のセラミツ クグリーンシート 8の端縁にまで届くように形成される。  [0038] The first conductor pattern 10 also has input / output end portions 12 and 13 connected to the strip-shaped conductor portion 11 located at the end portion. The input / output end portions 12 and 13 are formed so as to reach the edge of the first ceramic green sheet 8.
[0039] また、第 1のセラミックグリーンシート 8の第 1の主面 9に対向する第 2の主面 14上に は、収縮抑制層 15が形成される。収縮抑制層 15は、第 1のセラミックグリーンシート 8 の焼結温度では実質的に焼結しな 、、たとえばアルミナ粉末のような無機材料粉末 を含むもので、たとえば、有機ビヒクル中にアルミナ粉末を分散させて得られたスラリ 一から形成される。  In addition, a shrinkage suppression layer 15 is formed on the second main surface 14 facing the first main surface 9 of the first ceramic green sheet 8. The shrinkage suppression layer 15 includes an inorganic material powder such as alumina powder that does not substantially sinter at the sintering temperature of the first ceramic green sheet 8, and includes, for example, alumina powder in an organic vehicle. It is formed from a slurry obtained by dispersing.
[0040] 収縮抑制層 15は、上述のスラリーをキャスティング法によってシート状に成形するこ とによって得られたグリーンシートを第 1のセラミックグリーンシート 8の第 2の主面 14 上に重ねることによって形成されても、スラリーを第 2のセラミックグリーンシート 8の第 2の主面 14上に塗布することによって形成されてもよい。  [0040] The shrinkage suppression layer 15 is formed by stacking a green sheet obtained by forming the above-mentioned slurry into a sheet shape by a casting method on the second main surface 14 of the first ceramic green sheet 8. Alternatively, the slurry may be formed by applying the slurry onto the second main surface 14 of the second ceramic green sheet 8.
[0041] また、図 3に示すように、たとえば 50〜300 mの厚みを有する平板状のコア 2が用 意される。コア 2は、前述したように、たとえばフェライトのような磁性体セラミック焼結 体から構成されるもので、これを得るための焼成温度は、後述する複合積層体の焼 成温度より高 、ことが好ま 、。  Further, as shown in FIG. 3, a flat core 2 having a thickness of, for example, 50 to 300 m is prepared. As described above, the core 2 is composed of, for example, a magnetic ceramic sintered body such as ferrite, and the firing temperature for obtaining this is higher than the firing temperature of the composite laminate described later. Favored ,.
[0042] 次に、図 3に示すように、コア 2が、第 1のセラミックグリーンシート 8の第 1の主面 9上 に配置される。このとき、第 1の導体パターン 10の端部、より具体的には、複数個の 帯状導体部分 11の各々の端部が露出するように、コア 2が位置合わせされる。コア 2 は、この段階で、接着剤等によって、第 1のセラミックグリーンシート 8に対して仮止め され、位置ずれが生じな 、ようにされることが好ま U、。 Next, as shown in FIG. 3, the core 2 is disposed on the first main surface 9 of the first ceramic green sheet 8. At this time, the core 2 is aligned so that the end portions of the first conductor pattern 10, more specifically, the end portions of each of the plurality of strip-like conductor portions 11 are exposed. Core 2 At this stage, it is preferable that the first ceramic green sheet 8 is temporarily fixed with an adhesive or the like so that no positional deviation occurs.
[0043] 他方、図 4に示すように、第 2のセラミックグリーンシート 16が用意される。第 2のセラ ミックグリーンシート 16は、図 1に示したセラミック層 5となるべきもので、その第 1の主 面(図 4において下方へ向く面) 17上には、コイル状導体 3の他部となる第 2の導体パ ターン 18が形成される。第 2の導体パターン 18は、互いに平行な複数個の帯状導体 部分 19を備えている。 On the other hand, as shown in FIG. 4, a second ceramic green sheet 16 is prepared. The second ceramic green sheet 16 is to be the ceramic layer 5 shown in FIG. 1, and on the first main surface (the surface facing downward in FIG. 4) 17, other than the coiled conductor 3. A second conductor pattern 18 is formed. The second conductor pattern 18 includes a plurality of strip-shaped conductor portions 19 that are parallel to each other.
[0044] また、第 2のセラミックグリーンシート 16の第 1の主面 17に対向する第 2の主面 20上 には、収縮抑制層 21が形成される。  In addition, a shrinkage suppression layer 21 is formed on the second main surface 20 facing the first main surface 17 of the second ceramic green sheet 16.
[0045] 上述した第 2のセラミックグリーンシート 16、第 2の導体パターン 18および収縮抑制 層 21の各々の材質および形成方法については、前述した第 1のセラミックグリーンシ ート 8、第 1の導体パターン 10および収縮抑制層 15の場合と実質的に同様である。  [0045] For the materials and forming methods of the second ceramic green sheet 16, the second conductor pattern 18 and the shrinkage suppression layer 21 described above, the first ceramic green sheet 8 and the first conductor described above are used. This is substantially the same as in the case of the pattern 10 and the shrinkage suppression layer 15.
[0046] 次に、図 5に示すように、図 3に示した構造物と図 4に示した構造物とが重ね合わさ れる。より詳細には、コア 2を介在させながら、第 1のセラミックグリーンシート 8の第 1 の主面 9と第 2のセラミックグリーンシート 16の第 1の主面 17とが互いに向き合い、力 つ第 1の導体パターン 10の端部と第 2の導体パターン 18の端部とが互いに接してコ ィル状に延びる導体を形成する状態となるように、第 1のセラミックグリーンシート 8と 第 2のセラミックグリーンシート 16とが重ね合わされる。このとき、第 1の導体パターン 1 0に備える複数個の帯状導体部分 11の各端部は、第 2の導体パターン 18に備える 対応の帯状導体部分 19の各端部と接する状態となり、複数のターン数を有するコィ ル状に延びる導体が形成される。  Next, as shown in FIG. 5, the structure shown in FIG. 3 and the structure shown in FIG. 4 are overlapped. More specifically, with the core 2 interposed, the first main surface 9 of the first ceramic green sheet 8 and the first main surface 17 of the second ceramic green sheet 16 face each other, and the first The first ceramic green sheet 8 and the second ceramic so that the end of the second conductor pattern 10 and the end of the second conductor pattern 18 are in contact with each other to form a coil-shaped conductor. Green sheet 16 is overlaid. At this time, each end portion of the plurality of strip-shaped conductor portions 11 included in the first conductor pattern 10 is in contact with each end portion of the corresponding strip-shaped conductor portion 19 included in the second conductor pattern 18, and A coil-like conductor having a number of turns is formed.
[0047] 以上のようにして、図 5に示すような複合積層体 24が得られる。この複合積層体 24 において、前述した第 1および第 2のセラミックグリーンシート 8および 16は、それぞれ 第 1および第 2の未焼結セラミック層を形成している。したがって、以下の説明におい て、第 1および第 2のセラミックグリーンシートを示す参照符号「8」および「16」は、そ れぞれ、第 1および第 2の未焼結セラミック層を示す場合にも用いることにする。  [0047] As described above, a composite laminate 24 as shown in Fig. 5 is obtained. In the composite laminate 24, the first and second ceramic green sheets 8 and 16 described above form first and second unsintered ceramic layers, respectively. Accordingly, in the following description, the reference numerals “8” and “16” indicating the first and second ceramic green sheets are used to indicate the first and second unsintered ceramic layers, respectively. Will also be used.
[0048] 複合積層体 24は、磁性体セラミック焼結体力 なるコア 2と、コア 2の周囲に形成さ れるコイル状導体 3と、層間にコイル 2およびコイル状導体 3を挟んだ状態で積層され た第 1および第 2の未焼結セラミック層 8および 16と、未焼結セラミック層 8および 16 にそれぞれ接するように配置された収縮抑制層 15および 21とを備えて 、る。 [0048] The composite laminate 24 is laminated with the core 2 having magnetic ceramic sintered body strength, the coiled conductor 3 formed around the core 2, and the coil 2 and the coiled conductor 3 sandwiched between the layers. The first and second unsintered ceramic layers 8 and 16 and the shrinkage suppression layers 15 and 21 disposed so as to be in contact with the unsintered ceramic layers 8 and 16, respectively.
[0049] 次に、上述の複合積層体 24は、積層方向にプレスされた後、未焼結セラミック層 8 および 16が焼結する温度および所定の雰囲気中で焼成される。次いで、収縮抑制 層 15および 21が除去されたとき、図 1に示すようなインダクタ素子 1が得られる。  [0049] Next, after the composite laminate 24 is pressed in the laminating direction, it is fired at a temperature and a predetermined atmosphere at which the unsintered ceramic layers 8 and 16 are sintered. Next, when the shrinkage suppression layers 15 and 21 are removed, an inductor element 1 as shown in FIG. 1 is obtained.
[0050] 上述の焼成工程では、コア 2は焼結体力 構成されて 、るので、コア 2とコイル状導 体 3ならびに未焼結セラミック層 8および 16の各々との間で、材料の拡散が実質的に 生じない。したがって、コア 2が有する磁性体セラミック焼結体本来の材料特性を維 持することができる。  [0050] In the firing step described above, the core 2 has a sintered body force, and therefore, diffusion of material between the core 2 and the coiled conductor 3 and each of the unsintered ceramic layers 8 and 16 occurs. Virtually does not occur. Therefore, the original material characteristics of the magnetic ceramic sintered body possessed by the core 2 can be maintained.
[0051] また、焼成工程では、収縮抑制層 15および 21が未焼結セラミック層 8および 16の 収縮を抑制するように作用するため、得られたインダクタ素子 1において、反り、うねり または割れが生じにくぐ高い歩留まりをもって、インダクタ素子 1を製造することがで きる。  [0051] Further, in the firing step, the shrinkage suppression layers 15 and 21 act so as to suppress the shrinkage of the unsintered ceramic layers 8 and 16, and thus the obtained inductor element 1 is warped, swelled or cracked. The inductor element 1 can be manufactured with a very high yield.
[0052] また、最外層を形成する収縮抑制層 15および 21については、上述した焼成工程 において焼結しないため、これを容易に除去することができる。なお、収縮抑制層 15 および 21を、比較的薄く形成し、焼成工程において、未焼結セラミック層 8および 16 に含まれる材料の一部を収縮抑制層 15および 21に浸透させ、収縮抑制層 15およ び 21を固化させてもよい。この場合には、収縮抑制層 15および 21は、製品としての インダクタ素子 1に残されることになる。また、収縮抑制層が、たとえば、未焼結セラミ ック層 8および 16の各々とコイル状導体 13との間の界面に沿って形成されてもよい。 また、最外層を形成する収縮抑制層 15および 21のうち、いずれか一方のみが形成 されてちょい。  [0052] Further, since the shrinkage suppression layers 15 and 21 forming the outermost layer are not sintered in the above-described firing step, they can be easily removed. The shrinkage suppression layers 15 and 21 are formed relatively thin, and in the firing step, a part of the material contained in the unsintered ceramic layers 8 and 16 is permeated into the shrinkage suppression layers 15 and 21, and the shrinkage suppression layer 15 And 21 may be solidified. In this case, the shrinkage suppression layers 15 and 21 are left in the inductor element 1 as a product. Further, the shrinkage suppression layer may be formed along the interface between each of the unsintered ceramic layers 8 and 16 and the coiled conductor 13, for example. In addition, only one of the shrinkage suppression layers 15 and 21 forming the outermost layer may be formed.
[0053] なお、図 1ないし図 5では図示されないが、インダクタ素子 1の外表面上には、コィ ル状導体 3の入出力端部分 12および 13にそれぞれ電気的に接続される外部端子 電極が形成される。  Although not shown in FIGS. 1 to 5, external terminal electrodes electrically connected to the input / output end portions 12 and 13 of the coil conductor 3 are provided on the outer surface of the inductor element 1. It is formed.
[0054] 図 6および図 7は、この発明に係る製造方法を適用して製造された積層型セラミック 電子部品の第 2および第 3の例としてのインダクタ素子 27および 28をそれぞれ示す 、図 1に対応する断面図である。図 6および図 7において、図 1に示した要素に相当 する要素には同様の参照符号を付し、重複する説明は省略する。 FIGS. 6 and 7 show inductor elements 27 and 28 as second and third examples of multilayer ceramic electronic components manufactured by applying the manufacturing method according to the present invention, respectively. FIG. Corresponds to the elements shown in Figure 1 in Figures 6 and 7. The same reference numerals are given to the elements to be repeated, and the duplicate description is omitted.
[0055] 図 6および図 7にそれぞれ示したインダクタ素子 27および 28は、セラミック層として 、セラミック層 4および 5に加えて、セラミック層 29および 30をさらに備えている。  Inductor elements 27 and 28 shown in FIGS. 6 and 7, respectively, further include ceramic layers 29 and 30 in addition to ceramic layers 4 and 5 as ceramic layers.
[0056] 図 6に示したインダクタ素子 27では、コア 2およびコイル導体 3を積層方向に挟むよ うに、磁性体セラミック焼結体力もなるシールド板 31および 32が、それぞれ、セラミツ ク層 4および 29間の界面ならびにセラミック層 5および 30間の界面に沿って配置され ている。  [0056] In the inductor element 27 shown in FIG. 6, the shield plates 31 and 32 having the magnetic ceramic sintered body force so as to sandwich the core 2 and the coil conductor 3 in the laminating direction are provided with ceramic layers 4 and 29, respectively. And the interface between the ceramic layers 5 and 30.
[0057] 他方、図 7に示したインダクタ素子 28では、上述したシールド板 31および 32にカロえ て、コア 2およびコイル状導体 3が位置するセラミック層 4および 5間の界面において、 コア 2およびコイル状導体 3を挟むように、磁性体セラミック焼結体力 なるシールド板 33および 34が配置されて!、る。  On the other hand, in the inductor element 28 shown in FIG. 7, at the interface between the ceramic layers 4 and 5 where the core 2 and the coiled conductor 3 are located, the core 2 and Shield plates 33 and 34 having magnetic ceramic sintered body strength are arranged so as to sandwich the coiled conductor 3.
[0058] このようなインダクタ素子 27および 28を製造するために作製される複合積層体は、 セラミック層 4、 5、 29および 30となるべき未焼結セラミック層を備えていて、磁性体セ ラミック焼結体力もなるシールド板 31〜34は、これら未焼結セラミック層間の界面に 沿って配置されている。  [0058] The composite laminate produced to manufacture such inductor elements 27 and 28 includes a green ceramic layer that should be ceramic layers 4, 5, 29, and 30, and has a magnetic ceramic layer. The shield plates 31 to 34 having a sintered body strength are arranged along the interface between these unsintered ceramic layers.
[0059] 上述のように、インダクタ素子 27および 28をそれぞれ製造するために作製される複 合積層体には、比較的広 、面積を有する磁性体セラミック焼結体力 なるシールド板 31および 32が未焼結セラミック層間の特定の界面に沿って配置されているので、焼 成工程では、収縮抑制層による収縮抑制効果に加えて、シールド板 31および 32に よる収縮抑制効果を発揮させることができる。  [0059] As described above, the composite laminates manufactured to manufacture the inductor elements 27 and 28, respectively, do not have the shield plates 31 and 32 that have a relatively large and large magnetic ceramic sintered body strength. Since it is disposed along a specific interface between the sintered ceramic layers, in the sintering process, in addition to the shrinkage suppression effect by the shrinkage suppression layer, the shrinkage suppression effect by the shield plates 31 and 32 can be exhibited.
[0060] また、図 6に示したインダクタ素子 27によれば、シールド板 31および 32による磁力 線の閉じ込め効果によって、損失を低減することができる。図 7に示したインダクタ素 子 28では、さらに、シールド板 33および 34による磁力線の閉じ込め効果を発揮させ ることができるので、損失をより低減することができる。  Further, according to the inductor element 27 shown in FIG. 6, the loss can be reduced by the effect of confinement of the magnetic lines of force by the shield plates 31 and 32. In the inductor element 28 shown in FIG. 7, the effect of confining the magnetic lines of force by the shield plates 33 and 34 can be further exhibited, so that the loss can be further reduced.
[0061] なお、図 6に示したインダクタ素子 27において、シールド板 31および 32のうち、い ずれか一方のみを備えるように変更されてもよい。また、図 7に示したインダクタ素子 2 8において、シールド板 31〜34のうち、いずれ力 1つのみを備えるように変更されて ちょい。 [0062] 図 8および図 9は、上述したインダクタ素子 1、 27および 28の各々において備えるコ ァ 2の代替例を示す斜視図である。 Note that the inductor element 27 shown in FIG. 6 may be modified so as to include only one of the shield plates 31 and 32. In addition, the inductor element 28 shown in FIG. 7 may be changed so as to have only one of the shield plates 31 to 34. FIG. 8 and FIG. 9 are perspective views showing alternative examples of the core 2 provided in each of the inductor elements 1, 27 and 28 described above.
[0063] インダクタ素子 1、 27および 28の各々においては、図示したように、平板状のコア 2 が用いられていた。このようなコア 2は、より薄い方が好ましぐ焼成工程において、未 焼結セラミック層 8および 16との間で収縮挙動を合わせやす 、と ヽぅ利点を有して!/、 る。 [0063] In each of the inductor elements 1, 27, and 28, as shown in the figure, a flat core 2 was used. Such a core 2 has the advantage that the shrinkage behavior can be easily matched with the unsintered ceramic layers 8 and 16 in a firing process in which a thinner one is preferred!
[0064] 他方、図 8に示したコア 2aは、断面円形の円柱状である。このようなコア 2aを用いる と、磁束の集中がないため、コイル状導体 3における損失を少なくすることができると いう利点がある。  [0064] On the other hand, the core 2a shown in FIG. 8 has a cylindrical shape with a circular cross section. Use of such a core 2a has an advantage that the loss in the coiled conductor 3 can be reduced because there is no concentration of magnetic flux.
[0065] 図 9に示したコア 2bは、断面楕円の楕円柱状である。このようなコア 2bによれば、上 述したコア 2aの場合と同様の効果を期待できるとともに、ハンドリング性が円柱状のコ ァ 2aより良好であり、また、焼成工程において、未焼結セラミック層との間で収縮挙動 を合わせやす 、と 、う効果も期待できる。  [0065] The core 2b shown in FIG. 9 has an elliptic cylinder shape with an elliptical cross section. According to such a core 2b, the same effect as in the case of the core 2a described above can be expected, and the handling property is better than that of the cylindrical core 2a. It can be expected that the shrinkage behavior can be easily matched with the other.
[0066] 図 10ないし図 13は、この発明にとって興味ある積層型セラミック電子部品の第 4の 例としてのインダクタ素子を得るために作製される複合積層体 37の製造工程を順次 示す図である。図 10、図 11、図 12および図 13は、それぞれ、前述した図 2 (a)、図 3 (a)、図 4 (a)および図 5 (a)に対応する平面図である。  FIG. 10 to FIG. 13 are diagrams sequentially showing the manufacturing process of the composite laminate 37 produced to obtain the inductor element as the fourth example of the multilayer ceramic electronic component of interest to the present invention. FIGS. 10, 11, 12, and 13 are plan views corresponding to FIGS. 2 (a), 3 (a), 4 (a), and 5 (a), respectively.
[0067] 以下に、複合積層体 37の製造方法について説明する。なお、複合積層体 37の製 造方法に関して、特に断らない限り、前述の図 2ないし図 5を参照して説明した複合 積層体 24の製造方法と実質的に同様の方法を適用することができる。  [0067] Hereinafter, a method for producing the composite laminate 37 will be described. As far as the manufacturing method of the composite laminate 37 is concerned, a method substantially similar to the manufacturing method of the composite laminate 24 described with reference to FIGS. 2 to 5 described above can be applied unless otherwise specified. .
[0068] まず、図 10に示すように、セラミック層となるべき第 1のセラミックグリーンシート 38が 用意される。第 1のセラミックグリーンシート 38の第 1の主面 39上には、コイル状導体 の一部となる第 1の導体パターン 40が形成される。第 1の導体パターン 40は、円弧 状に配列された複数個の帯状導体部分 41を備えている。また、第 1の導体パターン 40は、入出力端部分 42および 43を備えている。入出力端部分 42および 43は、第 1 のセラミックグリーンシート 38の端縁にまで届くように形成される。  First, as shown in FIG. 10, a first ceramic green sheet 38 to be a ceramic layer is prepared. On the first main surface 39 of the first ceramic green sheet 38, a first conductor pattern 40 that is a part of a coiled conductor is formed. The first conductor pattern 40 includes a plurality of strip-like conductor portions 41 arranged in an arc shape. The first conductor pattern 40 includes input / output end portions 42 and 43. The input / output end portions 42 and 43 are formed so as to reach the edge of the first ceramic green sheet 38.
[0069] また、第 1のセラミックグリーンシート 38の第 1の主面 39に対向する第 2の主面(図 1 0において下方へ向く面) 44上には、収縮抑制層 45が形成される。なお、図 10では 、収縮抑制層 45は、第 1のセラミックグリーンシート 38の下方に隠れる位置にある。 In addition, a shrinkage suppression layer 45 is formed on a second main surface (a surface facing downward in FIG. 10) 44 that faces the first main surface 39 of the first ceramic green sheet 38. . In Figure 10, The shrinkage suppression layer 45 is in a position hidden under the first ceramic green sheet 38.
[0070] 他方、図 11に示すように、ドーナツ状のコア 46が用意される。コア 46は、たとえば フェライトのような磁性体セラミック焼結体力も構成される。コア 46の断面形状は、矩 形であっても、円形、楕円等の他の形状であってもよい。 On the other hand, as shown in FIG. 11, a donut-shaped core 46 is prepared. The core 46 also has a magnetic ceramic sintered body force such as ferrite. The cross-sectional shape of the core 46 may be rectangular, or other shapes such as a circle and an ellipse.
[0071] 次に、図 11に示すように、コア 46力 第 1のセラミックグリーンシート 38の第 1の主 面 39上に配置される。このとき、第 1の導体パターン 40の端部、より具体的には、複 数個の帯状導体部分 41の各々の端部が露出するように、コア 46が位置合わせされ る。 Next, as shown in FIG. 11, the core 46 force is disposed on the first main surface 39 of the first ceramic green sheet 38. At this time, the core 46 is aligned so that the end portions of the first conductor pattern 40, more specifically, the end portions of the plurality of strip-like conductor portions 41 are exposed.
[0072] 他方、図 12に示すように、セラミック層となるべき第 2のセラミックグリーンシート 47が 用意される。第 2のセラミックグリーンシート 47の第 1の主面(図 12において下方へ向 く面) 48には、コイル状導体の他部となる第 2の導体パターン 49が形成される。第 2 の導体パターン 49は、円弧状に配列された複数個の帯状導体部分 50を備えている  On the other hand, as shown in FIG. 12, a second ceramic green sheet 47 to be a ceramic layer is prepared. On the first main surface (surface facing downward in FIG. 12) 48 of the second ceramic green sheet 47, a second conductor pattern 49 serving as the other part of the coiled conductor is formed. The second conductor pattern 49 includes a plurality of strip-like conductor portions 50 arranged in an arc shape.
[0073] また、第 2のセラミックグリーンシート 47の第 1の主面 48に対向する第 2の主面(図 1 2において上方へ向く面) 51上には、収縮抑制層 52が形成される。なお、図 12では 、第 2のセラミックグリーンシート 47が、収縮抑制層 52の下方に隠れた位置にある。 In addition, a shrinkage suppression layer 52 is formed on a second main surface (a surface facing upward in FIG. 12) 51 facing the first main surface 48 of the second ceramic green sheet 47. . In FIG. 12, the second ceramic green sheet 47 is in a position hidden under the shrinkage suppression layer 52.
[0074] 次に、図 13に示すように、図 11に示した構造物と図 12に示した構造物とが重ね合 わされる。より詳細には、コア 46を介在させながら、第 1のセラミックグリーンシート 38 の第 1の主面 39と第 2のセラミックグリーンシート 47の第 1の主面 48とが互いに向き 合い、かつ第 1の導体パターン 40の端部と第 2の導体パターン 49の端部とが互いに 接してコイル状に延びる導体を形成する状態となるように、第 1のセラミックグリーンシ ート 38と第 2のセラミックグリーンシート 47とが重ね合わされる。  Next, as shown in FIG. 13, the structure shown in FIG. 11 and the structure shown in FIG. 12 are overlapped. More specifically, with the core 46 interposed, the first main surface 39 of the first ceramic green sheet 38 and the first main surface 48 of the second ceramic green sheet 47 face each other and the first The first ceramic green sheet 38 and the second ceramic so that the end of the conductor pattern 40 and the end of the second conductor pattern 49 are in contact with each other to form a conductor extending in a coil shape. Green sheet 47 is overlaid.
[0075] このとき、第 1の導体パターン 40に備える複数個の帯状導体部分 41の各端部は、 第 2の導体パターン 49に備える対応の帯状導体部分 50の各端部と接する状態となり 、複数のターン数を有するコイル状に延びる導体を構成するコイル状導体 53が、全 体として、ドーナツ状のコア 46に沿って延びるように形成される。  At this time, each end of the plurality of strip-shaped conductor portions 41 provided in the first conductor pattern 40 is in contact with each end of the corresponding strip-shaped conductor portion 50 provided in the second conductor pattern 49. A coiled conductor 53 constituting a coil-shaped conductor having a plurality of turns is formed so as to extend along the donut-shaped core 46 as a whole.
[0076] このようにして得られた複合積層体 37について、前述した実施形態の場合と同様、 プレス工程、焼成工程、収縮抑制層 45および 52の除去工程ならびに外部端子電極 形成工程が実施され、それによつて、目的とするインダクタ素子が得られる。 [0076] About the composite laminate 37 thus obtained, as in the case of the above-described embodiment, the pressing step, the firing step, the removal step of the shrinkage suppression layers 45 and 52, and the external terminal electrode A forming step is performed, whereby the target inductor element is obtained.
[0077] 以上、この発明を、インダクタ機能を備える単機能素子としてのインダクタ素子の製 造方法について説明したが、この発明は、インダクタ機能を含む複合された複数個 の機能を有する、多層セラミック基板の製造方法にも適用することができる。以下に、 この発明が多層セラミック基板の製造方法に適用された場合の実施形態について説 明する。 [0077] While the present invention has been described with respect to a method for manufacturing an inductor element as a single-function element having an inductor function, the present invention is a multilayer ceramic substrate having a plurality of functions including an inductor function. This method can also be applied. Hereinafter, an embodiment when the present invention is applied to a method for manufacturing a multilayer ceramic substrate will be described.
[0078] 図 14ないし図 16は、積層型セラミック電子部品の第 5の例としての多層セラミック基 板 55の製造方法を説明するための断面図である。  14 to 16 are cross-sectional views for explaining a method for manufacturing a multilayer ceramic substrate 55 as a fifth example of the multilayer ceramic electronic component.
[0079] 概略的に説明すると、図 16に示した多層セラミック基板 55を得るため、図 15に示し た複合積層体 56が作製される。複合積層体 56は、積層前の段階では、図 14に示す ような要素に分解される。なお、多層セラミック基板 55の製造方法において、特に断 らない限り、基本的には、前述したインダクタ素子 1等の製造方法を適用することがで きる。  Describing schematically, in order to obtain the multilayer ceramic substrate 55 shown in FIG. 16, the composite laminate 56 shown in FIG. 15 is produced. The composite laminate 56 is disassembled into elements as shown in FIG. 14 in the stage before lamination. In the method for manufacturing the multilayer ceramic substrate 55, the above-described manufacturing method for the inductor element 1 and the like can be basically applied unless otherwise specified.
[0080] まず、図 16を参照して、多層セラミック基板 55の構成について説明する。  First, the configuration of the multilayer ceramic substrate 55 will be described with reference to FIG.
[0081] 多層セラミック基板 55は、複数層のセラミック層 57〜63を備えている。また、多層セ ラミック基板 55は、配線導体として、その一方および他方主面上にそれぞれ形成さ れるいくつかの外部導体膜 64および 65と、セラミック層 57〜63の各々間の特定の 界面に沿って形成されるいくつかの内部導体膜 66と、セラミック層 57〜63の特定の ものを貫通するように設けられる 、くつかのビアホール導体 67とを備えて 、る。これら の配線導体は、その少なくとも一部によって、コンデンサまたはインダクタのような受 動素子を構成している。  The multilayer ceramic substrate 55 includes a plurality of ceramic layers 57 to 63. Further, the multilayer ceramic substrate 55 serves as a wiring conductor along a specific interface between each of several external conductor films 64 and 65 formed on one and the other main surfaces thereof and ceramic layers 57 to 63, respectively. And several via-conductors 66 provided so as to penetrate through a specific one of the ceramic layers 57 to 63. These wiring conductors constitute a passive element such as a capacitor or an inductor by at least a part thereof.
[0082] また、多層セラミック基板 55は、平板状のコア 68およびその周囲に形成されるコィ ル状導体 69とをもって構成されるインダクタ素子 70を備えて 、る。インダクタ素子 70 は、セラミック層 60および 61の間に配置されている。インダクタ素子 70は、前述した 単機能素子としてのインダクタ素子 1等と実質的に同様の構造を有している。  In addition, the multilayer ceramic substrate 55 includes an inductor element 70 including a flat core 68 and a coil conductor 69 formed around the core 68. Inductor element 70 is disposed between ceramic layers 60 and 61. The inductor element 70 has substantially the same structure as the inductor element 1 or the like as a single function element described above.
[0083] 上述のような多層セラミック基板 55を製造するために作製される複合積層体 56に ついて、図 14および図 15を参照して説明する。図 14および図 15において、図 16に 示した要素に相当する要素には同様の参照符号を付し、重複する説明は省略する。 [0084] 図 15と図 16とを対比すればわ力るように、図 15に示した複合積層体 56は、セラミツ ク層 57〜63の各々に対応する未焼結セラミック層 57a〜63aを備えている。これら未 焼結セラミック層 57a〜63aの各々に関連して、外部導体膜 64および 65、内部導体 膜 66およびビアホール導体 67が設けられている。未焼結セラミック層 60aおよび 61a の間には、コア 68およびコイル状導体 69をもって構成されるインダクタ素子 70が配 置されている。さらに、複合積層体 56の最外層を形成するように、収縮抑制層 71お よび 72が配置されている。 A composite laminate 56 produced for producing the multilayer ceramic substrate 55 as described above will be described with reference to FIG. 14 and FIG. 14 and FIG. 15, elements corresponding to those shown in FIG. 16 are denoted by the same reference numerals, and redundant description is omitted. [0084] As shown in FIG. 15 and FIG. 16, the composite laminate 56 shown in FIG. 15 includes unsintered ceramic layers 57a to 63a corresponding to the ceramic layers 57 to 63, respectively. I have. In relation to each of these unsintered ceramic layers 57a to 63a, outer conductor films 64 and 65, an inner conductor film 66 and a via-hole conductor 67 are provided. Between the unsintered ceramic layers 60a and 61a, an inductor element 70 including a core 68 and a coiled conductor 69 is disposed. Further, shrinkage suppression layers 71 and 72 are disposed so as to form the outermost layer of the composite laminate 56.
[0085] 図 15に示すような複合積層体 56を作製するため、図 14に示すように、未焼結セラ ミック層 57a〜63aにそれぞれ対応するセラミックグリーンシート 57b〜63bが用意さ れるとともに、収縮抑制層 71および 72にそれぞれ対応する収縮抑制グリーンシート 7 lbおよび 72bが用意される。さらに、磁性体セラミック焼結体力もなる平板状のコア 6 8が用意される。  In order to produce the composite laminate 56 as shown in FIG. 15, ceramic green sheets 57b to 63b respectively corresponding to the unsintered ceramic layers 57a to 63a are prepared as shown in FIG. Shrinkage suppression green sheets 7 lb and 72b corresponding to the shrinkage suppression layers 71 and 72, respectively, are prepared. Further, a flat core 68 having magnetic ceramic sintered body strength is prepared.
[0086] 次に、セラミックグリーンシート 57b〜63bの特定のものには、ビアホール導体 67が 設けられる。また、内部導体膜 66は、コア 68より下方に位置するセラミックグリーンシ ート 57b〜60bについては、各々の上方主面上に形成され、コア 68より上方に位置 するセラミックグリーンシート 61b〜63bについては、各々の下方主面上に形成される 。なお、セラミックグリーンシート 60bの上方主面上に形成された内部導体膜 66の少 なくとも一部は、セラミックグリーンシート 61bの下方主面上に形成されてもよい。  [0086] Next, a specific one of the ceramic green sheets 57b to 63b is provided with a via-hole conductor 67. Further, the inner conductor film 66 is formed on each upper main surface of the ceramic green sheets 57b to 60b positioned below the core 68, and the ceramic green sheets 61b to 63b positioned above the core 68. Are formed on each lower main surface. Note that at least a part of the inner conductor film 66 formed on the upper main surface of the ceramic green sheet 60b may be formed on the lower main surface of the ceramic green sheet 61b.
[0087] 収縮抑制グリーンシート 71bの上方主面上には、外部導体膜 64が形成され、他方 、収縮抑制グリーンシート 72bの下方主面上には、外部導体膜 65が形成される。こ れら外部導体膜 64および 65は、後の工程で、それぞれ、セラミックグリーンシート 57 bおよび 63b側に転写されるものである力 このように、外部導体膜 64および 65を、 それぞれ、収縮抑制グリーンシート 71bおよび 72b上に形成したのは、セラミックダリ ーンシート 57bおよび 63bの各々について、その両主面上に導体膜を互いに位置合 わせした状態で形成する煩雑さを避けるためである。  An external conductor film 64 is formed on the upper main surface of the shrinkage suppression green sheet 71b, and an external conductor film 65 is formed on the lower main surface of the shrinkage suppression green sheet 72b. These outer conductor films 64 and 65 are forces that are transferred to the ceramic green sheets 57b and 63b, respectively, in the subsequent process. The reason for forming the green sheets 71b and 72b is to avoid the complexity of forming the ceramic film 57b and 63b in such a manner that the conductor films are aligned with each other on both main surfaces.
[0088] また、セラミックグリーンシート 60bの上方主面上には、コイル状導体 69の一部とな る第 1の導体パターン 73が形成され、セラミックグリーンシート 61bの下方主面上には 、コイル状導体 69の他部となる第 2の導体パターン 74が形成される。これら第 1およ び第 2の導体パターン 73および 74は、図 2ないし図 5において図示されている第 1お よび第 2の導体パターン 10および 18とそれぞれ実質的に同様の形状を有している。 [0088] Further, a first conductor pattern 73 that is a part of the coil-shaped conductor 69 is formed on the upper main surface of the ceramic green sheet 60b, and a coil is formed on the lower main surface of the ceramic green sheet 61b. A second conductor pattern 74 which is the other part of the shaped conductor 69 is formed. These first and The second conductor patterns 73 and 74 have substantially the same shape as the first and second conductor patterns 10 and 18 shown in FIGS.
[0089] 次に、図 15に示す複合積層体 56を得るため、次のように、積層工程が実施される Next, in order to obtain the composite laminate 56 shown in FIG. 15, a lamination process is performed as follows.
[0090] 図 14を参照して、まず、収縮抑制グリーンシート 71b上に、セラミックグリーンシート 57b〜60bが順次積層され、得られた積層体が、たとえば 20〜150MPaの圧力で 積層方向にプレスされる。 Referring to FIG. 14, first, ceramic green sheets 57b-60b are sequentially laminated on shrinkage-suppressing green sheet 71b, and the obtained laminate is pressed in the laminating direction at a pressure of 20-150 MPa, for example. The
[0091] 次に、コア 68力 セラミックグリーンシート 60b上に配置される。このとき、第 1の導体 パターン 73の端部が露出するように、コア 68が位置合わせされる。また、コア 68は、 接着剤等によって、セラミックグリーンシート 60bに対して仮止めされる。  [0091] Next, the core 68 is disposed on the ceramic green sheet 60b. At this time, the core 68 is aligned so that the end portion of the first conductor pattern 73 is exposed. The core 68 is temporarily fixed to the ceramic green sheet 60b with an adhesive or the like.
[0092] 他方、収縮抑制グリーンシート 72b上に、セラミックグリーンシート 63b〜61bが順次 積層され、得られた積層体が、たとえば 20〜150MPaの圧力で積層方向にプレスさ れる。  On the other hand, ceramic green sheets 63b to 61b are sequentially laminated on the shrinkage-suppressing green sheet 72b, and the obtained laminated body is pressed in the lamination direction at a pressure of 20 to 150 MPa, for example.
[0093] 次に、上述したセラミックグリーンシート 60bおよび 61bが向かい合うように、収縮抑 制グリーンシート 71b、セラミックグリーンシート 57b〜60bならびにコア 68を備える積 層体と、収縮抑制グリーンシート 72bおよびセラミックグリーンシート 6 lb〜63bを備え る積層体とが積み重ねられ、全体が、たとえば 20〜200MPaの圧力で積層方向に プレスされる。  [0093] Next, a stack body including a shrinkage suppression green sheet 71b, ceramic green sheets 57b to 60b, and a core 68, and a shrinkage suppression green sheet 72b and ceramic green so that the ceramic green sheets 60b and 61b described above face each other. Laminates with sheets 6 lb to 63b are stacked and the whole is pressed in the laminating direction, for example at a pressure of 20 to 200 MPa.
[0094] このようにして、図 15に示した複合積層体 56が得られる。  In this manner, the composite laminate 56 shown in FIG. 15 is obtained.
[0095] 次に、複合積層体 56を、未焼結セラミック層 57a〜63aが焼結する温度および所定 の雰囲気で焼成する焼成工程が実施される。そして、焼成後において、収縮抑制層 71および 72が除去されることによって、図 16に示した多層セラミック基板 55が得られ る。なお、焼成工程において、複合積層体 56に対して、 50〜: LOOOkPa程度の圧力 を積層方向に加えておくと、より平坦性に優れた多層セラミック基板 55を得ることがで きる。次に、外部導体膜 64および 65には、必要に応じて、めっき処理が施される。  [0095] Next, a firing step is performed in which the composite laminate 56 is fired at a temperature and a predetermined atmosphere at which the unsintered ceramic layers 57a to 63a are sintered. Then, after firing, the shrinkage suppression layers 71 and 72 are removed, whereby the multilayer ceramic substrate 55 shown in FIG. 16 is obtained. In the firing step, if a pressure of about 50 to about LOOOkPa is applied to the composite laminate 56 in the stacking direction, a multilayer ceramic substrate 55 with better flatness can be obtained. Next, the outer conductor films 64 and 65 are plated as necessary.
[0096] 図 17には、図 16に示した多層セラミック基板 55に表面実装部品 75〜77が搭載さ れた状態が示されている。表面実装部品 75〜77は、外部導体膜 65に半田付け等 をもって電気的に接続されることにより、多層セラミック基板 55に表面実装される。 [0097] 図 18は、積層型セラミック電子部品の第 6の例としての多層セラミック基板を得るた めに作製された複合積層体 78を示す断面図である。図 18に示した複合積層体 78 は、図 15に示した複合積層体 56と共通する多くの要素を備えているので、図 18に おいて、図 15に示した要素に相当する要素には同様の参照符号を付し、重複する 説明は省略する。 FIG. 17 shows a state in which the surface mount components 75 to 77 are mounted on the multilayer ceramic substrate 55 shown in FIG. The surface-mounted components 75 to 77 are surface-mounted on the multilayer ceramic substrate 55 by being electrically connected to the external conductor film 65 by soldering or the like. FIG. 18 is a cross-sectional view showing a composite laminate 78 produced to obtain a multilayer ceramic substrate as a sixth example of the multilayer ceramic electronic component. The composite laminate 78 shown in FIG. 18 has many elements in common with the composite laminate 56 shown in FIG. 15. Therefore, in FIG. 18, the elements corresponding to the elements shown in FIG. The same reference numerals are assigned, and duplicate descriptions are omitted.
[0098] 図 18に示した複合積層体 78は、未焼結セラミック層 57a〜63a間の界面に沿って 、収縮抑制層 79が配置されていることを特徴としている。収縮抑制層 79は、その厚 みが比較的薄ぐ焼成工程の結果、未焼結セラミック層 57a〜63aに含まれる材料の 一部が浸透することによって固化される。したがって、収縮抑制層 79は、後で除去さ れる必要はない。  The composite laminate 78 shown in FIG. 18 is characterized in that a shrinkage suppression layer 79 is disposed along the interface between the unsintered ceramic layers 57a to 63a. As a result of the firing process in which the shrinkage suppression layer 79 is relatively thin, a part of the material contained in the unsintered ceramic layers 57a to 63a penetrates and is solidified. Therefore, the shrinkage suppression layer 79 does not need to be removed later.
[0099] 図 18に示した実施態様では、収縮抑制層 79は、未焼結セラミック層 57a〜63a間 のすベての界面に沿って配置された力 S、すべての界面に沿って配置されなくてもよ い。  [0099] In the embodiment shown in FIG. 18, the shrinkage suppression layer 79 is disposed along all interfaces, the force S disposed along all interfaces between the unsintered ceramic layers 57a-63a. You don't have to.
[0100] また、図 18に示した複合積層体 78において、さらに、図 15に示した収縮抑制層 71 および 72のような最外層を形成する収縮抑制層が形成されてもよい。  [0100] Further, in the composite laminate 78 shown in FIG. 18, a shrinkage suppression layer that forms outermost layers such as the shrinkage suppression layers 71 and 72 shown in FIG. 15 may be further formed.
[0101] 図 19は、この発明に係る製造方法を適用して製造された積層型セラミック電子部品 の第 7の例としての多層セラミック基板 80を示す断面図である。図 19に示した多層セ ラミック基板 80は、図 16に示した多層セラミック基板 55と共通する多くの要素を備え ているので、図 19において、図 16に示した要素に相当する要素には同様の参照符 号を付し、重複する説明は省略する。  FIG. 19 is a cross-sectional view showing a multilayer ceramic substrate 80 as a seventh example of the multilayer ceramic electronic component manufactured by applying the manufacturing method according to the present invention. Since the multilayer ceramic substrate 80 shown in FIG. 19 includes many elements in common with the multilayer ceramic substrate 55 shown in FIG. 16, the elements corresponding to the elements shown in FIG. The same reference numerals are attached, and duplicate descriptions are omitted.
[0102] 図 19に示した多層セラミック基板 80は、インダクタ素子 70に関して、図 7に示したィ ンダクタ素子 28と実質的に同様の構成を備えることを特徴としている。  A multilayer ceramic substrate 80 shown in FIG. 19 is characterized by having a configuration substantially the same as that of the inductor element 28 shown in FIG.
[0103] すなわち、コア 68およびコイル状導体 69を積層方向に挟むように、セラミック層 59 および 60間の界面ならびにセラミック層 61および 62間の界面にそれぞれ沿って、磁 性体セラミック焼結体力もなる第 1のシールド板 81および 82が配置され、また、コア 6 8およびコイル状導体 69が位置するセラミック層 60および 61間の界面において、コ ァ 68およびコイル状導体 69を挟むように、第 2のシールド板 83および 84が配置され ている。 [0104] これらシールド板 81〜84は、図 7に示したシールド板 31〜34と実質的に同様の機 能を果たすものである。 That is, the magnetic ceramic sintering strength is also increased along the interface between the ceramic layers 59 and 60 and the interface between the ceramic layers 61 and 62 so that the core 68 and the coiled conductor 69 are sandwiched in the stacking direction. The first shield plates 81 and 82 are disposed, and the core 68 and the coiled conductor 69 are sandwiched between the core 68 and the coiled conductor 69 at the interface between the ceramic layers 60 and 61. Two shield plates 83 and 84 are arranged. [0104] These shield plates 81 to 84 perform substantially the same functions as the shield plates 31 to 34 shown in FIG.
[0105] この実施形態において、多層セラミック基板 80を得るために作製される複合積層体 は、図 7に示したインダクタ素子 28の場合と同様、シールド板 81〜84が未焼結セラミ ック層間の特定の界面に配置された構造を有している。  [0105] In this embodiment, the composite laminate produced to obtain the multilayer ceramic substrate 80 has shield plates 81 to 84 formed of unsintered ceramic layers as in the case of the inductor element 28 shown in FIG. It has a structure arranged at a specific interface.
[0106] 以上、この発明を、図示した実施形態に関連して説明したが、この発明の範囲内お いて、その他、種々の変形例が可能である。  [0106] Although the present invention has been described with reference to the illustrated embodiment, various modifications can be made within the scope of the present invention.
[0107] たとえば、コアに関連して設けられるコイル状導体については、その形態等に関し て種々の変形が可能である。また、多層セラミック基板における配線導体についても 、必要に応じて、その形態を種々に変更することができる。  For example, the coiled conductor provided in association with the core can be variously modified with respect to its form and the like. Further, the form of the wiring conductor in the multilayer ceramic substrate can be variously changed as necessary.
[0108] また、多層セラミック基板におけるインダクタ素子の配置についても、種々に変更す ることができ、また、 2個以上のインダクタ素子が 1個の多層セラミック基板に内蔵され てもよい。この場合、複数個のインダクタ素子力 多層セラミック基板における異なる セラミック層間の界面に沿って配置されても、同じセラミック層間の界面に沿って配置 されてちょい。  [0108] Further, the arrangement of the inductor elements in the multilayer ceramic substrate can be variously changed, and two or more inductor elements may be incorporated in one multilayer ceramic substrate. In this case, even if the inductor elements are arranged along the interface between different ceramic layers in the multilayer ceramic substrate, they should be arranged along the interface between the same ceramic layers.

Claims

請求の範囲 The scope of the claims
[1] インダクタ素子を内蔵する積層型セラミック電子部品を製造する方法であって、 磁性体セラミック焼結体力 なるコアと、前記コアの周囲に形成されるコイル状導体 と、層間に前記コアおよび前記コイル状導体を挟んだ状態で積層された少なくとも 2 層の未焼結セラミック層と、特定の前記未焼結セラミック層に接するように配置されか つ前記未焼結セラミック層の焼結温度では実質的に焼結しない無機材料粉末を含 む収縮抑制層とを備える、複合積層体を作製する工程と、  [1] A method for producing a multilayer ceramic electronic component incorporating an inductor element, comprising: a core having a magnetic ceramic sintered body strength; a coiled conductor formed around the core; At least two unsintered ceramic layers laminated with a coiled conductor sandwiched between them and the specific sintering temperature of the unsintered ceramic layer are arranged so as to be in contact with the unsintered ceramic layer. A step of producing a composite laminate comprising a shrinkage suppression layer containing an inorganic material powder that is not thermally sintered,
前記複合積層体を前記未焼結セラミック層が焼結する温度で焼成する工程と を備える、積層型セラミック電子部品の製造方法。  And firing the composite laminate at a temperature at which the unsintered ceramic layer sinters.
[2] 前記複合積層体を作製する工程は、 [2] The step of producing the composite laminate includes:
前記コアを用意する工程と、  Preparing the core;
前記未焼結セラミック層となるべき複数枚のセラミックグリーンシートを用意する工程 と、  Preparing a plurality of ceramic green sheets to be the green ceramic layer;
第 1の前記セラミックグリーンシートの第 1の主面上に、前記コイル状導体の一部と なる第 1の導体パターンを形成する工程と、  Forming a first conductor pattern to be a part of the coiled conductor on the first main surface of the first ceramic green sheet;
第 2の前記セラミックグリーンシートの第 1の主面上に、前記コイル状導体の他部と なる第 2の導体パターンを形成する工程と、  Forming a second conductor pattern which is the other part of the coiled conductor on the first main surface of the second ceramic green sheet;
前記コアを介在させながら前記第 1のセラミックグリーンシートの前記第 1の主面と 前記第 2のセラミックグリーンシートの前記第 1の主面とが互いに向き合い、かつ前記 第 1の導体パターンの端部と前記第 2の導体パターンの端部とが互いに接してコイル 状に延びる導体を形成する状態となるように、前記第 1のセラミックグリーンシートと前 記第 2のセラミックグリーンシートとを重ね合わせる工程と  With the core interposed, the first main surface of the first ceramic green sheet and the first main surface of the second ceramic green sheet face each other, and an end of the first conductor pattern And a step of superimposing the first ceramic green sheet and the second ceramic green sheet such that the end of the second conductor pattern is in contact with each other to form a conductor extending in a coil shape When
備える、請求項 1に記載の積層型セラミック電子部品の製造方法。  The method for producing a multilayer ceramic electronic component according to claim 1, further comprising:
[3] 前記第 1のセラミックグリーンシートと第 2のセラミックグリーンシートとを重ね合わせ る工程は、前記第 1のセラミックグリーンシートの前記第 1の主面上に、前記第 1の導 体パターンの前記端部が露出するように、前記コアを配置する工程と、前記コアを介 在させながら前記第 1のセラミックグリーンシート上に前記第 2のセラミックグリーンシ ートを重ね合わせる工程とを備える、請求項 2に記載の積層型セラミック電子部品の 製造方法。 [3] The step of superimposing the first ceramic green sheet and the second ceramic green sheet includes the step of forming the first conductor pattern on the first main surface of the first ceramic green sheet. Arranging the core so that the end portion is exposed; and superimposing the second ceramic green sheet on the first ceramic green sheet with the core interposed therebetween. The multilayer ceramic electronic component according to claim 2. Production method.
[4] 前記複合積層体を作製する工程は、前記第 1のセラミックグリーンシートの前記第 1 の主面に対向する第 2の主面および前記第 2のセラミックグリーンシートの前記第 1の 主面に対向する第 2の主面の各々上に、前記収縮抑制層を形成する工程をさらに備 える、請求項 2に記載の積層型セラミック電子部品の製造方法。  [4] The step of producing the composite laminate includes a second main surface opposite to the first main surface of the first ceramic green sheet and the first main surface of the second ceramic green sheet. 3. The method for manufacturing a multilayer ceramic electronic component according to claim 2, further comprising a step of forming the shrinkage suppression layer on each of the second main surfaces facing the substrate.
[5] 前記第 1および第 2の導体パターンの各々は複数個の帯状導体部分を備え、それ によって、前記コイル状導体のターン数が複数とされる、請求項 2に記載の積層型セ ラミック電子部品の製造方法。  [5] The multilayer ceramic according to claim 2, wherein each of the first and second conductor patterns includes a plurality of strip-shaped conductor portions, whereby the number of turns of the coil-shaped conductor is plural. Manufacturing method of electronic components.
[6] 前記コアは、平板状、円柱状、楕円柱状またはドーナツ状である、請求項 1に記載 の積層型セラミック電子部品の製造方法。  6. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the core has a flat plate shape, a cylindrical shape, an elliptical column shape, or a donut shape.
[7] 前記収縮抑制層は、前記複合積層体の最外層を形成するように配置され、前記焼 成工程の後、前記収縮抑制層を除去する工程をさらに備える、請求項 1に記載の積 層型セラミック電子部品の製造方法。  [7] The product according to claim 1, wherein the shrinkage suppression layer is disposed so as to form an outermost layer of the composite laminate, and further includes a step of removing the shrinkage suppression layer after the firing step. A method for manufacturing a layered ceramic electronic component.
[8] 前記収縮抑制層は、前記未焼結セラミック層間の特定の界面に沿って配置され、 前記焼成工程において、前記収縮抑制層は、前記未焼結セラミック層に含まれる材 料の一部が浸透することによって固化される、請求項 1に記載の積層型セラミック電 子部品の製造方法。  [8] The shrinkage suppression layer is disposed along a specific interface between the unsintered ceramic layers. In the firing step, the shrinkage suppression layer is a part of the material included in the unsintered ceramic layer. 2. The method for producing a multilayer ceramic electronic component according to claim 1, wherein the multilayered ceramic electronic component is solidified by permeation.
[9] 前記複合積層体は、前記コアおよび前記コイル状導体を積層方向に挟むように、 特定の前記未焼結セラミック層間の界面に沿って配置される、磁性体セラミック焼結 体力もなる第 1のシールド板をさらに備える、請求項 1に記載の積層型セラミック電子 部品の製造方法。  [9] The composite laminated body also has a magnetic ceramic sintered body strength arranged along a specific interface between the unsintered ceramic layers so as to sandwich the core and the coiled conductor in the laminating direction. 2. The method for manufacturing a multilayer ceramic electronic component according to claim 1, further comprising one shield plate.
[10] 前記複合積層体は、前記コアおよび前記コイル状導体が位置する前記未焼結セラ ミック層間の界面において、前記コアおよび前記コイル状導体を挟むように配置され る、磁性体セラミック焼結体力もなる第 2のシールド板をさらに備える、請求項 9に記 載の積層型セラミック電子部品の製造方法。  [10] The composite laminate is a ceramic sintered ceramic that is disposed so as to sandwich the core and the coiled conductor at an interface between the unsintered ceramic layers where the core and the coiled conductor are located. The method for manufacturing a multilayer ceramic electronic component according to claim 9, further comprising a second shield plate having physical strength.
[11] 前記積層型セラミック電子部品は、インダクタ機能を与える単機能素子である、請 求項 1に記載の積層型セラミック電子部品の製造方法。  [11] The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the multilayer ceramic electronic component is a single-function element providing an inductor function.
[12] 前記未焼結セラミック層は、低温焼結セラミック材料または磁性材料を主成分とする ものである、請求項 11に記載の積層型セラミック電子部品の製造方法。 [12] The green ceramic layer is mainly composed of a low-temperature sintered ceramic material or a magnetic material. 12. The method for producing a multilayer ceramic electronic component according to claim 11, wherein the method is a product.
[13] 前記積層型セラミック電子部品は、インダクタ機能を含む複合された複数個の機能 を有する、多層セラミック基板である、請求項 1に記載の積層型セラミック電子部品の 製造方法。 13. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein the multilayer ceramic electronic component is a multilayer ceramic substrate having a plurality of combined functions including an inductor function.
[14] 前記未焼結セラミック層は、低温焼結セラミック材料を主成分とするものである、請 求項 13に記載の積層型セラミック電子部品の製造方法。  [14] The method for producing a multilayer ceramic electronic component according to claim 13, wherein the unsintered ceramic layer is mainly composed of a low-temperature sintered ceramic material.
[15] インダクタ素子を内蔵する積層型セラミック電子部品を製造するために用意される 複合積層体であって、 [15] A composite laminate prepared for manufacturing a multilayer ceramic electronic component incorporating an inductor element,
磁性体セラミック焼結体力 なるコアと、  A magnetic ceramic sintered body strength core,
前記コアの周囲に形成されるコイル状導体と、  A coiled conductor formed around the core;
層間に前記コアおよび前記コイル状導体を挟んだ状態で積層された少なくとも 2層 の未焼結セラミック層と、  At least two unsintered ceramic layers laminated with the core and the coiled conductor sandwiched between layers;
特定の前記未焼結セラミック層に接するように配置されかつ前記未焼結セラミック層 の焼結温度では実質的に焼結しない無機材料粉末を含む収縮抑制層と を備える、複合積層体。  And a shrinkage suppression layer including an inorganic material powder that is disposed in contact with the specific green ceramic layer and that does not substantially sinter at the sintering temperature of the green ceramic layer.
[16] 前記コイル状導体は、前記コアおよび前記コイル状導体を挟む第 1および第 2の前 記未焼結セラミック層の各々の互いに向き合う主面上にそれぞれ形成された第 1およ び第 2の導体パターンを備え、前記第 1および第 2の導体パターンは、コイル状に延 びる導体を形成するように、各々の端部が互いに接する状態となっている、請求項 1 5に記載の複合積層体。  [16] The first and second coiled conductors are respectively formed on the mutually opposing main surfaces of the first and second unsintered ceramic layers sandwiching the core and the coiled conductor. 16. The device according to claim 15, comprising two conductor patterns, wherein the first and second conductor patterns are in contact with each other so as to form a coil-like conductor. Composite laminate.
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JP2013183009A (en) * 2012-03-01 2013-09-12 Tdk Corp Laminate type coil component
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US7607216B2 (en) 2009-10-27

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