JP3248294B2 - Chip inductor and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip inductor mounted on a high-density circuit board of a small digital electronic device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, chip inductors are widely used as noise suppression components in high-density mounting circuit boards as digital devices become smaller and thinner.

FIG. 12 shows a structure diagram of a conventional chip inductor. 101 is a magnetic layer, 102 is an end face electrode for taking out, 103 is an internal conductor, and 104 is an alumina substrate. In the conventional chip inductor configured as described above, a plurality of electrically insulating magnetic layers 101 and a plurality of internal conductors 103 for forming a coil are alternately printed such that the ends of the internal conductors 103 are connected. A sintered body is obtained by laminating and firing and integrating, and a conductive paste is applied to both side surfaces of the sintered body and then baked to form an end face electrode 102, thereby producing the sintered body. This chip inductor is
Since a laminate can be formed only by printing and can be integrally fired, it is useful as a chip component that can be manufactured at low cost.

[0004]

However, the above-mentioned conventional configuration has a serious problem in terms of mountability and product shape. That is, in the chip inductor, warpage occurs at the upper end of the sintered body during shrinkage due to firing, so that the dimensional accuracy of the chip is poor, which causes trouble during mounting. Further, there is a problem that the dimensional variation of the electrodes is large even in the step of applying the end face electrodes because the dimensional variations are large.

An object of the present invention is to solve the above-mentioned conventional problems, and it is an object of the present invention to flatten the upper surface of a chip inductor to reduce the variation in the shape of a product and excellent mountability.

[0006]

SUMMARY OF THE INVENTION In order to solve this problem, a chip inductor and a method of manufacturing the same according to the present invention comprise a square plate-shaped ceramic substrate, a magnetic layer provided on the ceramic substrate and having a conductor pattern provided therein. , magnetic by providing and fired on the magnetic layer upper surface an inorganic material
Before the sintering of the magnetic material layer, a sintered film is formed first,
A chip inductor comprising: a shrinkage suppression layer for suppressing shrinkage of a layer; and a pair of external electrodes provided at both ends of the ceramic substrate, the magnetic layer, and the shrinkage suppression layer and electrically connected to the conductor pattern.

[0007]

According to the chip inductor of the present invention, the shrinkage suppressing layer forms the sintered film first before the magnetic material layer is sintered, so that the sintered film suppresses the shrinkage of the upper portion during firing of the magnetic material. In addition, since the upper portion of the magnetic layer can be flattened, variations in external dimensions can be reduced, and the magnetic layer can be used for high-density mounting. In addition, since the magnetic layer is formed on the sheet-like ceramic substrate, it is easy to manufacture and mass-produced similarly to the square plate type thick film chip resistor. From these facts, it is possible to provide a chip inductor which has small variations in external dimensions and has excellent mountability and mass productivity, which cannot be realized by the conventional thick film chip inductor.

[0008]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a perspective view showing an internal structure of a chip inductor according to an embodiment of the present invention in a see-through state.
FIG. 2 is a sectional view taken along the line AA ′ in FIG.

In FIG. 1, reference numeral 11 denotes a ceramic substrate, on which a magnetic layer 14 having a coil-shaped conductor pattern 13 provided inside a magnetic body 12 is formed. Further, a shrinkage suppressing layer 15 for suppressing shrinkage of the magnetic layer 14 is provided on the magnetic layer 14.
Further, on both end surfaces of the laminate 20 formed in this way, end surface electrodes 16 as external electrodes are formed from the back surface of the ceramic substrate 11 to the upper surface of the shrinkage suppression layer 15.

The manufacturing method of the chip inductor configured as described above will be described with reference to the drawings. First, as shown in FIG.
0, a primary dividing groove 17 in the horizontal direction and a secondary dividing groove 18 in the vertical direction so that each divided piece becomes a chip inductor on a square plate of 3.0 × 1.5 mm square. Process.

Next, as shown in FIG.
A first layer made of the magnetic material 12 is formed by printing and drying a Ni—Zn—Cu-based magnetic paste on almost the entire surface of the “0”.

Next, as shown in FIG. 5, the beginning of winding of the coil-shaped conductor pattern 13 is printed and formed with an Ag / Pd-based conductor paste, and then, as shown in FIG. 6, the coil-shaped conductor pattern 13 is connected. A pattern made of the magnetic material 12 is formed by printing a Ni—Zn—Cu-based magnetic paste with a pattern having the via hole 19, and furthermore, the conductor pattern 13 of FIG. Conductor pattern 13 so as to be connected to the end of
The end of winding is printed and formed with an Ag / Pd-based conductor paste to form a conductor pattern 13 and a magnetic pattern 12.
Is formed.

Thereafter, as shown in FIG. 8, similarly to FIG. 4, a magnetic material paste is printed so as to cover almost the entire surface of the substrate to form a third layer made of the magnetic material 12.

As shown in FIG. 9, a paste of glass or crystallized glass containing glass and alumina as main components or a low softening point glass or low magnetic material is added to the magnetic material. The shrinkage suppression layer 15 is formed by printing and forming a paste in which a softening point glass and alumina powder are mixed.

Next, the groove width is 200 μm by a dicing machine.
m or less, and the laminate 20 is 100
Cutting with a thickness of less than μm. This is fired at a high temperature of 800 ° C. to 1100 ° C. for one hour. Next, as shown in FIG. 10, a stick-like split is formed along the primary dividing groove 17, and an Ag-based thick film conductor is connected to the conductor pattern 13 on both end surfaces of the stick-like laminate 20 thus divided. After pre-drying, the resultant is baked at 550 ° C. to 900 ° C. for 15 minutes to form an end face electrode 16. Finally, as shown in FIG. To obtain a chip inductor.

The degree of warpage of the chip inductor thus obtained is obtained from the ratio between the maximum value and the minimum value of the distance from the bottom surface of the ceramic substrate of the fired chip inductor to the top surface of the chip inductor, and the value is calculated as ( It is shown in Table 1).

[0018]

[Table 1] Here, in the comparative examples shown in (Table 1), in the above-mentioned manufacturing method, the application step of the shrinkage suppression layer in FIG. 9 was omitted, and FIGS.
And the chip inductor obtained through the steps. The result of performing this in the same manner as the above measurement is the value shown in (Table 1). From this (Table 1), it can be seen that according to the present embodiment, a chip inductor having a smaller warp than the chip inductor of the comparative example can be obtained.

Further, the conventional chip inductor and the chip inductor of the present embodiment were mounted on a printed circuit board by a chip mounting machine and soldered, and their mountability was compared and evaluated. There were no suction errors, cracks, displacements, or solder defects. Thus, according to the present embodiment, a chip inductor excellent in mountability can be obtained.

Further, according to the chip inductor and the method of manufacturing the same of the present embodiment, since the magnetic layer 14 is provided on the basis of the sintered ceramic substrate 11 having high mechanical strength and high dimensional accuracy, a plurality of magnetic layers are provided. Can be collectively formed efficiently and with high precision.

As described above, according to this embodiment, it is possible to suppress the warpage of the magnetic layer 14 generated at the time of sintering, to obtain a chip inductor with small product variation, and excellent in mountability and mass productivity.

When a groove is formed in the laminated body, 100 μm
If the thickness is more than 3 mm, the breakability of the fired substrate is deteriorated, so that the thickness of the laminated body from the substrate is 100 μm or less.

[0023]

As described above, according to the present invention, a shrinkage suppression layer is formed on a magnetic layer having a conductor pattern provided on a ceramic substrate, and is formed from the back surface of the ceramic substrate to the upper surface of the shrinkage suppression layer. By forming the chip inductor, a warp of the magnetic material layer generated at the time of sintering is suppressed, and a chip inductor excellent in mountability and mass productivity and a manufacturing method thereof can be realized.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an internal structure of a chip inductor according to an embodiment of the present invention.

FIG. 2 is a sectional view taken along the line A-A 'in FIG.

FIG. 3 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 4 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 5 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 6 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 7 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 8 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 9 is a plan view of the chip inductor in the manufacturing process of the embodiment.

FIG. 10 is a plan view of the chip inductor in a manufacturing process according to the embodiment.

FIG. 11 is a plan view of the chip inductor in the embodiment.

FIG. 12 is a perspective view showing the internal structure of a conventional chip inductor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Ceramic substrate 12 Magnetic body 13 Conductive pattern 14 Magnetic layer 15 Shrinkage suppression layer 16 End face electrode 17 Primary division groove 18 Secondary division groove 20 Laminate

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01C 7/00 H01G 4/30 H01F 17/00, 41/04

Claims (5)

(57) [Claims] And 1. A rectangular plate-shaped ceramic substrate, said magnetic layer which is internally provided with conductor pattern is provided on a ceramic substrate, provided on the magnetic layer upper surface an inorganic material and a magnetic layer by baking Sintering first before sintering
A film is formed, and a shrinkage suppressing layer for suppressing shrinkage of the magnetic layer is provided on both ends of the ceramic substrate, the magnetic layer and the shrinkage suppressing layer, and is electrically connected to the conductor pattern. A chip inductor comprising a pair of external electrodes. 2. The chip inductor according to claim 1, wherein the shrinkage suppression layer contains crystallized glass as a main component. 3. The chip inductor according to claim 1, wherein the shrinkage suppression layer is made of a mixed material of a magnetic material and a low softening point glass. 4. A first layer made of a magnetic material, a second layer formed by alternately laminating a conductor pattern and a magnetic material pattern, and a first layer made of a magnetic material over substantially the entire surface of a sintered ceramic substrate in the form of a sheet. After forming the magnetic layer composed of three layers , first, before the magnetic layer composed of an inorganic substance is sintered on the magnetic layer,
Shrinkage to form a sintered film on the surface and to suppress shrinkage of the magnetic layer
After drying by laminating suppressing layer, claims, characterized in that the rear co-firing to form a plurality of grooves for subdivision vertically and horizontally than the shrinkage suppression layer surface, subdivided into chips along the grooves 2. A method for manufacturing the chip inductor according to 1. 5. The method according to claim 4, wherein the plurality of subdivision grooves are formed while leaving a part of the magnetic layer from the upper surface of the ceramic substrate.