WO2011148678A1 - Lc co-sintered substrate and method for producing same - Google Patents

Lc co-sintered substrate and method for producing same Download PDF

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Publication number
WO2011148678A1
WO2011148678A1 PCT/JP2011/053138 JP2011053138W WO2011148678A1 WO 2011148678 A1 WO2011148678 A1 WO 2011148678A1 JP 2011053138 W JP2011053138 W JP 2011053138W WO 2011148678 A1 WO2011148678 A1 WO 2011148678A1
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Prior art keywords
layers
magnetic
layer
magnetic layer
dielectric layers
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PCT/JP2011/053138
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French (fr)
Japanese (ja)
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横山 智哉
純一 南條
大樹 足立
池田 哲也
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株式会社 村田製作所
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Publication of WO2011148678A1 publication Critical patent/WO2011148678A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/40Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08Magnetic details
    • H05K2201/083Magnetic materials
    • H05K2201/086Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Definitions

  • the present invention relates to an LC co-sintered substrate and a method for manufacturing the same, and more particularly to a co-sintered substrate incorporating a coil and a capacitor.
  • an intermediate layer made of a magnetic material is provided between a plurality of wiring conductors provided in a dielectric layer.
  • the layers are constrained to each other and substantially non-shrink in the principal surface direction.
  • the intermediate layer made of a magnetic material is for shielding.
  • Patent Document 2 discloses a method for manufacturing a glass ceramic substrate in which a constraining layer is laminated on both upper and lower surfaces of a laminate in which a ferrite layer is sandwiched between glass ceramic layers, and the constraining layer is removed after firing.
  • the ferrite layer is for noise absorption.
  • Patent Document 3 As shown in the sectional view of FIG. 4, a magnetic layer 2 is sandwiched between a pair of nonmagnetic layers 1, and a coil layer 3 composed of a plurality of planar coil conductors 3 a to 3 c is formed in the magnetic layer 2. It is disclosed that the formed coil-embedded substrate is produced by firing a laminate.
  • Patent Document 4 discloses that a plurality of dielectric layers are stacked symmetrically in the vertical direction, and the strength of the substrate is improved by utilizing a difference in linear expansion coefficient (thermal expansion coefficient) between the outermost layer and the inner layer.
  • JP 2001-119144 A Japanese Patent Laid-Open No. 2004-262741 JP 2008-84921 A JP 2003-55034 A
  • module parts in which circuit parts such as a semiconductor integrated circuit, a capacitor, and a resistor are mounted on a substrate including a magnetic body with a built-in coil are used in mobile phones.
  • a substrate having a magnetic layer sandwiched between a pair of dielectric layers as in FIG. 3 is used, a coil is formed inside the magnetic layer, and a pair of dielectrics sandwiching the magnetic layer It is conceivable to form a capacitor inside the layer.
  • the present invention is intended to provide an LC co-sintered substrate that can be manufactured with high accuracy and that can prevent a reduction in the inductance value of a coil.
  • the present invention provides an LC co-sintered substrate configured as follows.
  • the LC co-sintered substrate comprises: (a) a substrate body having a magnetic layer containing a magnetic ceramic material; and first and second dielectric layers laminated on both sides of the magnetic layer and containing a dielectric ceramic material; (B) a coil formed in the magnetic layer; and (c) a capacitor formed in only one of the first and second dielectric layers.
  • the capacitor is formed inside only one of the first and second dielectrics laminated on both sides of the magnetic layer, the capacitor is formed on both sides of the coil formed inside the magnetic layer. As a result, it is possible to prevent the inductance value of the coil formed inside the magnetic layer from decreasing.
  • the LC co-sintered substrate is obtained by firing the laminated body formed by laminating and pressing the unfired magnetic layer and the first and second dielectric layers together with the coil and capacitor portions. Can be formed. Since the capacitor is formed inside only one of the first and second dielectrics, the structure is asymmetrical, but higher than the temperature at which the laminate starts to sinter on both sides in the lamination direction of the unfired laminate.
  • An LC co-sintered substrate is formed by a so-called non-shrinking method, in which the laminate starts to be sintered and the constraining layer is fired at a temperature at which the sintering does not start. It can be manufactured with high accuracy.
  • the substrate body further includes first and second nonmagnetic ferrite layers that are stacked between the magnetic layer and the first and second dielectric layers and include a nonmagnetic ferrite ceramic material.
  • the first and second non-magnetic ferrite layers can be formed by laminating and pressing together with the unfired magnetic layer and the first and second dielectric layers in an unfired state, and firing simultaneously.
  • the first and second nonmagnetic ferrite layers can improve the efficiency of the inductor of the coil formed inside the magnetic layer.
  • the substrate body including at least two first and second magnetic layers further includes an intermediate nonmagnetic ferrite layer including a nonmagnetic ferrite ceramic material between the first and second magnetic layers.
  • the intermediate nonmagnetic ferrite layer can be formed by laminating and pressing the unfired first and second magnetic layers in the unfired state and simultaneously firing them.
  • the intermediate nonmagnetic ferrite layer can improve the characteristics of the coil formed inside the magnetic layer (improvement of voltage conversion efficiency by suppressing iron loss, improvement of inductance value, etc.).
  • a gap is provided between the coil and the magnetic layer.
  • a thin layer of the magnetic layer is provided between the coil and the gap.
  • the thickness of one of the first and second dielectric layers in which the capacitor is formed is different from the thickness of the other of the first and second dielectric layers.
  • the LC co-sintered substrate can be produced with high accuracy by a non-shrinkage method by adjusting the constraining layer.
  • the one of the capacitors in which the capacitor is formed is thicker than the other of the first and second dielectric layers.
  • the substrate body can be thinned by reducing the thickness of the other of the first and second dielectric layers.
  • At least one of the first and second dielectric layers and the magnetic layer of the substrate body penetrates in the stacking direction of the first and second dielectric layers and the magnetic layer, and A via hole conductor connected to at least one of the coil and the capacitor is further provided.
  • an LC circuit can be configured in the substrate body.
  • a terminal electrode for mounting the LC co-sintered substrate is formed on the one of the first and second dielectric layers in which the capacitor is formed.
  • the wiring length between the capacitor formed inside the dielectric layer and the terminal electrode can be made as short as possible.
  • a land electrode for mounting a component on the LC co-sintered substrate is formed on the other of the first and second dielectric layers.
  • a module component can be manufactured by mounting a component such as a surface mount component or a semiconductor chip on the land electrode.
  • the present invention also provides a method for producing an LC co-sintered substrate configured as follows.
  • the method for producing an LC co-sintered substrate includes (a) a non-magnetic ferrite ceramic material on both sides of a main surface of an unsintered magnetic layer that includes a magnetic ceramic material and includes a portion that becomes a coil therein.
  • An unsintered first and second nonmagnetic ferrite layer including a portion that becomes a capacitor only in one of the layers is laminated and pressure-bonded, and the first and second nonmagnetic ferrite layers are opposite to the magnetic layer.
  • An unsintered first and second dielectric layers containing a dielectric ceramic material are laminated on the principal surface of the first and second dielectric layers of the unsintered laminate, and the magnetic layers of the first and second dielectric layers are bonded together.
  • the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and second dielectric layers are sintered on the main surface opposite to the first and second nonmagnetic ferrite layers.
  • Start sintering at a temperature higher than the sintering start temperature A first step of forming a composite laminate in which a bundle layer is laminated and pressure-bonded; and (b) the composite laminate includes the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and first layers.
  • the dielectric layer 2 is fired at a temperature higher than the sintering start temperature at which sintering starts and lower than the sintering start temperature at which the constraining layer starts sintering.
  • the capacitor is formed in only one of the first and second dielectrics laminated on both sides of the magnetic layer, the capacitor is formed on both sides of the coil formed in the magnetic layer. Thus, it is possible to prevent a decrease in inductance value of the coil formed inside the magnetic layer.
  • an LC co-sintered substrate can be produced with high accuracy, and a decrease in the inductance value of the coil can be prevented.
  • Example 1 It is principal part sectional drawing of LC co-sintered board
  • Example 2 It is principal part sectional drawing of LC co-sintered board
  • Modification It is sectional drawing of a coil built-in board
  • Example 1 The LC co-sintered substrate 10 of Example 1 will be described with reference to FIG.
  • FIG. 1 is a cross-sectional view showing a configuration of the LC co-sintered substrate 10.
  • land electrodes 26a to 26c for mounting components on the LC co-sintered substrate 10 are formed on one main surface 12a of the substrate main body 12.
  • Terminal electrodes 28a and 28b for mounting the LC co-sintered substrate 10 on another circuit board or the like are formed on the other main surface 12b.
  • the land electrodes 26a to 26c can be eliminated. Further, a part of the via-hole conductors 24a to 24c connected to the land electrodes 26a to 26c can be eliminated.
  • the substrate body 12 includes, in order, a first dielectric layer 16a, a first nonmagnetic ferrite layer 18a, a first magnetic layer 14a, an intermediate nonmagnetic ferrite layer 18c, a second magnetic layer 14b, and a second nonmagnetic.
  • a ferrite layer 18b and a second dielectric layer 16b are laminated.
  • the first and second magnetic layers 14a and 14b include, for example, magnetic ferrite mainly composed of iron oxide, zinc oxide, nickel oxide, and copper oxide, and a ceramic material. That is, the first and second magnetic layers 14a and 14b include a magnetic ceramic material.
  • the first and second dielectric layers 16a and 16b include a dielectric ceramic material.
  • the first and second nonmagnetic ferrite layers 18a and 18b and the intermediate nonmagnetic ferrite layer 18c include, for example, nonmagnetic ferrite mainly composed of iron oxide, zinc oxide, and copper oxide, and a ceramic material.
  • via-hole conductors 24a to 24c, a coil 20, and a capacitor 22 are formed in the substrate body 12.
  • the coil 20 is connected to the via-hole conductors 24b and 24c via the wiring conductors 21a and 21b.
  • the capacitor 22 is connected to the via-hole conductors 24a and 24c.
  • the coil 20 is formed inside the first and second magnetic layers 14a and 14b and the intermediate nonmagnetic ferrite layer 18c.
  • the characteristics of the inductor can be improved as compared with the case where the coil is formed only in the magnetic layer without the intermediate nonmagnetic ferrite layer 18c. Can be improved.
  • the capacitor 22 is formed only in one 16b of the first and second dielectric layers 16a and 16b, and no capacitor is formed in the other 16a. Since the capacitor 22 is formed only on one side of the coil 20, a better inductance value can be obtained than in the case where the capacitor is formed on both sides of the coil 20.
  • the thickness of the first dielectric layer 16a can be made smaller than the thickness of the second dielectric layer 16b to make the substrate body 12 thinner.
  • the LC co-sintered substrate 10 is mainly composed of alumina or the like on both upper and lower main surfaces of an unfired multilayer ceramic body (laminated body) formed by laminating a ceramic green sheet that can be fired at a low temperature and a conductor pattern made of a low melting point metal.
  • the shrinkage-suppressing layers to be adhered are brought into close contact with each other, fired at the firing temperature of the multilayer ceramic body (laminated body), and then the unsintered shrinkage-suppressing layer is removed.
  • the thickness of the first dielectric layer 16a and the thickness of the second dielectric layer 16b are different, and the substrate body 12 can be manufactured with high accuracy even if the configuration of the substrate body 12 is not symmetric. Even if the configuration of the substrate body 12 is not symmetrical, manufacturing variations such as warpage and distortion are reduced.
  • the ceramic green sheets used as the first and second magnetic layers 14a and 14b for example, magnetic ferrite containing iron oxide, zinc oxide, nickel oxide and copper oxide as main components is used.
  • the ceramic green sheet that becomes the first and second nonmagnetic ferrite layers 18a, 18b and the intermediate nonmagnetic ferrite layer 18c for example, nonmagnetic ferrite containing iron oxide, zinc oxide, and copper oxide as main components is used.
  • a through hole is processed at an appropriate position by laser processing, punching processing, or the like, and a conductor paste is embedded in the through hole by printing or the like, thereby arranging a portion that becomes a via hole conductor after firing.
  • the coil 20, the capacitor 22, the wiring conductor 21a, the conductor paste is printed on one main surface of the ceramic green sheet by screen printing or gravure printing, or by transferring a metal foil having a predetermined pattern shape.
  • a conductor pattern for forming 21b is formed.
  • the shrinkage-suppressing green sheet used for the constraining layer is an unsintered green sheet formed into a sheet shape.
  • the green sheet for shrinkage suppression includes an inorganic material powder such as alumina that is sintered at a temperature higher than the firing temperature of the ceramic green sheet for forming each layer of the substrate body 12, and a ceramic for forming each layer of the substrate body 12.
  • the green sheet is not substantially sintered at the sintering temperature.
  • an unsintered ceramic green sheet that forms each layer of the substrate body 12 is laminated to produce a composite laminate in which constraining layers including shrinkage-suppressing green sheets are arranged on both sides in the lamination direction of the laminate.
  • a relatively small pressure is applied in the stacking direction to temporarily press-bond each layer of the stack and the constraining layer.
  • the composite laminate may be prepared by preparing a temporarily bonded laminate and then laminating the shrinkage-suppressing green sheets and further temporarily pressing, or the ceramic green sheets that form the layers of the substrate body 12 and the shrinkage suppression. It may be produced by laminating the green sheets for use and then temporarily pressing them together.
  • the constraining layer may be formed by applying a slurry for producing a shrinkage-suppressing green sheet by screen printing on a laminate in which unsintered ceramic green sheets forming each layer of the substrate body 12 are laminated. .
  • You may form by forming the green sheet for shrinkage
  • the composite laminate in which the constraining layer is finally bonded to the laminate is fired. Firing is performed under the conditions in which the ceramic material powder included in the ceramic green sheet forming each layer of the laminate that becomes the substrate body 12 is sintered and the inorganic material powder included in the green sheet for suppressing shrinkage of the constraining layer is not sintered. Do. That is, the firing is performed at a temperature higher than the firing temperature of the ceramic green sheet forming each layer of the laminated body that becomes the substrate body 12 and lower than the firing temperature of the green sheet for suppressing shrinkage of the constraining layer.
  • the fired laminate that is, the LC co-sintered substrate 10 is taken out, and the main surfaces 12a and 12b of the substrate body 12 are removed as necessary.
  • the land electrodes 26a to 26c and the terminal electrodes 28a and 28b formed in the above are plated.
  • the material of the land electrodes 26a to 26c and the terminal electrodes 28a and 28b is Ag, Cu or the like.
  • the constraining layer After sintering the laminate before firing with a constraining layer having a thickness of 50 to 1000 ⁇ m made of alumina material or the like at a maximum temperature of 850 to 990 ° C., the constraining layer is removed.
  • the deviation of each side of the main surface from the straight line is within 50 ⁇ m, and the firing shrinkage rate is 99.5 to 100%, that is, the area after firing of the main surface constrained by the constraining layer is 99.0 to 100% of the area before firing, and a highly accurate substrate body 12 can be obtained even with an asymmetric configuration. Can do.
  • the inductance value of the coil 20 is lowered.
  • the capacitor 22 is formed only on one side of the coil 20, the inductance value of the coil 20 can be improved. Since the first dielectric layer 16a on which the capacitor 22 is not formed can be made thinner, the thickness of the substrate body 12 can be made thinner than when capacitors are formed on both sides of the coil 20.
  • FIG. 3 shows a cross-sectional view of the main part of the configuration of a modification example in which a gap 29 is provided between the coil 20 and the magnetic layers 14a and 14b in Production Examples 1 and 2.
  • a carbon paste is applied by screen printing so as to be in contact with the conductor pattern forming the coil 20, and the carbon burns and disappears by firing, thereby forming a gap 29 at the boundary between the coil 20 and the magnetic layers 14a and 14b.
  • Magnetostriction due to residual stress occurs in the substrate body 12 after firing due to the difference in the linear expansion coefficient (thermal expansion coefficient) between the coil 20 and the magnetic layers 14a and 14b, and thus the voltage conversion efficiency of the coil 20 is reduced due to iron loss. It can be seen.
  • the stress of the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
  • a thin magnetic layer may be provided between the coil 20 and the gap 29. Even in this case, by providing the air gap 29, the stress in the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
  • Example 2 The LC co-sintered substrate of Example 2 will be described with reference to FIG.
  • the LC co-sintered substrate of Example 2 is configured in substantially the same manner as the LC co-sintered substrate 10 of Example 1.
  • the same reference numerals are used for the same components as in the first embodiment, and differences from the first embodiment will be mainly described.
  • FIG. 2 is a cross-sectional view of the main part showing the configuration of the LC co-sintered substrate of Example 2.
  • the configuration of the coil 20a formed on the first and second magnetic layers 14a and 14b and the intermediate nonmagnetic ferrite layer 18c is the same as that of Example 1. Is different.
  • large and small conductor patterns 20s and 20t formed in a substantially C shape are arranged concentrically and alternately in the stacking direction of each layer of the substrate body 12, and are connected via via hole conductors (not shown). Yes.
  • the large and small conductor patterns 20 s and 20 t are arranged so as not to overlap each other when seen through from the stacking direction of each layer of the substrate body 12. Since the conductor patterns 20s and 20t of the coil 20a are arranged at different positions, the thickness change in the stacking direction of the substrate body 12 can be reduced. Therefore, the flatness of the surface of the substrate body 12 can be improved. Moreover, the cracking can be prevented by dispersing the firing stress generated between the conductor patterns 20s and 20t of the coil 20a and the magnetic layers 14a and 14b.
  • Example 2 by providing the air gap 29 between the coil 20a and the magnetic layers 14a and 14b, the stress of the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
  • the capacitor 22 is provided only on one 16b.
  • the formed asymmetric configuration it is possible to prevent a decrease in the inductance value of the coil 20.
  • an LC co-sintered substrate can be produced with high accuracy by a non-shrinking method in which the constraining layer is baked in a pressure-bonded state.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Provided is a LC co-sintered substrate which can be produced with a high degree of accuracy and which can prevent reduction of the inductance value of a coil. A LC co-sintered substrate (10) is provided with (a) a substrate main body (12) having magnetic layers (14a, 14b) composed of a magnetic ceramic material, and first and second dielectric layers (16a, 16b) which are laminated on both sides of the magnetic layers (14a, 14b) and which are composed of a dielectric ceramic material, (b) coils (20) formed on the inside of the magnetic layers (14a, 14b), and (c) a capacitor (22) formed on the inside of only the second dielectric layer (16b).

Description

LC共焼結基板及びその製造方法LC co-sintered substrate and manufacturing method thereof
 本発明は、LC共焼結基板及びその製造方法に関し、詳しくは、コイルとコンデンサを内蔵した共焼結基板に関する。 The present invention relates to an LC co-sintered substrate and a method for manufacturing the same, and more particularly to a co-sintered substrate incorporating a coil and a capacitor.
 共焼結基板や無収縮焼成に関して、種々の技術が提案されている。 Various technologies have been proposed for co-sintered substrates and non-shrink firing.
 例えば、特許文献1に開示された高周波用多層セラミック基板は、誘電体層内に設けられた複数の配線導体間に、磁性体からなる中間層が設けられている。各層は、互いに拘束し合い、主面方向では実質的に無収縮となる。磁性体からなる中間層は、シールド用である。 For example, in the multilayer ceramic substrate for high frequency disclosed in Patent Document 1, an intermediate layer made of a magnetic material is provided between a plurality of wiring conductors provided in a dielectric layer. The layers are constrained to each other and substantially non-shrink in the principal surface direction. The intermediate layer made of a magnetic material is for shielding.
 特許文献2には、フェライト層をガラスセラミック層で挟持した積層体の上下両面に拘束層を積層し、焼成後に拘束層を除去するガラスセラミック基板の製造方法が開示されている。フェライト層は、ノイズ吸収用である。 Patent Document 2 discloses a method for manufacturing a glass ceramic substrate in which a constraining layer is laminated on both upper and lower surfaces of a laminate in which a ferrite layer is sandwiched between glass ceramic layers, and the constraining layer is removed after firing. The ferrite layer is for noise absorption.
 特許文献3には、図4の断面図に示すように、磁性層2が一対の非磁性層1に挟持され、磁性層2内に、複数の平面コイル導体3a~3cからなるコイル層3が形成されたコイル内蔵基板を、積層体の焼成により作製することが開示されている。 In Patent Document 3, as shown in the sectional view of FIG. 4, a magnetic layer 2 is sandwiched between a pair of nonmagnetic layers 1, and a coil layer 3 composed of a plurality of planar coil conductors 3 a to 3 c is formed in the magnetic layer 2. It is disclosed that the formed coil-embedded substrate is produced by firing a laminate.
 特許文献4は、複数の誘電体層を上下対称に積層し、最外層と内層の線膨張係数(熱膨張率)の差を利用して基板の強度を向上することが開示されている。 Patent Document 4 discloses that a plurality of dielectric layers are stacked symmetrically in the vertical direction, and the strength of the substrate is improved by utilizing a difference in linear expansion coefficient (thermal expansion coefficient) between the outermost layer and the inner layer.
特開2001-119144号公報JP 2001-119144 A 特開2004-262741号公報Japanese Patent Laid-Open No. 2004-262741 特開2008-84921号公報JP 2008-84921 A 特開2003-55034号公報JP 2003-55034 A
 近年、コイルを内蔵した磁性体を含む基板に、半導体集積回路やコンデンサ、抵抗などの回路部品を搭載したモジュール部品が、携帯電話に用いられている。 Recently, module parts in which circuit parts such as a semiconductor integrated circuit, a capacitor, and a resistor are mounted on a substrate including a magnetic body with a built-in coil are used in mobile phones.
 このようなモジュール部品を小型化するため、図3と同様に磁性層を一対の誘電体層で挟持した基板を用い、磁性層の内部にコイルを形成し、磁性層を挟持する一対の誘電体層の内部にコンデンサを形成することが考えられる。 In order to reduce the size of such module parts, a substrate having a magnetic layer sandwiched between a pair of dielectric layers as in FIG. 3 is used, a coil is formed inside the magnetic layer, and a pair of dielectrics sandwiching the magnetic layer It is conceivable to form a capacitor inside the layer.
 このような基板を特許文献3に開示された一般的な製造方法で作製する場合、基板を精度よく作製するためには、磁性層を挟持する一対の誘電体層の内部にそれぞれコンデンサを形成し、基板をできるだけ対称な構成にする必要がある。 When such a substrate is manufactured by the general manufacturing method disclosed in Patent Document 3, in order to manufacture the substrate with high accuracy, capacitors are respectively formed inside a pair of dielectric layers that sandwich the magnetic layer. It is necessary to make the substrate as symmetrical as possible.
 しかし、コイルの両側にコンデンサが配置されると、コイルのインダクタンス値が低下する。 However, if capacitors are arranged on both sides of the coil, the inductance value of the coil decreases.
 本発明は、かかる実情に鑑み、高精度に作製することができ、かつコイルのインダクタンス値の低下を防止することができるLC共焼結基板を提供しようとするものである。 In view of such circumstances, the present invention is intended to provide an LC co-sintered substrate that can be manufactured with high accuracy and that can prevent a reduction in the inductance value of a coil.
 本発明は、上記課題を解決するために、以下のように構成したLC共焼結基板を提供する。 In order to solve the above problems, the present invention provides an LC co-sintered substrate configured as follows.
 LC共焼結基板は、(a)磁性体セラミック材料を含む磁性層と、前記磁性層の両側に積層され、誘電体セラミック材料を含む第1及び第2の誘電体層とを有する基板本体と、(b)前記磁性層の内部に形成されたコイルと、(c)前記第1及び第2の誘電体層の一方のみの内部に形成されたコンデンサとを備える。 The LC co-sintered substrate comprises: (a) a substrate body having a magnetic layer containing a magnetic ceramic material; and first and second dielectric layers laminated on both sides of the magnetic layer and containing a dielectric ceramic material; (B) a coil formed in the magnetic layer; and (c) a capacitor formed in only one of the first and second dielectric layers.
 上記構成において、磁性層の両側に積層された第1及び第2の誘電体のうち一方のみの内部にコンデンサが形成されているので、磁性層の内部に形成されたコイルの両側にコンデンサが形成される場合より、磁性層の内部に形成されたコイルのインダクタンス値の低下を防止することができる。 In the above configuration, since the capacitor is formed inside only one of the first and second dielectrics laminated on both sides of the magnetic layer, the capacitor is formed on both sides of the coil formed inside the magnetic layer. As a result, it is possible to prevent the inductance value of the coil formed inside the magnetic layer from decreasing.
 上記構成によれば、未焼成の磁性層と第1及び第2の誘電体層とをコイルやコンデンサになる部分とともに積層、圧着して形成した積層体を焼成することにより、LC共焼結基板を形成できる。第1及び第2の誘電体のうち一方のみの内部にコンデンサが形成されるので非対称な構成となるが、未焼成の積層体の積層方向両側に、積層体が焼結を開始する温度より高い温度で焼結を開始する拘束層が圧着された状態で、積層体が焼結を開始しかつ拘束層は焼結を開始しない温度で焼成する、いわゆる無収縮工法により、LC共焼結基板を高精度に作製することができる。 According to the above configuration, the LC co-sintered substrate is obtained by firing the laminated body formed by laminating and pressing the unfired magnetic layer and the first and second dielectric layers together with the coil and capacitor portions. Can be formed. Since the capacitor is formed inside only one of the first and second dielectrics, the structure is asymmetrical, but higher than the temperature at which the laminate starts to sinter on both sides in the lamination direction of the unfired laminate. An LC co-sintered substrate is formed by a so-called non-shrinking method, in which the laminate starts to be sintered and the constraining layer is fired at a temperature at which the sintering does not start. It can be manufactured with high accuracy.
 好ましくは、前記基板本体は、前記磁性層と前記第1及び第2の誘電体層との間に積層され、非磁性フェライトセラミック材料を含む第1及び第2の非磁性フェライト層をさらに有する。 Preferably, the substrate body further includes first and second nonmagnetic ferrite layers that are stacked between the magnetic layer and the first and second dielectric layers and include a nonmagnetic ferrite ceramic material.
 この場合、第1及び第2の非磁性フェライト層は、未焼成の状態で、未焼成の磁性層と第1及び第2の誘電体層とともに積層、圧着し、同時に焼成することにより、形成できる。第1及び第2の非磁性フェライト層により、磁性層の内部に形成されたコイルのインダクタの効率を向上させることができる。 In this case, the first and second non-magnetic ferrite layers can be formed by laminating and pressing together with the unfired magnetic layer and the first and second dielectric layers in an unfired state, and firing simultaneously. . The first and second nonmagnetic ferrite layers can improve the efficiency of the inductor of the coil formed inside the magnetic layer.
 好ましくは、少なくとも2層の第1及び第2の磁性層を含む前記基板本体は、前記第1及び第2の磁性層の間に、非磁性フェライトセラミック材料を含む中間非磁性フェライト層をさらに有する。 Preferably, the substrate body including at least two first and second magnetic layers further includes an intermediate nonmagnetic ferrite layer including a nonmagnetic ferrite ceramic material between the first and second magnetic layers. .
 この場合、中間非磁性フェライト層は、未焼成の状態で、未焼成の第1及び第2の磁性層の間に積層、圧着し、同時に焼成することにより、形成できる。中間非磁性フェライト層により、磁性層の内部に形成されたコイルの特性を向上(鉄損抑制による電圧の変換効率の向上、或いはインダクタンス値の向上など)させることができる。 In this case, the intermediate nonmagnetic ferrite layer can be formed by laminating and pressing the unfired first and second magnetic layers in the unfired state and simultaneously firing them. The intermediate nonmagnetic ferrite layer can improve the characteristics of the coil formed inside the magnetic layer (improvement of voltage conversion efficiency by suppressing iron loss, improvement of inductance value, etc.).
 好ましくは、前記コイルと前記磁性層との間に空隙を設ける。 Preferably, a gap is provided between the coil and the magnetic layer.
 コイルと磁性層の線膨張係数(熱膨張率)の差によって、焼成後の基板本体内には残留応力による磁歪が生じるため、そのままでは、鉄損によるコイルの電圧変換効率の低下(インダクタンスの低下)が見られる。コイルと磁性層との間に空隙を設けることで、コイルの周辺部の磁性層の応力を緩和し、コイルの特性を向上させることができる。 Magnetostriction due to residual stress occurs in the substrate body after firing due to the difference in the coefficient of linear expansion (thermal expansion coefficient) between the coil and the magnetic layer. Therefore, the voltage conversion efficiency of the coil due to iron loss (decrease in inductance) remains unchanged. ) Is seen. By providing a gap between the coil and the magnetic layer, the stress of the magnetic layer around the coil can be relieved and the characteristics of the coil can be improved.
 好ましくは、前記コイルと前記空隙との間に前記磁性層の薄い層が設けられる。 Preferably, a thin layer of the magnetic layer is provided between the coil and the gap.
 コイルと磁性層の線膨張係数(熱膨張率)の差によって、焼成後の基板本体内には残留応力による磁歪が生じるため、そのままでは、鉄損によるコイルの電圧変換効率の低下(インダクタンスの低下)が見られる。コイルの周りの磁性層内に空隙を設けることで、コイルの周辺部の磁性層の応力を緩和し、コイルの特性を向上させることができる。 Magnetostriction due to residual stress occurs in the substrate body after firing due to the difference in the coefficient of linear expansion (thermal expansion coefficient) between the coil and the magnetic layer. Therefore, the voltage conversion efficiency of the coil due to iron loss (decrease in inductance) remains unchanged. ) Is seen. By providing a gap in the magnetic layer around the coil, the stress of the magnetic layer around the coil can be relieved and the characteristics of the coil can be improved.
 好ましくは、前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方の厚みと、前記第1及び第2の誘電体層のうち他方の厚みとが異なる。 Preferably, the thickness of one of the first and second dielectric layers in which the capacitor is formed is different from the thickness of the other of the first and second dielectric layers.
 この場合、LC共焼結基板の構成が対称ではないが、拘束層を調整することで、無収縮工法によって、LC共焼結基板を高精度に作製することができる。 In this case, although the configuration of the LC co-sintered substrate is not symmetrical, the LC co-sintered substrate can be produced with high accuracy by a non-shrinkage method by adjusting the constraining layer.
 好ましくは、前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方の厚みが、前記第1及び第2の誘電体層のうち他方の厚みよりも厚い。 Preferably, of the first and second dielectric layers, the one of the capacitors in which the capacitor is formed is thicker than the other of the first and second dielectric layers.
 この場合、第1及び第2の誘電体層のうち他方の厚みを薄くすることによって、基板本体を薄くすることができる。 In this case, the substrate body can be thinned by reducing the thickness of the other of the first and second dielectric layers.
 好ましくは、前記基板本体の前記第1及び第2の誘電体層と前記磁性層のうち少なくとも一つを、前記第1及び第2の誘電体層と前記磁性層の積層方向に貫通し、前記コイルと前記コンデンサの少なくとも一方に接続されたビアホール導体をさらに備える。 Preferably, at least one of the first and second dielectric layers and the magnetic layer of the substrate body penetrates in the stacking direction of the first and second dielectric layers and the magnetic layer, and A via hole conductor connected to at least one of the coil and the capacitor is further provided.
 この場合、基板本体内にLC回路を構成することができる。 In this case, an LC circuit can be configured in the substrate body.
 好ましくは、前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方に、前記LC共焼結基板を実装するための端子電極が形成されている。 Preferably, a terminal electrode for mounting the LC co-sintered substrate is formed on the one of the first and second dielectric layers in which the capacitor is formed.
 この場合、誘電体層の内部に形成されたコンデンサと端子電極との間の配線長をできるだけ短くすることができる。 In this case, the wiring length between the capacitor formed inside the dielectric layer and the terminal electrode can be made as short as possible.
 好ましくは、前記第1及び第2の誘電体層の他方に、前記LC共焼結基板に部品を搭載するためのランド電極が形成されている。 Preferably, a land electrode for mounting a component on the LC co-sintered substrate is formed on the other of the first and second dielectric layers.
 この場合、ランド電極に表面実装部品や半導体チップなどの部品を搭載することによって、モジュール部品を作製することができる。 In this case, a module component can be manufactured by mounting a component such as a surface mount component or a semiconductor chip on the land electrode.
 また、本発明は、以下のように構成したLC共焼結基板の製造方法を提供する。 The present invention also provides a method for producing an LC co-sintered substrate configured as follows.
 LC共焼結基板の製造方法は、(a)磁性体セラミック材料を含み、その内部にコイルになる部分を含む未焼成の磁性層の主面両側に、非磁性フェライトセラミック材料を含み、いずれか一方の内部にのみコンデンサになる部分を含む未焼成の第1及び第2の非磁性フェライト層が積層、圧着され、さらに前記第1及び第2の非磁性フェライト層の前記磁性層とは反対側の主面に、誘電体セラミック材料を含む未焼成の第1及び第2の誘電体層が積層、圧着された未焼成の積層体の前記第1及び第2の誘電体層の前記磁性層と前記第1及び第2の非磁性フェライト層とは反対側の主面に、前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とが焼結を開始する焼結開始温度よりも高い温度で焼結を開始する拘束層が積層、圧着された複合積層体を形成する第1の工程と、(b)前記複合積層体を、前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とが焼結を開始する前記焼結開始温度よりも高く、かつ前記拘束層が焼結を開始する焼結開始温度よりも低い温度で焼成して、前記積層体の前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とを焼結させる第2の工程と、(c)前記複合積層体から未焼結の前記拘束層を除去して、焼結が完了した前記積層体を取り出す第3の工程とを備える。 The method for producing an LC co-sintered substrate includes (a) a non-magnetic ferrite ceramic material on both sides of a main surface of an unsintered magnetic layer that includes a magnetic ceramic material and includes a portion that becomes a coil therein. An unsintered first and second nonmagnetic ferrite layer including a portion that becomes a capacitor only in one of the layers is laminated and pressure-bonded, and the first and second nonmagnetic ferrite layers are opposite to the magnetic layer. An unsintered first and second dielectric layers containing a dielectric ceramic material are laminated on the principal surface of the first and second dielectric layers of the unsintered laminate, and the magnetic layers of the first and second dielectric layers are bonded together. The magnetic layer, the first and second nonmagnetic ferrite layers, and the first and second dielectric layers are sintered on the main surface opposite to the first and second nonmagnetic ferrite layers. Start sintering at a temperature higher than the sintering start temperature A first step of forming a composite laminate in which a bundle layer is laminated and pressure-bonded; and (b) the composite laminate includes the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and first layers. The dielectric layer 2 is fired at a temperature higher than the sintering start temperature at which sintering starts and lower than the sintering start temperature at which the constraining layer starts sintering. A second step of sintering the layer, the first and second nonmagnetic ferrite layers, and the first and second dielectric layers; and (c) the constrained layer that has not been sintered from the composite laminate. And a third step of taking out the laminated body that has been sintered.
 上記方法によれば、積層体は、積層体に圧着された拘束層によって、積層体と拘束層との界面において界面方向の変形が阻止される。そのため、焼成により、積層体は積層方向にのみ収縮するので、焼結が完了した積層体によって、高精度なLC共焼結基板を作製することができる。 According to the above method, deformation of the laminated body in the interface direction is prevented at the interface between the laminated body and the constraining layer by the constraining layer pressure-bonded to the laminated body. Therefore, since the laminated body contracts only in the lamination direction by firing, a highly accurate LC co-sintered substrate can be produced by the laminated body that has been sintered.
 磁性層の両側に積層された第1及び第2の誘電体のうち一方のみの内部にコンデンサが形成されているので、磁性層の内部に形成されたコイルの両側にコンデンサが形成されている場合により、磁性層の内部に形成されたコイルのインダクタンス値の低下を防止することができる。 Since the capacitor is formed in only one of the first and second dielectrics laminated on both sides of the magnetic layer, the capacitor is formed on both sides of the coil formed in the magnetic layer. Thus, it is possible to prevent a decrease in inductance value of the coil formed inside the magnetic layer.
 本発明によれば、LC共焼結基板を高精度に作製することができ、かつコイルのインダクタンス値の低下を防止することができる。 According to the present invention, an LC co-sintered substrate can be produced with high accuracy, and a decrease in the inductance value of the coil can be prevented.
LC共焼結基板の断面図である。(実施例1)It is sectional drawing of LC co-sintered board | substrate. Example 1 LC共焼結基板の要部断面図である。(実施例2)It is principal part sectional drawing of LC co-sintered board | substrate. (Example 2) LC共焼結基板の要部断面図である。(変形例)It is principal part sectional drawing of LC co-sintered board | substrate. (Modification) コイル内蔵基板の断面図である。(従来例)It is sectional drawing of a coil built-in board | substrate. (Conventional example)
 以下、本発明の実施の形態について、図1~図3を参照しながら説明する。 Hereinafter, embodiments of the present invention will be described with reference to FIGS.
 <実施例1> 実施例1のLC共焼結基板10について、図1を参照しながら説明する。図1は、LC共焼結基板10の構成を示す断面図である。 <Example 1> The LC co-sintered substrate 10 of Example 1 will be described with reference to FIG. FIG. 1 is a cross-sectional view showing a configuration of the LC co-sintered substrate 10.
 図1に示すように、LC共焼結基板10は、基板本体12の一方主面12aに、LC共焼結基板10に部品を実装するためのランド電極26a~26cが形成され、基板本体12の他方主面12bに、LC共焼結基板10を他の回路基板等に実装するための端子電極28a,28bが形成されている。LC共焼結基板10に部品を実装しない場合、ランド電極26a~26cを無くすことができる。またランド電極26a~26cに接続されているビアホール導体24a~24cの一部をなくすことができる。 As shown in FIG. 1, in the LC co-sintered substrate 10, land electrodes 26a to 26c for mounting components on the LC co-sintered substrate 10 are formed on one main surface 12a of the substrate main body 12. Terminal electrodes 28a and 28b for mounting the LC co-sintered substrate 10 on another circuit board or the like are formed on the other main surface 12b. When no components are mounted on the LC co-sintered substrate 10, the land electrodes 26a to 26c can be eliminated. Further, a part of the via-hole conductors 24a to 24c connected to the land electrodes 26a to 26c can be eliminated.
 基板本体12は、順に、第1の誘電体層16a、第1の非磁性フェライト層18a、第1の磁性層14a、中間非磁性フェライト層18c、第2の磁性層14b、第2の非磁性フェライト層18b、第2の誘電体層16bが積層されている。第1及び第2の磁性層14a,14bは、例えば、酸化鉄、酸化亜鉛、酸化ニッケル及び酸化銅を主成分とする磁性フェライトと、セラミック材料とを含む。すなわち、第1及び第2の磁性層14a,14bは、磁性体セラミック材料を含む。第1及び第2の誘電体層16a,16bは、誘電体セラミック材料を含む。第1及び第2の非磁性フェライト層18a,18bと中間非磁性フェライト層18cとは、例えば、酸化鉄、酸化亜鉛及び酸化銅を主成分とする非磁性フェライトとセラミック材料とを含む。 The substrate body 12 includes, in order, a first dielectric layer 16a, a first nonmagnetic ferrite layer 18a, a first magnetic layer 14a, an intermediate nonmagnetic ferrite layer 18c, a second magnetic layer 14b, and a second nonmagnetic. A ferrite layer 18b and a second dielectric layer 16b are laminated. The first and second magnetic layers 14a and 14b include, for example, magnetic ferrite mainly composed of iron oxide, zinc oxide, nickel oxide, and copper oxide, and a ceramic material. That is, the first and second magnetic layers 14a and 14b include a magnetic ceramic material. The first and second dielectric layers 16a and 16b include a dielectric ceramic material. The first and second nonmagnetic ferrite layers 18a and 18b and the intermediate nonmagnetic ferrite layer 18c include, for example, nonmagnetic ferrite mainly composed of iron oxide, zinc oxide, and copper oxide, and a ceramic material.
 基板本体12内には、ビアホール導体24a~24cと、コイル20と、コンデンサ22とが形成されている。コイル20は、配線導体21a,21bを介してビアホール導体24b,24cに接続されている。コンデンサ22は、ビアホール導体24a,24cに接続されている。 In the substrate body 12, via-hole conductors 24a to 24c, a coil 20, and a capacitor 22 are formed. The coil 20 is connected to the via- hole conductors 24b and 24c via the wiring conductors 21a and 21b. The capacitor 22 is connected to the via- hole conductors 24a and 24c.
 コイル20は、第1及び第2の磁性層14a,14bと中間非磁性フェライト層18cの内部に形成されている。第1及び第2の磁性層14a,14bの間に中間非磁性フェライト層18cを形成することで、中間非磁性フェライト層18cがなく磁性層だけにコイルが形成された場合よりも、インダクタの特性を向上させることができる。 The coil 20 is formed inside the first and second magnetic layers 14a and 14b and the intermediate nonmagnetic ferrite layer 18c. By forming the intermediate nonmagnetic ferrite layer 18c between the first and second magnetic layers 14a and 14b, the characteristics of the inductor can be improved as compared with the case where the coil is formed only in the magnetic layer without the intermediate nonmagnetic ferrite layer 18c. Can be improved.
 コンデンサ22は、第1及び第2の誘電体層16a,16bのうち一方16bのみの内部に形成され、他方16aの内部にはコンデンサが形成されていない。コイル20の片側のみにコンデンサ22が形成されているので、コイル20の両側にコンデンサが形成される場合よりも、良好なインダクタンス値を得ることができる。 The capacitor 22 is formed only in one 16b of the first and second dielectric layers 16a and 16b, and no capacitor is formed in the other 16a. Since the capacitor 22 is formed only on one side of the coil 20, a better inductance value can be obtained than in the case where the capacitor is formed on both sides of the coil 20.
 第1の誘電体層16aにはコンデンサが形成されないため、第1の誘電体層16aの厚みを、第2の誘電体層16bの厚みよりも小さくして、基板本体12を薄くすることができる。 Since no capacitor is formed on the first dielectric layer 16a, the thickness of the first dielectric layer 16a can be made smaller than the thickness of the second dielectric layer 16b to make the substrate body 12 thinner. .
 LC共焼結基板10は、低温焼成可能なセラミックグリーンシートと低融点金属による導体パターンとを積層してなる未焼成の多層セラミック体(積層体)の上下両主面にアルミナ等を主成分とする収縮抑制層を密着させ、これらを多層セラミック体(積層体)の焼成温度で焼成した後、未焼結の収縮抑制層を除去するという、いわゆる無収縮工法によって製造することができる。無収縮工法によって製造すると、第1の誘電体層16aの厚みと第2の誘電体層16bの厚みが異なり、基板本体12の構成が対称でなくても、高精度に作製することができる。また、基板本体12の構成が対称でなくても、反り、歪みなどの製造ばらつきが小さくなる。 The LC co-sintered substrate 10 is mainly composed of alumina or the like on both upper and lower main surfaces of an unfired multilayer ceramic body (laminated body) formed by laminating a ceramic green sheet that can be fired at a low temperature and a conductor pattern made of a low melting point metal. The shrinkage-suppressing layers to be adhered are brought into close contact with each other, fired at the firing temperature of the multilayer ceramic body (laminated body), and then the unsintered shrinkage-suppressing layer is removed. When manufactured by the non-shrinking method, the thickness of the first dielectric layer 16a and the thickness of the second dielectric layer 16b are different, and the substrate body 12 can be manufactured with high accuracy even if the configuration of the substrate body 12 is not symmetric. Even if the configuration of the substrate body 12 is not symmetrical, manufacturing variations such as warpage and distortion are reduced.
 次に、LC共焼結基板10を、集合基板状態で作製する場合の製造工程について説明する。 Next, a manufacturing process in the case where the LC co-sintered substrate 10 is produced in an aggregate substrate state will be described.
 (1)まず、基板本体12の各層と拘束層とを形成するため、セラミック材料粉末を含み、シート状に成形された未焼結のセラミックグリーンシートを準備する。 (1) First, to form each layer of the substrate body 12 and the constraining layer, an unsintered ceramic green sheet containing ceramic material powder and formed into a sheet shape is prepared.
 第1及び第2の磁性層14a,14bになるセラミックグリーンシートには、例えば、酸化鉄、酸化亜鉛、酸化ニッケル及び酸化銅を主成分とする磁性フェライトを用いる。第1及び第2の非磁性フェライト層18a,18bと中間非磁性フェライト層18cとになるセラミックグリーンシートには、例えば、酸化鉄、酸化亜鉛及び酸化銅を主成分とする非磁性フェライトを用いる。 For the ceramic green sheets used as the first and second magnetic layers 14a and 14b, for example, magnetic ferrite containing iron oxide, zinc oxide, nickel oxide and copper oxide as main components is used. For the ceramic green sheet that becomes the first and second nonmagnetic ferrite layers 18a, 18b and the intermediate nonmagnetic ferrite layer 18c, for example, nonmagnetic ferrite containing iron oxide, zinc oxide, and copper oxide as main components is used.
 セラミックグリーンシートには、適宜位置にレーザー加工やパンチング加工等により貫通孔を加工し、この貫通孔に導体ペーストを印刷等により埋め込むことによって、焼成後にビアホール導体となる部分を配置する。また、セラミックグリーンシートの一方主面に、導体ペーストをスクリーン印刷法やグラビア印刷法等により印刷するか、あるいは所定パターン形状の金属箔を転写する等によって、コイル20、コンデンサ22、配線導体21a,21bを形成する導体パターンを形成する。 In the ceramic green sheet, a through hole is processed at an appropriate position by laser processing, punching processing, or the like, and a conductor paste is embedded in the through hole by printing or the like, thereby arranging a portion that becomes a via hole conductor after firing. Also, the coil 20, the capacitor 22, the wiring conductor 21a, the conductor paste is printed on one main surface of the ceramic green sheet by screen printing or gravure printing, or by transferring a metal foil having a predetermined pattern shape. A conductor pattern for forming 21b is formed.
 拘束層に用いる収縮抑制用グリーンシートは、シート状に成形された未焼結のグリーンシートである。収縮抑制用グリーンシートは、基板本体12の各層を形成するためのセラミックグリーンシートの焼成温度よりも高温で焼結するアルミナ等の無機材料粉末を含み、基板本体12の各層を形成するためのセラミックグリーンシートの焼結温度では実質的に焼結しない。 The shrinkage-suppressing green sheet used for the constraining layer is an unsintered green sheet formed into a sheet shape. The green sheet for shrinkage suppression includes an inorganic material powder such as alumina that is sintered at a temperature higher than the firing temperature of the ceramic green sheet for forming each layer of the substrate body 12, and a ceramic for forming each layer of the substrate body 12. The green sheet is not substantially sintered at the sintering temperature.
 (2)次いで、基板本体12の各層を形成する未焼結のセラミックグリーンシートを積層して積層体の積層方向両側に、収縮抑制用グリーンシートを含む拘束層が配置された複合積層体を作製する。積層方向に比較的小さい圧力を加え、積層体の各層と拘束層とを仮圧着する。 (2) Next, an unsintered ceramic green sheet that forms each layer of the substrate body 12 is laminated to produce a composite laminate in which constraining layers including shrinkage-suppressing green sheets are arranged on both sides in the lamination direction of the laminate. To do. A relatively small pressure is applied in the stacking direction to temporarily press-bond each layer of the stack and the constraining layer.
 複合積層体は、仮圧着した積層体を作製した後に、収縮抑制用グリーンシートを積層してさらに仮圧着することにより作製してもよいし、基板本体12の各層となるセラミックグリーンシートと収縮抑制用グリーンシートとを積層した後、一括して仮圧着することにより作製してもよい。 The composite laminate may be prepared by preparing a temporarily bonded laminate and then laminating the shrinkage-suppressing green sheets and further temporarily pressing, or the ceramic green sheets that form the layers of the substrate body 12 and the shrinkage suppression. It may be produced by laminating the green sheets for use and then temporarily pressing them together.
 拘束層は、基板本体12の各層を形成する未焼結のセラミックグリーンシートを積層した積層体に、収縮抑制用グリーンシートを作製するためのスラリーをスクリーン印刷により塗布することによって形成してもよい。支持体上に収縮抑制用グリーンシートを形成し、それを、基板本体12の各層を形成する未焼結のセラミックグリーンシートを積層した積層体上に転写することにより、形成してもよい。 The constraining layer may be formed by applying a slurry for producing a shrinkage-suppressing green sheet by screen printing on a laminate in which unsintered ceramic green sheets forming each layer of the substrate body 12 are laminated. . You may form by forming the green sheet for shrinkage | contraction suppression on a support body, and transferring it on the laminated body which laminated | stacked the unsintered ceramic green sheet which forms each layer of the board | substrate body 12. FIG.
 (3)次いで、複合積層体に比較的大きい圧力を加え、積層体に拘束層を本圧着する。 (3) Next, a relatively large pressure is applied to the composite laminate, and a constraining layer is finally bonded to the laminate.
 (4)次いで、積層体に拘束層を本圧着した複合積層体を焼成する。焼成は、基板本体12になる積層体の各層を形成するセラミックグリーンシートに含まれるセラミック材料粉末を焼結させ、拘束層の収縮抑制用グリーンシートに含まれる無機材料粉末は焼結させない条件下で行う。すなわち、基板本体12になる積層体の各層を形成するセラミックグリーンシートの焼成温度よりは高く、かつ、拘束層の収縮抑制用グリーンシートの焼成温度よりは低い温度で、焼成する。 (4) Next, the composite laminate in which the constraining layer is finally bonded to the laminate is fired. Firing is performed under the conditions in which the ceramic material powder included in the ceramic green sheet forming each layer of the laminate that becomes the substrate body 12 is sintered and the inorganic material powder included in the green sheet for suppressing shrinkage of the constraining layer is not sintered. Do. That is, the firing is performed at a temperature higher than the firing temperature of the ceramic green sheet forming each layer of the laminated body that becomes the substrate body 12 and lower than the firing temperature of the green sheet for suppressing shrinkage of the constraining layer.
 (5)次いで、焼成後の複合積層体から拘束層を除去することによって、焼成済みの積層体、すなわちLC共焼結基板10を取り出し、必要に応じて、基板本体12の主面12a,12bに形成されたランド電極26a~26cと端子電極28a,28bにメッキを行う。 (5) Next, by removing the constraining layer from the fired composite laminate, the fired laminate, that is, the LC co-sintered substrate 10 is taken out, and the main surfaces 12a and 12b of the substrate body 12 are removed as necessary. The land electrodes 26a to 26c and the terminal electrodes 28a and 28b formed in the above are plated.
 (6)以上の工程に完成したLC共焼結基板10のランド電極26a~26cに、表面実装部品やICチップなどの部品を実装し、LC教焼結基板の個片に分割し、モジュール化する。 (6) Mount components such as surface mount components and IC chips on the land electrodes 26a to 26c of the LC co-sintered substrate 10 completed in the above process, and divide it into individual pieces of the LC teaching substrate. To do.
 <作製例1>
 第1及び第2の磁性層14a,14bは、それぞれ、焼成後の厚みが100~2000μmであり、透磁率μ=約290である。第1及び第2の非磁性フェライト層18a,18bと中間非磁性フェライト層18cは、それぞれ、焼成後の厚みが10~100μmであり、透磁率μ=1である。第1及び第2の誘電体層16a,16bは、それぞれ、焼成後厚みが10~400μmであり、比誘電率ε=8.8のガラスセラミックである。ランド電極26a~26cや端子電極28a,28bの材料は、Ag,Cuなどである。
<Production Example 1>
The first and second magnetic layers 14a and 14b each have a thickness after firing of 100 to 2000 μm and a permeability μ = about 290. The first and second nonmagnetic ferrite layers 18a and 18b and the intermediate nonmagnetic ferrite layer 18c each have a thickness after firing of 10 to 100 μm and a magnetic permeability μ = 1. Each of the first and second dielectric layers 16a and 16b is a glass ceramic having a thickness after firing of 10 to 400 μm and a relative dielectric constant ε = 8.8. The material of the land electrodes 26a to 26c and the terminal electrodes 28a and 28b is Ag, Cu or the like.
 例えば、第1及び第2の磁性層14a,14bは線膨張係数α=10であり、第1及び第2の非磁性フェライト層18a,18bと中間非磁性フェライト層18cは線膨張係数α=9.4であり、第1及び第2の誘電体層16a,16bは線膨張係数α=7.7である。これにより、焼成時の積層体の層間の熱変形差を緩和し、クラック等の発生を防止することができる。 For example, the first and second magnetic layers 14a and 14b have a linear expansion coefficient α = 10, and the first and second nonmagnetic ferrite layers 18a and 18b and the intermediate nonmagnetic ferrite layer 18c have a linear expansion coefficient α = 9. .4, and the first and second dielectric layers 16a and 16b have a linear expansion coefficient α = 7.7. Thereby, the thermal deformation difference between the layers of the laminated body at the time of firing can be relaxed, and the occurrence of cracks and the like can be prevented.
 焼成前の積層体を、アルミナ材等による厚さ50~1000μmの拘束層で挟んだ複合積層体を、最高温度850~990℃で焼結させたのちに、拘束層を除去する。 After sintering the laminate before firing with a constraining layer having a thickness of 50 to 1000 μm made of alumina material or the like at a maximum temperature of 850 to 990 ° C., the constraining layer is removed.
 磁性層14a,14bに関して片側の第2の誘電体層16bのみの内部にコンデンサ22を形成すると、非対称な構造となる。この場合、積層体の表裏の拘束層の枚数や厚み等の調整によって、焼成後の基板本体12のそりを抑制することができる。 When the capacitor 22 is formed only inside the second dielectric layer 16b on one side with respect to the magnetic layers 14a and 14b, an asymmetric structure is obtained. In this case, warpage of the substrate body 12 after firing can be suppressed by adjusting the number and thickness of the constraining layers on the front and back of the laminate.
 例えば、主面が135mm×135mmの正方形である基板本体12の作製例1では、主面の各辺の直線からのずれ(非直線性歪)が50μm以内となり、焼成収縮率が99.5~100%、すなわち、拘束層によって拘束された主面の焼成後の面積は、焼成前の面積の99.0~100%となり、非対称な構成であっても、高精度な基板本体12を得ることができる。 For example, in Production Example 1 of the substrate body 12 whose main surface is a square of 135 mm × 135 mm, the deviation of each side of the main surface from the straight line (nonlinear distortion) is within 50 μm, and the firing shrinkage rate is 99.5 to 100%, that is, the area after firing of the main surface constrained by the constraining layer is 99.0 to 100% of the area before firing, and a highly accurate substrate body 12 can be obtained even with an asymmetric configuration. Can do.
 コイル20の両側にコンデンサを形成すると、コイル20のインダクタンス値が低下するが、コンデンサ22はコイル20の片側のみに形成されているので、コイル20のインダクタンス値を向上させることができる。コンデンサ22が形成されていない第1の誘電体層16aは薄くすることができるので、コイル20の両側にコンデンサを形成する場合よりも、基板本体12の厚みを薄くすることができる。 When a capacitor is formed on both sides of the coil 20, the inductance value of the coil 20 is lowered. However, since the capacitor 22 is formed only on one side of the coil 20, the inductance value of the coil 20 can be improved. Since the first dielectric layer 16a on which the capacitor 22 is not formed can be made thinner, the thickness of the substrate body 12 can be made thinner than when capacitors are formed on both sides of the coil 20.
 <作製例2> 磁性層14a,14bの磁性体は透磁率μ=2~500であり、非磁性フェライト層18a~18cに含まれる非磁性フェライトは透磁率μ=1であり、誘電体層16a,16bは比誘電率ε=5~80のガラスセラミックである。この場合も、作製例1と同じく、非対称な構成であっても、高精度な基板本体12を得ることができ、基板本体12の厚みを薄くすることができる。 <Production Example 2> The magnetic material of the magnetic layers 14a and 14b has a permeability μ = 2 to 500, and the nonmagnetic ferrite contained in the nonmagnetic ferrite layers 18a to 18c has a permeability μ = 1, and the dielectric layer 16a. , 16b is a glass ceramic having a relative dielectric constant ε = 5 to 80. In this case as well, even in the case of the asymmetric configuration, the highly accurate substrate body 12 can be obtained and the thickness of the substrate body 12 can be reduced as in the case of the manufacturing example 1.
 <作製例3> 作製例1、2において、コイル20と磁性層14a,14bとの間に空隙29を設けた変形例の構成の要部断面図を図3に示す。 <Production Example 3> FIG. 3 shows a cross-sectional view of the main part of the configuration of a modification example in which a gap 29 is provided between the coil 20 and the magnetic layers 14a and 14b in Production Examples 1 and 2.
 コイル20を形成する導体パターンに接するようにスクリーン印刷によりカーボンペーストを塗布して、焼成によりカーボンが燃焼し消失させることにより、コイル20と磁性層14a,14bとの境界に空隙29を形成する。コイル20と磁性層14a,14bの線膨張係数(熱膨張率)の差によって、焼成後の基板本体12内には残留応力による磁歪が生じるため、鉄損によるコイル20の電圧変換効率の低下が見られる。コイル20と磁性層14a,14bとの間に空隙29を設けることで、コイル20の周辺部の磁性層の応力を緩和し、コイル20の特性を向上させることができる。 A carbon paste is applied by screen printing so as to be in contact with the conductor pattern forming the coil 20, and the carbon burns and disappears by firing, thereby forming a gap 29 at the boundary between the coil 20 and the magnetic layers 14a and 14b. Magnetostriction due to residual stress occurs in the substrate body 12 after firing due to the difference in the linear expansion coefficient (thermal expansion coefficient) between the coil 20 and the magnetic layers 14a and 14b, and thus the voltage conversion efficiency of the coil 20 is reduced due to iron loss. It can be seen. By providing the air gap 29 between the coil 20 and the magnetic layers 14a and 14b, the stress of the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
 なお、コイル20と空隙29との間に磁性層の薄層が設けられてもよい。この場合でも空隙29を設けることで、コイル20の周辺部の磁性層内の応力を緩和し、コイル20の特性を向上させることができる。 Note that a thin magnetic layer may be provided between the coil 20 and the gap 29. Even in this case, by providing the air gap 29, the stress in the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
 <実施例2> 実施例2のLC共焼結基板について、図2を参照しながら説明する。実施例2のLC共焼結基板は、実施例1のLC共焼結基板10と略同様に構成されている。以下では、実施例1と同じ構成部分には同じ符号を用い、実施例1との相違点を中心に説明する。 <Example 2> The LC co-sintered substrate of Example 2 will be described with reference to FIG. The LC co-sintered substrate of Example 2 is configured in substantially the same manner as the LC co-sintered substrate 10 of Example 1. In the following, the same reference numerals are used for the same components as in the first embodiment, and differences from the first embodiment will be mainly described.
 図2は、実施例2のLC共焼結基板の構成を示す要部断面図である。図2に示すように、実施例2のLC共焼結基板は、第1及び第2の磁性層14a,14bと中間非磁性フェライト層18cとに形成されるコイル20aの構成が、実施例1とは異なる。 FIG. 2 is a cross-sectional view of the main part showing the configuration of the LC co-sintered substrate of Example 2. As shown in FIG. 2, in the LC co-sintered substrate of Example 2, the configuration of the coil 20a formed on the first and second magnetic layers 14a and 14b and the intermediate nonmagnetic ferrite layer 18c is the same as that of Example 1. Is different.
 すなわち、コイル20aは、略C字状に形成された大小の導体パターン20s,20tが、同心かつ基板本体12の各層の積層方向に交互に配置され、不図示のビアホール導体を介して接続されている。大小の導体パターン20s,20tは、基板本体12の各層の積層方向から透視すると、互いに重ならないように配置されている。コイル20aの導体パターン20s,20tは、位置をずらして配置されているので、基板本体12の積層方向の厚み変化を緩和することができる。そのため、基板本体12の表面の平坦度を向上することができる。また、コイル20aの導体パターン20s,20tと磁性層14a,14bとの間で発生する焼成時の応力を分散させて、クラック発生を防止することができる。 That is, in the coil 20a, large and small conductor patterns 20s and 20t formed in a substantially C shape are arranged concentrically and alternately in the stacking direction of each layer of the substrate body 12, and are connected via via hole conductors (not shown). Yes. The large and small conductor patterns 20 s and 20 t are arranged so as not to overlap each other when seen through from the stacking direction of each layer of the substrate body 12. Since the conductor patterns 20s and 20t of the coil 20a are arranged at different positions, the thickness change in the stacking direction of the substrate body 12 can be reduced. Therefore, the flatness of the surface of the substrate body 12 can be improved. Moreover, the cracking can be prevented by dispersing the firing stress generated between the conductor patterns 20s and 20t of the coil 20a and the magnetic layers 14a and 14b.
 実施例2においても、コイル20aと磁性層14a,14bとの間に空隙29を設けることで、コイル20の周辺部の磁性層の応力を緩和し、コイル20の特性を向上させることができる。 Also in Example 2, by providing the air gap 29 between the coil 20a and the magnetic layers 14a and 14b, the stress of the magnetic layer around the coil 20 can be relieved and the characteristics of the coil 20 can be improved.
 <まとめ> 以上のように、その内部にコイル20が形成された磁性層14a,14bの両側に配置された第1及び第2の誘電体層16a,16bのうち、一方16bのみにコンデンサ22が形成された非対称な構成とすることにより、コイル20のインダクタンス値の低下を防止することができる。非対称な構成であっても、拘束層を圧着した状態で焼成する無収縮工法により、LC共焼結基板を高精度に作製することができる。 <Summary> As described above, among the first and second dielectric layers 16a and 16b arranged on both sides of the magnetic layers 14a and 14b in which the coil 20 is formed, the capacitor 22 is provided only on one 16b. By using the formed asymmetric configuration, it is possible to prevent a decrease in the inductance value of the coil 20. Even with an asymmetric configuration, an LC co-sintered substrate can be produced with high accuracy by a non-shrinking method in which the constraining layer is baked in a pressure-bonded state.
 なお、本発明は、上記実施の形態に限定されるものではなく、種々変更を加えて実施することが可能である。 It should be noted that the present invention is not limited to the above embodiment, and can be implemented with various modifications.
 10 LC共焼結基板
 12 基板本体
 14a,14b 磁性層
 16a,16b 誘電体層
 18a,18b,18c 非磁性フェライト層
 20,20a コイル
 22 コンデンサ
 24a~24c ビアホール導体
 26a~26c ランド電極
 28a,28b 端子電極
10 LC co-sintered substrate 12 Substrate body 14a, 14b Magnetic layer 16a, 16b Dielectric layer 18a, 18b, 18c Nonmagnetic ferrite layer 20, 20a Coil 22 Capacitor 24a-24c Via-hole conductor 26a- 26c Land electrode 28a, 28b Terminal electrode

Claims (11)

  1.  磁性体セラミック材料を含む磁性層と、前記磁性層の両側に積層され、誘電体セラミック材料を含む第1及び第2の誘電体層とを有する基板本体と、
     前記磁性層の内部に形成されたコイルと、
     前記第1及び第2の誘電体層の一方のみの内部に形成されたコンデンサと、
    を備えたことを特徴とする、LC共焼結基板。
    A substrate body having a magnetic layer containing a magnetic ceramic material, and first and second dielectric layers laminated on both sides of the magnetic layer and containing a dielectric ceramic material;
    A coil formed inside the magnetic layer;
    A capacitor formed within only one of the first and second dielectric layers;
    An LC co-sintered substrate, comprising:
  2.  前記基板本体は、前記磁性層と前記第1及び第2の誘電体層との間に積層され、非磁性フェライトセラミック材料を含む第1及び第2の非磁性フェライト層をさらに有することを特徴とする、請求項1に記載のLC共焼結基板。 The substrate body further includes first and second nonmagnetic ferrite layers that are laminated between the magnetic layer and the first and second dielectric layers and include a nonmagnetic ferrite ceramic material. The LC co-sintered substrate according to claim 1.
  3.  前記基板本体の磁性層は、少なくとも2層の第1及び第2の磁性層を含み、
     前記基板本体は、前記第1及び第2の磁性層の間に、非磁性フェライトセラミック材料を含む中間非磁性フェライト層をさらに有することを特徴とする、請求項1又は2に記載のLC共焼結基板。
    The magnetic layer of the substrate body includes at least two first and second magnetic layers,
    The LC co-firing according to claim 1 or 2, wherein the substrate body further includes an intermediate nonmagnetic ferrite layer containing a nonmagnetic ferrite ceramic material between the first and second magnetic layers. Bonding board.
  4.  前記コイルと前記磁性層との間に空隙を設けることを特徴とする、請求項1乃至3のいずれか一つに記載のLC共焼結基板。 The LC co-sintered substrate according to any one of claims 1 to 3, wherein a gap is provided between the coil and the magnetic layer.
  5.  前記コイルと前記空隙との間に前記磁性層の薄い層が設けられたことを特徴とする、請求項4に記載のLC共焼結基板。 The LC co-sintered substrate according to claim 4, wherein a thin layer of the magnetic layer is provided between the coil and the gap.
  6.  前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方の厚みと、前記第1及び第2の誘電体層のうち他方の厚みとが異なることを特徴とする、請求項1乃至5のいずれか一つに記載のLC共焼結基板。 The thickness of the one of the first and second dielectric layers in which the capacitor is formed is different from the thickness of the other of the first and second dielectric layers. The LC co-sintered substrate according to any one of claims 1 to 5.
  7.  前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方の厚みが、前記第1及び第2の誘電体層のうち他方の厚みよりも大きいことを特徴とする、請求項1乃至5のいずれか一つに記載のLC共焼結基板。 The one of the first and second dielectric layers having the capacitor formed therein is thicker than the other of the first and second dielectric layers. The LC co-sintered substrate according to any one of claims 1 to 5.
  8.  前記基板本体の前記第1及び第2の誘電体層と前記磁性層のうち少なくとも一つを、前記第1及び第2の誘電体層と前記磁性層の積層方向に貫通し、前記コイルと前記コンデンサの少なくとも一方に接続されたビアホール導体をさらに備えたことを特徴とする、請求項7に記載のLC共焼結基板。 Passing through at least one of the first and second dielectric layers and the magnetic layer of the substrate body in the stacking direction of the first and second dielectric layers and the magnetic layer, the coil and the magnetic layer The LC co-sintered substrate according to claim 7, further comprising a via-hole conductor connected to at least one of the capacitors.
  9.  前記第1及び第2の誘電体層のうちその内部に前記コンデンサが形成された前記一方に、前記LC共焼結基板を実装するための端子電極が形成されたことを特徴とする、請求項1乃至8のいずれか一つに記載のLC共焼結基板。 The terminal electrode for mounting the LC co-sintered substrate is formed on the one of the first and second dielectric layers in which the capacitor is formed. The LC co-sintered substrate according to any one of 1 to 8.
  10.  前記第1及び第2の誘電体層の他方に、前記LC共焼結基板に部品を搭載するためのランド電極が形成されたことを特徴とする、請求項1乃至9のいずれか一つに記載のLC共焼結基板。 The land electrode for mounting a component on the LC co-sintered substrate is formed on the other of the first and second dielectric layers, according to any one of claims 1 to 9, The LC co-sintered substrate as described.
  11.  磁性体セラミック材料を含み、その内部にコイルになる部分を含む未焼成の磁性層の主面両側に、非磁性フェライトセラミック材料を含み、いずれか一方の内部にのみコンデンサになる部分を含む未焼成の第1及び第2の非磁性フェライト層が積層、圧着され、さらに前記第1及び第2の非磁性フェライト層の前記磁性層とは反対側の主面に、誘電体セラミック材料を含む未焼成の第1及び第2の誘電体層が積層、圧着された未焼成の積層体の前記第1及び第2の誘電体層の前記磁性層と前記第1及び第2の非磁性フェライト層とは反対側の主面に、前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とが焼結を開始する焼結開始温度よりも高い温度で焼結を開始する拘束層が積層、圧着された複合積層体を形成する第1の工程と、
     前記複合積層体を、前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とが焼結を開始する前記焼結開始温度よりも高く、かつ前記拘束層が焼結を開始する焼結開始温度よりも低い温度で焼成して、前記積層体の前記磁性層と前記第1及び第2の非磁性フェライト層と前記第1及び第2の誘電体層とを焼結させる第2の工程と、
     前記複合積層体から未焼結の前記拘束層を除去して、焼結が完了した前記積層体を取り出す第3の工程と、
    を備えたことを特徴とする、LC共焼結基板の製造方法。
    Non-sintered that includes a magnetic ceramic material and includes a non-magnetic ferrite ceramic material on both sides of the main surface of the unsintered magnetic layer including a part that becomes a coil inside, and a part that becomes a capacitor only inside one of them The first and second non-magnetic ferrite layers are laminated and pressure-bonded, and the first and second non-magnetic ferrite layers on the main surface opposite to the magnetic layer contain a dielectric ceramic material. The first and second dielectric layers of the unfired laminate in which the first and second dielectric layers are laminated and pressure-bonded are the magnetic layer and the first and second non-magnetic ferrite layers. On the opposite main surface, the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and second dielectric layers are sintered at a temperature higher than a sintering start temperature at which the sintering starts. A composite laminate in which a constraining layer that initiates bonding is laminated and pressure-bonded A first step of forming,
    The composite laminate is higher than the sintering start temperature at which the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and second dielectric layers start sintering, and the The constraining layer is fired at a temperature lower than a sintering start temperature at which sintering starts, and the magnetic layer, the first and second nonmagnetic ferrite layers, and the first and second dielectrics of the laminated body. A second step of sintering the layers;
    A third step of removing the unsintered constraining layer from the composite laminate and taking out the laminate that has been sintered;
    A method for producing an LC co-sintered substrate, comprising:
PCT/JP2011/053138 2010-05-26 2011-02-15 Lc co-sintered substrate and method for producing same WO2011148678A1 (en)

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